Dual-mode notch filter

Abstract

A dual-mode notch filter for use in a multi-band millimeter wave (mmW) transmitter, the dual-mode notch filter including a transmit filter circuit disposed between two amplifiers in a mmW transmit signal path, the transmit filter circuit formed from at least one switch, at least one capacitor, and a dual-tuned transformer, the transmit filter circuit having at least two modes configured to selectively filter spurious signals in at least a first communication band.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority and benefit to U.S. Provisional Patent Application No. 63 / 127,912, filed December 18, 2020, entitled “DUAL MODE NOTCH FILTER,” the contents of which are incorporated herein by reference in their entirety as if fully set forth herein for all applicable purposes. Technical Field

[0003] This disclosure relates generally to electronics, and more specifically to radio frequency (RF) transmitters and receivers. Background Technology

[0004] Wireless communication devices and technologies are becoming increasingly common, as are communication devices operating at millimeter-wave (mmW) frequencies. Wireless communication devices typically transmit and / or receive communication signals.

[0005] In mmW communication systems, transmitters typically use one or more amplifier stages with one or more mixers to upconvert signals for transmission. For example, in the upconversion path, a baseband (or near-baseband) signal or intermediate frequency (IF) signal can be upconverted by a mixer to a radio frequency (RF) signal for transmission. This upconversion can generate parasitic tones at the mixer output. These parasitic signals or tones (sometimes called parasites) may appear at the local oscillator (LO) frequency, as well as harmonic frequencies of the LO signal, such as twice the LO (2LO) frequency, and may have signal energy that appears close enough to the communication signal's frequency band to adversely affect the communication signal. Other parasitic signals unrelated to the upconversion process may also occur. Summary of the Invention

[0006] Various implementations of the systems, methods, and apparatuses within the scope of the appended claims each have several aspects, none of which alone is responsible for the desired properties described herein. Without limiting the scope of the appended claims, some prominent features are described herein.

[0007] Details of one or more implementations of the subject matter described in this specification are set forth in the accompanying drawings and the following description. Other features, aspects, and advantages will become apparent from the description, drawings, and claims. It should be noted that the relative dimensions in the following drawings may not be drawn to scale.

[0008] One aspect of this disclosure provides a transmit filter circuit, comprising: a positive input terminal; a negative input terminal; a center-tapped inductor including a first terminal coupled to the positive input terminal and a second terminal coupled to the negative input terminal; a switch having a first terminal and a second terminal, the first terminal being coupled to the first terminal of the center-tapped inductor and the second terminal being coupled to the second terminal of the center-tapped inductor; a first capacitor coupled between the first terminal of the switch and the first terminal of the center-tapped inductor; and a second capacitor coupled between the second terminal of the switch and the second terminal of the center-tapped inductor.

[0009] Another aspect of this disclosure provides a transmit filter circuit located at one or more positions along the mmW signal path after the upconversion mixer in a multi-band millimeter-wave (mmW) transmitter incorporating a transmit architecture including an upconversion mixer. This transmit filter circuit is configured to reduce unwanted spectral emissions of a local oscillator (LO) signal in at least one of a first and a second communication band. The transmit filter circuit is formed by at least one switch, a center-tapped inductor, and a capacitor. The transmit filter circuit is configured to provide a first filter response in a first operating mode, which is configured to reduce unwanted spectral emissions of the LO signal to a first communication signal in the first communication band while having a negligible effect on a second communication signal in the second communication band. The transmit filter circuit is also configured to provide a second filter response in a second operating mode.

[0010] Another aspect of this disclosure provides a method for filtering communication signals, comprising: providing a first filter response; and providing a second filter response, the first filter response being configured to reduce unwanted spectral emissions of a local oscillator (LO) signal to a first communication signal in a first communication band, while having a negligible effect on a second communication signal in a second communication band.

[0011] Another aspect of this disclosure provides an apparatus including components for providing a first filter response and components for providing a second filter response, the first filter response being configured to reduce unwanted spectral emissions of a local oscillator (LO) signal to a first communication signal in a first communication band, while having a negligible effect on a second communication signal in a second communication band.

[0012] Another aspect of this disclosure provides a dual-mode notch filter for a multi-band millimeter-wave (mmW) transmitter, the dual-mode notch filter including a transmit filter circuit located at one or more locations along the mmW signal path, the transmit filter circuit being formed by at least one switch, a center-tapped inductor, and a capacitor, the transmit filter circuit being configured to reduce unwanted spectral emissions of parasitic signals in at least one of a first communication band and a second communication band.

[0013] Another aspect of this disclosure provides a dual-mode notch filter for a multi-band millimeter-wave (mmW) transmitter, the dual-mode notch filter including a transmit filter circuit disposed between two amplifiers in the mmW transmit signal path. The transmit filter circuit may be formed by at least one switch, at least one capacitor, and a dual-tuned transformer. Furthermore, the transmit filter circuit may have at least two modes configured to selectively filter parasitic signals in at least a first communication frequency band. Attached Figure Description

[0014] In the accompanying drawings, unless otherwise specified, the same reference numerals refer to the same parts throughout the various views. For reference numerals with letter characters (such as "102a" or "102b"), the letter characters can distinguish two similar parts or elements appearing in the same drawing. When it is desired that the reference numerals cover all parts with the same reference numerals in all drawings, the letter symbol indication of the reference numerals may be omitted.

[0015] Figure 1 This is a diagram showing a wireless device communicating with a wireless communication system.

[0016] Figure 2 This is a block diagram illustrating a wireless device in which exemplary technologies of the present disclosure may be implemented.

[0017] Figure 3A This is a block diagram of at least a portion of an exemplary transmitter chain in which an exemplary embodiment of a dual-mode notch filter can be implemented.

[0018] Figure 3B This is a block diagram of at least a portion of an exemplary transmitter chain in which an exemplary embodiment of a dual-mode notch filter can be implemented.

[0019] Figure 4 A graph showing a portion of the communication spectrum is displayed.

[0020] Figure 5 This is a diagram illustrating a dual-mode notch filter according to an exemplary embodiment of the present disclosure.

[0021] Figure 6 It is shown Figure 5A graph illustrating the exemplary state-related response of a dual-mode notch filter.

[0022] Figure 7 This is a diagram illustrating a dual-mode notch filter according to an exemplary embodiment of the present disclosure.

[0023] Figure 8 It is shown Figure 7 A graph illustrating the exemplary state-related response of a dual-mode notch filter.

[0024] Figure 9 It is shown Figure 7 A graph illustrating the exemplary switch-size-dependent response of a dual-mode notch filter.

[0025] Figure 10 This is a diagram illustrating a dual-mode notch filter according to an exemplary embodiment of the present disclosure.

[0026] Figure 11 It is shown Figure 10 A graph illustrating the exemplary state-related response of a dual-mode notch filter.

[0027] Figure 12 It is shown Figure 5 Dual-mode notch filter and Figure 10 A graph illustrating the exemplary state-related response of a dual-mode notch filter.

[0028] Figure 13 This is a diagram illustrating a dual-mode notch filter according to an exemplary embodiment of the present disclosure.

[0029] Figure 14A It shows when Figure 13 A graph showing the response of an exemplary bias voltage-dependent filter when the dual-mode notch filter is in off mode.

[0030] Figure 14B It shows when Figure 13 A graph showing the response of an exemplary bias voltage-dependent filter when the dual-mode notch filter is in conduction mode.

[0031] Figure 15 This is a diagram illustrating a dual-mode notch filter according to an exemplary embodiment of the present disclosure.

[0032] Figure 16 It is shown Figure 15 A graph illustrating the exemplary state-related response of a dual-mode notch filter.

[0033] Figure 17 It is shown Figure 15 A graph illustrating the exemplary switch-size-dependent response of a dual-mode notch filter.

[0034] Figure 18This is a flowchart describing an operational example of a dual-mode notch filter according to an exemplary embodiment of the present disclosure.

[0035] Figure 19 This is a functional block diagram of an apparatus for a dual-mode notch filter according to exemplary embodiments of the present disclosure. Detailed Implementation

[0036] The word “exemplary” as used herein means “serving as an example, instance, or illustration.” Any aspect described herein as “exemplary” is not necessarily to be construed as being more preferred or advantageous than other aspects.

[0037] Modern wireless communication equipment operating at millimeter-wave (mmW) frequencies across multiple communication bands generally needs to meet multiple radio frequency (RF) power emission standards. In mmW 5G communication systems, the permitted emissions at the local oscillator (LO) and 2LO frequencies are stringent, typically around -36 dBc for user equipment (UE) and around -46 dBc for customer premises equipment (CPE).

[0038] Some mmW communication systems and devices use a transmit and receive architecture called heterodyne or superheterodyne. The superheterodyne architecture uses an intermediate frequency (IF), meaning the transmit signal is first up-converted from a baseband (or near-baseband) signal to the IF, and then up-converted from the IF to a radio frequency (RF) signal using a local oscillator (LO) frequency signal used for up-conversion and transmission of the IF signal. Similarly, the receive signal is first down-converted from the RF frequency to the IF frequency, and then down-converted from the IF to the baseband (or near-baseband) signal for information recovery.

[0039] When the IF signal is mixed with the LO signal, both desired and unwanted mixing products may be generated. Unwanted signals can be referred to as parasitic signals or parasitic tones, and can also generate one or more unwanted spectral emission effects. Generally, the IF and LO mixer frequencies are chosen so that unwanted spectral emissions, such as parasitic tones, fall outside the frequency range of the mmW signal path, i.e., outside the band of the desired communication signal. However, parasitic tones may fall close enough to the communication band that they degrade the desired signal within the communication band. Example bands for mmW communication systems may include the 37 GHz to 43.5 GHz band (which may cover the 37 GHz to 40 GHz band and the 40 GHz to 43.5 GHz band) and a 48 GHz band that may span from 47.2 GHz to 48.2 GHz. For example, to minimize the LO frequency tuning range and prevent very high IF frequencies, the 48 GHz communication band could use a 34 GHz LO frequency located outside the 37 GHz to 43.5 GHz band. Similarly, the LO frequency for the 37 GHz to 43.5 GHz band might be 26 GHz, resulting in a 2LO of 52 GHz close to the 48 GHz band. Devices configured according to the embodiments described herein can be used to communicate in one or more of these bands, or in bands lower and / or higher than these bands. For example, such devices can be used to communicate in one or more bands including mmW frequencies, where mmW frequencies can be considered to be frequencies of about 20 GHz or higher, such as about 24 GHz or higher.

[0040] One way to minimize the adverse effects of parasitic emissions from the local loop (LO) on communication signals is to design narrowband amplifier stages. However, narrowband amplifier stages require a separate path for each sub-band, which can result in a larger chip area.

[0041] Exemplary embodiments of the dual-mode notch filter disclosed herein can be used to suppress parasitic signal energy, such as parasitic LO and / or 2LO signal energy, when operating in a specific frequency band (e.g., the 48 GHz band) and can be disabled so as to have little effect on another frequency band, or can be used to suppress parasitic 2LO signal energy when operating in another frequency band (e.g., a band spanning 37 GHz to 43.5 GHz) while having little effect on another frequency band (e.g., the 48 GHz band).

[0042] Exemplary embodiments of the dual-mode notch filter disclosed herein can be used to suppress parasitic signal energy at frequencies on the lower or higher frequency side of a communication signal band, regardless of the LO or 2LO frequency.

[0043] Figure 1This diagram illustrates a wireless device 110 communicating with a wireless communication system 120. The wireless communication system 120 can be a Long Term Evolution (LTE) system, a Code Division Multiple Access (CDMA) system, a Global System for Mobile Communications (GSM) system, a Wireless Local Area Network (WLAN) system, a 5G system, or some other wireless system. The CDMA system can implement Wideband CDMA (WCDMA), CDMA1X, Evolved Data Optimized (EVDO), Time Division Synchronous CDMA (TD-SCDMA), or some other version of CDMA. For simplicity, Figure 1 A wireless communication system 120 is shown, comprising two base stations 130 and 132 and a system controller 140. Typically, a wireless communication system may include any number of base stations and any group of network entities.

[0044] Wireless device 110 may also be referred to as user equipment (UE), mobile station, terminal, access terminal, subscriber unit, station, etc. Wireless device 110 may be a cellular phone, smartphone, tablet computer, wireless modem, personal digital assistant (PDA), handheld device, laptop computer, smartbook, netbook, tablet computer, cordless phone, medical device, device configured to connect to one or more other devices (e.g., via the Internet of Things), wireless local loop (WLL) station, Bluetooth device, etc. Wireless device 110 can communicate with wireless communication system 120. Wireless device 110 can also receive signals from broadcast stations (e.g., broadcast station 134), signals from one or more satellites in a Global Navigation Satellite System (GNSS) (e.g., satellite 150), etc. Wireless device 110 may support one or more radio technologies for wireless communication, such as LTE, WCDMA, CDMA 1X, EVDO, TD-SCDMA, GSM, 802.11, 5G, etc.

[0045] Wireless device 110 may support carrier aggregation, for example, as described in one or more LTE or 5G standards. In some embodiments, carrier aggregation is used to transmit a single data stream on multiple carriers, for example, as opposed to using separate carriers for the respective data streams. Wireless device 110 is capable of operating in a wide range of communication frequency bands, including those used by LTE, WiFi, 5G, or other communication bands.

[0046] Carrier aggregation (CA) can generally be divided into two types: intra-band CA and inter-band CA. Intra-band CA refers to operation on multiple carriers within the same frequency band. Inter-band CA refers to operation on multiple carriers in different frequency bands.

[0047] Figure 2 This is a block diagram illustrating a wireless device 200 in which exemplary technologies of the present disclosure may be implemented. The wireless device 200 may, for example, be... Figure 1 The illustrated embodiment of wireless device 110. In other embodiments, wireless device 200 may be an example of one of base stations 130, 132, or... Figure 1 Devices not shown in the diagram, such as client equipment (CPE), etc.

[0048] Figure 2 An example of a transceiver 220 with a transmitter 230 and a receiver 250 is shown. Typically, the modulation of the signals in the transmitter 230 and receiver 250 can be performed by one or more stages such as amplifiers, filters, up-converters, down-converters, etc. These circuit blocks can be used with... Figure 2 The configurations shown are arranged differently. Furthermore, Figure 2 Other circuit blocks not shown in the diagram may also be used to regulate the signals in transmitter 230 and receiver 250. Unless otherwise stated, Figure 2 Any signal or any other graph in the accompanying diagram can be a single-ended signal or a differential signal. Figure 2 Some circuit blocks can also be omitted.

[0049] exist Figure 2 In the example shown, wireless device 200 generally includes transceiver 220 and data processor 210. Data processor 210 may include processor 296 operatively coupled to memory 298. Memory 298 may be configured to store data and program code, as exemplary software or firmware 299, and generally may include analog and / or digital processing elements. Processor 296 and memory 298 may cooperate to control, configure, program, or otherwise fully or partially control the operation of embodiments of the dual-mode notch filter described herein.

[0050] Transceiver 220 includes a transmitter 230 and a receiver 250 supporting bidirectional communication. Typically, wireless device 200 may include any number of transmitters and / or receivers for any number of communication systems and frequency bands. All or part of transceiver 220 may be implemented on one or more analog integrated circuits (ICs), RF ICs (RFICs), mixer signal ICs, etc.

[0051] Transmitters or receivers can be implemented using either a superheterodyne architecture or a direct conversion architecture. In a superheterodyne architecture, the signal undergoes frequency conversion between radio frequency (RF) and baseband in multiple stages; for example, it may be converted from RF to intermediate frequency (IF) in one stage and then from IF to baseband in another stage for use with the receiver. In a direct conversion architecture, the signal undergoes frequency conversion between RF and baseband within a single stage. Superheterodyne and direct conversion architectures can use different circuit blocks and / or have different requirements. Figure 2In the example shown, transmitter 230 and receiver 250 are implemented using a direct conversion architecture. In other examples, such as those concerning... Figure 3A and Figure 3B The examples discussed can be implemented using a superheterodyne architecture.

[0052] In the transmission path, data processor 210 processes the data to be transmitted and provides in-phase (I) and quadrature (Q) analog output signals to transmitter 230. In an exemplary embodiment, data processor 210 includes digital-to-analog converters (DACs) 214a and 214b for converting the digital signals generated by data processor 210 into I and Q analog output signals (e.g., I and Q output currents) for further processing. In other embodiments, DACs 214a and 214b are included in transceiver 220 and data processor 210 provides data (e.g., I and Q data) digitally to transceiver 220.

[0053] Within transmitter 230, baseband filters 232a and 232b (which may include low-pass filters) respectively filter the I and Q analog transmit signals to remove unwanted images caused by the previous digital-to-analog conversion. Amplifiers (Amps) 234a and 234b respectively amplify the signals from baseband filters 232a and 232b and provide I and Q baseband signals. Upconverter 240 upconverts the I and Q baseband signals using the I and Q transmit (TX) local oscillator (LO) signals from TX LO signal generator 290 and provides the upconverted signals. Filter 242 filters the upconverted signals to remove unwanted images caused by upconversion and noise in the receive band. Power amplifier (PA) 244 amplifies the signal from filter 242 to obtain the desired output power level and provides the transmit RF signal. The transmit RF signal may be routed via duplexer or switch 246 and transmitted via antenna 248. Although the examples discussed herein utilize I and Q signals, those skilled in the art will understand that transceiver elements can be configured to utilize polarization modulation.

[0054] In the receiving path, antenna 248 receives communication signals and provides the received RF signal, which can be routed via a duplexer or switch 246 and provided to a low-noise amplifier (LNA) 252. Duplexer 246 can be designed to operate at a specific RX-TX duplexer frequency interval, such that the RX signal is isolated from the TX signal. The received RF signal is amplified by LNA 252 and filtered by filter 254 to obtain the desired RF input signal. Downconverters 261a and 261b in downconverter 260 mix the output of filter 254 with the I and Q received (RX)LO signals (i.e., LO_I and LO_Q) from RX LO signal generator 280 to generate I and Q baseband signals. The I and Q baseband signals are amplified by amplifiers 262a and 262b and further filtered by baseband filters 264a and 264b (which may include low-pass filters) to obtain I and Q analog input signals, which are provided to data processor 210. In the illustrated exemplary embodiment, the data processor 210 includes analog-to-digital converters (ADCs) 216a and 216b for converting analog input signals into digital signals that will be further processed by the data processor 210. In some embodiments, ADCs 216a and 216b are included in a transceiver 220 and provide data digitally to the data processor 210.

[0055] exist Figure 2 In this configuration, TX LO signal generator 290 generates I and Q TX LO signals for up-conversion, while RX LO signal generator 280 generates I and Q RX LO signals for down-conversion. Each LO signal is a periodic signal with a specific base frequency. Phase-locked loop (PLL) 292 receives timing information from data processor 210 and generates control signals for adjusting the frequency and / or phase of the TX LO signals from LO signal generator 290. Similarly, PLL 282 receives timing information from data processor 210 and generates control signals for adjusting the frequency and / or phase of the RX LO signals from LO signal generator 280.

[0056] In an exemplary embodiment, RX PLL 282, TX PLL 292, RX LO signal generator 280, and TX LO signal generator 290 can be combined to form a single LO generator circuit 295 that can provide both TX LO and RX LO signals. Alternatively, separate LO generator circuits can be used to generate the TX LO and RX LO signals.

[0057] Wireless device 200 may support carrier aggregation (CA) and may (i) receive multiple downlink signals transmitted by one or more cells on multiple downlink carriers at different frequencies, and / or (ii) transmit multiple uplink signals to one or more cells on multiple uplink carriers. However, those skilled in the art will understand that the aspects described herein can be implemented in systems, devices, and / or architectures that do not support carrier aggregation.

[0058] Some components of transceiver 220 Figure 2 The transceiver is functionally illustrated, and the illustrated configuration may or may not represent the physical device configuration in some implementations. For example, as described above, transceiver 220 may be implemented in various integrated circuits (ICs), RF ICs (RFICs), mixer signal ICs, etc. In some embodiments, transceiver 220 is implemented on a substrate or board (such as a printed circuit board (PCB) having various modules). For example, power amplifier 244, filter 242, LNA 252, and / or duplexer 246 may be implemented in separate modules or as discrete components, while the remaining components shown in transceiver 220 may be implemented in a single transceiver chip.

[0059] Power amplifier 244 may include one or more stages, including, for example, driver stages, power amplifier stages, or other components that can be configured to amplify communication signals at one or more frequencies, in one or more frequency bands, and at one or more power levels. Depending on various factors, power amplifier 244 may be configured to operate using one or more driver stages, one or more power amplifier stages, one or more impedance matching networks, and may be configured to provide good linearity, good efficiency, or a combination of good linearity and efficiency. Other output stages may be implemented in power amplifier 244, instead of or in addition to the stages described above. Exemplary embodiments of the dual-mode notch filter described herein may be implemented within filter 242, power amplifier 244, LNA 252, filter 254, or elsewhere. In some embodiments, the dual-mode notch filter described herein may be implemented on the same IC and / or within the same module as filter 242, power amplifier 244, LNA 252, and / or filter 254. In some embodiments, power amplifier 244, filter 242, LNA 252, and filter 254 may be implemented together in a single physical module. In other embodiments, one or more of these elements may be implemented separately from a module or IC in which another element is implemented.

[0060] Figure 3AThis is a block diagram of at least a portion of an exemplary transmit chain 300 in which an exemplary embodiment of a dual-mode notch filter can be implemented. In an exemplary embodiment, the transmit chain 300 can be implemented in an mmW communication device implementing a superheterodyne architecture, in which a communication signal to be transmitted can be converted from a baseband (or near-baseband) information signal to an intermediate frequency (IF) signal, and then up-converted from the IF to an radio frequency (RF) signal. Similarly, a received communication signal can be down-converted from an RF signal to an IF signal, and then further down-converted from the IF signal to a baseband (or near-baseband) information signal. For example, in some embodiments, an additional mixer (e.g., mixer 302 described below) is implemented between filter 242 and PA 244. In some embodiments, another additional mixer is also included between LNA 252 and filter 254. In some such embodiments, these additional mixers, PA 244, and LNA 252 are implemented in an RFIC separate from the IC on which other components of transceiver 220 are implemented. In some embodiments, a separate RFIC can be integrated into a module including antenna 248. In some embodiments including an additional mixer, communication for mmW frequencies is implemented and can be included in the RFIC as a receiver-transmitter (LO). Although the following description includes superheterodyne architectures, those skilled in the art will understand that the embodiments are not limited to amplifiers in such architectures. Furthermore, those skilled in the art will understand that the embodiments described herein can be implemented in a receiver chain. The exemplary transmitter chain 300 shown for illustrative purposes only may include mmW communication devices (such as wireless device 200). Figure 2 It is part of the launch chain in )).

[0061] In an exemplary embodiment, the transmit chain 300 may include a mixer 302 configured to receive an intermediate frequency (IF) communication signal via a differential connector 304 and a local oscillator (LO) signal via a differential connector 306. The mixer 302 may be referred to as an up-conversion mixer and may be configured to operate over different frequency ranges. The mixer 302 using the LO signal may be configured to up-convert the IF communication signal to an mmW frequency communication signal (referred to as an RF signal in FIG3).

[0062] In an exemplary embodiment, the transmitter chain 300 may include one or more amplifier stages; three example amplifier stages 320, 322, and 324 are shown in FIG3 by way of example only. The three amplifier stages 320, 322, and 324 may be configured to provide the same or different levels of signal amplification. In an exemplary embodiment, the first amplifier stage 320 and the second amplifier stage 322 may be referred to as driver stages, and the third amplifier stage 324 may be referred to as a power amplifier. Depending on the application, the transmitter chain may include more or fewer amplifier stages.

[0063] In an exemplary embodiment, the transmit chain 300 may include one or more transformers 310, 312, 314, and 316. Transformers 310, 312, 314, and 316 may be configured to pass communication signals, such as RF signals, from one amplifier stage to another. Transformers 310, 312, 314, and 316 may each include a primary side and a secondary side. For example, transformer 310 may include a primary side 332 and a secondary side 333. Similarly, transformer 312 may include a primary side 334 and a secondary side 335; transformer 314 may include a primary side 336 and a secondary side 337; and transformer 316 may include a primary side 338 and a secondary side 339. The output of the third amplifier stage 324 may be provided to antenna 342 for transmission via transformer 316.

[0064] Transformers 310, 312, 314, and 316 can be implemented as dual-tuned transformers, wherein the inductors on the primary and secondary sides can be individually tuned / resonated using capacitors (not shown) across each inductor. Dual-tuned transformers are generally suitable for wideband operation. An exemplary embodiment of the dual-mode notch filter described herein can be implemented in parallel with the primary side of a dual-tuned transformer. However, in addition to dual-tuned transformers, exemplary embodiments of the dual-mode notch filter described herein will operate with other types of transformers.

[0065] In an exemplary embodiment, an instance of the dual-mode notch filter 350 may be implemented in, as part of, or near transformer 310. In an exemplary embodiment, an instance of the dual-mode notch filter 360 may be implemented in, as part of, or near transformer 312; an instance of the dual-mode notch filter 370 may be implemented in, as part of, or near transformer 314; and an instance of the dual-mode notch filter 380 may be implemented in, as part of, or near transformer 316. Instances of dual-mode notch filters 350, 360, 370, and 380 may include the same or different configurations and may be configured to provide the same or different filter responses. For convenience only, exemplary embodiments of the dual-mode notch filters 350, 360, 370, and 380 are shown in FIG. 3 near and parallel to the respective primary sides 332, 334, 336, and 338 of the respective transformers 310, 312, 314, and 316, and may be located elsewhere. Embodiments of the transmitter chain 300, including the embodiments of the dual-mode notch filters described herein, may also be... Figure 2 Implemented in filter 242 and / or power amplifier 244.

[0066] In exemplary embodiments, transformers 310, 312, 314, and 316; amplifier stages 320, 322, and 324; and dual-mode notch filters 350, 360, 370, and 380 may include transmit paths 330, wherein one or more transmit paths 330 may be implemented in a phased array architecture. In other embodiments, transmit paths 330 may include fewer or more amplifier stages, transformers, and / or filters.

[0067] Figure 3B This is a block diagram of at least a portion of an exemplary transmit chain 390 in which a dual-mode notch filter can be implemented. The transmit chain 390 is an example of a phased array antenna architecture in which multiple transmit paths 330-1, 330-2 to 330-n can be coupled to a mixer 302. In the exemplary embodiment, the number of transmit paths 330 depends on the implementation; for simplicity, in... Figure 3B The diagram shows three launch paths: 330-1, 330-2, and 330-n.

[0068] In an exemplary embodiment, the input of each transmit path 330 is coupled to a corresponding phase shifter 392, wherein transmit path 330-1 is coupled to phase shifter 392-1, transmit path 330-2 is coupled to phase shifter 392-1, and transmit path 330-n is coupled to phase shifter 392-n. In an exemplary embodiment, each phase shifter 392 is coupled between mixer 302 and the corresponding transmit path 330. In such embodiments, the output of each transmit path in the transmit path 330 is coupled to a corresponding antenna element 394 in antenna element array 396. For example, transmit path 330-1 is coupled to antenna element 394-1, transmit path 330-2 is coupled to antenna element 394-2, and transmit path 330-n is coupled to antenna element 394-n.

[0069] Figure 4 A graph 400 showing a portion of the communication spectrum is provided. Graph 400 includes a horizontal axis 402 showing frequency increasing to the right, and a vertical axis 404 showing signal energy increasing upwards. In an exemplary embodiment, the vertical axis 404 is labeled "HB," corresponding to "high-frequency band" energy; however, the exemplary embodiment of the dual-mode notch filter described herein can be implemented in other communication bands.

[0070] Graph 400 also shows a communication band 410 spanning from approximately 37 GHz to approximately 43.5 GHz; and a communication band 420 spanning from approximately 47.2 GHz to approximately 48.2 GHz. Communication band 410 will also be interchangeably referred to as the 37-43.5 GHz band and communication band 420 will also be interchangeably referred to as the 48 GHz band.

[0071] In an exemplary embodiment, multiple frequency plans can be implemented for multiple communication bands. An example of the local oscillator frequency for a signal in the 48 GHz communication band 420 may be located at approximately 34 GHz and is shown using reference numeral 422. An example of the local oscillator frequency for a signal in the 37-43.5 GHz communication band 410 may be located at approximately 26 GHz and is shown using reference numeral 426. However, the second harmonic of 26 GHz may occur at 52 GHz and is shown using reference numeral 412. In an exemplary embodiment, the 34 GHz LO signal 422, or a parasitic tone generated by mixing the 34 GHz LO signal with the communication signal in the 48 GHz band 420, may interfere with the communication signal in the 37-43.5 GHz communication band 410. Similarly, and only by way of example, the 52 GHz 2LO signal 412, or a parasitic tone generated by mixing the 26 GHz LO signal with the communication signal in the 37-43.5 GHz band 410, may interfere with the communication signal in the 48 GHz communication band. As described herein, exemplary embodiments of the dual-mode notch filter can be used to create a notch filter response that minimizes any detrimental effects of the 34 GHz LO signal 422 and its parasitic tones on the desired signal in the 37-43.5 GHz communication band 410 without degrading the communication signal in the 48 GHz communication band 420; and can be used to create a notch filter response that minimizes any detrimental effects of the 52 GHz 2LO signal 412 and its parasitic tones on the desired signal in the 48 GHz communication band 420 without degrading the communication signal in the 37-43.5 GHz communication band 410.

[0072] Figure 5 Figure 500 illustrates a dual-mode notch filter according to an exemplary embodiment of the present disclosure. In an exemplary embodiment, the dual-mode notch filter 550 can be implemented in a differential communication system and may include a capacitor 554 coupled to a positive input terminal (IN+) 551 and a capacitor 555 coupled to a negative input terminal (IN-) 552. Capacitors 554 and 555 may be referred to as Cn. The value of Cn may be selected based on the operating frequency, the desired filter response, and many other parameters.

[0073] Inductor 553 is coupled between capacitors 554 and 555. Inductor 553 may be referred to as 2Ln, where the value of Ln can be selected based on the operating frequency, the desired filter response, and many other parameters. In the dual-mode notch filter 550, for convenience, inductor 553 is shown as 2Ln, such that in equivalent circuits 570 and 580, inductor 553 can be shown as Ln. In an exemplary embodiment, the center tap of inductor 553 may be coupled to system ground, and inductor 553 may be referred to as a center-tapped inductor.

[0074] In an exemplary embodiment, switch 558 may be coupled between capacitors 556 and 557, and connected in parallel across inductor 553. In an exemplary embodiment, switch 558 may be implemented in various ways, including as a metal-oxide-semiconductor (MOS) transistor device. In an exemplary embodiment, switch 558 may be implemented as an n-type MOS (NMOS) transistor device or a p-type MOS (PMOS) transistor device, and is shown as an NMOS transistor device in this example. Other techniques may also be used to implement switch 558.

[0075] Capacitors 556 and 557 can be referred to as Co. The value of Co can be selected based on the operating frequency, the desired filter response, and many other parameters.

[0076] In an exemplary embodiment, the dual-mode notch filter 550 and other embodiments of the dual-mode notch filter described herein may be referred to as a “switched shunt notch filter” because, in an exemplary embodiment, the dual-mode notch filter 550 may be implemented in parallel (switched) with the primary winding of a transformer (such as in parallel with the primary sides 332, 334, 336 and / or 338 of the respective transformers 310, 312, 314 and / or 316 of FIG3).

[0077] In an exemplary embodiment, switch 558 can be configured to receive a control signal d_mode_ctrl at its gate. This can be achieved by... Figure 2 The data processor 210 or another control element provides the control signal d_mode_ctrl. Depending on the state of the control signal d_mode_ctrl, the switch 558 will be turned on (closed) or off (disconnected). In an exemplary embodiment, the switch 558 may be configured to selectively couple at least one of capacitors 556 or 557 across the winding of the inductor 553 of a dual-tuned transformer, such as... Figure 3A Any of transformers 310, 312, 314, and 316. In an exemplary embodiment, another capacitor in capacitor 556 or 557 may selectively cross a dual-tuned transformer (such as...). Figure 3A The winding of inductor 553 is coupled to any one of transformers 310, 312, 314 and 316.

[0078] exist Figure 5 In the exemplary embodiment shown, the drain of switch 558 is coupled to capacitor 556 and the source of switch 558 is coupled to capacitor 557.

[0079] Figure 5The equivalent circuit corresponding to the state of switch 558 is also shown. The first equivalent circuit 570 shows the electrical arrangement of the dual-mode notch filter 550 when switch 558 is on (connected), i.e., when the control signal d_mode_ctrl is asserted and switch 558 is on (connected); the second equivalent circuit 580 shows the electrical arrangement of the dual-mode notch filter 550 when switch 558 is off (disconnected), i.e., when the control signal d_mode_ctrl is deasserted and switch 558 is off (disconnected). In an exemplary embodiment, when switch 558 is on (connected), the dual-mode notch filter 550 is off; and when switch 558 is off (disconnected), the dual-mode notch filter 550 is on, also referred to as being in LO notch mode.

[0080] In the first equivalent circuit 570, when the control signal d_mode_ctrl is asserted and switch 558 is turned on, switch 558 behaves as a resistor 571 with a value Ron. The on-resistance Ron of switch 558 depends on the size of the device used to manufacture switch 558, as well as the voltages applied to its gate, source, and drain terminals. The value of Ron can be selected based on circuit design considerations, operating frequency, and other factors.

[0081] In the second equivalent circuit 580, when the control signal d_mode_ctrl is deasserted and switch 558 is not turned on (off), switch 558 behaves as a capacitor 581 with a value Coff. The turn-off capacitor Coff of switch 558 depends on the size of the device used to manufacture switch 558 and the voltages applied to its gate, source, and drain terminals. The value of Coff can be selected based on circuit design considerations, operating frequency, and other factors.

[0082] In this exemplary embodiment, in the first mode, when switch 558 is off and the dual-mode notch filter 550 is in LO notch mode, capacitors 581 (Coff), 556 and 557 (Co), and 554 and 555 (Cn), together with the inductance Ln of inductor 553, determine the response of the dual-mode notch filter 550.

[0083] In this exemplary embodiment, in the second mode, when switch 558 is turned on and dual-mode notch filter 550 is turned off, capacitors 556 and 557 (Co) and capacitors 554 and 555 (Cn), together with the inductance Ln of inductor 553, determine the response of dual-mode notch filter 550.

[0084] When switch 558 is turned on:

[0085] Z in In ω~ω o Open road / high

[0086]

[0087]

[0088] When switch 558 is turned off:

[0089] ω off >ω o >ω o Zin in ω LO At the short circuit, Zin is at ω~ω off Open road / high

[0090]

[0091]

[0092]

[0093] In an exemplary embodiment, the dual-mode notch filter 550 can be implemented in a broadband mmW transmitter, the transmitter having a bandwidth ranging from ω o to ω off Operating on varying signal frequencies. In an exemplary embodiment, the frequency ω LO It is the LO frequency, for example, 34GHz, frequency ω o It is 37GHz, and the frequency ω off It is 48.2GHz.

[0094] Figure 6 It is shown Figure 5 A graph of the exemplary state-related response of a dual-mode notch filter 550 is provided. Graph 600 includes a horizontal axis 602 showing frequencies increasing to the right in GHz; and a vertical axis 604 showing the scattering parameter (S-parameter) response. The exemplary S-parameter response is the forward voltage gain (also known as the forward emission coefficient, or S21 response). As shown in Figure 3 above, exemplary embodiments of the dual-mode notch filter can be implemented at one or more locations along the emission chain 300. All exemplary S-parameter curves described herein are S21 (gain) of exemplary embodiments of the dual-mode notch filter along with several amplifier stages and several transformers, as shown, for example, in Figure 3. The amplifier stages and transformers are consistent in the different traces shown in the accompanying figures.

[0095] An exemplary signal bandwidth 608 is shown to span from about 37 GHz to about 48.2 GHz. In an exemplary embodiment, the signal bandwidth 608 may include a first communication band 610 spanning from about 37 GHz to 43.5 GHz and a second communication band 620 spanning from about 47.2 GHz to 48.2 GHz.

[0096] Trace 612 illustrates an exemplary S21 response where no dual-mode notch filter is implemented. Trace 614 illustrates an exemplary S21 response where... Figure 5 The dual-mode notch filter 550 is in off mode. Trace 615 illustrates an exemplary S21 response, in which... Figure 5 The dual-mode notch filter 550 is in LO notch mode.

[0097] As shown at 34 GHz, the S21 response is approximately 1.56 dB when the dual-mode notch filter 550 is not implemented (trace 612); the S21 response is approximately -770 MDB when the dual-mode notch filter 550 is implemented but in off mode (trace 614); and the S21 response is approximately -14.1 dB when the dual-mode notch filter 550 is implemented and in LO notch mode (trace 615).

[0098] As illustrated by traces 612 and 614, when the dual-mode notch filter 550 is off (switch 558 is on, filter is off, trace 614), the effect on signals from 37 GHz to 48.2 GHz is negligible. For example, at 37 GHz, the S21 difference between traces 612 and 614 is approximately 1.37 dB, and at 48 GHz, the difference is approximately 1 dB. Therefore, the negligible effect may include a reduction of several dB or less. This allows wideband (>1.0 GHz) communication signals to pass through the signal bandwidth 608.

[0099] As shown in traces 614 and 615, when the dual-mode notch filter 550 is in LO notch mode (switch 558 is off, filter is in LO notch mode, trace 615), there is a significant beneficial effect on spurious signal suppression at 34 GHz between trace 614 (-770 dB) and trace 615 (-14.1 dB), resulting in an approximately 13.33 dB improvement in LO suppression in this example. Furthermore, the effect on the signal near 48 GHz is negligible.

[0100] Capacitors 556 and 557(Co)( Figure 5 ) and with inductor 553 ( Figure 5 ) Parallel capacitor 581 (Coff) ( Figure 5 Together at signal frequency ω LO The input impedance (Z) is inductive at the LO notch at 34 GHz and open at the signal frequency (high input impedance (Z)). Therefore, in this example, the LO notch at 34 GHz will not degrade the signal at the frequency of interest in the second communication band 620.

[0101] As shown by comparing traces 614 and 615 at 34 GHz, when the dual-mode notch filter 550 is enabled in LO notch mode, there is an improvement of approximately 13.33 dB in LO suppression at the LO frequency of 34 GHz.

[0102] In an exemplary embodiment, when the control signal d_mode_ctrl is asserted and switch 558 is turned on (dual-mode notch filter 550 is in off mode), capacitors 556 and 557 (Co, Figure 5 The dual-mode notch filter 550 resonates with inductor 553 at the signal frequency (~37GHz) and exhibits high impedance (high Z) at the signal frequency in the 37GHz to 48.2GHz band; therefore, the dual-mode notch filter (trace 614) in off mode does not degrade the signal in the signal bandwidth 608. When the control signal d_mode_ctrl is deasserted and switch 558 is off (dual-mode notch filter 550 is in LO notch mode), the equivalent inductance of capacitors 556 and 557 (C0), capacitor 581 (Coff) and inductor 553 is inductive at the LO frequency (34GHz) and resonates with capacitors 554 and 555 (Cn) at the LO frequency (34GHz), thus creating an LO notch at 34GHz in this example. The capacitors 556 and 557 (Co) connected in series with capacitor 581 (Coff) resonate with inductor 553 at the signal frequency (~48GHz) and exhibit high impedance (high Z) at the signal frequency in the 48GHz band (second communication band 620); therefore, the LO notch response does not degrade the signal quality at the desired 48GHz signal frequency.

[0103] In this way, when the dual-mode notch filter 550 is in LO notch mode, the 34GHz LO signal will be significantly suppressed without affecting the communication signal in the second communication band 620. Furthermore, the dual-mode notch filter 550 can be in off mode without affecting the communication signal in the signal bandwidth 608, including communication bands 610 and 620.

[0104] Figure 7 Figure 700 illustrates a dual-mode notch filter according to an exemplary embodiment of the present disclosure. In an exemplary embodiment, the dual-mode notch filter 750 can be implemented in a differential communication system and may include a capacitor 754 coupled to a positive input terminal (IN+) 751 and a capacitor 755 coupled to a negative input terminal (IN-) 752. Capacitors 754 and 755 may be referred to as Cn. The value of Cn can be selected based on the operating frequency, the desired filter response, and many other parameters.

[0105] In an exemplary embodiment, switch 758 may be coupled between capacitor 754 and inductor 753. In an exemplary embodiment, switch 758 may be implemented in various ways, including as a metal-oxide-semiconductor (MOS) transistor device. In an exemplary embodiment, switch 758 may be implemented as an n-type MOS (NMOS) transistor device or a p-type MOS (PMOS) transistor device, and is shown as an NMOS transistor device in this example. Other techniques may also be used to implement switch 758.

[0106] In an exemplary embodiment, switch 759 may be coupled between capacitor 755 and inductor 753. In an exemplary embodiment, switch 759 may be implemented in various ways, including as a metal-oxide-semiconductor (MOS) transistor device. In an exemplary embodiment, switch 759 may be implemented as an n-type MOS (NMOS) transistor device or a p-type MOS (PMOS) transistor device, and is shown as an NMOS transistor device in this example. Other techniques may also be used to implement switch 759.

[0107] Inductor 753 is coupled between switch 758 and switch 759. An exemplary value for inductor 753 may be 2Ln, where the value of Ln may be selected based on the operating frequency, the desired filter response, and several other parameters. In an exemplary embodiment, the center tap of inductor 753 may be coupled to system ground, and inductor 753 may be referred to as a center-tapped inductor.

[0108] In an exemplary embodiment, switches 758 and 759 can be configured to receive a control signal d_mode_ctrl at their respective gates. This can be achieved by... Figure 2 The data processor 210 or another control element provides the control signal d_mode_ctrl. Depending on the state of the control signal d_mode_ctrl, switches 758 and 759 will either be turned on (closed) or off (disconnected).

[0109] exist Figure 7 In the exemplary embodiment shown, the drain of switch 758 is coupled to the positive input terminal (IN+) 751 via capacitor 754, and the source of switch 758 is coupled to inductor 753. Figure 7 In the exemplary embodiment shown, the drain of switch 759 is coupled to inductor 753 and the source of switch 759 is coupled to negative input terminal (IN-) 752 via capacitor 755.

[0110] Figure 7The equivalent circuits corresponding to the states of switch 758 and switch 759 are also shown. The first equivalent circuit 770 shows the electrical arrangement of the dual-mode notch filter 750 when switches 758 and 759 are on (closed), that is, when the control signal d_mode_ctrl is asserted and switches 758 and 759 are on (closed); and the second equivalent circuit 780 shows the electrical arrangement of the dual-mode notch filter 750 when switches 758 and 759 are off (disconnected), that is, when the control signal d_mode_ctrl is deasserted and switches 758 and 759 are off (disconnected).

[0111] In an exemplary embodiment, the dual-mode notch filter 750 is turned on when switches 758 and 759 are turned on; and the dual-mode notch filter 750 is turned off when switches 758 and 759 are not turned on.

[0112] exist Figure 7 In an exemplary embodiment, in a first mode, when the control signal d_mode_ctrl is asserted and switches 758 and 759 are turned on, the dual-mode notch filter 750 can be configured to create a notch response at an exemplary LO frequency of 34 GHz.

[0113] exist Figure 7 In an exemplary embodiment, in the second mode, when the control signal d_mode_ctrl is deasserted and switches 758 and 759 are turned off, the dual-mode notch filter 750 can be configured to create a notch response at an exemplary 2LO frequency of 52 GHz.

[0114] In the first equivalent circuit 770, when switches 758 and 759 are turned on, switches 758 and 759 act as resistors 771 with a value Ron. The on-resistance Ron of switches 758 and 759 depends on the size of the equipment used to manufacture switches 758 and 759, as well as the voltages applied to their respective gate, source, and drain terminals. The value of Ron can be selected based on circuit design considerations, operating frequency, and other factors.

[0115] In the second equivalent circuit 780, when switches 758 and 759 are off, switches 758 and 759 act as capacitors 781 with a value Coff. The off-state capacitance Coff of switches 758 and 759 depends on the size of the equipment used to manufacture switches 758 and 759, and the voltages applied to their respective gate, source, and drain terminals. The value of Coff can be selected based on circuit design considerations, operating frequency, and other factors. In this exemplary embodiment, when switches 758 and 759 are off and the dual-mode notch filter 750 is in 2LO notch mode, capacitors Coff and Cn, together with the inductance Ln of inductor 753, determine the notch response of the dual-mode notch filter 750.

[0116] When switches 758 and 759 are turned on:

[0117]

[0118]

[0119] When switches 758 and 759 are off:

[0120]

[0121]

[0122] In an exemplary embodiment, when the control signal d_mode_ctrl is turned on, the inductor 753Ln resonates with the capacitors 754 and 755Cn at the LO frequency of 34GHz, thereby improving the LO suppression of signals in the 48GHz band at 34GHz.

[0123] In an exemplary embodiment, when the control signal d_mode_ctrl is off, capacitors 754 and 755, Cn, are connected in series with the off-state capacitor Coff of switches 758 and 759. The values ​​of switches 758 and 759 are selected such that inductor 753Ln resonates with CnCoff / (Cn+Coff) at 2LO (52GHz), thereby improving the 2LO rejection of signals in the 37GHz to 43.5GHz band at 52GHz.

[0124] In an exemplary embodiment, the dual-mode notch filter 750 is compact, uses a single inductor 753, Ln, and also relies solely on the turn-off capacitor Coff and capacitor Cn of switches 758 and 759 to suppress signals at LO (34 GHz) or 2LO (52 GHz).

[0125] Figure 8 It is shown Figure 7A graph 800 showing an exemplary state-related response of the dual-mode notch filter 750. Graph 800 includes a horizontal axis 802 showing frequencies increasing to the right in GHz; and a vertical axis 804 showing the scattering parameter (S-parameter) response. The exemplary S-parameter response is the forward voltage gain (also known as the forward emission coefficient, or S21 response).

[0126] An exemplary signal bandwidth 808 is shown to span from about 37 GHz to about 48.2 GHz. In an exemplary embodiment, the signal bandwidth 808 may include a first communication band 810 spanning from about 37 GHz to 43.5 GHz and a second communication band 820 spanning from about 47.2 GHz to 48.2 GHz.

[0127] Trace 814 illustrates an exemplary S21 response, in which Figure 7 The dual-mode notch filter 750 is in off mode. Trace 815 illustrates an exemplary S21 response, in which... Figure 7 The dual-mode notch filter 750 is in conduction mode.

[0128] In an exemplary embodiment, absolute LO suppression is the increment (difference) between the 34 GHz (LO) gain and the 48 GHz (RF) gain. In an exemplary embodiment, absolute 2LO suppression is the increment (difference) between the 34 GHz (2LO) gain and the 48 GHz (RF) gain. The two traces 814 at the LO frequency and the 2LO frequency are compared. Figure 7 The dual-mode notch filter 750 is in off mode) and 815 ( Figure 7 The gain difference between the dual-mode notch filter 750 (in on mode) can be used to illustrate the improvement in LO suppression at 34 GHz and the improvement in 2LO suppression at 52 GHz.

[0129] Trace 815 shows the dual-mode notch filter 750 when the control signal d_mode_ctrl is asserted (on). Figure 7 A notch response is created at the LO frequency of 34 GHz and the LO rejection is >10 dB, resulting in an improvement of approximately 10.46 dB in LO rejection between the two modes in this exemplary embodiment. Trace 815 also shows a gain of approximately -16.66 dB at 34 GHz and a gain of approximately -6 dB at 48 GHz, resulting in an absolute LO rejection of approximately 10.46 dB.

[0130] Trace 814 shows the dual-mode notch filter 750 when the control signal d_mode_ctrl is deasserted (off). Figure 7A notch response is created at a 2LO frequency of 52 GHz, resulting in approximately 2 dB of 2LO suppression improvement between the two modes at 52 GHz in this exemplary embodiment. Trace 814 also shows a gain of approximately -14.0 dB at 52 GHz and a gain of approximately -1 dB (-957.62 mdB) at 37 GHz, resulting in approximately 13 dB of absolute 2LO suppression.

[0131] Furthermore, exemplary embodiments of the dual-mode notch filter 750 can be used to suppress parasitic signal energy at frequencies other than the LO frequency and the 2LO frequency. For example, exemplary embodiments of the dual-mode notch filter 750 can be used to suppress parasitic signal energy at lower or higher frequency sides of the communication signal band (such as at or near 37 GHz and at or near 43.5 GHz); or at or near 47.2 GHz and 48.2 GHz, as an example only.

[0132] Figure 9 It is shown Figure 7 A graph 900 showing the exemplary switch-size correlation response of the dual-mode notch filter 750. Graph 900 includes a horizontal axis 902 showing frequencies increasing to the right in GHz; and a vertical axis 904 showing the scattering parameter (S-parameter) response. The exemplary S-parameter response is the forward voltage gain (also known as the forward emission coefficient, or S21 response).

[0133] An exemplary signal bandwidth 908 is shown to span from about 37 GHz to about 48.2 GHz. In an exemplary embodiment, the signal bandwidth 908 may include a first communication band 910 spanning from about 37 GHz to 43.5 GHz and a second communication band 920 spanning from about 47.2 GHz to 48.2 GHz.

[0134] Trace 914 illustrates an exemplary S21 response, in which Figure 7 The dual-mode notch filter 750 is in off mode (the dual-mode notch filter is in 2LO notch mode) and the values ​​of switch 758 and switch 759 are ( Figure 7 This corresponds to 60 μm, where 60 in this example corresponds to the number of fingers on an NMOS transistor. In this example, the equivalent switch size is referred to as 60 μm.

[0135] Trace 915 illustrates an exemplary S21 response, in which Figure 7 The dual-mode notch filter 750 is in off mode (the dual-mode notch filter is in 2LO notch mode), and the values ​​of switch 758 and switch 759 are... Figure 7 This corresponds to 200m, where 200 in this example corresponds to the number of fingers on an NMOS transistor. In this example, the equivalent switch size is referred to as 200μm.

[0136] As shown by comparing traces 914 and 915, switches 758 and 759 are added. Figure 7 The increased size of the switches 758 and 759 increases the turn-off capacitance, Coff, thereby reducing the notch frequency, which is particularly noticeable at or near the 2LO frequency of 52 GHz. For example, the larger the switch size, the larger the turn-off capacitance Coff. A larger turn-off capacitance Coff lowers the filter response frequency at a given power, resulting in better suppression at the 2LO notch frequency (52 GHz in this example) and closer to the second communication band 920 (i.e., 48.2 GHz), and improved suppression at 52 GHz. Figure 9 As shown, the choice of switch size affects filter performance and operating frequency.

[0137] Figure 10 Figure 1000 illustrates a dual-mode notch filter according to an exemplary embodiment of the present disclosure. In an exemplary embodiment, the dual-mode notch filter 1050 can be implemented in a differential communication system and may include a capacitor 1054 coupled to a positive input terminal (IN+) 1051 and a capacitor 1055 coupled to a negative input terminal (IN-) 1052. Capacitors 1054 and 1055 may be referred to as Cn. The value of Cn can be selected based on the operating frequency, the desired filter response, and many other parameters.

[0138] In an exemplary embodiment, switch 1058 may be coupled between capacitor 1054 and inductor 1053. In an exemplary embodiment, switch 1058 may be implemented in various ways, including as a metal-oxide-semiconductor (MOS) transistor device. In an exemplary embodiment, switch 1058 may be implemented as an n-type MOS (NMOS) transistor device or a p-type MOS (PMOS) transistor device, and is shown as an NMOS transistor device in this example. Other techniques may also be used to implement switch 1058.

[0139] In an exemplary embodiment, switch 1059 may be coupled between capacitor 1055 and inductor 1053. In an exemplary embodiment, switch 1059 may be implemented in various ways, including as a metal-oxide-semiconductor (MOS) transistor device. In an exemplary embodiment, switch 1059 may be implemented as an n-type MOS (NMOS) transistor device or a p-type MOS (PMOS) transistor device, and is shown as an NMOS transistor device in this example. Other techniques may also be used to implement switch 1059.

[0140] Inductor 1053 is coupled between switch 1058 and switch 1059. An exemplary value for inductor 1053 may be 2Ln, where the value of Ln may be selected based on the operating frequency, the desired filter response, and several other parameters. In an exemplary embodiment, the center tap of inductor 1053 may be coupled to system ground, and inductor 1053 may be referred to as a center-tapped inductor.

[0141] In an exemplary embodiment, capacitor 1056 may be coupled in parallel across inductor 1053. Capacitor 1056 may be referred to as Co / 2. The value of Co may be selected based on the operating frequency, the desired filter response, and many other parameters.

[0142] In an exemplary embodiment, switches 1058 and 1059 can be configured to receive a control signal d_mode_ctrl at their respective gates. This can be achieved by... Figure 2 The data processor 210 or another control element provides the control signal d_mode_ctrl. Depending on the state of the control signal d_mode_ctrl, switches 1058 and 1059 will either be turned on (closed) or off (disconnected).

[0143] exist Figure 10 In the exemplary embodiment shown, the drain of switch 1058 is coupled to the positive input terminal (IN+) 1051 via capacitor 1054, and the source of switch 1058 is coupled to inductor 1053 and capacitor 1056. Figure 10 In the exemplary embodiment shown, the drain of switch 1059 is coupled to inductor 1053 and capacitor 1056, and the source of switch 1059 is coupled to negative input terminal (IN-) 1052 via capacitor 1055.

[0144] Figure 10 The equivalent circuits corresponding to the states of switch 1058 and switch 1059 are also shown. The first equivalent circuit 1070 shows the electrical arrangement of the dual-mode notch filter 1050 when switches 1058 and 1059 are on (closed), i.e., when the control signal d_mode_ctrl is asserted and switches 1058 and 1059 are on (closed); and the second equivalent circuit 1080 shows the electrical arrangement of the dual-mode notch filter 1050 when switches 1058 and 1059 are off (disconnected), i.e., when the control signal d_mode_ctrl is deasserted and switches 1058 and 1059 are off (disconnected). In an exemplary embodiment, the dual-mode notch filter 1050 is turned on when switches 1058 and 1059 are turned on; and the dual-mode notch filter 1050 is turned off when switches 1058 and 1059 are not turned on.

[0145] exist Figure 10 In an exemplary embodiment, when the control signal d_mode_ctrl is asserted (on) and switches 1058 and 1059 are on, the dual-mode notch filter 1050 can be configured to create a notch response at the LO frequency of 34 GHz.

[0146] exist Figure 10 In an exemplary embodiment, when the control signal d_mode_ctrl is deasserted (off) and switches 1058 and 1059 are off, the dual-mode notch filter 1050 can be configured to have a negligible effect on signals in the exemplary 37 GHz to 48.2 GHz communication bandwidth.

[0147] In the first equivalent circuit 1070, when switches 1058 and 1059 are turned on, switches 1058 and 1059 act as resistors 1071 with a value Ron. The on-resistance Ron of switches 1058 and 1059 depends on the size of the equipment used to manufacture switches 1058 and 1059, and the voltages applied to their respective gate, source, and drain terminals. The value of Ron can be selected based on circuit design considerations, operating frequency, and other factors.

[0148] In the second equivalent circuit 1080, when switches 1058 and 1059 are turned off, switches 1058 and 1059 act as capacitors 1081 with a value Coff. The turn-off capacitance Coff, 1081 of switches 1058 and 1059 depends on the size of the equipment used to manufacture switches 1058 and 1059, and the voltages applied to their respective gate, source, and drain terminals. The value of Coff can be selected based on circuit design considerations, operating frequency, and other factors.

[0149] In this exemplary embodiment, when switches 1058 and 1059 are turned off and the dual-mode notch filter 1050 is turned off, capacitors Coff 1081, 1054 and 1055 (Cn), and 1056 (Co), together with the inductance Ln of inductor 1053, determine the response of the dual-mode notch filter 1050.

[0150] In this exemplary embodiment, when switches 1058 and 1059 are turned on and the dual-mode notch filter 1050 is turned on, capacitors 1056 (C0) and 1054 and 1055 (Cn), together with the inductance Ln of inductor 1053, determine the response of the dual-mode notch filter 1050.

[0151] In the dual-mode notch filter 1050, for convenience, capacitor 1056 is shown as Co / 2 and inductor 1053 is shown as 2Ln, such that in the equivalent circuits 1070 and 1080, capacitor 1056 can be shown as Co and inductor 1053 can be shown as Ln.

[0152] When switches 1058 and 1059 are connected:

[0153]

[0154]

[0155] When switches 1058 and 1059 are off:

[0156]

[0157] In an exemplary embodiment, the dual-mode notch filter 750 ( Figure 7 The circuit system in which the series combination of Ln and Cn (resonating at LO = 34 GHz) is essentially equivalent to a circuit system with a small inductor at about 48 GHz that results in significant losses at about 48 GHz.

[0158] exist Figure 10 In the exemplary embodiment shown, when the dual-mode notch filter 1050 is on, i.e., in LO notch mode, the addition of capacitor 1056 (Co) in parallel with inductor Ln, 1053 reduces signal loss at 48 GHz. In this example, the parallel combination resonant frequency of Ln and Co is approximately 48 GHz. When the control signal d_mode_ctrl is set (on), the equivalent inductance of Ln / / Co (Ln and Co in parallel) resonates with Cn at the LO frequency of 34 GHz, thereby improving LO signal leakage suppression. The value of Ln / / Co (Ln and Co in parallel) presents high impedance (high Z) at 48 GHz, thereby minimizing the signal loss caused by the LO notch response at 48 GHz.

[0159] When the control signal d_mode_ctrl is deasserted (turned off), CnCoff / (Cn+Coff) appears in series with the parallel combination of Ln / / Co and creates a high impedance (high Z) for signals from 37 GHz to 48.2 GHz. Therefore, the dual-mode notch filter 1050 can be turned off in this embodiment to have a negligible effect on signals in the 37 GHz to 48.2 GHz communication band.

[0160] In an exemplary embodiment, the dual-mode notch filter 1050 can be configured to create a notch response at LO (34 GHz) when turned on, while introducing minimal loss at 48 GHz (with additional Co); and can be completely turned off when only a single inductor 1053 and switches 1058 and 1059 are used, so as to have negligible effect on signals from 37 GHz to 48.2 GHz.

[0161] Figure 11 It is shown Figure 10 A graph 1100 shows an exemplary state-related response of the dual-mode notch filter 1050. Graph 1100 includes a horizontal axis 1102 showing frequencies increasing to the right in GHz; and a vertical axis 1104 showing the scattering parameter (S-parameter) response. The exemplary S-parameter response is the forward voltage gain (also known as the forward emission coefficient, or S21 response).

[0162] An exemplary signal bandwidth 1108 is shown to span from about 37 GHz to about 48.2 GHz. In an exemplary embodiment, the signal bandwidth 1108 may include a first communication band 1110 spanning from about 37 GHz to 43.5 GHz and a second communication band 1120 spanning from about 47.2 GHz to 48.2 GHz.

[0163] Trace 1114 illustrates an exemplary S21 response, in which Figure 10 The dual-mode notch filter 1050 is in off mode. Trace 1115 illustrates an exemplary S21 response, in which... Figure 11 The dual-mode notch filter 1150 is in conduction mode.

[0164] Trace 1115 shows the dual-mode notch filter 1050 when the control signal d_mode_ctrl is asserted (on). Figure 10 A notch filter response is created at the LO frequency of 34 GHz, and the absolute LO rejection is approximately 11 dB. Specifically, trace 1115 shows a power of approximately -2.632 dB at 48 GHz and approximately -13.52 dB at 34 GHz (LO), resulting in an absolute LO rejection of approximately 11 dB. The additional loss introduced by the dual-mode notch filter 1050 at 48 GHz is approximately 0.6 dB (the difference between -2.632 dB and -2.004 dB), as shown by comparing traces 1114 and 1115 at 48 GHz. This additional loss of approximately 0.6 dB at 48 GHz is a trade-off for improving the LO rejection at 34 GHz by approximately 7 dB.

[0165] Trace 1114 shows the dual-mode notch filter 1050 when the control signal d_mode_ctrl is deasserted (off). Figure 10A notch response is created at higher frequencies (e.g., >60 GHz), while signals in the communication bandwidth of 37 GHz to 48.2 GHz are unaffected by the dual-mode notch filter 1050 in this mode. Traces 1114 and 1115 show an improvement of approximately 7 dB in LO suppression (34 GHz) between on and off modes.

[0166] Figure 12 It is shown Figure 5 Dual-mode notch filter 550 and Figure 10 A graph 1200 shows an exemplary state-related response of the dual-mode notch filter 1050. Graph 1200 includes a horizontal axis 1202 showing frequencies increasing to the right in GHz units; and a vertical axis 1204 showing the scattering parameter (S-parameter) response. An exemplary S-parameter response is the forward voltage gain (also known as the forward emission coefficient, or S21 response).

[0167] An exemplary signal bandwidth 1208 is shown to span from about 37 GHz to about 48 GHz. In an exemplary embodiment, the signal bandwidth 1208 may include a first communication band 1210 spanning from about 37 GHz to 43.5 GHz and a second communication band 1220 spanning from about 47.2 GHz to 48.2 GHz.

[0168] about Figure 10 The dual-mode notch filter 1050 enables the LO notch response when switches 1058 and 1059 are turned on, and disables the LO notch response when switches 1058 and 1059 are turned off. In this example, the dual-mode notch filter 1050 exhibits the lossy on-resistance Ron of switches 1058 and 1059 and limited LO notch suppression, but also shows a negligible effect on the signal within the signal bandwidth 1208 (6dB LO suppression improvement).

[0169] about Figure 5 The dual-mode notch filter 550 enables the LO notch response when switch 558 is off and disables it when switch 558 is on. In this example, the dual-mode notch filter 550 exhibits a decrease in signal gain in the communication bandwidth 1208 due to the lossy on-resistance Ron of switch 558, but also shows better LO notch response suppression (13dB LO suppression improvement, but with 1.4dB additional loss).

[0170] exist Figure 12 In the diagram, trace 1215 shows the channel response without a dual-mode notch filter, and trace 1214 shows the dual-mode notch filter 1050 (…). Figure 10The channel response when the dual-mode notch filter 1050 is in shutdown mode; trace 1217 shows the channel response when the dual-mode notch filter 1050 is in shutdown mode. Figure 10 The channel response when the dual-mode notch filter 550 is in conduction mode; trace 1216 shows the channel response when the dual-mode notch filter 550 is in conduction mode. Figure 5 The channel response when in shutdown mode; trace 1218 shows the dual-mode notch filter 550 ( Figure 5 Channel response when in conduction mode.

[0171] Figure 13 Figure 1300 illustrates a dual-mode notch filter according to an exemplary embodiment of the present disclosure. In an exemplary embodiment, the dual-mode notch filter 1350 may be implemented differentially and may include a capacitor 1354 coupled to the positive input terminal (IN+) 1351 and a capacitor 1355 coupled to the negative input terminal (IN-) 1352. Capacitors 1354 and 1355 may be referred to as Cn. The value of Cn may be selected based on the operating frequency, the desired filter response, and many other parameters.

[0172] Inductor 1353 is coupled between capacitors 1354 and 1355. An exemplary value for inductor 1353 may be 2Ln, where the value of Ln may be selected based on the operating frequency, the desired filter response, and several other parameters. In an exemplary embodiment, the center tap of inductor 1353 may be coupled to system ground, and inductor 1353 may be referred to as a center-tapped inductor.

[0173] In an exemplary embodiment, switch 1358 may be coupled between capacitors 1356 and 1357, and connected in parallel across inductor 1353. In an exemplary embodiment, switch 1358 may be implemented in various ways, including as a metal-oxide-semiconductor (MOS) transistor device. In an exemplary embodiment, switch 1358 may be implemented as an n-type MOS (NMOS) transistor device or a p-type MOS (PMOS) transistor device, and is shown as an NMOS transistor device in this example. Other techniques may also be used to implement switch 1358.

[0174] Capacitors 1356 and 1357 can be referred to as Co. The value of Co can be selected based on the operating frequency, the desired filter response, and many other parameters.

[0175] The dual-mode notch filter 1350 can be similar to Figure 5A dual-mode notch filter 550 is provided. In an exemplary embodiment, the dual-mode notch filter 1350 may further include a Q-boost circuit 1360. The Q-boost circuit 1360 may be implemented to increase the quality factor Q of the dual-mode notch filter 1350. The Q-boost circuit 1360 may include transistors 1362, 1364, and 1366. In an exemplary embodiment, transistors 1362, 1364, and 1366 may be implemented in various ways, including using metal-oxide-semiconductor (MOS) transistor devices. In an exemplary embodiment, transistors 1362, 1364, and 1366 may be implemented as n-type MOS (NMOS) transistor devices or p-type MOS (PMOS) transistor devices, and are shown as PMOS transistor devices in this example. Other techniques may also be used to implement transistors 1362, 1364, and 1366. In an exemplary embodiment, the drain of transistor 1362 may be coupled to node 1361 between capacitor 1354 and inductor 1353, and the drain of transistor 1364 may be coupled to node 1363 between capacitor 1355 and inductor 1353. The sources of transistors 1362 and 1364 may be coupled to the drain of transistor 1366. The source of transistor 1366 may be coupled to the system voltage VDD. The gate of transistor 1366 may be configured to be controlled by a controller (such as...). Figure 2 The bias signal Vb is received from the data processor 210 or from another control element. In an exemplary embodiment, the bias signal Vb can range from zero volts to one (1) volt or slightly different.

[0176] In an exemplary embodiment, the gate of transistor 1362 may be coupled to the drain of transistor 1364, and the gate of transistor 1364 may be coupled to the drain of transistor 1362. In an exemplary embodiment, the Q-boost circuit 1360 generates a negative resistance (negative gm) to compensate for losses in switch 1358. When switch 1358 is turned on, i.e., when the control signal d_mode_ctrl is asserted (on), the bias signal Vb can be asserted. The voltage level of the bias signal Vb can control the amount of negative gm generated by the Q-boost circuit 1360. In an exemplary embodiment, the Q-boost circuit 1360 may include a cross-tuned transformer (such as...) Figure 3A The transistor pair 1362 and 1364 are coupled to the winding of the inductor 1353 of any one of transformers 310, 312, 314, and 316. In an exemplary embodiment, the drain of each transistor 1362 and 1364 in the transistor pair 1362 and 1364 is coupled to a dual-tuned transformer (such as...). Figure 3A The opposite side of the winding of inductor 1353 of any of transformers 310, 312, 314 and 316.

[0177] In an exemplary embodiment, switch 1358 can be configured to receive a control signal d_mode_ctrl at its gate. This can be achieved by... Figure 2 The data processor 210 or another control element provides the control signal d_mode_ctrl. Depending on the state of the control signal d_mode_ctrl, the switch 1358 will either be turned on (closed) or off (disconnected).

[0178] exist Figure 13 In the exemplary embodiment shown, the drain of switch 1358 is coupled to capacitor 1356 and the source of switch 1358 is coupled to capacitor 1357.

[0179] Figure 13 The equivalent circuit corresponding to the state of switch 1358 is also shown. The first equivalent circuit 1370 shows the electrical arrangement of the dual-mode notch filter 1350 when switch 1358 is on (closed), that is, when the control signal d_mode_ctrl is asserted and switch 1358 is on (closed); the second equivalent circuit 1380 shows the electrical arrangement of the dual-mode notch filter 1350 when switch 1358 is off (disconnected), that is, when the control signal d_mode_ctrl is deasserted and switch 1358 is off (disconnected).

[0180] In an exemplary embodiment, when switch 1358 is turned on, the dual-mode notch filter 1350 is turned off; and when switch 1358 is not turned on, the dual-mode notch filter 1350 is turned on, also referred to as being in LO notch mode.

[0181] In the first equivalent circuit 1370, when switch 1358 is turned on, switch 1358 behaves as a resistor 1371 with a value Ron. The on-resistance Ron of switch 1358 depends on the size of the equipment used to manufacture switch 1358, as well as the voltages applied to its gate, source, and drain terminals. The value of Ron can be selected based on circuit design considerations, operating frequency, and other factors.

[0182] In the second equivalent circuit 1380, when switch 1358 is turned off, switch 1358 behaves as a capacitor 1381 with a value Coff. The turn-off capacitance Coff of switch 1358 depends on the size of the equipment used to manufacture switch 1358, as well as the voltages applied to its gate, source, and drain terminals. The value of Coff can be selected based on circuit design considerations, operating frequency, and other factors.

[0183] In this exemplary embodiment, when switch 1358 is off and dual-mode notch filter 1350 is in LO notch mode, capacitors Coff and Co, together with inductance Ln of inductor 1353 and capacitors 1354 and 1355 (Cn), determine the notch response of dual-mode notch filter 1350.

[0184] In this exemplary embodiment, when switch 1358 is turned on and dual-mode notch filter 1350 is turned off, capacitor Co, together with inductance Ln of inductor 1353 and capacitors 1354 and 1355 (Cn), determines the response of dual-mode notch filter 1350.

[0185] When switch 1358 is turned on:

[0186] Z in In ω~ω o Open road / high

[0187]

[0188]

[0189] When switch 1358 is turned off:

[0190] ω off >ω o Zin in ω LO At the short circuit, Zin is at ω~ω off Open road / high

[0191]

[0192]

[0193]

[0194] In an exemplary embodiment, when the control signal d_mode_ctrl is asserted and switch 1358 is turned on (dual-mode notch filter 1350 is turned off), the parallel combination of Ln and Co resonates at approximately 48 GHz, and the dual-mode notch filter 1350 exhibits high impedance (high Z) from 37 GHz to 48.2 GHz.

[0195] In an exemplary embodiment, when the control signal d_mode_ctrl is deasserted and switch 1358 is turned off (dual-mode notch filter 1350 is turned on), the equivalent inductance L of the parallel combination of Ln / / C1 (C1 is the equivalent capacitance of Co and Coff in series) resonates with Cn at the LO frequency of 34 GHz, and the dual-mode notch filter 1350 is in LO notch mode.

[0196] Figure 14A and Figure 14B It is shown Figure 13 A graph of the exemplary bias voltage-dependent filter response (Vb) of the dual-mode notch filter 1350.

[0197] Figure 14A It shows when Figure 13 Graph 1400 shows the exemplary bias voltage-dependent filter response of the dual-mode notch filter 1350 in off mode.

[0198] Figure 14B It shows when Figure 13 The exemplary bias voltage-dependent filter response curve 1450 of the dual-mode notch filter 1350 in conduction mode is shown in Figure 1450.

[0199] exist Figure 14A In the graph 1400, there is a horizontal axis 1402 showing frequencies increasing to the right in GHz; and a vertical axis 1404 showing the scattering parameter (S-parameter) response. An exemplary S-parameter response is the forward voltage gain (also known as the forward emission coefficient, or S21 response).

[0200] An exemplary signal bandwidth 1408 is shown to span from about 37 GHz to about 48.2 GHz. In an exemplary embodiment, the signal bandwidth 1408 may include a first communication band 1410 spanning from about 37 GHz to 43.5 GHz and a second communication band 1420 spanning from about 47.2 GHz to 48.2 GHz.

[0201] Traces 1414 and 1415 show the situation when the dual-mode notch filter 1350 is in the off mode (switch 1358 is on). Figure 13 An example filter response of the dual-mode notch filter 1350, and corresponding to transistor 1366 ( Figure 13 The bias voltage Vb of transistor 1366 varies from about zero (0) volts (VDD in the example where transistor 1366 is a PMOS device) to tens or hundreds of millivolts (mV) and is generally less than one (1) volt. In this range, transistor 1366... Figure 13 ) is implemented as Figure 13 In an exemplary embodiment of the PMOS transistor shown, the bias voltage Vb can range from VDD volts to hundreds of mV less than VDD volts. Figure 14A The traces show Figure 13 How are the lossy on-resistance of switch 1358 and the loss of inductor 1353 (when switch 1358 is on) of the dual-mode notch filter 1350 affected by the Q-boost circuit 1360? Figure 13 The negative resistance (negative gm) controlled by Vb is used for compensation. For a certain range of bias voltage, the Q-boost circuit 1360 ( Figure 13 The negative resistance provided is proportional to the bias current / bias voltage. In an exemplary embodiment, trace 1414 shows that when... Figure 13 The channel response when transistor 1366 is turned off (biased with VDD volts); trace 1415 shows when... Figure 13 The channel response of transistor 1366 when biased (source-gate voltage) less than VDD volts by several hundred mV. Transistor 1366 ( Figure 13 The larger the bias voltage of the Q-boost circuit 1360, the better. Figure 13 The more loss compensation provided, the better. At an exemplary 37 GHz, comparing trace 1414 (transistor 1366 off) and trace 1415, by using... Figure 13 The Q-boost circuit 1360 compensates for the losses (on-resistance) of transistor 1358 and the resistive losses of inductor 1353, and the gain shown in trace 1415 is approximately 2 dB higher than the gain shown in trace 1414.

[0202] exist Figure 14B In the graph 1450, there is a horizontal axis 1452 showing frequencies increasing to the right in GHz; and a vertical axis 1454 showing the scattering parameter (S-parameter) response. An exemplary S-parameter response is the forward voltage gain (also known as the forward emission coefficient, or S21 response).

[0203] An exemplary signal bandwidth of 1458 is shown to span from approximately 37 GHz to approximately 48.2 GHz.

[0204] Traces 1464, 1465, and 1466 show Figure 13 The example filter response of the dual-mode notch filter 1350 in the on state, and corresponding to transistor 1366 ( Figure 13 The bias voltage Vb of transistor 1366 can range from about zero (0) volts (VDD in the example where transistor 1366 is a PMOS device) to tens or hundreds of millivolts (mV), and is generally less than one (1) volt. In this case, transistor 1366... Figure 13 ) is implemented as Figure 13 In an exemplary embodiment of the PMOS transistor shown, the bias voltage Vb can range from VDD volts to hundreds of mV less than VDD volts. Figure 14B The traces show Figure 13 How can the losses of the switching 1358 of the dual-mode notch filter 1350 be mitigated by the Q-boost circuit 1360? Figure 13 The negative resistance (negative gm) compensation provided by Vb control.

[0205] In an exemplary embodiment, trace 1464 illustrates when Figure 13The channel response of transistor 1366 when it is turned off (biased at VDD volts) is shown in trace 1465. Figure 13 The channel response of transistor 1366 when it is turned on with a bias of several hundred mV less than VDD volts (source-gate voltage), and trace 1466 shows the channel response when... Figure 13 The channel response of transistor 1366 when biased by several hundred mV (source-gate voltage) less than VDD volts. Transistor 1366 ( Figure 13 The larger the bias voltage of the Q-boost circuit 1360, the better. Figure 13 The more loss compensation provided, the better. In LO notch mode, the suppression of the dual-mode notch filter 1350 at a specific frequency (34 GHz in this example) depends on both the Q and capacitance arrangement within the dual-mode notch filter 1350. The Q-boost circuit 1360 increases the Q of the dual-mode notch filter 1350, but also adds some parasitic capacitance related to the bias voltage to the dual-mode notch filter 1350. In this exemplary embodiment, at 34 GHz, trace 1466 has a lower gain compared to trace 1465 in this particular example. In design examples, the dual-mode notch filter 1350 is typically used to design PMOS transistors 1362, 1364, and 1366 (…). Figure 13 The size of the Q-boost circuit 1360 and the bias current / voltage were determined to achieve optimal performance. At 34 GHz, trace 1464 (transistor 1366 off) was compared to trace 1466 (transistor 1366 biased with a voltage several hundred mV less than VDD volts), using... Figure 13 The Q-boost circuit 1360 compensates for the losses (on-resistance) of switch 1358 and the resistive losses of inductor 1353, and the LO suppression shown in trace 1466 is improved by approximately 6.4 dB compared to the LO suppression shown in trace 1464.

[0206] Figure 15 Figure 1500 illustrates a dual-mode notch filter according to an exemplary embodiment of the present disclosure. In an exemplary embodiment, the dual-mode notch filter 1550 can be implemented in a differential communication system and may include a capacitor 1554 coupled to a positive input terminal (IN+) 1551 and a capacitor 1555 coupled to a negative input terminal (IN-) 1552. Capacitors 1554 and 1555 may be referred to as Cn. The value of Cn can be selected based on the operating frequency, the desired filter response, and many other parameters.

[0207] In an exemplary embodiment, switch 1558 may be coupled between capacitor 1554 and inductor 1553. In an exemplary embodiment, switch 1558 may be implemented in various ways, including as a metal-oxide-semiconductor (MOS) transistor device. In an exemplary embodiment, switch 1558 may be implemented as an n-type MOS (NMOS) transistor device or a p-type MOS (PMOS) transistor device, and is shown as an NMOS transistor device in this example. Other techniques may also be used to implement switch 1558.

[0208] In an exemplary embodiment, switch 1559 may be coupled between capacitor 1555 and inductor 1553. In an exemplary embodiment, switch 1559 may be implemented in various ways, including as a metal-oxide-semiconductor (MOS) transistor device. In an exemplary embodiment, switch 1559 may be implemented as an n-type MOS (NMOS) transistor device or a p-type MOS (PMOS) transistor device, and is shown as an NMOS transistor device in this example. Other techniques may also be used to implement switch 1559.

[0209] Inductor 1553 is coupled between switch 1558 and switch 1559. An exemplary value for inductor 1553 can be 2Ln, where the value of Ln can be selected based on the operating frequency, the desired filter response, and several other parameters.

[0210] In an exemplary embodiment, capacitor 1556, switch 1561, and capacitor 1557 may be coupled in parallel across inductor 1553. Capacitors 1556 and 1557 may be referred to as Co. The value of Co may be selected based on the operating frequency, the desired filter response, and many other parameters.

[0211] In an exemplary embodiment, switch 1561 can be implemented in various ways, including as a metal-oxide-semiconductor (MOS) transistor device. In an exemplary embodiment, switch 1561 can be implemented as an n-type MOS (NMOS) transistor device or a p-type MOS (PMOS) transistor device, and is shown as an NMOS transistor device in this example. Other techniques can also be used to implement switch 1561.

[0212] In an exemplary embodiment, switches 1558, 1559, and 1561 can be configured to receive a control signal d_mode_ctrl at their respective gates. This can be achieved by... Figure 2 The data processor 210 or another control element provides the control signal d_mode_ctrl. Depending on the state of the control signal d_mode_ctrl, switches 1558, 1561, and 1559 will be turned on (closed) or off (disconnected).

[0213] exist Figure 15 In the exemplary embodiment shown, the drain of switch 1558 is coupled to the positive input terminal (IN+) 1551 via capacitor 1554, and the source of switch 1558 is coupled to inductor 1553 and capacitor 1556. Figure 15 In the exemplary embodiment shown, the drain of switch 1559 is coupled to inductor 1553 and capacitor 1557, and the source of switch 1559 is coupled to negative input terminal (IN-) 1552 via capacitor 1555. Figure 15 In the exemplary embodiment shown, the source of switch 1561 is coupled to capacitor 1557 and the drain of switch 1561 is coupled to capacitor 1556.

[0214] Figure 15 The equivalent circuits corresponding to the states of switch 1558, switch 1559, and switch 1561 are also shown. The first equivalent circuit 1570 shows the electrical arrangement of the dual-mode notch filter 1550 when switches 1558, 1559, and 1561 are on (closed), i.e., when the control signal d_mode_ctrl is asserted and switches 1558, 1559, and 1561 are on (closed); and the second equivalent circuit 1580 shows the electrical arrangement of the dual-mode notch filter 1550 when switches 1558, 1559, and 1561 are off (disconnected), i.e., when the control signal d_mode_ctrl is deasserted and switches 1558, 1559, and 1561 are off (disconnected). In an exemplary embodiment, when switches 1558, 1559, and 1561 are turned on, the dual-mode notch filter 1550 is turned on and is in LO notch mode; when switches 1558, 1559, and 1561 are not turned off, the dual-mode notch filter 1050 is turned off and is in 2LO notch mode.

[0215] exist Figure 15 In an exemplary embodiment, when the control signal d_mode_ctrl is asserted (on) and switches 1558, 1559 and 1561 are on, the dual-mode notch filter 1550 can be configured to create a notch response at the LO frequency of 34 GHz.

[0216] exist Figure 15 In an exemplary embodiment, when the control signal d_mode_ctrl is deasserted (off) and switches 1558, 1559 and 1561 are off, the dual-mode notch filter 1550 can be configured to create a notch response at a 2LO frequency of 52 GHz.

[0217] In the first equivalent circuit 1570, when switches 1558, 1559, and 1561 are turned on, switches 1558 and 1559 act as resistors 1571 with a value Ron. Similarly, switch 1561 will act as a resistor 1573 with a value Ron2. The on-resistance Ron of switches 1558 and 1559, and the on-resistance Ron2 of switch 1561, depend on the size of the equipment used to manufacture switches 1558, 1559, and 1561, and the voltages applied to their respective gate, source, and drain terminals. The values ​​of Ron and Ron2 can be chosen based on circuit design considerations, operating frequency, and other factors.

[0218] In the second equivalent circuit 1580, when switches 1558, 1559, and 1561 are turned off, switches 1558 and 1559 act as capacitors 1581 with a value Coff. Similarly, switch 1561 will act as a capacitor 1583 with a value Coff2. The turn-off capacitors Coff, 1581 of switches 1558 and 1559, and Coff2, 1583 of switch 1561, depend on the size of the equipment used to manufacture switches 1558, 1559, and 1561, and the voltages applied to their respective gate, source, and drain terminals. The values ​​of Coff and Coff2 can be selected based on circuit design considerations, operating frequency, and other factors.

[0219] In this exemplary embodiment, when switches 1558, 1559, and 1561 are off and the dual-mode notch filter 1550 is in 2LO notch mode, capacitors 1581 (Coff), 1554 and 1555 (Cn), 1583 (Coff2), and 1556 and 1557 (Co), together with the inductance Ln of inductor 1553, determine the response of the dual-mode notch filter 1550.

[0220] In this exemplary embodiment, when switches 1558, 1559, and 1561 are turned on and the dual-mode notch filter 1550 is in LO notch mode, capacitors 1557 (Co), 1554, and 1555 (Cn), together with the inductance Ln of inductor 1553, determine the response of the dual-mode notch filter 1550.

[0221] When switches 1558, 1559, and 1561 are turned on:

[0222]

[0223]

[0224]

[0225] When switches 1558, 1559, and 1561 are off:

[0226]

[0227]

[0228] In an exemplary embodiment, when the control signal d_mode_ctrl is asserted (on), the series combination of Ln and Co resonates at approximately 48.2 GHz, the parallel combination Ln / / Co is inductive at the LO frequency of 34 GHz, and the equivalent inductance of Ln / / Co (the parallel combination of Ln and Co) resonates with Cn at the LO frequency (34 GHz), creating a notch response at the LO frequency of 34 GHz. In this example, the Ln / / Co parallel combination presents high impedance (high Z) at 48.2 GHz, thereby minimizing signal loss at 48 GHz, while exhibiting a notch response at the LO frequency of 34 GHz.

[0229] In an exemplary embodiment, when the control signal d_mode_ctrl is deasserted (off), CoCoff2 / (Co+Coff2) is a smaller capacitor than when d_mode_ctrl is asserted (on), which resonates with Ln at a frequency higher than 2LO (52GHz). Ln / / (CoCoff2 / (Co+Coff2)) is inductive at 2LO (52GHz) and resonates with CnCoff / (cn+Coff) at 2LO, creating a notch response at the 2LO frequency of 52GHz.

[0230] In this way, when a notch response for the LO frequency (34 GHz) is created in the first mode and a notch response for the 2LO frequency (52 GHz) is created in the second mode, the loss at higher frequencies is minimized.

[0231] Figure 16 It is shown Figure 15 A graph 1600 shows an exemplary state-related response of the dual-mode notch filter 1550. Graph 1600 includes a horizontal axis 1602 showing frequencies increasing to the right in GHz units; and a vertical axis 1604 showing the scattering parameter (S-parameter) response. An exemplary S-parameter response is the forward voltage gain (also known as the forward emission coefficient, or S21 response).

[0232] An exemplary signal bandwidth 1608 is shown to span from about 37 GHz to about 48.2 GHz. In an exemplary embodiment, the signal bandwidth 1608 may include a first communication band 1610 spanning from about 37 GHz to 43.5 GHz and a second communication band 1620 spanning from about 47.2 GHz to 48.2 GHz.

[0233] Trace 1614 illustrates an exemplary S21 response, in which Figure 15 The dual-mode notch filter 1550 is in off mode.

[0234] Trace 1615 illustrates an exemplary S21 response, in which Figure 15 The dual-mode notch filter 1550 is in conduction mode.

[0235] Trace 1615 shows the dual-mode notch filter 1550 when the control signal d_mode_ctrl is asserted (on). Figure 15 A notch response is created at the LO frequency of 34 GHz and compared with a dual-mode notch filter 1550. Figure 15 Compared to when the control signal d_mode_ctrl is deasserted (off), the LO suppression is approximately 8.3dB and the loss caused by the dual-mode notch filter 1550 at 48GHz is minimal.

[0236] Trace 1614 shows the dual-mode notch filter 1550 when the control signal d_mode_ctrl is deasserted (off). Figure 15 It creates a notch response at approximately 55 GHz, while signals from 37 GHz to 48.2 GHz are unaffected by the dual-mode notch filter 1550.

[0237] Figure 17 It is shown Figure 15 A graph 1700 shows an exemplary switch-size-dependent response of the dual-mode notch filter 1550. Graph 1700 includes a horizontal axis 1702 showing frequencies increasing to the right in GHz units; and a vertical axis 1704 showing the scattering parameter (S-parameter) response. The exemplary S-parameter response is the forward voltage gain (also known as the forward emission coefficient, or S21 response).

[0238] An exemplary signal bandwidth 1708 is shown to span from about 37 GHz to about 48.2 GHz. In an exemplary embodiment, the signal bandwidth 1708 may include a first communication band 1710 spanning from about 37 GHz to 43.5 GHz and a second communication band 1720 spanning from about 47.2 GHz to 48.2 GHz.

[0239] Trace 1716 illustrates an exemplary S21 response, in which Figure 15 The dual-mode notch filter 1550 is in off mode and switch 1561 ( Figure 15 The size corresponds to 50 μm, where in this example, 50 corresponds to the number of fingers used for an NMOS transistor. In this example, the equivalent switch size is 50 μm.

[0240] Trace 1718 illustrates an exemplary S21 response, in which Figure 15 The dual-mode notch filter 1550 is in off mode and switch 1561 ( Figure 15 The size corresponds to 150 μm, where in this example, 150 corresponds to the number of fingers used for an NMOS transistor. In this example, the equivalent switch size is referred to as 150 μm.

[0241] As shown by comparing trace 1716 and trace 1718, switch 1561 is added. Figure 15 The size of the capacitor increases the turn-off capacitance Coff of switches 1558 and 1559, thereby improving the 2LO signal suppression (at 52 GHz) by approximately 3.3 dB in this exemplary embodiment.

[0242] Figure 18 This is a flowchart 1800 illustrating an example of an operation for creating a notch filter response. The blocks in method 1800 may be performed in the order shown or not, and in some embodiments, they may be performed at least partially in parallel.

[0243] In block 1802, a dual-mode notch filter can be configured in a first mode to provide a first filter response. For example, a dual-mode notch filter 550 can be configured in a first mode to provide a notch response (LO notch mode) at a first frequency.

[0244] In block 1804, the dual-mode notch filter can be configured in a second mode to provide a second filter response. For example, the dual-mode notch filter 550 can be configured in a second mode to provide no filter response and to have no effect on the signal at frequencies other than the first frequency (LO). Alternatively, the dual-mode notch filter 550 can be configured in a second mode to provide a second filter response that includes a notch response at a second frequency (2LO notch mode).

[0245] Figure 19 This is a functional block diagram of an apparatus 1900 for a dual-mode notch filter. Apparatus 1900 includes a component 1902 for providing a first filter response. In some embodiments, the component 1902 for providing the first filter response may be configured to perform method 1800. Figure 18The operation block 1802 describes one or more functions. In an exemplary embodiment, the component 1902 for providing a first filter response may include, for example, a dual-mode notch filter 550 configured to provide a notch response (LO notch mode) at a first frequency in a first mode.

[0246] The apparatus 1900 also includes a component 1904 for providing a second filter response. In some embodiments, the component 1904 for providing the second filter response may be configured to perform method 1800. Figure 18 The operation block 1804 describes one or more functions. In an exemplary embodiment, the device 1904 for providing a second filter response may include, for example, a dual-mode notch filter 550 configured not to provide a filter response in a second mode and not to affect the signal at frequencies other than the first frequency (LO). Alternatively, the dual-mode notch filter 550 may be configured in a second mode to provide a second filter response (2LO notch mode) including a notch response at a second frequency.

[0247] Examples of implementation methods are described in the following numbered clauses:

[0248] 1. A dual-mode notch filter for a multi-band millimeter-wave (mmW) transmitter, comprising a transmit filter circuit disposed between two amplifiers in the mmW transmit signal path, the transmit filter circuit being formed by at least one switch, at least one capacitor and a dual-tuned transformer, the transmit filter circuit having at least two modes configured to selectively filter parasitic signals in at least a first communication frequency band.

[0249] 2. The dual-mode notch filter according to Clause 1, wherein the transmit filter is configured to achieve a notch response at the frequency of the parasitic signal.

[0250] 3. A dual-mode notch filter according to any one of clauses 1 to 2, wherein the at least one switch is configured to selectively couple the at least one capacitor across the winding of a dual-tuned transformer.

[0251] 4. The dual-mode notch filter according to any one of clauses 1 to 3 further includes an additional capacitor coupled to the at least one switch, the additional capacitor being selectively coupled across the windings of a dual-tuned transformer, wherein the at least one switch is located between the at least one capacitor and the additional capacitor.

[0252] 5. The dual-mode notch filter according to any one of clauses 1 to 4 further includes a circuit having a pair of transistors coupled across the winding of a dual-tuned transformer, each transistor in the pair having a gate coupled to the drain of another transistor in the pair and coupled together to the source of a bias transistor.

[0253] 6. The dual-mode notch filter according to Clause 5, wherein the drain of each transistor in the transistor pair is coupled to the opposite side of the winding of the dual-tuned transformer.

[0254] 7. A dual-mode notch filter according to clause 5 or 6, wherein the bias transistor has a gate coupled to a control signal and a source coupled to a system voltage and the bias transistor is configured to bias the transistor pair with a bias voltage ranging from zero volts to less than one (1) volt.

[0255] 8. A transmitting filter circuit, comprising: a positive input terminal; a negative input terminal; a center-tapped inductor including a first terminal coupled to the positive input terminal and a second terminal coupled to the negative input terminal; a switch including a first terminal and a second terminal, the first terminal being coupled to the first terminal of the center-tapped inductor and the second terminal being coupled to the second terminal of the center-tapped inductor; a first capacitor coupled between the first terminal of the switch and the first terminal of the center-tapped inductor; and a second capacitor coupled between the second terminal of the switch and the second terminal of the center-tapped inductor.

[0256] 9. The emitter filter circuit according to Clause 8 further includes: a third capacitor coupled between the positive input terminal and the first terminal of the center tap inductor; and a fourth capacitor coupled between the negative input terminal and the second terminal of the center tap inductor.

[0257] 10. The emitter filter circuit according to any one of clauses 8 to 9 further comprises: a first switch coupled between the positive input terminal and a first terminal of the center tap inductor; and a second switch coupled between the negative input terminal and a second terminal of the center tap inductor.

[0258] 11. The emitter filter circuit according to any one of clauses 8 to 10 further includes a circuit having a pair of transistors inductively coupled across a center tap, each transistor in the pair having a gate coupled to the drain of another transistor in the pair and coupled together to the source of a bias transistor.

[0259] 12. The emitter filter circuit according to Clause 11, wherein the drain of each transistor in the transistor pair is coupled to the opposite side of the center-tapped inductor.

[0260] 13. The emitter filter circuit according to clause 11 or 12, wherein the bias transistor has a gate coupled to a control signal and a source coupled to a system voltage and the bias transistor is configured to bias the transistor pair with a bias voltage ranging from zero volts to less than one (1) volt.

[0261] 14. The transmit filter circuit according to any one of clauses 8 to 13, wherein the transmit filter circuit is coupled to the output of an upconverter mixer, and wherein the transmit filter circuit is configured to provide a first filter response in a first operating mode, the first filter response being configured to reduce unwanted spectral transmission of the local oscillator (LO) signal to a first communication signal in a first communication band, while having a negligible effect on a second communication signal in a second communication band, and wherein the transmit filter circuit is configured to provide a second filter response in a second operating mode.

[0262] 15. The transmit filter circuit according to any one of Clauses 8 to 14, wherein the transmit filter circuit is configured to reduce unwanted spectral emissions of the LO signal at the LO frequency and its harmonics, while allowing wideband signals to pass through and creating a notch response at the LO frequency and its harmonics.

[0263] 16. The transmit filter circuit according to any one of clauses 8 to 15, wherein the transmit filter circuit is located between at least two RF amplifier stages.

[0264] 17. The transmit filter circuit according to any one of clauses 14 to 16, wherein the transmit filter circuit is positioned in parallel with a dual-tuned transformer in the mmW signal path including the upconverter mixer.

[0265] 18. The transmit filter circuit according to any one of clauses 14 to 17, wherein: the first operating mode creates a notch filter response at the LO frequency while having a negligible effect on the second communication signal in the second communication band; and the second operating mode is a shutdown mode configured to have a negligible effect on the first communication signal in the first communication band and the second communication signal in the second communication band.

[0266] 19. The transmit filter circuit according to any one of Clauses 14 to 18, wherein: a first operating mode creates a notch filter response at the LO frequency; and a second operating mode creates a notch filter response at twice the LO frequency (2LO) and is configured to reduce unwanted spectral emissions of the 2LO signal.

[0267] 20. The transmit filter circuit according to Clause 18 or 19 further includes circuitry configured to provide negative resistance to compensate for resistive losses of the switch, wherein the switch is configured to select the notch filter response.

[0268] 21. The transmit filter circuit according to Clause 20, wherein the circuit configured to provide negative resistance to compensate for the resistive loss of the switch is configured to be biased with a bias voltage ranging from zero volts to less than one (1) volt.

[0269] 22. A method for filtering communication signals, comprising: providing a first filter response; and providing a second filter response, the first filter response being configured to reduce unwanted spectral emissions of a local oscillator (LO) signal to a first communication signal in a first communication band, while having a negligible effect on a second communication signal in a second communication band.

[0270] 23. The method described in Clause 22 further includes reducing unwanted spectral emissions of the LO signal at the LO frequency and its harmonics, while allowing wideband signals to pass through and creating notch responses at the LO frequency and its harmonics.

[0271] 24. The method according to any one of clauses 22 to 23 further comprises: creating a notch filter response at the LO frequency while having a negligible effect on the second communication signal in the second communication band; and providing a second filter response configured to have a negligible effect on the first communication signal in the first communication band and the second communication signal in the second communication band.

[0272] 25. The method according to any one of clauses 22 to 24 further comprises: creating a first notch filter response at the LO frequency; and creating a second notch filter response at twice the LO frequency (2LO) configured to reduce unwanted spectral emissions of the 2LO signal.

[0273] 26. The method described in accordance with Clause 24 or 25 further includes providing a negative resistance to compensate for losses in the switching that selects the response of the notch filter.

[0274] 27. The method according to Clause 26 further includes providing a negative resistance to compensate for losses of the switches that select the response of the notch filter when using a bias voltage ranging from zero volts to less than one (1) volt.

[0275] 28. An apparatus comprising: means for providing a first filter response; and means for providing a second filter response, the first filter response being configured to reduce unwanted spectral emissions of a local oscillator (LO) signal to a first communication signal in a first communication band, while having a negligible effect on a second communication signal in a second communication band.

[0276] 29. The apparatus according to Clause 28 further includes components for compensating for losses of the switch that selects the filter response from the first filter response and the second filter response.

[0277] 30. The device according to any one of clauses 28 to 29 further includes a component for providing a bias voltage to a component for compensating for losses of a switch used to select the response of a notch filter, the bias voltage ranging from zero volts to less than one (1) volt.

[0278] Some descriptions herein refer to specific frequencies, values, device characteristics, etc. However, other frequencies, values, device characteristics may also be considered. For example, signal bandwidth, local oscillator (LO) frequency, parasitic signal frequency, and other characteristics may differ from those described, while still being considered in the embodiments of this disclosure. Similarly, the device technologies used to manufacture the switches and elements described herein may differ, while still being considered in the embodiments of this disclosure.

[0279] The circuit architecture described in this article can be implemented on one or more ICs, analog ICs, RFICs, mixer signal ICs, ASICs, printed circuit boards (PCBs), electronic devices, etc. The circuit architecture described in this article can also be manufactured using various IC process technologies, such as complementary metal-oxide-semiconductor (CMOS), N-channel MOS (NMOS), P-channel MOS (PMOS), bipolar junction transistors (BJTs), bipolar CMOS (BiCMOS), silicon-germanium (SiGe), gallium arsenide (GaAs), heterojunction bipolar transistors (HBTs), high electron mobility transistors (HEMTs), silicon-on-insulator (SOI), etc.

[0280] The means of implementing the circuit described herein may be a standalone device or may be part of a larger device. The device may be (i) a standalone IC, (ii) a group of one or more ICs, which may include a memory IC for storing data and / or instructions, (iii) an RF IC such as an RF receiver (RFR) or an RF transmitter / receiver (RTR), (iv) a module that may be embedded in other devices, (vi) a receiver, a cellular phone, a wireless device, a handheld device or mobile unit, (vii) and so on.

[0281] Although the selected aspects have been described and detailed, it should be understood that various substitutions and modifications may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

1. A dual-mode notch filter for a multi-band millimeter-wave transmitter, comprising: A transmit filter circuit is disposed between two amplifiers in the millimeter-wave transmit signal path. The transmit filter circuit comprises at least one switch, at least one capacitor, and a dual-tuned transformer, wherein the at least one switch is configured to selectively couple the at least one capacitor across the windings of the dual-tuned transformer. The transmit filter circuit has at least two modes configured to selectively filter parasitic signals in at least a first communication frequency band: The first mode is configured to create a notch filter response at the local oscillator frequency of the local oscillator signal, and The second mode is configured to create a notch filter response at twice the local oscillator frequency, or to allow a first communication signal in a first communication band and a second communication signal in a second communication band to pass through.

2. The dual-mode notch filter of claim 1, wherein the transmit filter is configured to achieve a notch response at the frequency of the parasitic signal.

3. The dual-mode notch filter of claim 1, further comprising an additional capacitor coupled to the at least one switch, the additional capacitor being selectively coupled across the winding of the dual-tuned transformer, wherein the at least one switch is located between the at least one capacitor and the additional capacitor.

4. The dual-mode notch filter of claim 1, wherein the second mode is configured to allow the first communication signal and the second communication signal to pass through, and The dual-mode notch filter further includes a circuit having a pair of transistors coupled across the winding of the dual-tuned transformer, each transistor in the pair having a gate coupled to the drain of the other transistor in the pair and coupled together to the source of a bias transistor.

5. The dual-mode notch filter of claim 4, wherein the drain of each transistor in the transistor pair is coupled to the opposite side of the winding of the dual-tuned transformer.

6. The dual-mode notch filter of claim 4, wherein the bias transistor has a gate coupled to a control signal and a source coupled to a system voltage, and the bias transistor is configured to bias the transistor pair with a bias voltage ranging from zero volts to less than one volt.

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