A wire bond expansion card testing apparatus and method

Abstract

The present application relates to the field of expansion card testing, and specifically discloses a soldering wire expansion card testing device and method, which comprises a main signal relay board and a cable fixture board; one end of the cable fixture board is connected with the main cable fixture board, and the other end is provided with at least one type of expansion card connector, each type of expansion card connector comprising at least one expansion card connector; the expansion card connector is used for connecting with a soldering wire expansion card to be tested, the soldering wire expansion card to be tested is connected with a PCIE device; test data of the PCIE device is transmitted to the main cable fixture board through the soldering wire expansion card to be tested, and the main cable fixture board transmits the received test data to a test terminal after conditioning. The present application is compatible with various design types of soldering wire expansion boards, all test data is collected and analyzed through the test terminal, the purpose of testing multiple soldering wire expansion cards at one time is achieved, the test efficiency is improved, and the test cost is reduced.

Description

Technical Field

[0001] This invention relates to the field of expansion card testing, and more specifically to a wire-bonded expansion card testing device and method. Background Technology

[0002] Servers' multi-node, multi-port, and massive storage capacities typically rely on devices on the PCI-E bus. Due to limited server space, motherboard integration has increased significantly. Starting with the PCI-E 4.0 standard, servers have gradually eliminated traditional PCI-E slots (gold finger slots), replacing them with the more flexible and space-saving MCIO interface for PCI-E bus input / output transmission. Bridged cable designs establish board-to-board or chip-to-chip connections. Compared to traditional PCB routing methods, this type of connection offers longer signal paths, maintaining higher signal integrity and performance. In use, it can be directly plugged into PCI-E devices that support the interface, or connected via cable to the MCIO interface on a riser card, converting the PCI-E signal to a traditional PCI-E gold finger slot. This avoids the space constraints, difficulty in disassembly and replacement, and the need for traditional gold finger devices caused by traditional design limitations.

[0003] Unlike traditional gold-finger slots with direct contact connections, PCI-E device designs using MCIO interfaces on both ends, while flexible and convenient, still suffer from some signal loss. With the widespread adoption of the PCI-E 5.0 protocol standard (also known as Gen5), PCI-E device speeds have reached 32 GT / s. The MCIO interface design has encountered a speed bottleneck, and the resulting signal loss can no longer meet the requirements of Gen5. Therefore, a new riser design has been developed. For ease of use, one end of the motherboard retains the MCIO interface, while the other end of the cable eliminates the MCIO interface, directly soldering the signal line to the riser card. This design is called a wire-on riser, also known as a board-on riser. It maintains the flexibility of the original design while effectively avoiding the losses caused by high-speed signals transmitting through multiple interfaces, allowing PCI-E devices to transmit with the motherboard at Gen5 speeds.

[0004] In practice, the cable manufacturer and the PCBA manufacturer of the riser card are often not the same. Typically, the PCBA manufacturer packages the manufactured boards and sends them to the cable manufacturer, who then solders the signal cables. After the riser soldering is complete, the cable manufacturer needs to test the finished product for functionality and high-speed signal transmission to ensure that the product's performance meets requirements and avoids issues such as substandard signals, open circuits, and short circuits. During testing, the cable manufacturer needs to set up actual server environments. When producing large quantities of wire-soldered risers, the drawbacks of server-based testing—slow speed, small test quantity, and high cost—become apparent, failing to meet normal requirements. Furthermore, because the requirements for various wire-soldered risers differ, the cable manufacturer needs to prepare multiple real-world environments, posing a significant challenge to testing cost control. Summary of the Invention

[0005] To address the aforementioned issues, this invention provides a wire bonding expansion card testing device and method that is compatible with various design types of wire bonding expansion boards. All test data is collected and analyzed through a testing terminal, enabling the testing of multiple wire bonding expansion cards at once, thereby improving testing efficiency and reducing testing costs.

[0006] In a first aspect, the technical solution of the present invention provides a wire bonding expansion card testing device, including a main signal relay board and a cable fixture board; One end of the cable fixture board is connected to the main cable fixture board, and the other end is provided with at least one type of expansion card connector, each type of expansion card connector including at least one expansion card connector. The expansion card connector is used to connect to the expansion card under test (DUT), which in turn connects to the PCIe device. Test data from the PCIe device is transmitted from the DUT to the main cable fixture board, which then processes the received test data and transmits it to the test terminal.

[0007] In one alternative implementation, at least one fixture board connector is provided on the cable fixture board, and each expansion card connector is connected to one fixture board connector; The main signal relay board is equipped with at least one main relay board connector. The number of main relay board connectors is the same as that of the fixture board connectors on the cable fixture board, and they correspond one-to-one. The fixture board connectors are connected to the corresponding main relay board connectors.

[0008] In an optional implementation, the main signal relay board is also provided with a system single chip, a host communication interface, a main PCIe interface and a clock generator; The host communication interface and the main PCIe interface are connected to the system single chip, and the main PCIe interface is connected to the clock generator and each main relay board connector; the main signal relay board is connected to the test terminal through the host communication interface.

[0009] In an optional embodiment, the device further includes a main inter-symbol interference compensation board disposed between the cable fixture board and the main signal relay board, the main inter-symbol interference compensation board being used to eliminate inter-symbol interference. One end of the inter-code interference compensation board is provided with a first main compensation board connector and a second main compensation board connector. The number of the first main compensation board connector and the second main compensation board connector are the same and they correspond one-to-one. The first main compensation board connector is connected to the corresponding second main compensation board connector. The number of the first main compensation board connector is the same as that of the main relay board connector of the main signal relay board, and they correspond one-to-one. The first main compensation board connector is connected to the corresponding main relay board connector; the second main compensation board connector is connected to the jig board connector of the corresponding cable jig board.

[0010] In an optional embodiment, the device further includes at least one cascaded signal relay board, one end of which is connected to the cable fixture board and the other end of which is connected to the main signal relay board. The test data received by the cable fixture board is transmitted to the corresponding cascaded signal relay board, and the cascaded signal relay board transmits the test data to the test terminal via the main signal relay board.

[0011] In one optional implementation, the cascaded signal relay board is provided with a cascaded relay board connector, a cascaded PCIe interface, and a second cascaded communication interface. The number of cascade relay board connectors is the same as the number of fixture board connectors on the cable fixture board, and they correspond one-to-one. The cascade relay board connectors are connected to the corresponding fixture board connectors. At the same time, each cascade relay board connector on the cascade signal relay board is connected to the cascade PCIE interface, and the cascade PCIE interface is connected to the second cascade communication interface. The main signal relay board is also equipped with a first cascade communication interface that connects to the system single chip, and the first cascade communication interface is connected to the second cascade communication interface; at the same time, the clock generator on the main signal relay board is connected to the cascaded PCIe interface.

[0012] In an optional embodiment, the device further includes a cascaded inter-code interference compensation board, the number of which is the same as the number of cascaded signal relay boards, and they correspond one-to-one. The cascaded inter-code interference compensation board is disposed between the corresponding cable fixture board and the cascaded signal relay board to eliminate inter-code interference. One end of the cascaded inter-code interference compensation board is provided with a first cascaded compensation board connector and a second cascaded compensation board connector. The number of the first cascaded compensation board connector and the second cascaded compensation board connector are the same and correspond one-to-one. The first cascaded compensation board connector is connected to the corresponding second cascaded compensation board connector. The number of connectors on the first cascade compensation board is the same as the number of connectors on the cascade relay board of the cascade signal relay board, and they correspond one-to-one. The first cascade compensation connector is connected to the corresponding cascade relay board connector; the second cascade compensation board connector is connected to the corresponding cable fixture board connector.

[0013] In an optional embodiment, the device further includes a power board, with a main power interface on the main signal relay board and a cascade power interface on the cascade signal relay board, and the power board is connected to the main power interface and the cascade power interface respectively.

[0014] In one optional implementation, the host communication interface is a universal serial bus interface.

[0015] Secondly, the technical solution of the present invention provides a test method for wire bonding expansion cards, executed by a test terminal, comprising the following steps: Receive all test data; the test data includes device identification and device performance data; Map the corresponding wire bonding expansion card to be tested according to the device identifier; Analyze the performance of the corresponding wire bonding expansion card under test based on the equipment performance data.

[0016] Thirdly, the technical solution of the present invention provides a terminal, comprising: Memory, used to store wire bonding expansion card test programs; A processor, configured to implement the steps of the wire bonding expansion card testing method as described above when executing the wire bonding expansion card test program.

[0017] Fourthly, the present invention provides a computer-readable storage medium storing a wire bonding expansion card test program, wherein the wire bonding expansion card test program, when executed by a processor, implements the steps of the wire bonding expansion card test method as described in any of the above claims.

[0018] This invention provides a testing device and method for wire bonding expansion cards, which, compared to existing technologies, offers the following advantages: It configures a main signal relay board and a cable fixture board, allowing connection of various interface types of wire bonding expansion cards to the cable fixture board. All test data is transmitted to a test terminal via the main signal relay board, where the test terminal analyzes the data to achieve the testing of the wire bonding expansion cards. This invention is compatible with various design types of wire bonding expansion boards, and all test data is collected and analyzed through the test terminal, enabling the simultaneous testing of multiple wire bonding expansion cards, thus improving testing efficiency and reducing testing costs. Attached Figure Description To more clearly illustrate the technical solutions of the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the first structure of a wire bonding expansion card testing device provided in an embodiment of the present invention.

[0020] Figure 2 This is a schematic diagram of a second structure of a wire bonding expansion card testing device provided in an embodiment of the present invention.

[0021] Figure 3 This is a schematic diagram of a third structure of a wire bonding expansion card testing device provided in an embodiment of the present invention.

[0022] Figure 4 This is a schematic diagram of the fourth structure of a wire bonding expansion card testing device provided in an embodiment of the present invention.

[0023] Figure 5 This is a schematic diagram of a specific embodiment of a wire bonding expansion card testing device provided by the present invention.

[0024] Figure 6 This is a schematic diagram of a wire bonding expansion card testing method provided in an embodiment of the present invention.

[0025] Figure 7 This is a schematic diagram of the structure of a terminal provided in an embodiment of the present invention. Detailed Implementation

[0026] To enable those skilled in the art to better understand the present invention, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are merely some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.

[0028] The key terms used in this invention will be explained below.

[0029] PCI-E: PCI-Express (Peripheral Component Interconnect Express) is a high-speed serial computer expansion bus standard. It is a high-speed serial point-to-point dual-channel high-bandwidth transmission standard. Each connected device is allocated its own dedicated channel bandwidth and does not share the bus bandwidth. It mainly supports active power management, error reporting, end-to-end reliable transmission, hot-plugging, and Quality of Service (QoS) functions.

[0030] PCI-E slots are expansion slots based on the PCI-Express bus component expansion interface. By plugging in different expansion cards, almost all the functions a computer can perform can be obtained, making them truly "universal" expansion slots.

[0031] MCIO: Mini Cool Edge IO connectors are flexible, robust, and cost-effective connectors that help product designers increase flexibility, reduce overall space requirements, and extend the coverage of high-speed signals. MCIO connectors and cable connectors are widely used in servers, high-performance computing (HPC), switches / routers, and other data center equipment.

[0032] PCB: Printed Circuit Board, is the support structure for electronic components and the carrier for the electrical interconnection of electronic components.

[0033] PCBA: Printed Circuit Board Assembly, which means the entire process of a bare PCB board going through SMT component mounting or DIP insertion. It is also called printed circuit board assembly or circuit board assembly.

[0034] PC: Personal Computer.

[0035] Riser card: refers to a function expansion card or adapter card that is plugged into a PCI-E interface. It can be designed to divide a single PCI-E bandwidth signal into multiple signals, or it can be designed to combine multiple PCI-E bandwidth signals into one.

[0036] Retimer card: Primarily functions as a signal relay and auxiliary transmission chip. It belongs to the signal conditioning category and its function is signal equalization and enhancement. A retimer is similar to a PHY chip; when a signal passes through the retimer, it is reconstructed using an internal clock, increasing its transmission power before continuing transmission.

[0037] ISI: Inter-symbol Interference, is mainly caused by the correlation between high-frequency signals of different users, and it increases rapidly with the increase in the number of users and transmission power.

[0038] OCP: Open Compute Project.

[0039] Clock Generator: Clock generator.

[0040] Cypress chip: A programmable system-on-a-chip.

[0041] System-on-a-chip (SoC) is an integrated circuit product, typically integrated onto a single electronic chip. It has specific functions and is generally used in end products, containing a complete functional system (or, like a computer designed to do a specific task, where a single chip integrates everything and has its own "operating system"). Based on point 2, it includes a microprocessor, memory, logic circuits, etc.

[0042] Figure 1 This is a schematic diagram of a wire bonding expansion card testing device provided in an embodiment of the present invention, as shown below. Figure 1 As shown, the device includes a main signal relay board and a cable fixture board.

[0043] One end of the cable fixture board is connected to the main cable fixture board, and the other end is provided with at least one type of expansion card connector. Each type of expansion card connector includes at least one expansion card connector, such as... Figure 1The dashed box in the image represents a type of expansion card connector. This connector connects to the expansion card under test (DUT), which in turn connects to a PCIe device. Test data from the PCIe device is transmitted via the DUT to the main cable fixture board. The main cable fixture board processes the received test data and then transmits it to the test terminal. The test terminal analyzes the received test data and determines the performance of the corresponding DUT based on the analysis results.

[0044] Expansion card connectors can include MCIO type expansion card connectors, PCIe type expansion card connectors, etc. Each type of expansion card connector connects to the corresponding wire-on-demand (TOD) expansion card. For example, a wire-on-demand expansion card with an MCIO interface connects to an MCIO type expansion card connector on the cable fixture board. The types of expansion card connectors on the cable fixture board can be configured according to specific requirements. Each type of expansion card connector contains at least one expansion card connector. For example, if two types of expansion card connectors are set on the cable fixture board, with two expansion card connectors of each type, then testing of four wire-on-demand expansion cards of two types can be performed simultaneously.

[0045] The wire bonding expansion card testing device of this invention includes a main signal relay board and a cable fixture board. Various interface types of wire bonding expansion cards can be connected to the cable fixture board. All test data is transmitted to a test terminal via the main signal relay board, where the test terminal analyzes the test data to perform testing on the wire bonding expansion cards. This invention is compatible with various design types of wire bonding expansion boards. All test data is collected and analyzed through the test terminal, enabling the simultaneous testing of multiple wire bonding expansion cards, improving testing efficiency, and reducing testing costs.

[0046] Figure 2 This is a schematic diagram of a wire bonding expansion card testing device provided in an embodiment of the present invention, as shown below. Figure 2 As shown, the device includes a main signal relay board and a cable fixture board.

[0047] One end of the cable fixture board is connected to the main cable fixture board, and the other end is equipped with at least one type of expansion card connector, with each type of expansion card connector containing at least one expansion card connector. The cable fixture board also has at least one fixture board connector, with each expansion card connector connected to one fixture board connector. Simultaneously, the main signal trunk board has at least one main trunk board connector, the number of which is the same as the number of fixture board connectors on the cable fixture board, and they correspond one-to-one. The fixture board connectors connect to their corresponding main trunk board connectors, thus connecting the cable fixture board to the main signal trunk board.

[0048] The main signal relay board also includes a system-on-a-chip (SoC), a host communication interface, a main PCIe interface, and a clock generator. The host communication interface and the main PCIe interface are connected to the SoC, and the main PCIe interface is connected to the clock generator and each main relay board connector. The main signal relay board is connected to the test terminal via the host communication interface. In an optional implementation, the host communication interface can be a Universal Serial Bus (USB) interface.

[0049] During testing, the expansion card under test is connected to the expansion card connector, and a PCIe device is connected to the expansion card. The fixture board connector is connected to the main relay board connector, and the host communication interface is connected to the test terminal.

[0050] Test data from the PCIe device is transmitted from the expansion card under test to the cable fixture board. The cable fixture board then transmits the test data to the main signal relay board. Upon receiving the test data, the main signal relay board reconstructs the signal through its internal clock generator, increasing the signal transmission energy and achieving signal equalization and enhancement. The conditioned test data is then transmitted to the test terminal via the host communication interface. The test terminal analyzes the performance of the expansion card under test based on the test data.

[0051] The wire bonding expansion card testing device provided in this invention includes a main signal relay board and a cable fixture board. Various interface types of wire bonding expansion cards can be connected to the cable fixture board. All test data is transmitted to a test terminal via the main signal relay board, where the test terminal analyzes the test data to perform testing on the wire bonding expansion cards. This invention is compatible with various design types of wire bonding expansion boards. All test data is collected and analyzed through the test terminal, enabling the simultaneous testing of multiple wire bonding expansion cards, improving testing efficiency, and reducing testing costs.

[0052] Figure 3 This is a schematic diagram of a wire bonding expansion card testing device provided in an embodiment of the present invention, as shown below. Figure 3 As shown, the device includes a main signal relay board, a main code interference compensation board, and a cable fixture board.

[0053] The main code interference compensation board is set between the cable fixture board and the main signal relay board to eliminate inter-code interference.

[0054] One end of the cable fixture board is connected to the inter-code interference compensation board, and the other end is provided with at least one type of expansion card connector, each type of expansion card connector containing at least one expansion card connector. The cable fixture board is also provided with at least one fixture board connector, and each expansion card connector is connected to one fixture board connector. The cable fixture board is connected to the inter-code interference compensation board through the fixture board connector.

[0055] One end of the inter-code interference compensation board is provided with a first main compensation board connector and a second main compensation board connector. The number of the first main compensation board connector and the second main compensation board connector are the same and they correspond one-to-one. The first main compensation board connector is connected to the corresponding second main compensation board connector.

[0056] Meanwhile, the main signal relay board is equipped with at least one main relay board connector. The number of first main compensation board connectors is the same as that of the main relay board connectors on the main signal relay board, and they correspond one-to-one. The first main compensation connector is connected to the corresponding main relay board connector. The second main compensation board connector is connected to the fixture board connector of the corresponding cable fixture board.

[0057] The main signal relay board is also equipped with a system single chip, a host communication interface, a main PCIe interface, and a clock generator; the host communication interface and the main PCIe interface are connected to the system single chip, and the main PCIe interface is connected to the clock generator and each main relay board connector; the main signal relay board is connected to the test terminal through the host communication interface.

[0058] During testing, the expansion card under test is connected to the expansion card connector, and the expansion card under test is also connected to a PCIe device. The fixture board connector is connected to the second main compensation board connector, the first main compensation connector is connected to the main relay board connector, and the host communication interface is connected to the test terminal.

[0059] Test data from the PCIe device is transmitted from the expansion card under test to the cable fixture board. The cable fixture board then transmits the test data to the main inter-symbol interference compensation board to eliminate inter-symbol interference. The test data is then transmitted to the main signal relay board. The main signal relay board reconstructs the received test data using its internal clock generator to increase the signal transmission energy, achieving signal equalization and enhancement. The conditioned test data is then transmitted to the test terminal via the host communication interface. The test terminal analyzes the performance of the expansion card under test based on the test data.

[0060] The wire bonding expansion card testing device provided in this invention includes a main signal relay board and a cable fixture board. Various interface types of wire bonding expansion cards can be connected to the cable fixture board. All test data is transmitted to a test terminal via the main signal relay board, where the test terminal analyzes the test data to perform testing on the wire bonding expansion cards. This invention is compatible with various design types of wire bonding expansion boards. All test data is collected and analyzed through the test terminal, enabling the simultaneous testing of multiple wire bonding expansion cards, improving testing efficiency, and reducing testing costs.

[0061] Figure 4 This is a schematic diagram of a wire bonding expansion card testing device provided in an embodiment of the present invention, as shown below. Figure 4As shown, the device includes a main signal relay board, cascaded signal relay boards, and a cable fixture board. At least one cascaded signal relay board can be installed, and the number of cascaded signal relay boards can be configured by the user as needed.

[0062] Understandably, the main signal relay board and each cascaded signal relay board are each connected to a cable fixture board, and the cable fixture board connected to each relay board can connect to wire bonding expansion cards with different interface types.

[0063] One end of the cable fixture board connects to the upper-level main cable fixture board or cascaded signal relay board, and the other end is equipped with at least one type of expansion card connector, each type of expansion card connector containing at least one expansion card connector. The cable fixture board is also equipped with at least one fixture board connector, and each expansion card connector connects to one fixture board connector. The fixture board connector is used to connect to the main cable fixture board or cascaded signal relay board.

[0064] One end of the cascaded signal relay board is connected to the cable fixture board, and the other end is connected to the main signal relay board. The test data received by the cable fixture board is transmitted to the corresponding cascaded signal relay board, and the cascaded signal relay board transmits the test data to the test terminal via the main signal relay board.

[0065] During testing, the expansion card under test (DUT) is plugged into the cable fixture board. The DUT is connected to a PCIe device. The cable fixture board is connected to the main signal relay board or a cascaded signal relay board. Test data collected by the cable fixture board directly connected to the main signal relay board is directly transmitted to the test terminal via the main signal relay board. Test data collected by the cable fixture board connected to the cascaded signal relay board is transmitted to the main signal relay board via the cascaded signal relay board, and then transmitted to the test terminal by the main signal relay board. The test terminal receives the test data corresponding to all DUT expansion cards and performs performance analysis on multiple DUT expansion cards simultaneously.

[0066] Specifically, the main signal relay board is equipped with at least one main relay board connector. The number of main relay board connectors is the same as the number of fixture board connectors on the cable fixture board, and they correspond one-to-one. The fixture board connectors connect to the corresponding main relay board connectors to achieve the connection between the cable fixture board and the main signal relay board. The main signal relay board is also equipped with a system microcontroller, a host communication interface, a main PCIe interface, and a clock generator. The host communication interface and the main PCIe interface are connected to the system microcontroller, and the main PCIe interface is connected to the clock generator and each main relay board connector. The main signal relay board is connected to the test terminal through the host communication interface.

[0067] The cascaded signal relay board is equipped with cascaded relay board connectors, cascaded PCIe interfaces, and a second cascaded communication interface. The number of cascaded relay board connectors is the same as the number of fixture board connectors on the cable jig board, and they correspond one-to-one. The cascaded relay board connectors connect to their corresponding fixture board connectors, and each cascaded relay board connector on the cascaded signal relay board connects to the cascaded PCIe interface, which in turn connects to the second cascaded communication interface.

[0068] Correspondingly, the main signal relay board is also equipped with a first cascade communication interface that connects to the system single chip, and the first cascade communication interface is connected to the second cascade communication interface; at the same time, the clock generator on the main signal relay board is connected to the cascade PCIe interface.

[0069] There is no need to set up a system single chip and clock generator on the cascaded signal relay board; the main signal relay board controls the cascaded signal relay board.

[0070] In an optional embodiment, the device further includes a primary inter-symbol interference (ISI) compensation board and cascaded ISI compensation boards. The primary ISI compensation boards are disposed between the cable fixture board and the primary signal relay board. The number of cascaded ISI compensation boards is the same as the number of cascaded signal relay boards, and they correspond one-to-one. The cascaded ISI compensation boards are disposed between the corresponding cable fixture boards and cascaded signal relay boards. The primary ISI compensation boards and cascaded ISI compensation boards are used to eliminate inter-symbol interference.

[0071] Specifically, one end of the main code interference compensation board is provided with a first main compensation board connector and a second main compensation board connector. The number of the first main compensation board connector and the second main compensation board connector are the same and they correspond one-to-one. The first main compensation board connector is connected to the corresponding second main compensation board connector. The number of the first main compensation board connector is the same as the number of the main relay board connector of the main signal relay board and they correspond one-to-one. The first main compensation board connector is connected to the corresponding main relay board connector. The second main compensation board connector is connected to the fixture board connector of the corresponding cable fixture board.

[0072] One end of the cascaded inter-code interference compensation board is equipped with a first cascaded compensation board connector and a second cascaded compensation board connector. The number of the first cascaded compensation board connectors and the second cascaded compensation board connectors are the same and they correspond one-to-one. The first cascaded compensation board connector is connected to the corresponding second cascaded compensation board connector. The number of the first cascaded compensation board connectors is the same as the number of cascaded relay board connectors of the cascaded signal relay board, and they correspond one-to-one. The first cascaded compensation board connector is connected to the corresponding cascaded relay board connector. The second cascaded compensation board connector is connected to the fixture board connector of the corresponding cable fixture board.

[0073] In this embodiment, a power supply board is provided to power the device. Correspondingly, the main signal relay board is provided with a main power interface, and the cascade signal relay board is provided with a cascade power interface. The power supply board is connected to the main power interface and the cascade power interface respectively.

[0074] The wire bonding expansion card testing device provided in this invention includes a main signal relay board, a cascaded signal relay board, and a cable fixture board. Various interface types of wire bonding expansion cards can be connected to the cable fixture board. All test data is transmitted to a test terminal via the main signal relay board, where the test terminal analyzes the test data to perform testing on the wire bonding expansion cards. This invention is compatible with various design types of wire bonding expansion boards, and all test data is collected and analyzed through the test terminal, enabling the simultaneous testing of multiple wire bonding expansion cards, improving testing efficiency, and reducing testing costs.

[0075] To further understand the present invention, a specific embodiment is provided below to illustrate the invention in a more detailed manner. Figure 5 This is a structural schematic diagram of this specific embodiment.

[0076] like Figure 5 As shown, the device in this specific embodiment includes a Retimer board, a Retimer cascade board, two ISI compensation boards, two cable fixture boards, and a power board. The boards are interconnected via OCP3.0 connectors and gold fingers. The two cable fixture boards together support the testing of a wire-bonding riser for one x16 bandwidth PCI-E slot and wire-bonding risers for six MCIO interfaces.

[0077] The ISI compensation board balances inter-symbol interference of various high-frequency signals, corrects signals, and prevents error propagation. The Retimer board receives and processes high-frequency signals and PCI-E signals from the wire bonders (wire bonder expansion cards) under test, and outputs the processing results via a USB interface. The Clock Gen and Cypress chips on the Retimer cascade board are not integrated; they are connected to the I2C control chip on the Retimer board via Clock and I2C cables. The power board uses a single-phase conversion method to convert AC mains power to the 12.2V DC voltage required by the system, providing power to all components.

[0078] During testing, the wire bonding riser under test is connected to the cable fixture board. Then, a separate PC is connected to the two Retimer card interfaces of the device via USB. The PCI-E signal from the device connected to the wire bonding riser is transmitted to the ISI compensation board through the OCP3.0 interface. The ISI compensation board corrects the high-frequency signal and transmits it to the Retimer board through the OCP3.0 interface. The Retimer board receives the PCI-E signal, communicates with the PCI-E device on the wire bonding riser, and sends the obtained results to the PC via the USB interface. The PC processes the received data and determines the final test result for each wire bonding riser based on the BUS number, driver ID, manufacturer number, bandwidth, and speed information of the device connected to the riser.

[0079] The foregoing has described in detail an embodiment of a wire bonding expansion card testing device. Based on the wire bonding expansion card testing device described in the above embodiment, the present invention also provides a wire bonding expansion card testing method corresponding to the device.

[0080] Figure 6 This is a schematic flowchart of a wire bonding expansion card testing method provided by an embodiment of the present invention. The method is executed by a test terminal, which communicates with the test device of the above embodiment to test the wire bonding expansion card.

[0081] like Figure 6 As shown, the method includes the following steps. Depending on different needs, the order of the steps in this flowchart can be changed, and some can be omitted.

[0082] S1 receives all test data.

[0083] The test data includes device identification and device performance data. Device identification includes BUS number, driver ID number, manufacturer number, etc., and device performance data includes information such as bandwidth and speed.

[0084] S2, map the corresponding wire bonding expansion card to be tested according to the device identifier.

[0085] S3 analyzes the performance of the corresponding wire bonding expansion card under test based on the equipment performance data.

[0086] First, identify which wire bonding expansion card under test transmitted the information based on the device identification. Then, analyze the device performance data and perform performance analysis on the identified wire bonding expansion card under test.

[0087] The wire bonding expansion card testing method in this embodiment is based on the aforementioned wire bonding expansion card testing device, so its function corresponds to that of the aforementioned device, and will not be described again here.

[0088] Figure 7A schematic diagram of a test terminal 700 provided in an embodiment of the present invention includes: a processor 710, a memory 720, and a communication unit 730. The processor 710 is used to implement the following steps when executing the wire bonding expansion card test program stored in the memory 720: Receive all test data; the test data includes device identification and device performance data; Map the corresponding wire bonding expansion card to be tested according to the device identifier; Analyze the performance of the corresponding wire bonding expansion card under test based on the equipment performance data.

[0089] This invention is compatible with various design types of wire bonding expansion boards. All test data is collected and analyzed through a test terminal, enabling the testing of multiple wire bonding expansion cards at once, thereby improving testing efficiency and reducing testing costs.

[0090] The test terminal 700 includes a processor 710, a memory 720, and a communication unit 730. These components communicate via one or more buses. Those skilled in the art will understand that the server structure shown in the figure does not constitute a limitation of the present invention. It can be a bus topology or a star topology, and may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0091] The memory 720 can be used to store the execution instructions of the processor 710. The memory 720 can be implemented using any type of volatile or non-volatile memory terminal or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk. When the execution instructions in the memory 720 are executed by the processor 710, the test terminal 700 is able to perform some or all of the steps in the above method embodiments.

[0092] The processor 710 serves as the control center of the storage terminal, connecting various parts of the electronic terminal via various interfaces and lines. It executes software programs and / or modules stored in the memory 720, and calls data stored in the memory to perform various functions of the electronic terminal and / or process data. The processor can be composed of integrated circuits (ICs), such as a single packaged IC or multiple packaged ICs with the same or different functions connected together. For example, the processor 710 may only include a central processing unit (CPU). In this embodiment of the invention, the CPU may have a single processing core or include multiple processing cores.

[0093] The communication unit 730 is used to establish a communication channel, enabling the storage terminal to communicate with other terminals. It can receive user data sent by other terminals or send user data to other terminals.

[0094] The present invention also provides a computer storage medium, which may be a magnetic disk, an optical disk, a read-only memory (ROM), or a random access memory (RAM), etc.

[0095] The computer storage medium stores a wire bonding expansion card test program, which, when executed by the processor, performs the following steps: Receive all test data; the test data includes device identification and device performance data; Map the corresponding wire bonding expansion card to be tested according to the device identifier; Analyze the performance of the corresponding wire bonding expansion card under test based on the equipment performance data.

[0096] This invention is compatible with various design types of wire bonding expansion boards. All test data is collected and analyzed through a test terminal, enabling the testing of multiple wire bonding expansion cards at once, thereby improving testing efficiency and reducing testing costs. Those skilled in the art will clearly understand that the techniques in the embodiments of the present invention can be implemented using software plus necessary general-purpose hardware platforms. Based on this understanding, the technical solutions in the embodiments of the present invention, or the parts that contribute to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium such as a USB flash drive, mobile hard drive, read-only memory (ROM), random access memory (RAM), magnetic disk, or optical disk, or other media capable of storing program code. It includes several instructions to cause a computer terminal (which may be a personal computer, server, or a second terminal, network terminal, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention.

[0097] In the embodiments provided by this invention, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0098] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0099] In addition, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0100] The above-disclosed embodiments are merely preferred embodiments of the present invention, but the present invention is not limited thereto. Any non-creative variations that can be conceived by those skilled in the art, as well as any improvements and modifications made without departing from the principles of the present invention, should fall within the protection scope of the present invention.

Claims

1. A test device for wire bonding expansion cards, characterized in that, Includes main signal relay board and cable fixture board; One end of the cable fixture board is connected to the main cable fixture board, and the other end is provided with at least one type of expansion card connector, each type of expansion card connector including at least one expansion card connector. The expansion card connector is used to connect to the wire-bonded expansion card under test, which in turn connects to a PCIe device. Test data from the PCIe device is transmitted to the main cable fixture board via the expansion card under test. The main cable fixture board then processes the received test data and transmits it to the test terminal. At least one fixture board connector is provided on the cable fixture board, and each expansion card connector is connected to one fixture board connector; The main signal relay board is equipped with at least one main relay board connector. The number of main relay board connectors is the same as that of the fixture board connectors on the cable fixture board, and they correspond one-to-one. The fixture board connectors are connected to the corresponding main relay board connectors. The main signal relay board is also equipped with a system single chip, a host communication interface, a main PCIe interface, and a clock generator; The host communication interface and the main PCIe interface are connected to the system single chip, and the main PCIe interface is connected to the clock generator and each main relay board connector; the main signal relay board is connected to the test terminal through the host communication interface. The device also includes a main inter-symbol interference compensation board disposed between the cable fixture board and the main signal relay board. The main inter-symbol interference compensation board is used to eliminate inter-symbol interference. One end of the inter-code interference compensation board is provided with a first main compensation board connector and a second main compensation board connector. The number of the first main compensation board connector and the second main compensation board connector are the same and they correspond one-to-one. The first main compensation board connector is connected to the corresponding second main compensation board connector. The number of the first main compensation board connectors is the same as the number of the main relay board connectors of the main signal relay board, and they correspond one-to-one. The first main compensation connector is connected to the corresponding main relay board connector. The second main compensation board connector is connected to the fixture board connector of the corresponding cable fixture board; The device also includes at least one cascaded signal relay board. One end of the cascaded signal relay board is connected to the cable fixture board, and the other end is connected to the main signal relay board. The test data received by the cable fixture board is transmitted to the corresponding cascaded signal relay board, and the cascaded signal relay board transmits the test data to the test terminal via the main signal relay board.

2. The wire bonding expansion card testing device according to claim 1, characterized in that, The cascade signal relay board is equipped with a cascade relay board connector, a cascade PCIe interface, and a second cascade communication interface; The number of cascade relay board connectors is the same as the number of fixture board connectors on the cable fixture board, and they correspond one-to-one. The cascade relay board connectors are connected to the corresponding fixture board connectors. At the same time, each cascade relay board connector on the cascade signal relay board is connected to the cascade PCIE interface, and the cascade PCIE interface is connected to the second cascade communication interface. The main signal relay board is also equipped with a first cascade communication interface that connects to the system single chip, and the first cascade communication interface is connected to the second cascade communication interface; at the same time, the clock generator on the main signal relay board is connected to the cascaded PCIe interface.

3. The wire bonding expansion card testing device according to claim 2, characterized in that, The device also includes a cascaded inter-code interference compensation board. The number of cascaded inter-code interference compensation boards is the same as that of cascaded signal relay boards, and they correspond one-to-one. The cascaded inter-code interference compensation boards are set between the corresponding cable fixture boards and the cascaded signal relay boards to eliminate inter-code interference. One end of the cascaded inter-code interference compensation board is provided with a first cascaded compensation board connector and a second cascaded compensation board connector. The number of the first cascaded compensation board connector and the second cascaded compensation board connector are the same and correspond one-to-one. The first cascaded compensation board connector is connected to the corresponding second cascaded compensation board connector. The number of connectors on the first cascade compensation board is the same as the number of connectors on the cascade relay board of the cascade signal relay board, and they correspond one-to-one. The first cascade compensation connector is connected to the corresponding cascade relay board connector. The second-level compensation board connector is connected to the corresponding cable fixture board connector.

4. The wire bonding expansion card testing device according to claim 3, characterized in that, The device also includes a power board, with a main power interface on the main signal relay board and a cascade power interface on the cascade signal relay board. The power board is connected to the main power interface and the cascade power interface respectively.

5. The wire bonding expansion card testing device according to claim 4, characterized in that, The host communication interface is a universal serial bus interface.

6. A test method for wire bonding expansion cards, characterized in that, The wire bonding expansion card testing apparatus according to any one of claims 1 to 5, executed by a testing terminal, includes the following steps: Receive all test data; the test data includes device identification and device performance data; Map the corresponding wire bonding expansion card to be tested according to the device identifier; Analyze the performance of the corresponding wire bonding expansion card under test based on the equipment performance data.

Images