Image sensor and method of manufacturing the same, and patterning mask

Abstract

This invention provides an image sensor, its fabrication method, and a patterned mask. The image sensor includes multiple pixel regions arranged in an array. Each pixel region includes a photosensitive area, a charge transport element, and a charge collection area. Each pixel region also includes a functionally doped region and a non-functionally doped region. The non-functionally doped region includes a first region and a second region. The orthographic projection of the first transport portion of the charge transport element continuously covers the first and second regions, and at least part of the second end of the second region is located in the charge collection region. Based on these technical features, this invention can optimize the fabrication process below the charge transport element, optimize the transport characteristics of the charge transport element, achieve a compact layout, facilitate pixel miniaturization, and improve charge crosstalk between adjacent pixels while optimizing the layout.

Description

Technical Field

[0001] This invention belongs to the field of image sensor technology, and in particular relates to an image sensor and its fabrication method, as well as a patterned photomask. Background Technology

[0002] Image sensors are a crucial component of digital cameras. Based on their components, they can be broadly categorized into CCD (Charge-Coupled Device) and CMOS (Metal-Oxide-Semiconductor) sensors. With the continuous development of CMOS integrated circuit manufacturing processes, especially the design and manufacturing processes of CMOS image sensors (CIS), CMOS image sensors have gradually replaced CCD image sensors as the mainstream. Compared to CCD sensors, CMOS image sensors offer advantages such as higher industrial integration and lower power consumption.

[0003] Existing image sensors often suffer from problems such as suboptimal charge transport due to poor layout design. For example, improper doping beneath the transfer transistor can affect the transfer of charge from the photoelectric conversion element to the charge storage element. Furthermore, existing image sensor designs struggle to effectively balance layout compactness and performance improvement; for instance, it is difficult to effectively address both electrical crosstalk and layout compactness in an image sensor.

[0004] Therefore, it is necessary to provide an image sensor and its fabrication method, as well as a patterned photomask, to solve the above-mentioned problems in the prior art.

[0005] It should be noted that the above description of the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and for the convenience of those skilled in the art to understand them. It should not be assumed that the above technical solutions are known to those skilled in the art simply because they have been described in the background section. Summary of the Invention

[0006] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide an image sensor, its fabrication method, and a corresponding patterned mask, to solve the problems of charge transfer and balancing image sensor performance and layout compactness in the prior art.

[0007] To achieve the above and other related objectives, the present invention provides an image sensor, comprising:

[0008] A semiconductor substrate, the semiconductor substrate comprising a plurality of pixel regions arranged in an array;

[0009] Each pixel region includes a photosensitive area and a charge transport element and a charge collection area corresponding to the photosensitive area, and each pixel region includes a functionally doped region and a non-functionally doped region, wherein:

[0010] The non-functional doped region includes a first region and a second region, a first end of the second region being connected to the first region, and a second end of the second region being disposed away from the first region. The charge transport element has an orthographic projection on the semiconductor substrate, and the orthographic projection of the first transport portion of the charge transport element continuously covers the first region and the second region. The second end of the second region is at least partially located in the charge collection region, such that the charge collection region forms a first charge collection region located in the non-functional doped region and a second charge collection region located in the functional doped region.

[0011] Optionally, the second region includes at least one extended region that extends at least from the first charge collection region toward the second charge collection region, such that a portion of the extended region corresponding to the second end of the second region is away from the charge transport element.

[0012] Optionally, at least one of the extended regions is located in the second charge collection region.

[0013] Optionally, the first charge collection region has a line of symmetry along the charge collection direction, and the extended region is symmetrically arranged on both sides of the line of symmetry.

[0014] Optionally, the extended area is arranged at the corner of the second region.

[0015] Optionally, the plane containing the surface of the semiconductor substrate is defined with a first direction and a second direction having an angle, and the arrangement of the extended region includes: extending a first distance along the first direction toward the second charge collection region, the first distance being between 10% and 40% of the distance between the second charge collection region and the charge transport element along the first direction.

[0016] Optionally, the plane containing the surface of the semiconductor substrate is defined with a first direction and a second direction having an angle, and the arrangement of the extended region includes: extending a second distance along the second direction toward the second charge collection region, the second distance being between 10% and 40% of the distance between the second charge collection region and the charge transport element along the first direction.

[0017] Optionally, the charge transport element further includes a second transport portion and a third transport portion located on both sides of the first transport portion, and both the second transport portion and the third transport portion correspond to the functional doped region.

[0018] Optionally, the non-functional doped region and the charge collection region have doping of a first doping type, the functional doping includes doping of a second doping type different from the first doping type, and the functional doped region is disposed around the non-functional doped region.

[0019] Optionally, the sidewalls of the pixel photosensitive area are serrated.

[0020] Optionally, the second region has a third end and a fourth end, each connected between the first end and the second end respectively; wherein the third end forms a first diffusion barrier region between itself and the charge collection region and the charge transport element, and / or the fourth end forms a second diffusion barrier region between itself and the outer edge of the charge collection region.

[0021] Optionally, the region of the first diffusion barrier region corresponding to the charge collection region has a first width, and the region of the first diffusion barrier region corresponding to the charge transport element has a second width.

[0022] Optionally, the region of the first diffusion barrier region corresponding to the charge collection region has a third width, and the region of the first diffusion barrier region corresponding to the charge transport element has an overlapping region with the orthographic projection of the charge transport element, the overlapping region having a fourth width.

[0023] Optionally, the pixel photosensitive area includes a photosensitive main body area corresponding to the first area, the charge collection area includes a charge collection main body area and a charge collection doped area, the photosensitive main body area and the charge collection main body area are adjacent to form an adjacent area, and the orthographic projection of the first transmission portion of the charge transport element covers the adjacent area.

[0024] Optionally, the pixel photosensitive area further includes a photosensitive doped area to generate a charge signal based on the photosensitive doped area and to transmit the charge signal to the charge collection area based on the charge transport element. The photosensitive doped area corresponds to the first area and is adjacent to the charge transport element.

[0025] Optionally, the photosensitive doped region includes a doped host region and a diffusion compensation region. The diffusion compensation region is located below the orthographic projection of the charge transport element, and the ion doping type of the diffusion compensation region is opposite to the ion doping type of the functional doped region, so as to increase the width of the second charge collection region.

[0026] Optionally, when the diffusion compensation region exists, the width of the overlap region between the diffusion compensation region and the charge transport element is greater than or equal to 60% of the width of the charge transport element at the corresponding position and less than or equal to 80% of the width of the charge transport element at the corresponding position.

[0027] Optionally, the charge transport element includes a transport body region and a transport compensation region, wherein the transport compensation region covers the photosensitive doped region to increase the width of the second charge collection region.

[0028] Optionally, when the transmission compensation area exists, the width of the overlap area between the transmission compensation area and the pixel photosensitive area is greater than or equal to 40% of the width of the charge transport element at the corresponding position and less than or equal to 80% of the width of the charge transport element at the corresponding position.

[0029] Optionally, the pixel photosensitive area further includes an additional doped region, the outer contour of which does not exceed the outer contour of the photosensitive doped region, and the additional doped region extends below the orthographic projection of the charge transport element.

[0030] Optionally, the outer edge of the photosensitive subject area extends beyond the outer edge of the first region.

[0031] Optionally, the outer edge of the photosensitive doped region is located within the outer edge of the first region.

[0032] Optionally, the image sensor includes a pixel array consisting of a plurality of pixel units arranged in an array, wherein each pixel unit includes a pixel region.

[0033] Optionally, the semiconductor substrate further includes an isolation region corresponding to the functional doped region, the isolation region being located between two adjacent pixel regions.

[0034] The present invention also provides a method for fabricating an image sensor as described in any of the above embodiments, the method comprising the following steps:

[0035] A semiconductor substrate is provided, the semiconductor substrate having opposing first and second surfaces;

[0036] The charge collection region and the charge transport element are fabricated in the semiconductor substrate from at least the first surface to obtain the semiconductor substrate and the pixel region located in the semiconductor substrate;

[0037] The functional doping is performed at least once on the semiconductor substrate based on the same mask from the first side to form the functional doped region and the non-functional doped region.

[0038] Optionally, when the semiconductor substrate includes the isolation region, the fabrication method includes:

[0039] Ion implantation is performed from the first surface to the Nth ion implantation in the region corresponding to the isolation region of the semiconductor substrate, to form the isolation region based on the first ion implantation to the Nth ion implantation and the functional doping, wherein N is an integer greater than or equal to 1.

[0040] The present invention also provides a patterned mask for fabricating an image sensor as described in any of the above embodiments. The patterned mask includes a first patterned region and a second patterned region located around the first patterned region, wherein the first patterned region corresponds to the non-functional doped region, and the second patterned region corresponds to the functional doped region.

[0041] As described above, in the image sensor and its fabrication method of the present invention, as well as the patterned mask, each pixel region of the image sensor includes a functionally doped region and a non-functionally doped region. The non-functionally doped region of each pixel region includes a first region and a second region. The orthographic projection of the first transport portion of the charge transport element continuously covers the first region and the second region, and the second end of the second region is at least partially located in the charge collection region. Based on the above structural design, it is beneficial to optimize the fabrication process below the charge transport element and to optimize the transport characteristics of the charge transport element. The above design of the present invention is beneficial to achieving a compact layout design and to pixel miniaturization. The above design of the present invention is also beneficial to improving charge Blooming between adjacent pixels while optimizing the layout. Attached Figure Description

[0042] Figure 1 The diagram shows the basic structure of an image sensor system.

[0043] Figure 2 The diagram shows a pixel circuit made of an image sensor.

[0044] Figure 3 The diagram shown is a structural schematic of a pixel region provided in one embodiment of this application.

[0045] Figure 4 Displayed as Figure 3 A magnified view of a portion of the structural diagram of the pixel region.

[0046] Figure 5 Displayed as Figure 3 Another enlarged view of the structure diagram of the pixel region.

[0047] Figure 6 Displayed as Figure 3 This is another enlarged view of the structural diagram of the pixel region.

[0048] Figure 7The diagram shown is a schematic representation of the structure of the photosensitive subject area provided in one embodiment of this application.

[0049] Figure 8 The diagram shown is a schematic representation of the structure of a photosensitive doped region provided in one embodiment of this application.

[0050] Figure 9 The diagram shown is a schematic representation of the structure of the additional doped region provided in one embodiment of this application.

[0051] Figure 10 The diagram shown is a schematic representation of an example of a photosensitive doped region having a doped host region and a diffusion compensation region, provided in one embodiment of this application.

[0052] Figure 11 The diagram shown is a schematic representation of an example of a charge transport element having a main transport region and a compensation transport region, as provided in one embodiment of this application.

[0053] Figure 12 The illustration shows a photosensitive doped region with serrated sidewalls provided in one embodiment of this application.

[0054] Figure 13 The diagram shown is a schematic representation of a pixel array arrangement provided in one embodiment of this application.

[0055] Figure 14 The diagram shown is a schematic representation of another pixel array arrangement provided in one embodiment of this application.

[0056] Component designation explanation

[0057] 100 pixel area

[0058] 101 functional doped region

[0059] 102 Non-functional Doped Region

[0060] 1021 First District

[0061] 1022 Second Area

[0062] 200 charge transport elements

[0063] 200a Transmission Main Area

[0064] 200b transmission compensation area

[0065] 201 First Transmission Section

[0066] 202 Second Transmission Section

[0067] 203 Third Transmission Section

[0068] 300 charge collection region

[0069] 301 First Charge Collection Region

[0070] 302 Second Charge Collection Region

[0071] 303 Photosensitive Subject Area

[0072] 400 photosensitive doped region

[0073] 401 doped host region

[0074] 402 doped compensation region

[0075] 500 additional doped region Detailed Implementation

[0076] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0077] It should be emphasized that the term "including / comprises" as used herein refers to the presence of a feature, whole, step, or component, but does not exclude the presence or addition of one or more other features, wholes, steps, or components.

[0078] Features described and / or illustrated for one embodiment may be used in the same or similar manner in one or more other embodiments, combined with features in other embodiments, or substituted for features in other embodiments.

[0079] In the detailed description of embodiments of the present invention, for ease of explanation, the cross-sectional views illustrating the device structure may be partially enlarged and not to scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of the present invention. In actual fabrication, the three-dimensional spatial dimensions of length, width, and depth should be included.

[0080] For ease of description, spatial relation terms such as “below,” “under,” “lower than,” “below,” “above,” and “upper” may be used herein to describe the relationship between one element or feature shown in the accompanying drawings and other elements or features. It will be understood that these spatial relation terms are intended to include directions other than those depicted in the drawings for devices in use or operation. Furthermore, when a layer is referred to as being “between” two layers, it may be the only layer between the two layers, or there may be one or more layers in between.

[0081] In the context of this application, the structure described above the first feature may include embodiments in which the first and second features are formed in direct contact, or embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.

[0082] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0083] The following detailed description of the invention is provided in conjunction with the accompanying drawings.

[0084] Figure 1 The diagram shows a basic structural block diagram of an image sensor system. The image sensor includes a readout circuit and a control circuit connected to a pixel array. A functional logic unit is connected to the readout circuit, and the readout circuit and control circuit are connected to a status register to control the reading of the pixel array. The pixel array includes multiple pixels (P1, P2, P3) arranged in rows (R1, R2, R3…Ry) and columns (C1, C2, C3…Cx). The pixel signals output by the pixel array are output to the readout circuit via column lines. In one embodiment, after each pixel acquires image data, the image data is read out using the readout mode specified by the status register and then transmitted to the functional logic unit. In specific applications, the readout circuit may include an analog-to-digital converter (ADC) circuit and others.

[0085] In some applications, the status register may contain a programmed selection system to determine whether the readout system reads out in rolling shutter or global shutter mode. The functional logic unit may store only image data or image data applied or processed with image effects. In specific applications, the readout circuitry may read out one row of image data at a time along the readout column lines, or it may use various other methods to read out image data. The operation of the control circuitry can be determined by the current setting of the status register. For example, the control circuitry generates a shutter signal to control image acquisition. In some applications, this shutter signal may be a global shutter signal, causing all pixels in the pixel array to acquire their image data simultaneously through a single acquisition window. In other applications, this shutter signal may be a rolling shutter signal, causing pixels in each pixel row of the pixel array to be read out continuously through the acquisition window.

[0086] However, existing image sensors often suffer from problems such as suboptimal charge transport due to unreasonable layout design. For example, improper doping beneath the transfer transistor (TX) (e.g., ion implantation or diffusion formation) can affect the transfer of charge from the photoelectric conversion element (PD) to the charge collection element (FD). Furthermore, existing image sensor designs struggle to effectively balance layout compactness with improved image sensor performance. For instance, electrical crosstalk (such as electron leakage between adjacent pixels) is difficult to effectively address in conjunction with a compact layout. Currently, these and related problems remain unresolved. This invention, based on the design of non-functional doped regions, optimizes the doping beneath the transfer transistor, improves the layout, and mitigates charge crosstalk, effectively solving the aforementioned problems.

[0087] Please see Figure 2 The diagram shown illustrates the connection of a pixel circuit in an image sensor. Figure 2 As shown, each sensor pixel circuit includes a photoelectric conversion element (e.g., a photodiode) and pixel support circuitry (as shown by the transistor within the dashed box in the figure). The photodiode may be a buried photodiode (PPD) used in current image sensors. In one application example, the pixel support circuitry includes a reset transistor (RST), a source follower transistor (SF), and a pixel select transistor (RS), connected to the transfer transistor (TX) and photodiode shown in the figure. In another application example, not shown in the figure, the pixel support circuitry includes a reset transistor, a source follower transistor, a pixel select transistor, and a photodiode connected to another chip based on the transfer transistor, all disposed on a circuit chip. During operation, the photoelectric conversion element generates photocharge in response to incident light during exposure. The transfer transistor is connected to a transfer signal that controls the transfer transistor to transfer the charge accumulated in the photoelectric conversion element to the floating diffusion region (FD). In one embodiment, the transfer transistor may be a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). The reset transistor is connected between VDD and the floating diffusion region, responding to a reset signal to reset the sensor pixel circuitry (e.g., discharging or charging the floating diffusion region and photodiode to the current voltage). The floating diffusion region is connected to the gate of the source follower transistor. The source follower transistor is connected between VDD and the pixel select transistor to respond to and output the potential of the floating diffusion region. The pixel select transistor is connected from the source follower transistor to the pixel circuit bit line and outputs to the readout column. The pixel select transistor responds to the pixel select control signal to perform pixel select readout.

[0088] Example 1:

[0089] Please see Figure 3 As shown, Figure 3The image shown is a partial top view of an image sensor provided in this application. This embodiment provides an image sensor, including: a semiconductor substrate, the semiconductor substrate including a plurality of pixel regions 100 arranged in an array; wherein each pixel region 100 includes a pixel photosensitive area and a charge transport element 200 and a charge collection area 300 corresponding to the pixel photosensitive area, and each pixel region 100 includes a functionally doped region 101 and a non-functionally doped region 102.

[0090] In this embodiment, the non-functional doped region 102 includes a first region 1021 and a second region 1022. The first end of the second region 1022 is connected to the first region 1021, and the second end of the second region 1022, which is opposite to the first end, is disposed away from the first region 1021. The charge transport element 200 has an orthographic projection on the semiconductor substrate. The orthographic projection of the first transport portion 201 of the charge transport element 200 continuously covers the first region 1021 and the second region 1022. At least a portion of the second end of the second region 1022 is located in the charge collection region 300, such that the charge collection region 300 forms a first charge collection region 301 located in the non-functional doped region 102 and a second charge collection region 302 located in the functional doped region 101.

[0091] Specifically, the semiconductor substrate can be a structure obtained after device fabrication based on a semiconductor substrate. The semiconductor substrate can be any structure used in the field of image sensors to fabricate various functional regions of an image sensor, such as the photosensitive element, control transistors, and wiring of a CMOS image sensor fabricated on a semiconductor substrate. The semiconductor substrate can be a single-layer material structure, including but not limited to a silicon substrate, where the components in each region are fabricated within the silicon substrate. This silicon substrate can be made of single-crystal silicon, single-crystal germanium, polycrystalline silicon, amorphous silicon, or silicon-germanium compounds. Alternatively, the semiconductor substrate can be a stacked structure consisting of two or more material layers, with each region fabricated within any required layer. For example, the semiconductor substrate includes a silicon substrate and an epitaxial layer (EPI) formed on the silicon substrate. Photoelectric conversion elements and transistor components (such as charge transport elements) are fabricated within the epitaxial layer, and a back-illuminated image sensor can be fabricated based on this structure. Additionally, the semiconductor substrate can also be silicon-on-insulator (SOI). Furthermore, the semiconductor substrate can contain N-type or P-type doped regions to meet the functional requirements of the device.

[0092] It should be noted that in this embodiment, a functional doped region 101 and a non-functional doped region 102 are formed during the functional doping process in the device fabrication process. The functional doping can be performed on the semiconductor substrate and affects the charge transfer of the pixel photosensitive area. The non-functional doped region 102 includes a first region 1021 and a second region 1022. The orthographic projection of the first transport portion 201 of the charge transport element 200 (such as the gate of a charge transport transistor) continuously covers the first region 1021 and the second region 1022. The second end of the second region 1022 extends beyond the orthographic projection of the first transport portion 201 of the charge transport element 200. This ensures that during the functional doping process, the first transport portion 201 of the charge transport element 200 is not subjected to the aforementioned functional doping, which helps to protect the first transport portion 201 from the impact of functional doping on device performance and optimizes the charge transport performance of the charge transport element 200.

[0093] In this embodiment, by designing the non-functional doped region 102 to include a first region 1021 and a second region 1022, neither the region corresponding to the pixel photosensitive area nor the first transport portion 201 of the charge transport element 200 undergoes the aforementioned functional doping. This satisfies the requirement that the pixel photosensitive area does not undergo functional doping, while also facilitating the elimination of functional doping in the first transport portion 201 of the charge transport element 200. Furthermore, at least a portion of the second end of the second region 1022 is located in the charge collection region 300. The arrangement of the second end of the second region 1022 causes the charge collection region 300 to form a first charge collection region 301 located in the non-functional doped region 102 and a second charge collection region 302 located in the functional doped region 101. That is, the portion of the charge collection region farther from the charge transport element 200 undergoes functional doping, while the portion closer to the charge transport element 200 does not undergo the aforementioned functional doping. This facilitates the elimination of functional doping in the first transport portion 201 of the charge transport element. Furthermore, at least a portion of the second end of the second region 1022 is located in the charge collection region 300, and its location can be configured to facilitate flexible layout design and improve compactness.

[0094] See also Figure 3 As shown, in one embodiment, the non-functional doped region 102 has doping of a first doping type, and the charge collection region 300 has doping of a first doping type, wherein the functional doping includes doping of a second doping type different from the first doping type to form the functional doped region 101. In a further embodiment, the functional doped region 101 is disposed around the non-functional doped region 102.

[0095] Specifically, in one optional embodiment, the first doping type is N-type ion doping, and the second doping type is P-type ion doping. In this embodiment, the semiconductor substrate can be a silicon material including P-type dopants such as boron. In one example, the semiconductor substrate is a silicon substrate and a P-type epitaxial layer formed on the silicon substrate, wherein the pixel region and each device are fabricated in the P-type epitaxial layer.

[0096] Please see Figure 4 As shown, in one embodiment, the second region 1022 includes at least one extended region. Figure 4 The image shows two extended regions S1 and S2. The following description uses extended region S1 as an example. Extended region S1 extends from the first charge collection region 301 toward the second charge collection region 302, so that the portion of extended region S1 corresponding to the second end of the second region 1022 is away from the charge transport element 200.

[0097] Specifically, the design of the extended region can make the second end of the second region 1022 of the non-functional doped region 102 present a concave-convex state, so that the second charge collection region 302 and the charge transport element 200 present a variable state. Thus, the impact on the device performance of the image sensor and the layout between pixel regions can be further adjusted based on the interface design. For example, the impact of doped ion diffusion on inter-pixel charge crosstalk and the layout between pixel units of the pixel array can be further adjusted through the above interface design.

[0098] Continue reading Figure 4 As shown in the figure, as an example, the extended region is arranged at the corner of the second region. In an alternative example, the extended region is arranged at the corner of the second end of the second region of the non-functional doped region, as shown by extended regions S1 and S2 in the figure. In addition to the effects of the extended region mentioned above, this arrangement can also realize the morphology adjustment of the device layout design and the actual process fabrication pattern based on the extended region at the end, which is beneficial to ensure that the size of the fabricated device meets the design size of the sensor and improves the device performance.

[0099] Continue reading Figure 4 As shown, as an example, the first charge collection region 301 has a line of symmetry along the charge collection direction, and the extended regions are symmetrically arranged on both sides of this line of symmetry. The charge collection direction can be the direction from the pixel photosensitive area to the charge collection region; for example, it could be... Figure 4 In the example, the charge collection region could have a width along the Y direction, with a symmetry line along the X direction at its center. The extension region could be symmetrically distributed along the Y direction relative to the symmetry line in the X direction, which is beneficial for optimizing the charge transfer path.

[0100] Continue reading Figure 4As shown, as an example, at least one extended region corresponds to the second charge collection region 302; as Figure 4 As shown in the diagram, the extended region S1 is located in the second charge collection region 302, while the extended region S2 is not located in the second charge collection region 302. Placing the extended region in the second charge collection region 302 optimizes the layout design, prevents diffusion effects caused by functional doping, and also extends the corresponding first charge collection region 301, which is beneficial to the performance of the charge collection region itself.

[0101] Continue reading Figure 4 As shown, in one embodiment, the plane containing the surface of the semiconductor substrate is defined by a first direction and a second direction having an included angle. In one example, the first direction and the second direction are perpendicular, as shown below. Figure 4 The X and Y directions are shown in the diagram. The arrangement of the extended region S1 includes extending a first distance d1 along the first direction X toward the second charge collection region 302. The first distance d1 is between 5% and 40% of the distance between the second charge collection region 302 and the charge transport element 200 at the corresponding position along the first direction X. For example, the first distance d1 is between 5% and 40% of the distance L between the end of the second charge collection region 302 (the second end of the second region) and the edge of the nearby charge transport element 200, and can be 15%, 17%, 19%, 21%, 25%, 26%, 30%, etc., which is beneficial to the functional realization of the present invention based on the arrangement of non-functional doped regions.

[0102] Furthermore, the arrangement of the extension region S1 can also include: extending a second distance d2 along the second direction Y toward the second charge collection region 302, where the second distance d2 is between 5% and 40% of the distance between the second charge collection region 302 and the charge transfer element 200 along the first direction. In this example, the distance between the second charge collection region 302 and the charge transfer element 200 along the first direction can be the distance between them at the point where the extension region S1 begins to extend along the second direction Y. Of course, in other examples, the extension region S1 can be formed by extending a first distance d1 along the first direction X toward the second charge collection region 302 and extending a second distance d2 along the second direction Y toward the second charge collection region 302. Figure 4 The embodiment shown selects this formation method. Its arrangement and design can be found in the description of the first distance d1, and will not be repeated here. In an optional embodiment, the first distance d1 and the second distance d2 are chosen to be equal in value.

[0103] Continue reading Figure 4As shown, in one embodiment, the charge transport element 200 further includes a second transport portion 202 and a third transport portion 203 located on both sides of the first transport portion 201, and both the second transport portion 202 and the third transport portion 203 correspond to the functional doping region 101, that is, both are functionally doped.

[0104] Specifically, in this embodiment, the functional doped region 101 overlaps with the charge transport element 200, thereby allowing adjustment of the performance of the charge transport element 200 based on the functional doping, and also adjusting the influence of the charge transport element 200 on the performance (such as electrical performance) of other transistors based on the functional doping. For example, when the functional doping is the P-type doping described above, the ends on both sides of the first transport portion 201 can also have a certain amount of P-type doping, that is, a certain amount of P-type doping is performed at both ends directly below the charge transport element (which can be understood as the gate of the charge transport transistor), thereby facilitating the reduction of electrical interference between the charge transport element 200 and other devices, such as electrical interference between the charge transport element and the surrounding reset transistor (not shown in the figure, which can be located in the area below the charge collection region).

[0105] Please see Figure 5 and Figure 6 As shown, in one embodiment, the second region 1022 has opposing third and fourth ends, each connected between the first and second ends respectively; wherein, the third end forms a first diffusion barrier region K between the charge collection region 300 and the charge transport element 200. Similarly, in another embodiment, the fourth end forms a second diffusion barrier region between the charge collection region 300 and the charge transport element 200. Of course, both the first and second diffusion barrier regions can also be formed.

[0106] Specifically, the setting of the diffusion barrier region creates a diffusion barrier space between the charge collection region 300 and its connected portion and the charge transport element 200. As those skilled in the art will understand, the charge collection region and its connected portion can be a region shared by the charge collection region (floating diffusion node) and the reset transistor, or a region shared by the charge collection region (floating diffusion node) and the gain control transistor. This is beneficial for preventing the diffusion effect of functional doping and for layout design. In this example, the charge collection region and its connected portion can be designed in an L-shape to form the first barrier region K.

[0107] See also Figure 5As shown, as an example, the region of the first diffusion barrier region K corresponding to the charge collection region 300 has a first width w1, and the region of the first diffusion barrier region K corresponding to the charge transport element 200 has a second width w2. In this example, the edge of the functional doped region is spaced a certain distance from the opposite edges of the first charge collection region and the charge transport element in the Y direction to mitigate the effect of functional doping diffusion.

[0108] See also Figure 6 As shown in the example, the region of the first diffusion barrier region K corresponding to the charge collection region 300 has a third width w3, and the region of the first diffusion barrier region K corresponding to the charge transport element 200 overlaps with the orthographic projection of the charge transport element 200, with the overlapping region having a fourth width w4. In this example, the edge of the functional doped region is a certain distance from the opposite edge of the first charge collection region in the Y direction, and overlaps with the opposite edge of the charge transport element in the Y direction, thus forming the second transport portion 202. This can improve the influence of functional doping diffusion while also improving the charge influence between the charge transport element and other transistors. The widths mentioned above can be designed according to actual performance and layout requirements.

[0109] Please see Figure 7As shown, in one embodiment, the pixel photosensitive area includes a photosensitive main area 303 corresponding to the first area 1021, and the charge collection area 300 includes a charge collection main area and a charge collection doped area. The photosensitive main area 303 and the charge collection main area are adjacent to each other to form an adjoining area, and the orthographic projection of the first transmission portion 201 of the charge transport element 200 covers this adjoining area. It should be noted that the charge collection area 300 shown in the figure is merely an illustration of the above design. The formation of a first charge collection area 301 located in the non-functional doped area 102 and a second charge collection area 302 located in the functional doped area 101 refers to dividing the charge collection doped area into two parts, represented as the first charge collection area 301 and the second charge collection area 302, which is understandable to those skilled in the art. The adjacent region can be the area where two regions overlap, or it can be the boundary line formed by their adjacency. In one example, the photosensitive host region is a part of the semiconductor substrate, and the charge collection region can be considered to be composed of another part (the charge collection host region) defined in the semiconductor substrate and the charge collection doped region formed by subsequent ion implantation. In this example, the parts of the semiconductor substrate corresponding to the photosensitive host region and the charge collection region are defined based on the same process. For example, they are both active regions defined based on the same isolation process, and can both be parts of the P-type epitaxial layer. In addition, when the charge collection region is subsequently subjected to N-type ion implantation to form a charge collection doped region, the photosensitive host region 303 and the charge collection region 300 can also be considered to be adjacent to each other to form an adjacent region. In an optional example, the N-type ion-doped charge collection doped region extends directly below the charge transport element.

[0110] See also Figure 7 As shown, the outer contour of the photosensitive main body region extends beyond the outer contour of the first region; that is, the outer edge of the photosensitive main body region extends beyond the outer edge of the first region. Therefore, based on this design, it is beneficial to improve the doping performance when subsequently doping the region corresponding to the non-functional doped region 102. For example, the first region corresponding to the non-functional doped region can be subsequently doped with N-type ions to form a photoelectric conversion region.

[0111] Please see Figure 8As shown, in one embodiment, the pixel photosensitive region further includes a photosensitive doped region 400 to generate charge signals and transfer them to the charge collection region 300 based on the charge transport element 200. The photosensitive doped region 400 corresponds to the first region 1021 and extends below the orthographic projection of the charge transport element 200. This can be achieved by directly doping the region to be doped below the charge transport element during the fabrication process, or by the region formed after doping diffusion extending below the charge transport element. In this embodiment, the photosensitive doped region 400 is N-type ion doped to form a photoelectric conversion region in the semiconductor substrate, further extending below the orthographic projection of the charge transport element and below the gate of the charge transport element, which facilitates photocharge transfer. In one example, the charge collection doped region can be formed during the process of forming the photosensitive doped region 400.

[0112] See also Figure 8 As shown, the outer contour of the photosensitive doped region 400 is located within the outer contour of the first region 1021 of the non-functional doped region 102. That is, the outer edge of the photosensitive doped region 400 does not exceed the outer edge of the first region 1021, which is beneficial to the performance improvement of the pixel photosensitive region and can alleviate the influence of dark current, etc.

[0113] Please see Figure 9 As shown, in one embodiment, the pixel photosensitive area further includes an additional doped region 500, the outer contour of the additional doped region 500 does not exceed the outer contour of the photosensitive doped region 400, and the additional doped region 500 extends below the charge transport element 200. Similarly, it can be an extension after the doping process or diffusion.

[0114] Specifically, the additional doped region 500 can cooperate with the photosensitive doped region 400 to adjust the formation of the photoelectric conversion region and to adjust the potential gradient along the transfer path from the generated photocharge to the charge collection region. In this embodiment, the additional doped region 500 and the photosensitive doped region 400 have the same doping type, and the doping concentration of the additional doped region 500 is greater than that of the photosensitive doped region 400. It can be understood that the doping concentration of the additional doped region 500 here refers to the superposition of the doped ion concentrations in the region formed after the second ion doping following the first ion doping to form the photosensitive doped region 400.

[0115] Please see Figure 10As shown, in one embodiment, the photosensitive doped region 400 includes a doped host region 401 and a diffusion compensation region 402. The diffusion compensation region 402 is located below the orthographic projection of the charge transport element 200. The ion doping type of the diffusion compensation region 402 is opposite to that of the functional doped region. The design of the diffusion compensation region 402 is beneficial for adjusting the size of the second charge collection region, which is beneficial for device performance adjustment and compact layout design. For example, while satisfying the requirement of functional doping to form P-type isolation, it can also alleviate the influence of P-type ions diffused to the bottom of the transport transistor on the charge generated in the photosensitive host region and its transport towards the charge collection region. This can increase the size of the second charge collection region, that is, the area of ​​the active region covered by functional doping, thus achieving a compact layout.

[0116] Specifically, in this embodiment, a diffusion compensation region 402 is formed by ion doping in the semiconductor substrate below the orthogonal projection of the charge transport element, that is, directly below the gate of the charge transport transistor. The ion doping type of the diffusion compensation region 402 is opposite to that of the functional doping region. The influence of ion diffusion formed by functional doping can be compensated based on the diffusion compensation region 402, thereby increasing the width of the second charge collection region 302, which is beneficial to achieving a compact layout.

[0117] In one example, the doping of the doped host region 401 and the doping of the diffusion compensation region 402 are completed using the same process, thus eliminating the need for an additional fabrication step for the diffusion compensation region 402 and simplifying the process. Furthermore, both are formed using the same mask, forming an adjacent, integral region. In one example, the width m2 of the photosensitive doped region 400 in the gate overlap region of the charge transport transistor (e.g., including the extension region of the doped host region 401 and the diffusion compensation region 402) is greater than or equal to 60% and less than or equal to 80% of the width m1 of the charge transport element at the corresponding location; for example, it can be 65%, 70%, 75%, 80%, etc.

[0118] Please see Figure 11 As shown, in one embodiment, the charge transport element includes a transport body region 200a and a transport compensation region 200b. The transport compensation region 200b covering the photosensitive doped region 400 can facilitate the size adjustment of the second charge collection region 302, which is beneficial for device performance adjustment and compact pixel layout design. For example, while satisfying the functional doping to form P-type isolation, it can also alleviate the influence of P-type ions diffused to the bottom of the transport transistor on the charge generated in the photosensitive body region to transport towards the charge collection region. This design can increase the size of the second charge collection region, that is, the area of ​​the active region covered by the functional doping, to achieve a compact layout.

[0119] Specifically, in this embodiment, a transport control path is configured on the photogenerated charge transfer path by additionally setting a compensation transport gate. The transport compensation region 200b can be designed with the same material as the transport main region 200a, for example, both using polycrystalline silicon or doped polycrystalline silicon. In addition, it can be configured with the same control timing as the charge transport element 200, thereby forming a charge transfer path below the transport compensation region 200b. Based on this path, the influence of ion diffusion formed by functional doping can be compensated, thereby increasing the width of the second charge collection region 302, which is beneficial to achieving a compact layout.

[0120] In one example, the transport compensation region 200b and the transport body region 200a are fabricated using the same process, eliminating the need for an additional fabrication step for the transport compensation region and simplifying the process. In this example, the transport body region can be understood as the charge transport element 200 described above. Furthermore, both are formed using the same mask, forming an adjacent, integral region. In one example, the width n2 of the transport compensation region 200b is greater than or equal to 40% and less than or equal to 80% of the width n1 of the corresponding charge transport element, for example, it can be 45%, 50%, 60%, etc. It should be noted that the width n2 of the transport compensation region 200b here can be understood as the area corresponding to the formed transport compensation gate itself and the area extended below the transport transistor when forming the photosensitive doped region, that is, the width corresponding to the overlapping area of ​​the N-type doped photosensitive doped region 400 and the charge transport element 200.

[0121] Please see Figure 12 As shown, the sidewalls of the pixel photosensitive area are arranged in an uneven pattern, for example, the sidewalls of the pixel photosensitive area can be arranged in a sawtooth pattern. In one embodiment, the sidewalls of the photosensitive doped region 400 are fabricated in a sawtooth pattern, which can be achieved by setting a mask of a corresponding shape and then performing ion doping based on the mask. The photosensitive doped region with sawtooth sidewalls is beneficial to improving the full-well capacity, thereby improving the dynamic range of the image sensor and improving image quality. In addition, the uneven sidewalls are beneficial to improving electronic crosstalk between adjacent pixels, alleviating electronic leakage after the photoelectric conversion region is full-well, further improving the channel potential of the charge transport element, mitigating the influence of functional doping, and facilitating layout optimization based on the charge collection region.

[0122] Please see Figure 13 and Figure 14 As shown, in one embodiment, the image sensor includes a pixel array consisting of a plurality of pixel units arranged in an array, wherein each pixel unit includes a pixel region 100.

[0123] Continue reading Figure 13As shown, as an example, the arrangement of each pixel region 100 in the pixel array is consistent. See also... Figure 14 As shown, as an example, the pixel array includes alternating first and second pixel rows, wherein the arrangement of pixel regions 100 in the first pixel row differs from that in the second pixel row. Figure 13 and Figure 14 As can be seen from the diagram, in the same row of pixels, based on the design of the charge collection region of this application, the functional doped region and the charge collection region partially overlap, which is beneficial to achieving layout optimization between adjacent pixel regions, such as saving the area of ​​the isolation region between adjacent pixel regions.

[0124] Please see Figure 3 and Figure 13 , Figure 14 As shown, in one embodiment, the semiconductor substrate further includes an isolation region corresponding to the functional doped region 101, the isolation region being located between two adjacent pixel regions 100. Specifically, in this example, the functional doping can be doping during the fabrication of the isolation region in the semiconductor substrate, wherein the isolation region is used to separate the pixel regions to obtain an image sensor with pixel regions arranged in an array in the semiconductor substrate, such as an array arrangement of CMOS image sensors. Of course, the functional doping can also be a step in the process of forming the above-mentioned isolation region, such as shallow doping.

[0125] In this example, the first doping type is N-type ion doping, and the second doping type is P-type ion doping. The semiconductor substrate can be a structure including a P-type epitaxial layer. Specifically, N-type doping is performed on the semiconductor substrate to form the photoelectric conversion region (pixel photosensitive region), and P-type doping is performed on the semiconductor substrate to form the isolation region between pixels. In this example, the functional doping is P-type doping. Furthermore, the P-type doping for functional doping can be a step of P-type doping to form the isolation region. When the P-type doping for forming the isolation region is performed once or multiple times, the P-type doping for functional doping can be performed once or multiple times in the formation of the isolation region. In one example, the P-type doping for functional doping can be a single P-type doping process in the formation of the isolation region; for example, the functional doping is a single P-type doping process on the topmost (shallow) layer. Of course, the isolation region between pixel regions can also include other structures, such as shallow trench isolation (STI) structures.

[0126] In this embodiment, the photoelectric conversion region is an N-type doped region that performs photoelectric conversion to form photocharge. The photocharge is transferred to the charge collection region through the charge transport element. The second end of the second region of the non-functional doped region divides the charge collection region into two parts. The first charge collection region corresponds to the non-functional doped region without functional doping, thereby preventing the functional doping process from affecting the photoelectric conversion region and the charge transport element. For example, if the functional doping is P-type doping, it will affect the charge transport element due to diffusion. For example, P-type ions diffuse to the gate of the charge transport element, making the channel potential higher and forming a barrier to electron transfer. When the photoelectric conversion region reaches exposure saturation, the charge collection region is not easily transferred through the charge transport element, but leaks to adjacent pixel regions, affecting the signals of adjacent pixels and generating electrical crosstalk, which may be displayed as a high-brightness light source, etc. In addition, the second charge collection region corresponds to the functional doped region, which also allows the layout between adjacent pixel regions to be designed compactly. That is, while meeting the isolation performance and electrical performance of the device, the layout can be compactly arranged, which is beneficial for pixel miniaturization. The position of the second end of the second region of the non-functional doped region, that is, the width of the first charge collection region and the second charge collection region, can be set according to the actual performance requirements and layout design.

[0127] Example 2:

[0128] Please see Figure 3-14 As shown, this second embodiment provides a method for fabricating an image sensor. The image sensor can be any of the image sensors described in the first embodiment. The description of the structure and position of the image sensor involved in the fabrication method can be found in the first embodiment. The fabrication method includes the following steps:

[0129] S1: Provide a semiconductor substrate having opposing first and second surfaces;

[0130] S2: At least from the first side of the semiconductor substrate, a charge collection region 300 and a charge transport element 200 are prepared in the semiconductor substrate to obtain a semiconductor substrate and a pixel region 100 located in the semiconductor substrate;

[0131] In this process, at least one functional doping is performed on the semiconductor substrate from the first side based on the same mask to form a functional doped region 101 and a non-functional doped region 102.

[0132] As an example, when the semiconductor substrate includes an isolation region, the fabrication method includes the following steps:

[0133] Ion implantation is performed from the first surface of the semiconductor substrate to the Nth ion implantation in the corresponding isolation region of the semiconductor substrate, so as to form an isolation region based on the first ion implantation to the Nth ion implantation and the aforementioned functional doping, wherein N is an integer greater than or equal to 1.

[0134] In this example, it can be understood that after providing a semiconductor substrate, an isolation region is formed in the semiconductor substrate. The formation of the isolation region includes the formation of an ion-implanted isolation region. For example, taking a BSI structure image sensor as an example, a portion of the isolation region, namely the front isolation region, can be formed during the front-side process fabrication. The formation of the front isolation region can include an ion-implanted isolation region, which can be fabricated using a multi-pass process, such as performing six P-type ion implantations, i.e., first to Nth ion implantations and functional doping. The first to Nth ion implantations and functional doping form the ion-implanted isolation region to form the isolation region between pixel regions. Of course, the ion-implanted isolation region can also directly constitute the aforementioned isolation region. Here, functional doping is equivalent to selecting one or more steps to form the isolation region, which can simplify the process and improve the stability of device fabrication. In a further example, the aforementioned functional doping is performed after the first to Nth ion implantations, which is equivalent to the functional doping in this application being a shallow implantation of the isolation region.

[0135] Example 3:

[0136] Please see Figure 3-14 As shown, this embodiment three provides a patterned mask for fabricating an image sensor as described in any one of embodiments one, or this embodiment three provides a patterned mask applied to the fabrication method of the image sensor as described in any one of embodiments two. The description of the structure and position of the image sensor involved in the patterned mask of this embodiment can be found in embodiment one, and the description of the corresponding fabrication steps can be found in embodiment two, and will not be repeated here.

[0137] In this embodiment, the patterned mask includes a first patterned region and a second patterned region located around the first patterned region. The first patterned region corresponds to the non-functional doped region 102, and the second patterned region corresponds to the functional doped region 101. Functional implantation is performed based on the patterned mask to obtain the divided functional and non-functional doped regions. Those skilled in the art can understand the structure and use of the patterned mask in this embodiment based on the image sensor and its fabrication method in the foregoing embodiments, and will not be elaborated further here.

[0138] In summary, this invention provides an image sensor, its fabrication method, and a patterned mask. Each pixel region of the image sensor includes a functionally doped region and a non-functionally doped region. The non-functionally doped region of each pixel region includes a first region and a second region. The orthographic projection of the first transport portion of a charge transport element continuously covers the first and second regions, and at least part of the second end of the second region is located in the charge collection region. Based on this structural design, the fabrication process below the charge transport element can be optimized, as can the transport characteristics of the charge transport element. The design of this invention facilitates a compact layout and pixel miniaturization. Furthermore, the design helps to improve charge blooming between adjacent pixels while optimizing the layout. Therefore, this invention effectively overcomes the various shortcomings of the prior art and has high industrial applicability.

[0139] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. An image sensor, characterized in that, The image sensor includes: A semiconductor substrate, the semiconductor substrate comprising a plurality of pixel regions arranged in an array; The pixel region includes a pixel photosensitive area and a charge transport element and a charge collection area corresponding to the pixel photosensitive area, and the pixel region includes a functionally doped region and a non-functionally doped region, wherein: The non-functional doped region includes a first region and a second region. A first end of the second region is connected to the first region, and a second end of the second region is disposed away from the first region. The charge transport element has an orthographic projection on the semiconductor substrate. The orthographic projection of a first transport portion of the charge transport element continuously covers the first region and the second region, and the second end of the second region is at least partially located in the charge collection region, such that the charge collection region forms a first charge collection region corresponding to the non-functional doped region and a second charge collection region corresponding to the functional doped region.

2. The image sensor as described in claim 1, characterized in that, The second region includes at least one extended region that extends at least from the first charge collection region toward the second charge collection region, such that a portion of the extended region corresponding to the second end of the second region is away from the charge transport element.

3. The image sensor as described in claim 2, characterized in that, At least one of the extended regions is located in the second charge collection region; or, the extended region is arranged at the corner of the second region; or, the first charge collection region has a line of symmetry along the charge collection direction, and the extended regions are symmetrically arranged on both sides of the line of symmetry.

4. The image sensor as described in claim 2, characterized in that, The plane containing the surface of the semiconductor substrate is defined with a first direction and a second direction having an included angle. The arrangement of the extended region includes: extending a first distance along the first direction toward the second charge collection region, the first distance being between 10% and 40% of the distance between the second charge collection region and the charge transport element along the first direction, and / or extending a second distance along the second direction toward the second charge collection region, the second distance being between 10% and 40% of the distance between the second charge collection region and the charge transport element along the first direction.

5. The image sensor as described in claim 1, characterized in that, The charge transport element further includes a second transport portion and a third transport portion located on both sides of the first transport portion, wherein the second transport portion and the third transport portion both correspond to the functional doped region.

6. The image sensor as claimed in claim 1, characterized in that, Both the non-functional doped region and the charge collection region have doping of a first doping type, the functional doping includes doping of a second doping type different from the first doping type, and the functional doped region is disposed around the non-functional doped region; and / or, the sidewalls of the pixel photosensitive region are disposed in an uneven shape.

7. The image sensor as claimed in claim 1, characterized in that, The second region has a third end and a fourth end, which are respectively connected between the first end and the second end; wherein the third end forms a first diffusion barrier region between itself and the charge collection region and the charge transport element, and / or the fourth end forms a second diffusion barrier region between itself and the outer edge of the charge collection region.

8. The image sensor as claimed in claim 7, characterized in that, The first diffusion barrier region has a first width corresponding to the area of ​​the charge collection region, and the first diffusion barrier region has a second width corresponding to the area of ​​the charge transport element; or, the first diffusion barrier region has a third width corresponding to the area of ​​the charge collection region, and the area of ​​the first diffusion barrier region corresponding to the charge transport element overlaps with the orthographic projection of the charge transport element, and the overlapping area has a fourth width.

9. The image sensor as claimed in claim 1, characterized in that, The pixel photosensitive area includes a photosensitive main area corresponding to the first area, the charge collection area includes a charge collection main area and a charge collection doped area, the photosensitive main area and the charge collection main area are adjacent to each other to form an adjacent area, and the orthographic projection of the first transmission portion of the charge transport element covers the adjacent area.

10. The image sensor as claimed in claim 9, characterized in that, The pixel photosensitive area further includes a photosensitive doped region for generating a charge signal based on the photosensitive doped region and transmitting the charge signal to the charge collection region based on the charge transport element. The outer contour of the photosensitive doped region does not exceed the outer contour of the first region and the photosensitive doped region is at least correspondingly adjacent to the charge transport element; and / or, the outer contour of the photosensitive main area exceeds the outer contour of the first region.

11. The image sensor as claimed in claim 10, characterized in that, The photosensitive doped region includes a doped host region and a diffusion compensation region. The diffusion compensation region is located below the charge transport element, and the ion doping type of the diffusion compensation region is opposite to the ion doping type of the functional doped region, so as to increase the width of the second charge collection region; and / or, the charge transport element includes a transport host region and a transport compensation region, and the transport compensation region covers the photosensitive doped region to increase the width of the second charge collection region; and / or, the pixel photosensitive region also includes an additional doped region, the outer contour of which does not exceed the outer contour of the photosensitive doped region and extends directly below the charge transport element.

12. The image sensor as claimed in claim 11, characterized in that, When the diffusion compensation region is present, the width of the overlap region between the diffusion compensation region and the charge transport element is between 60% and 80% of the width of the charge transport element at the corresponding position; and / or, when the transfer compensation region is present, the width of the overlap region between the transfer compensation region and the pixel photosensitive area is between 40% and 80% of the width of the charge transport element at the corresponding position.

13. The image sensor according to any one of claims 1 to 12, characterized in that, The image sensor includes a pixel array consisting of multiple pixel units arranged in an array, wherein each pixel unit includes a pixel region; and / or, the semiconductor substrate further includes an isolation region corresponding to the functional doped region, the isolation region being located between two adjacent pixel regions.

14. A method for fabricating an image sensor as described in any one of claims 1 to 13, characterized in that, The preparation method includes the following steps: A semiconductor substrate is provided, the semiconductor substrate having opposing first and second surfaces; The charge collection region and the charge transport element are fabricated in the semiconductor substrate from at least the first surface to obtain the semiconductor substrate and the pixel region located in the semiconductor substrate; The functional doping is performed at least once on the semiconductor substrate based on the same mask from the first side to form the functional doped region and the non-functional doped region.

15. The method for fabricating an image sensor as described in claim 14, characterized in that, When the semiconductor substrate includes an isolation region, the fabrication method includes the following steps: Ion implantation is performed from the first surface to the Nth ion implantation in the region corresponding to the isolation region of the semiconductor substrate, to form the isolation region based on the first ion implantation to the Nth ion implantation and the functional doping, wherein N is an integer greater than or equal to 1.

16. A patterned photomask for fabricating an image sensor as described in any one of claims 1 to 12, characterized in that, The patterned mask includes a first patterned region and a second patterned region located around the first patterned region, wherein the first patterned region corresponds to the non-functional doped region and the second patterned region corresponds to the functional doped region.

Images