Method for preparing copper grid line electrode of silicon heterojunction cell and device thereof

CN116682896BActive Publication Date: 2026-09-25STATE POWER INVESTMENT GRP NEW ENERGY TECH CO LTD
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Patent Information

Application Number
CN202310706754.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-06-15
Publication Date
2026-09-25
Estimated Expiration
2043-06-15

AI Technical Summary

Technical Problem

[0005]当前现有技术中,第一种是在电池正背面通过光刻将干膜制造掩膜图形,在图形里电镀栅线后去除干膜制备铜栅线,最后去除干膜即得到铜栅线,但是其缺点是光刻用干膜掩膜较贵,生产成本高、量产成本高;另一种是在电池正背面采用激光直写曝光图形化配合后续铜电镀方式进行制备电镀铜栅线,该方法的缺点是:①激光直写设备太贵,正背面都用的话增加了设备投资成本,②

Benefits of technology

[0014]在第一方面的一种可能的实现方式中,在执行步骤S700之前还包括除油和去氧化层工艺,将牺牲层在除油和去氧化层工艺中溶解,之后再形成铜栅线层和抗氧化金属层,其中抗氧化金属层包括锡、银等金属层,电池电极主体是铜金属,只在铜表面覆盖0.1μm~5μm的抗氧化保护金属层,降低电极制造成本,降低栅线的体电阻,增加电池发电效率。

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Abstract

The present application relates to the grid line preparation technical field of heterojunction solar cell, especially to a kind of silicon heterojunction cell copper grid line electrode preparation method and device thereof.The silicon wafer is placed in potassium hydroxide solution to react, to form double-sided texturing structure on the surface of silicon wafer, amorphous silicon layer and indium tin oxide layer are deposited on the silicon wafer with double-sided texturing structure;Then a layer of metal seed layer and a layer of sacrificial layer are prepared by vacuum sputtering method, to enhance the conductivity of silicon heterojunction cell and improve the subsequent grid line pull-off force;Then a layer of ink is coated as a thermosetting mask, and then laser burning is carried out to obtain a groove, which is used to form a copper grid layer;Finally, the mask is washed, the metal seed layer and the sacrificial layer are removed, and the finished product is obtained.By covering the sacrificial layer on the metal seed layer, the grid line pattern slot is prepared by using ink as mask laser gasification, and copper grid is electroplated therein.Compared with the preparation of conventional copper grid electrode, the surface of the cell will not be damaged when laser irradiation.
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Description

Technical Field

[0001] This invention relates to the field of grid line fabrication technology for heterojunction solar cells, and in particular to a method and apparatus for fabricating copper grid line electrodes for silicon heterojunction solar cells. Background Technology

[0002] Silicon heterojunction solar cells have gradually established a significant advantage in the photovoltaic industry due to their high conversion efficiency, low temperature coefficient, and absence of light-induced degradation (LeTID) and potential-induced degradation (PID). A key reason for the high efficiency of silicon heterojunction cells is the excellent passivation effect of the intrinsic amorphous silicon thin film on the crystalline silicon substrate surface, which ensures the cell's high open-circuit voltage. The passivation effect of the intrinsic amorphous silicon thin film on the crystalline silicon surface is closely related to the thin film deposition process. Optimizing the thin film deposition process to reduce carrier recombination at the amorphous silicon / crystalline silicon interface enhances the interface passivation capability, thereby increasing the cell's open-circuit voltage. However, the use of low-temperature silver paste on both the front and back sides of heterojunction solar cells has resulted in persistently high costs, hindering large-scale mass production. While several solutions have been proposed to replace silver grid lines with electroplated copper, these are not mature and fail to address core technological challenges, leading to slow progress.

[0003] The grid lines of a solar cell serve to collect and conduct current. From a conductivity perspective, wider and denser grid lines result in lower resistance loss. However, for the front surface of the cell, the blocking effect of the metal grid lines on incident light is a significant cause of current loss. Therefore, the core of solar cell grid line design is to achieve a balance between light-blocking loss and conductivity. The back surface of the cell can be entirely metal or feature wide grid lines.

[0004] To improve cell conversion efficiency while reducing grid line manufacturing costs, the number of solar cell grids has increased from 2 to 3 to 5, and even more than a dozen, in recent years as silicon wafer sizes have grown, leading to the currently popular multi-grid technology. There has also been a shift from silver-aluminum paste screen printing to dry film lithography as a mask and electroplating to deposit copper grids.

[0005] Currently, the first method involves using photolithography to create a mask pattern on the front and back of the battery using a dry film. After electroplating the grid lines within the pattern, the dry film is removed to prepare the copper grid lines. However, this method has the disadvantage of expensive dry film masks, resulting in high production and mass production costs. The second method uses laser direct-writing exposure patterning on the front and back of the battery, followed by copper electroplating to prepare the electroplated copper grid lines. The disadvantages of this method are: ① Laser direct-writing equipment is too expensive; using it on both the front and back increases equipment investment costs; ② Laser direct writing exposure technology cannot protect the edges of silicon wafers during exposure. This makes it easy for copper to be deposited on the edges of the silicon wafers during subsequent electroplating, which can cause short circuits in the battery and reduce the battery conversion efficiency. Summary of the Invention

[0006] The present invention aims to at least improve one of the technical problems existing in the prior art. To this end, the present invention proposes a method and apparatus for fabricating copper grid electrodes for silicon heterojunction solar cells.

[0007] According to a first aspect of the present invention, a method for fabricating a copper grid electrode in a silicon heterojunction solar cell includes the following steps: Step S100: Place the silicon wafer in a potassium hydroxide solution and react under preset conditions to form a double-sided texturing structure with a reflectivity of 10%-20% on the surface of the silicon wafer. The double-sided texturing structure has a front and a back. Step S200: Deposit an amorphous silicon layer on both the front and back sides of the silicon wafer that forms the double-sided texturing structure; Step S300: Deposit an indium tin oxide layer on both the front and back sides of the silicon wafer on which the amorphous silicon layer is deposited. In step S400, a metal seed layer and a sacrificial layer are prepared on the front and back sides of the silicon wafer after the indium tin oxide layer is deposited, respectively, by vacuum sputtering, to enhance the conductivity of the silicon heterojunction cell and improve the subsequent gate line pull-out force. Step S500: Apply a layer of ink as a thermosetting mask to the front and back sides of the silicon wafer after the sacrificial layer is prepared, to obtain a semi-finished product of copper grid line electrode of silicon heterojunction cell, wherein the thickness of the thermosetting mask is 1um-50um. Step S600: Laser burning is performed on the front and back sides of the silicon heterojunction cell copper grid line electrode semi-finished product to obtain a silicon heterojunction cell copper grid line electrode semi-finished product with trenches. Step S700: A copper grid layer is formed in the trench of the copper grid electrode semi-finished product of silicon heterojunction cell by chemical electroplating. In step S800, the thermosetting mask on the copper grid electrode semi-finished product of the silicon heterojunction battery with the copper grid layer formed is cleaned with an acidic solution, wherein the acidic solution can be sodium hydroxide or potassium hydroxide. In step S900, the semi-finished silicon heterojunction cell copper grid electrode after the heat-cured mask is cleaned is placed in sulfuric acid with added oxidizing additives for acid washing to remove the metal seed layer and sacrificial layer, thereby obtaining the finished silicon heterojunction cell copper grid electrode.

[0008] According to an embodiment of the present invention, a method for fabricating copper grid electrodes for silicon heterojunction solar cells involves preparing a metal seed layer and then covering it with a sacrificial layer. When a mask is vaporized by laser irradiation, the sacrificial layer protects the cell. The sacrificial layer is then removed during pre-plating treatment to obtain electroplated copper grid electrodes. Simultaneously, the present invention uses ink as a mask for laser vaporization to create grooves in the grid pattern, and then electroplats the copper grid within these grooves. Compared to conventional copper grid electrode fabrication, the process of the present invention also prevents damage to the cell surface during laser irradiation due to the presence of a sacrificial layer.

[0009] In one possible implementation of the first aspect, the sacrificial layer in step S400 is a metal layer and / or The acid-soluble oxide layer, with a sacrificial layer thickness of 20nm~300nm, provides excellent protection for silicon heterojunction solar cells.

[0010] In one possible implementation of the first aspect, the sacrificial layer is any one of aluminum, titanium, or aluminum oxide.

[0011] In one possible implementation of the first aspect, the thickness of the metal seed layer in step S400 is 30nm-1000nm, and the sheet resistance of the film layer is 50mOhm / sq-300mOhm / sq, which reduces the contact resistance between the copper electrode and the transparent conductive layer of the battery, reduces the subsequent electroplating resistance, and increases the battery efficiency.

[0012] In one possible implementation of the first aspect, the metal seed layer in step S400 includes any one or a combination of copper, nickel, silver, gold, titanium, and aluminum.

[0013] In one possible implementation of the first aspect, the laser ablation of the front and back sides of the copper grid electrode semi-finished product of the silicon heterojunction cell in step S600 specifically involves using a laser wavelength of 355nm / 532nm, a pulse frequency of 10-200kHz, a power of 1W-35W, a laser spot size of 0.01mm-0.5mm, a minimum linewidth of ≤30μm, and a laser scribing rate of 1mm / s-100mm / s. Under these conditions, when the laser irradiates the sacrificial layer, the surface of the crystalline silicon cell will not be damaged.

[0014] In one possible implementation of the first aspect, before performing step S700, an oil removal and oxide layer removal process is included, in which the sacrificial layer is dissolved, and then a copper grid layer and an anti-oxidation metal layer are formed. The anti-oxidation metal layer includes metal layers such as tin and silver. The main body of the battery electrode is copper metal, and only a 0.1μm~5μm anti-oxidation protective metal layer is covered on the copper surface, which reduces the electrode manufacturing cost, reduces the bulk resistance of the grid line, and increases the battery power generation efficiency.

[0015] In one possible implementation of the first aspect, the preset condition in step S100 is that the silicon wafer is heated to 50°C to 85°C in a potassium hydroxide solution for 1 min to 20 min to accelerate the texturing effect on the crystalline silicon surface and obtain a pyramidal morphology on the silicon wafer surface.

[0016] In one possible implementation of the first aspect, the concentration of potassium hydroxide is 0.5%-10% to ensure the uniformity of the reaction. Potassium hydroxide, instead of sodium hydroxide, can reduce crystallization and reactant precipitation.

[0017] In one possible implementation of the first aspect, the thickness of the indium tin oxide layer in step S300 is 40nm-200nm. The indium tin oxide layer contains different process layers and is a transparent conductive layer on the surface of the battery. It has three functions: ① The TCO thin film (indium tin oxide layer) has good conductivity and can effectively collect photogenerated carriers; ② The TCO thin film has high transmittance and ideal refractive index, forming an anti-reflection layer with the silicon substrate, reducing the reflection of the silicon surface, increasing the absorption of sunlight by the silicon substrate, and improving the battery performance; ③ It is deposited on the surface of amorphous silicon and can effectively protect the amorphous silicon thin film.

[0018] According to a second aspect of the present invention, a silicon heterojunction cell copper grid wire fabrication apparatus is provided, wherein the apparatus performs the silicon heterojunction cell copper grid wire electrode fabrication method as described above to fabricate the silicon heterojunction cell copper grid wire.

[0019] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0020] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a flowchart of a method for fabricating copper grid line electrodes for silicon heterojunction solar cells according to an embodiment of the present invention. Detailed Implementation

[0022] The embodiments of the present invention are described in detail below. The embodiments described with reference to the accompanying drawings are exemplary. It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.

[0023] It should be noted that when a component is said to be "fixed to" another component, it can be directly attached to the other component or there may be an intervening component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intervening component.

[0024] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0025] Example 1 See Figure 1 As shown, this embodiment provides a method for fabricating copper grid line electrodes for silicon heterojunction solar cells, which includes the following steps: Step S100: Place the silicon wafer in a potassium hydroxide solution and react under preset conditions to form a double-sided texturing structure with a reflectivity of 10%-20% on the surface of the silicon wafer. The double-sided texturing structure has a front and a back. Step S200: Deposit an amorphous silicon layer on both the front and back sides of the silicon wafer that forms the double-sided texturing structure; Step S300: Deposit an indium tin oxide layer on both the front and back sides of the silicon wafer on which the amorphous silicon layer is deposited. In step S400, a metal seed layer and a sacrificial layer are prepared on the front and back sides of the silicon wafer after the indium tin oxide layer is deposited, respectively, by vacuum sputtering, to enhance the conductivity of the silicon heterojunction cell and improve the subsequent gate line pull-out force. Step S500: Apply a layer of ink as a thermosetting mask to the front and back sides of the silicon wafer after the sacrificial layer is prepared, to obtain a semi-finished product of copper grid line electrode of silicon heterojunction cell, wherein the thickness of the thermosetting mask is 1um-50um. Step S600: Laser burning is performed on the front and back sides of the silicon heterojunction cell copper grid line electrode semi-finished product to obtain a silicon heterojunction cell copper grid line electrode semi-finished product with trenches. Step S700: A copper grid layer is formed in the trench of the copper grid electrode semi-finished product of silicon heterojunction cell by chemical electroplating. In step S800, the thermosetting mask on the copper grid electrode semi-finished product of the silicon heterojunction battery with the copper grid layer formed is cleaned with an acidic solution. In step S900, the semi-finished silicon heterojunction cell copper grid electrode after the heat-cured mask is cleaned is placed in sulfuric acid with added oxidizing additives for acid washing to remove the metal seed layer and sacrificial layer, thereby obtaining the finished silicon heterojunction cell copper grid electrode.

[0026] According to an embodiment of the present invention, a method for fabricating copper grid electrodes for silicon heterojunction solar cells involves preparing a metal seed layer and then covering it with a sacrificial layer. When a mask is vaporized by laser irradiation, the sacrificial layer protects the cell. The sacrificial layer is then removed during pre-plating treatment to obtain electroplated copper grid electrodes. Simultaneously, the present invention uses ink as a mask for laser vaporization to create grooves in the grid pattern, and then electroplats the copper grid within these grooves. Compared to conventional copper grid electrode fabrication, the process of the present invention also prevents damage to the cell surface during laser irradiation due to the presence of a sacrificial layer.

[0027] It should be noted that the sacrificial layer in step S400 is a metal layer and / or An acid-soluble oxide layer, wherein the thickness of the sacrificial layer is 20 nm to 300 nm.

[0028] Alternatively, the sacrificial layer may be any one of aluminum, titanium, or aluminum oxide.

[0029] It should be noted that the thickness of the metal seed layer in step S400 is 30nm-1000nm, and the sheet resistance of the film is 50mOhm / sq-300mOhm / sq, which reduces the contact resistance between the copper electrode and the transparent conductive layer of the battery, reduces the resistance of subsequent electroplating, and increases the battery efficiency.

[0030] Alternatively, the metal seed layer in step S400 may include any one or a combination of copper, nickel, silver, gold, titanium, and aluminum.

[0031] It should be noted that in step S600, the laser burning of the front and back sides of the copper grid electrode semi-finished product of the silicon heterojunction cell is specifically performed using a laser wavelength of 355nm / 532nm, a pulse frequency of 10-200kHz, a power of 1W~35W, a laser spot size of 0.01mm~0.5mm, a minimum linewidth of ≤30μm, and a laser scribing rate of 1mm / s~100mm / s. Under these conditions, when the laser irradiates the sacrificial layer, the surface of the crystalline silicon cell will not be damaged.

[0032] It should be noted that before step S700, there is also a degreasing and deoxidation process. The sacrificial layer is dissolved in the degreasing and deoxidation process, and then a copper grid line layer and an anti-oxidation metal layer are formed. The main body of the battery electrode is copper metal, and only a 0.1μm~5μm anti-oxidation protective metal layer is covered on the copper surface to reduce the electrode manufacturing cost, reduce the bulk resistance of the grid line, and increase the battery power generation efficiency.

[0033] Alternatively, the antioxidant metal layer may include metal layers such as tin or silver.

[0034] It should be noted that the preset conditions in step S100 are that the silicon wafer is heated to 50℃~85℃ in potassium hydroxide solution for 1min~20min to accelerate the texturing effect on the crystalline silicon surface and obtain a pyramid shape on the silicon wafer surface.

[0035] It should be noted that the concentration of potassium hydroxide is 0.5%-10% to ensure the uniformity of the silicon wafer reaction. Potassium hydroxide, instead of traditional sodium hydroxide, can reduce crystallization and reactant precipitation.

[0036] It should be noted that the thickness of the indium tin oxide (TCO) layer in step S300 is 40nm-200nm. The TCO layer contains different process layers and is a transparent conductive layer on the surface of the battery. It has three functions: ① The TCO film has good conductivity and can effectively collect photogenerated carriers; ② The TCO film has high transmittance and ideal refractive index, forming an anti-reflection layer with the silicon substrate, reducing silicon surface reflection, increasing the absorption of sunlight by the silicon substrate, and improving battery performance; ③ Deposited on the surface of amorphous silicon, it can effectively protect the amorphous silicon film.

[0037] Alternatively, the pickling solution in step S800 may be a sodium hydroxide or potassium hydroxide solution.

[0038] Example 2 According to a second aspect of the present invention, a silicon heterojunction cell copper grid wire fabrication apparatus is provided, wherein the apparatus performs the silicon heterojunction cell copper grid wire electrode fabrication method as described above to fabricate the silicon heterojunction cell copper grid wire.

[0039] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention.

[0040] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example.

[0041] Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. The reference to "embodiment" herein means that a specific feature, structure, or characteristic described in connection with an embodiment can be included in at least one embodiment of this application. The appearance of this phrase in various places in the specification does not necessarily indicate the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0042] Although embodiments of the invention have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

Claims

1. A method for fabricating copper grid line electrodes for silicon heterojunction solar cells, characterized in that, Includes the following steps: Step S100: Place the silicon wafer in a potassium hydroxide solution and react under preset conditions to form a double-sided texturing structure with a reflectivity of 10%-20% on the surface of the silicon wafer. The double-sided texturing structure has a front and a back. Step S200: Deposit an amorphous silicon layer on both the front and back sides of the silicon wafer that forms the double-sided texturing structure; Step S300: Deposit an indium tin oxide layer on both the front and back sides of the silicon wafer on which the amorphous silicon layer is deposited. In step S400, a metal seed layer and a sacrificial layer are prepared on the front and back sides of the silicon wafer after the indium tin oxide layer is deposited, respectively, by vacuum sputtering. Step S500: Apply a layer of ink as a thermosetting mask to the front and back sides of the silicon wafer after the sacrificial layer is prepared, to obtain a semi-finished product of copper grid line electrode of silicon heterojunction cell, wherein the thickness of the thermosetting mask is 1um-50um. Step S600: Laser burning is performed on the front and back sides of the silicon heterojunction cell copper grid line electrode semi-finished product to obtain a silicon heterojunction cell copper grid line electrode semi-finished product with trenches. Step S700: A copper grid layer is formed in the trench of the copper grid electrode semi-finished product of silicon heterojunction cell by chemical electroplating. In step S800, the thermosetting mask on the copper grid electrode semi-finished product of the silicon heterojunction battery with the copper grid layer formed is cleaned with an acidic solution. In step S900, the semi-finished silicon heterojunction cell copper grid electrode after the heat-cured mask is cleaned is placed in sulfuric acid with added oxidizing additives for acid washing to remove the metal seed layer and sacrificial layer, thereby obtaining the finished silicon heterojunction cell copper grid electrode.

2. The method for fabricating copper grid line electrodes for silicon heterojunction solar cells according to claim 1, characterized in that, In step S400, the sacrificial layer is a metal layer and / or An acid-soluble oxide layer, wherein the thickness of the sacrificial layer is 20 nm to 300 nm.

3. The method for fabricating copper grid line electrodes for silicon heterojunction solar cells according to claim 1, characterized in that, In step S400, the thickness of the metal seed layer is 30nm-1000nm, and the sheet resistance of the film is 50mOhm / sq-300mOhm / sq.

4. The method for fabricating copper grid line electrodes for silicon heterojunction solar cells according to claim 3, characterized in that, The metal seed layer in step S400 includes any one or a combination of copper, nickel, silver, gold, titanium, and aluminum.

5. The method for fabricating copper grid line electrodes for silicon heterojunction solar cells according to claim 1, characterized in that, In step S600, laser ablation is performed on the front and back sides of the copper grid electrode semi-finished product of the silicon heterojunction cell. Specifically, a laser wavelength of 355nm / 532nm, a pulse frequency of 10-200kHz, a power of 1W-35W, a laser spot size of 0.01mm-0.5mm, a minimum linewidth of ≤30μm, and a laser scribing rate of 1mm / s-100mm / s are used. Under these conditions, when the laser irradiates the sacrificial layer, the surface of the crystalline silicon cell will not be damaged.

6. The method for fabricating copper grid line electrodes for silicon heterojunction solar cells according to claim 1, characterized in that, Before performing step S700, a degreasing and deoxidation process is also included, in which the sacrificial layer is dissolved, and then the copper grid layer and the anti-oxidation metal layer are formed.

7. The method for fabricating copper grid line electrodes for silicon heterojunction solar cells according to claim 1, characterized in that, The preset conditions are that the silicon wafer is reacted in a potassium hydroxide solution at a temperature of 50℃~85℃ for 1min~20min.

8. The method for fabricating copper grid line electrodes for silicon heterojunction solar cells according to claim 7, characterized in that, The concentration of potassium hydroxide is 0.5%-10%.

9. The method for fabricating copper grid line electrodes for silicon heterojunction solar cells according to claim 2, characterized in that, The sacrificial layer is any one of aluminum, titanium, or aluminum oxide.

10. An apparatus for fabricating copper grid lines for silicon heterojunction solar cells, characterized in that, The apparatus performs the method for preparing copper grid lines for silicon heterojunction solar cells as described in any one of claims 1-9 to prepare copper grid lines for silicon heterojunction solar cells.

Citation Information

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