A light emitting diode epitaxial wafer, a preparation method thereof and a light emitting diode

Abstract

The application discloses an epitaxial wafer of a light emitting diode, a preparation method of the epitaxial wafer and the light emitting diode, and relates to the technical field of semiconductors.The preparation method comprises the following steps: providing a patterned sapphire substrate; under a first preset temperature and a first preset pressure, a first preset flow of NH3 is introduced to pretreat the surface of the patterned sapphire substrate for a first preset time, and a composite layer is formed; under a second preset temperature and a second preset pressure, a second preset flow of TMGa is introduced to grow a Ga layer on the composite layer for a second preset time, wherein the first preset temperature is higher than the second preset temperature; and the Ga layer is sequentially grown with an AlGaN buffer layer, an undoped GaN layer, an N-type doped GaN layer, a multi-quantum well layer, an electron blocking layer, a P-type doped GaN layer and a P-type contact layer.The application can solve the technical problem that the growth of a GaN or AlGaN or AlN buffer layer on a patterned sapphire (PSS) substrate will cause an increase in dislocation density or serious warping.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, specifically to a light-emitting diode epitaxial wafer and its fabrication method, and a light-emitting diode. Background Technology

[0002] With the continuous development of semiconductor technology, gallium nitride (GaN), a representative of group III nitride semiconductors, has attracted widespread attention as an ideal material for electronic and optoelectronic devices such as light-emitting diodes (LEDs), lasers (LDs), and high electron mobility transistors (HEMTs). During the epitaxial growth of LEDs, due to the lack of a substrate material that matches GaN, there is a significant lattice mismatch and thermal mismatch between the heterostructure and the GaN thin film, leading to a decrease in the crystal quality of the GaN thin film and a dislocation density as high as 10-1. 8 -10 10 cm -2 High-density dislocations can form leakage channels in GaN-based devices, reducing device performance and lifespan.

[0003] Currently, the most common method for LED epitaxial wafers is to use patterned sapphire (PSS) substrates instead of planar substrates to reduce the dislocation density of GaN films and improve crystal quality. Low-temperature GaN or AlGaN is then grown on the PSS substrate as a buffer layer. This growth method is beneficial for warpage control and can improve the crystal quality of GaN epitaxial layers to some extent, but the overall dislocation density is still relatively high. Alternatively, an AlN film can be sputtered on the PSS substrate as a buffer layer. The AlN buffer layer reduces the defect density and can improve the crystal quality of GaN epitaxial layers and improve product performance. However, the sputtered AlN film as a buffer layer has a significant impact on warpage during epitaxial growth, and there is impurity contamination during the transition from sputtered growth to epitaxial growth.

[0004] Therefore, existing methods for fabricating LED epitaxial wafers generally involve growing GaN, AlGaN, or AlN buffer layers on patterned sapphire (PSS) substrates, which can lead to technical problems such as increased dislocation density or severe warping. Summary of the Invention

[0005] To address the shortcomings of existing technologies, the present invention aims to provide a light-emitting diode epitaxial wafer and its fabrication method, as well as a light-emitting diode, thereby solving the technical problem that growing GaN, AlGaN, or AlN buffer layers on patterned sapphire (PSS) substrates in the prior art will lead to increased dislocation density or severe warping.

[0006] A first aspect of the present invention is to provide a method for fabricating a light-emitting diode epitaxial wafer, the method comprising:

[0007] Provide a patterned sapphire substrate;

[0008] At a first preset temperature and a first preset pressure, NH3 is introduced at a first preset flow rate to pretreat the surface of the patterned sapphire substrate for a first preset time to form a composite layer;

[0009] At a second preset temperature and a second preset pressure, TMGa is introduced at a second preset flow rate, and a Ga layer is formed on the composite layer for a second preset time, wherein the first preset temperature is higher than the second preset temperature;

[0010] An AlGaN buffer layer, an undoped GaN layer, an N-type doped GaN layer, a multiple quantum well layer, an electron blocking layer, a P-type doped GaN layer, and a P-type contact layer are sequentially grown on the Ga layer.

[0011] Compared with the prior art, the beneficial effects of the present invention are as follows: the method for preparing a light-emitting diode epitaxial wafer provided by the present invention can effectively reduce the generation of dislocations and warpage, and improve the crystal quality of the subsequent epitaxial layer. Specifically, under a first preset temperature and a first preset pressure, NH3 is introduced at a first preset flow rate to pre-treat the surface of the patterned sapphire substrate for a first preset time to form a composite layer. The first preset temperature is higher than a second preset temperature, and the high-temperature growth allows NH3 to fully decompose and form N. 3- And fully diffused into the patterned sapphire substrate, so that a small amount of N 3- Integrating AI 3+ A lattice is formed to create an AlNO composite layer. The lattice constant of the AlNO composite layer is between that of the patterned sapphire substrate and the N-type doped GaN layer, which helps to reduce the dislocation density caused by lattice mismatch in the subsequent epitaxial layer and grow an epitaxial layer with high crystal quality. At a second preset temperature and a second preset pressure, TMGa is introduced at a second preset flow rate, and a Ga layer is formed on the composite layer for a second preset time. Low-temperature and slow growth is beneficial to the growth of micro- and nano-scale Ga grain layers on the composite layer. The growth of Ga grain layers is beneficial to the rapid crystallization and nucleation of GaN material in the subsequent epitaxial layer, which improves the crystal quality of the epitaxial layer and alleviates the warpage problem. This solves the common technical problem that growing GaN, AlGaN, or AlN buffer layers on patterned sapphire (PSS) substrates will lead to increased dislocation density or severe warpage.

[0012] According to one aspect of the above technical solution, the first preset temperature is 1000℃-1200℃, and the second preset temperature is 650℃-750℃.

[0013] According to one aspect of the above technical solution, the first preset flow rate is 30L / min-50L / min, and the second preset flow rate is 50sccm-100sccm.

[0014] According to one aspect of the above technical solution, the first preset pressure is 100 Torr-200 Torr, and the second preset pressure is 100 Torr-200 Torr.

[0015] According to one aspect of the above technical solution, the first preset time is 1 min-5 min, and the second preset time is 30 s-60 s.

[0016] According to one aspect of the above technical solution, the composite layer is an AlNO composite layer, and the Ga layer is a Ga grain layer.

[0017] According to one aspect of the above technical solution, the growth temperature of the AlGaN buffer layer is 800℃-900℃, and the growth pressure is 50Torr-100Torr.

[0018] A second aspect of the present invention is to provide a light-emitting diode epitaxial wafer, the light-emitting diode epitaxial wafer being prepared by the preparation method described above, the light-emitting diode epitaxial wafer comprising:

[0019] Patterned sapphire substrate;

[0020] A composite layer, a Ga layer, an AlGaN buffer layer, an undoped GaN layer, an N-type doped GaN layer, a multiple quantum well layer, an electron blocking layer, a P-type doped GaN layer, and a P-type contact layer are sequentially stacked on the patterned sapphire substrate.

[0021] A third aspect of the present invention is to provide a light-emitting diode, the light-emitting diode comprising the aforementioned light-emitting diode epitaxial wafer. Attached Figure Description

[0022] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:

[0023] Figure 1 This is a flowchart of the method for preparing the epitaxial wafer of a light-emitting diode in this invention;

[0024] Figure 2 This is a schematic diagram of the structure of the light-emitting diode epitaxial wafer in this invention;

[0025] Component symbol explanation in the attached diagram:

[0026] Patterned sapphire substrate 100, composite layer 101, Ga layer 200, AlGaN buffer layer 300, undoped GaN layer 400, N-type doped GaN layer 500, multiple quantum well layer 600, electron blocking layer 700, P-type doped GaN layer 800, P-type contact layer 900. Detailed Implementation

[0027] To make the objectives, features, and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Several embodiments of the present invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of the present invention will be more thorough and complete.

[0028] It should be noted that when an element is referred to as being "fixed to" another element, it can be directly on the other element or there may be an intervening element. When an element is considered to be "connected" to another element, it can be directly connected to the other element or there may be an intervening element. The terms "vertical," "horizontal," "left," "right," "upper," "lower," and similar expressions used herein are for illustrative purposes only and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as limiting the invention.

[0029] In this invention, unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal communication between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances. The term "and / or" as used herein includes any and all combinations of one or more of the related listed items.

[0030] Please see Figure 1 The figure shows a method for fabricating a light-emitting diode epitaxial wafer provided by the present invention, the method comprising steps S10-S13:

[0031] Step S10: Provide a patterned sapphire substrate;

[0032] Among them, patterned sapphire substrates, compared with flat substrates, can effectively reduce the dislocation density of subsequent epitaxial layers and improve the crystal quality of subsequent epitaxial layers.

[0033] Preferably, (001) crystal-oriented patterned sapphire Al2O3 is used as the substrate.

[0034] In addition, the patterned sapphire substrate needs to be pretreated to remove impurities and moisture from its surface.

[0035] Specifically, the patterned sapphire substrate was annealed in situ under a hydrogen atmosphere at a temperature of 1100℃-1200℃, a pressure of 150 Torr-500 Torr, and a annealing time of 5 min-10 min.

[0036] Step S11: At a first preset temperature and a first preset pressure, NH3 is introduced at a first preset flow rate to pretreat the surface of the patterned sapphire substrate for a first preset time to form a composite layer.

[0037] The composite layer is an AlNO composite layer with a thickness of 1nm-10nm. Under a first preset temperature and a first preset pressure, when NH3 is introduced at a first preset flow rate, some of the NH3 can adhere to the substrate surface. The N in the NH3... 3- O in patterned sapphire substrates 2- Mutual diffusion results in a small amount of N 3- Integrating AI 3+ The AlNO composite layer is formed by a crystal lattice. The lattice constant of AlNO lies between that of Al₂O₃ and GaN on the patterned sapphire substrate, which helps reduce the dislocation density caused by lattice mismatch in the subsequently grown epitaxial layer, resulting in a high-quality epitaxial layer. This avoids problems such as increased dislocation density or severe warping that can occur when directly growing GaN, AlGaN, or AlN buffer layers on the patterned sapphire (PSS) substrate.

[0038] Specifically, the first preset temperature is 1000℃-1200℃, which is higher than the second preset temperature. High-temperature growth allows NH3 to fully decompose and form N. 3- And fully diffused into the patterned sapphire substrate, so that a small amount of N 3- Integrating AI 3+ The crystal lattice forms an AlNO complex layer.

[0039] When the first preset temperature is too high, it will damage the structure of the patterned sapphire substrate, causing cracks on the surface of the patterned sapphire substrate and resulting in a decrease in the crystal quality of the subsequently grown epitaxial layer; when the first preset temperature is too low, the NH3 decomposition rate is low, and N 3+ Insufficient quantity prevents the formation of an AlNO complex layer.

[0040] Similarly, the first preset pressure is 100 Torr-200 Torr. If the first preset pressure is too high, it will damage the structure of the patterned sapphire substrate, leading to cracks on the surface and a decrease in the quality of the subsequently grown epitaxial layer crystals. If the first preset pressure is too low, the NH3 decomposition rate will be low, and N... 3+ The amount of material was insufficient, and the resulting AlNO complex layer was too thin to achieve the desired effect.

[0041] The first preset time is 1-5 minutes. If the first preset time is too long, it will corrode the patterned sapphire substrate, causing a decrease in the crystal quality of the subsequently grown epitaxial layer; if the first preset time is too short, the NH3 decomposition time is short, and N 3+ The amount of material was insufficient, and the resulting AlNO complex layer was too thin to achieve the desired effect.

[0042] Similarly, the first preset flow rate is 30L / min-50L / min. When the first preset flow rate is too high, it will corrode the patterned sapphire substrate, causing a decrease in the crystal quality of the subsequently grown epitaxial layer; when the first preset flow rate is too low, the fractured N 3+ The amount of material was insufficient, and the resulting AlNO complex layer was too thin to achieve the desired effect.

[0043] Step S12: At a second preset temperature and a second preset pressure, TMGa is introduced at a second preset flow rate to grow a Ga layer on the composite layer for a second preset time, wherein the first preset temperature is higher than the second preset temperature;

[0044] The Ga layer is a Ga grain layer with a thickness of 0.5-5 nm. The first preset temperature is higher than the second preset temperature. The slow growth at low temperature is conducive to the growth of micro- and nano-scale Ga grain layers on the composite layer. The growth of the Ga grain layer is beneficial to the rapid crystallization and nucleation of the subsequent epitaxial GaN material, thereby improving the crystal quality of the epitaxial layer. This avoids the problems of increased dislocation density or severe warping caused by directly growing GaN, AlGaN, or AlN buffer layers on patterned sapphire (PSS) substrates.

[0045] Specifically, the second preset temperature is 650℃-750℃, and the second preset pressure is 100Torr-200Torr. When the second preset temperature is too low, the diffusion rate of Ga grains on the surface of the composite layer is slow, resulting in uneven distribution of Ga grains in the Ga grain layer; when the second preset temperature is too high, the Ga grains grow too fast, resulting in Ga grain clusters.

[0046] Specifically, the second preset flow rate is 50 sccm-100 sccm. When the second preset flow rate is too large, the Ga grains in the Ga layer grow better, but the warping will also be greater, causing cracks to appear on the surface of the epitaxial layer that is subsequently grown. When the second preset flow rate is too small, the Ga grains in the Ga layer grow unevenly, and the improvement on the crystal quality of the epitaxial layer that is subsequently grown is not significant.

[0047] Specifically, the second preset time is 30s-60s. When the second preset time is too long, the Ga grains in the middle of the Ga layer grow better, but the warping will also be greater. The warping is convex, which causes cracks on the surface of the epitaxial layer that is grown later. When the second preset time is too short, the Ga grains in the Ga layer grow unevenly and the warping is concave, which causes cracks on the surface of the epitaxial layer that is grown later.

[0048] Therefore, the warpage of the Ga layer can be adjusted by controlling the second preset flow rate and the second preset time, thereby improving the crystal quality of the subsequently grown epitaxial layer and reducing the generation of dislocations.

[0049] Step S13: An AlGaN buffer layer, an undoped GaN layer, an N-type doped GaN layer, a multiple quantum well layer, an electron blocking layer, a P-type doped GaN layer, and a P-type contact layer are sequentially grown on the Ga layer.

[0050] Specifically, the temperature is adjusted to 800℃-900℃ and the pressure to 50Torr-100Torr to grow an AlGaN buffer layer with a thickness of 30nm-200nm on the Ga layer. The Al composition of the AlGaN buffer layer is 0-1. The AlGaN buffer layer is used to release the lattice mismatch and thermal mismatch between the patterned sapphire substrate and the N-type doped GaN layer.

[0051] The temperature was adjusted to 1000℃-1100℃, and the pressure to 100Torr-500Torr, to grow an undoped GaN layer with a thickness of 1μm-3μm on the AlGaN buffer layer. The undoped GaN layer crystallized and polymerized on the AlGaN buffer layer to form a continuous and flat substrate layer, which facilitated the crystal growth of the N-type doped GaN layer.

[0052] The temperature was adjusted to 1000℃-1200℃, and the pressure to 100 Torr-300 Torr, to grow an N-type doped GaN layer with a thickness of 1μm-3μm on the undoped GaN layer. The dopant in the N-type doped GaN layer was silane, and the silicon doping concentration was 10⁻⁶. 19 cm -3 -10 20 cm -3The N-type doped GaN layer is used to provide electrons to the multi-quantum-well layer, so that electrons and holes recombine radiatively in the multi-quantum-well layer, achieving the light-emitting effect of the LED epitaxial wafer.

[0053] A multi-quantum-well layer is grown on an N-type doped GaN layer. The multi-quantum-well layer includes several periodically stacked quantum well layers and quantum barrier layers. The quantum well layers are InGaN layers with an In composition of 0.1-0.5, a thickness of 1 nm-4 nm, a growth temperature of 750℃-850℃, and a growth pressure of 50 Torr-100 Torr. The quantum barrier layers are GaN layers with a thickness of 8 nm-20 nm, a growth temperature of 850℃-950℃, and a growth pressure of 50 Torr-100 Torr.

[0054] An electron blocking layer with a thickness of 50 nm to 100 nm was grown on a multi-quantum well layer by adjusting the temperature to 950℃-1050℃ and the pressure to 50 Torr-100 Torr. This electron blocking layer is an AlGaN layer with an Al composition of 0.1-0.5%. The electron blocking layer is used to limit electron overflow.

[0055] By adjusting the temperature to 900℃-1050℃ and the pressure to 100Torr-600Torr, a P-type doped GaN layer with a thickness of 30nm-200nm is grown on the electron blocking layer. The dopant in the P-type doped GaN layer is magnesia-dicerocene, and the magnesium doping concentration is 10%. 19 cm -3 -10 20 cm -3 The p-type doped GaN layer provides holes to the multi-quantum well layer, enabling electrons and holes to recombine radiatively in the multi-quantum well layer, thus achieving the light-emitting effect of the LED epitaxial wafer.

[0056] By adjusting the temperature to 1000-1100℃ and the pressure to 50-100 Torr, a P-type contact layer with a thickness of 10nm-50nm is grown on the P-type doped GaN layer. This P-type contact layer is an AlGaN layer with an Al composition of 0-0.3%. The P-type contact layer is used to form an ohmic contact with the electrode, effectively reducing voltage and improving brightness.

[0057] After the epitaxial structure growth is completed, the temperature of the reaction chamber is lowered and annealed in a nitrogen atmosphere at a temperature of 650℃-850℃ for 5-15 minutes.

[0058] Trimethylaluminum (TMAl), trimethylgallium (TMGa) or triethylgallium (TEGa) are used as precursors for group III sources, ammonia is used as a precursor for group V sources, silane is used as a precursor for N-type dopant, magnesium pyrocene is used as a precursor for P-type dopant, and nitrogen and hydrogen are used as carrier gases.

[0059] Additionally, please see Figure 2 The image shows a light-emitting diode epitaxial wafer provided by the present invention. The light-emitting diode epitaxial wafer includes:

[0060] Patterned sapphire substrate 100; a composite layer 101, a Ga layer 200, an AlGaN buffer layer 300, an undoped GaN layer 400, an N-type doped GaN layer 500, a multiple quantum well layer 600, an electron blocking layer 700, a P-type doped GaN layer 800 and a P-type contact layer 900 are sequentially stacked on the patterned sapphire substrate 100.

[0061] The composite layer 101 is an AlNO composite layer with a thickness of 1nm-10nm. When the thickness of the composite layer 101 is too thick, it will damage the structure of the patterned sapphire substrate 100 and weaken the function of the patterned sapphire substrate 101. When the thickness of the composite layer 101 is too thin, the AlNO composite layer formed is too thin and cannot achieve the expected effect.

[0062] Ga layer 200 is a Ga grain layer with a grain size of 0.5nm-5nm. When the grain size of Ga layer 200 is too large, the surface distribution of Ga layer 200 is uneven and the degree of warping is high, which leads to cracks on the surface of the epitaxial layer that is subsequently grown. When the grain size of Ga layer 200 is too small, there are dislocations or voids between Ga grains, which will increase the dislocations in the epitaxial layer that is subsequently grown, resulting in a decrease in crystal quality.

[0063] In addition, the present invention also provides a light-emitting diode, comprising the aforementioned light-emitting diode epitaxial wafer.

[0064] The present invention is further illustrated below with specific embodiments:

[0065] Example 1

[0066] The first embodiment of the present invention provides a method for fabricating a light-emitting diode epitaxial wafer, the method comprising steps S10-S13:

[0067] Step S10: Provide a patterned sapphire substrate;

[0068] Step S11: At a first preset temperature and a first preset pressure, NH3 is introduced at a first preset flow rate to pretreat the surface of the patterned sapphire substrate for a first preset time to form a composite layer.

[0069] The composite layer is an AlNO composite layer with a thickness of 1nm-10nm.

[0070] Specifically, the first preset temperature is 1200℃, the first preset pressure is 500 Torr, the first preset time is 5 min, and the first preset flow rate is 50 L / min.

[0071] Step S12: At a second preset temperature and a second preset pressure, TMGa is introduced at a second preset flow rate to grow a Ga layer on the composite layer for a second preset time, wherein the first preset temperature is higher than the second preset temperature.

[0072] The Ga layer is a Ga grain layer with a thickness of 0.5-5 nm. The second preset temperature is 700℃, the second preset pressure is 200 Torr, the second preset flow rate is 50 sccm, and the second preset time is 45 s.

[0073] Step S13: An AlGaN buffer layer, an undoped GaN layer, an N-type doped GaN layer, a multiple quantum well layer, an electron blocking layer, a P-type doped GaN layer, and a P-type contact layer are sequentially grown on the Ga layer.

[0074] Specifically, the temperature is adjusted to 800℃-900℃ and the pressure is adjusted to 50Torr-100Torr to grow an AlGaN buffer layer with a thickness of 30nm-200nm on the Ga layer, wherein the Al composition of the AlGaN buffer layer is 0-1.

[0075] By adjusting the temperature to 1000℃-1100℃ and the pressure to 100Torr-500Torr, an undoped GaN layer with a thickness of 1μm-3μm is grown on the AlGaN buffer layer.

[0076] The temperature was adjusted to 1000℃-1200℃, and the pressure to 100 Torr-300 Torr, to grow an N-type doped GaN layer with a thickness of 1μm-3μm on the undoped GaN layer. The dopant in the N-type doped GaN layer was silane, and the silicon doping concentration was 10⁻⁶. 19 cm -3 -10 20 cm -3 .

[0077] A multi-quantum-well layer is grown on an N-type doped GaN layer. The multi-quantum-well layer includes several periodically stacked quantum well layers and quantum barrier layers. The quantum well layers are InGaN layers with an In composition of 0.1-0.5, a thickness of 1 nm-4 nm, a growth temperature of 750℃-850℃, and a growth pressure of 50 Torr-100 Torr. The quantum barrier layers are GaN layers with a thickness of 8 nm-20 nm, a growth temperature of 850℃-950℃, and a growth pressure of 50 Torr-100 Torr.

[0078] By adjusting the temperature to 950℃-1050℃ and the pressure to 50Torr-100Torr, an electron blocking layer with a thickness of 50nm-100nm is grown on the multi-quantum well layer. This electron blocking layer is an AlGaN layer with an Al composition of 0.1-0.5.

[0079] By adjusting the temperature to 900℃-1050℃ and the pressure to 100Torr-600Torr, a P-type doped GaN layer with a thickness of 30nm-200nm is grown on the electron blocking layer. The dopant in the P-type doped GaN layer is magnesia-dicerocene, and the magnesium doping concentration is 10%. 19 cm -3 -10 20 cm -3 .

[0080] Adjust the temperature to 1000-1100℃ and the pressure to 50-100 Torr to grow a P-type contact layer with a thickness of 10nm-50nm on the P-type doped GaN layer. The P-type contact layer is an AlGaN layer with an Al composition of 0-0.3.

[0081] After the epitaxial structure growth is completed, the temperature of the reaction chamber is lowered and annealed in a nitrogen atmosphere at a temperature of 650℃-850℃ for 5-15 minutes.

[0082] Example 2

[0083] The second embodiment of the present invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this embodiment and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is as follows:

[0084] The first preset temperature is 1000℃.

[0085] Example 3

[0086] The third embodiment of the present invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this embodiment and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is that:

[0087] The first preset temperature is 1100℃.

[0088] Example 4

[0089] The fourth embodiment of the present invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this embodiment and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is that:

[0090] The first preset temperature is 1300℃.

[0091] Example 5

[0092] The fifth embodiment of the present invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this embodiment and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is as follows:

[0093] The first preset pressure is 300 Torr.

[0094] Example 6

[0095] The sixth embodiment of the present invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this embodiment and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is as follows:

[0096] The first preset pressure is 400 Torr.

[0097] Example 7

[0098] The seventh embodiment of the present invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this embodiment and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is that:

[0099] The first preset pressure is 600 Torr.

[0100] Example 8

[0101] The eighth embodiment of the present invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this embodiment and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is that:

[0102] The first preset time is 3 minutes.

[0103] Example 9

[0104] The ninth embodiment of the present invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this embodiment and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is as follows:

[0105] The first preset time is 7 minutes.

[0106] Example 10

[0107] The tenth embodiment of the present invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this embodiment and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is as follows:

[0108] The first preset flow rate is 30L / min.

[0109] Example 11

[0110] The eleventh embodiment of the present invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this embodiment and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is that:

[0111] The first preset flow rate is 40L / min.

[0112] Example 12

[0113] The twelfth embodiment of the present invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this embodiment and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is as follows:

[0114] The first preset flow rate is 60L / min.

[0115] Example 13

[0116] The thirteenth embodiment of the present invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this embodiment and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is as follows:

[0117] The second preset temperature is 650℃.

[0118] Example 14

[0119] The fourteenth embodiment of the present invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this embodiment and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is that:

[0120] The second preset temperature is 750℃.

[0121] Example 15

[0122] The fifteenth embodiment of the present invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this embodiment and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is as follows:

[0123] The second preset pressure is 100 Torr.

[0124] Example 16

[0125] The sixteenth embodiment of the present invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this embodiment and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is as follows:

[0126] The second preset pressure is 300 Torr.

[0127] Example 17

[0128] The seventeenth embodiment of the present invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this embodiment and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is that:

[0129] The second preset time is 30 seconds.

[0130] Example 18

[0131] The eighteenth embodiment of the present invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this embodiment and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is that:

[0132] The second preset time is 60 seconds.

[0133] Example 19

[0134] The nineteenth embodiment of the present invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this embodiment and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is that:

[0135] The second preset flow rate is 25 sccm.

[0136] Example 20

[0137] The twentieth embodiment of the present invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this embodiment and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is that:

[0138] The second preset flow rate is 75 sccm.

[0139] Comparative Example 1

[0140] The first comparative example of this invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this comparative example and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is as follows:

[0141] The blank control group had no composite layer or Ga layer.

[0142] Comparative Example 2

[0143] The second comparative example of this invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this comparative example and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is that:

[0144] There is only a composite layer, no Ga layer.

[0145] Comparative Example 3

[0146] The second comparative example of this invention provides a method for fabricating a light-emitting diode epitaxial wafer. The difference between the method for fabricating a light-emitting diode epitaxial wafer in this comparative example and the method for fabricating a light-emitting diode epitaxial wafer in the first embodiment is that:

[0147] There is only a Ga layer, no composite layer.

[0148] Please refer to Table 1 below, which shows the parameters corresponding to Embodiments 1 to 20 and Comparative Examples 1 to 3 of the present invention.

[0149] Table 1

[0150]

[0151]

[0152] It should be noted that Examples 1 to 20 and Comparative Examples 1 to 3 were fabricated as 12mil×20mil chips using the same process conditions, and their performance was tested at a current of 100mA.

[0153] In XRD, the half-width at half-maximum (WHM) of the 002 / 102 crystal plane is used to characterize the crystal quality of the chip. The narrower the WHM, the better the crystal quality. Surface roughness is measured within a range of 5μm×5μm.

[0154] Based on the data from Comparative Examples 1 to 3, it can be seen that growing composite layers and Ga layers can effectively reduce dislocations and warping, and improve the crystal quality of epitaxial layers.

[0155] Based on the data from Examples 1 to 4, it can be seen that when the first preset temperature is too high, it will damage the structure of the patterned sapphire substrate, resulting in cracks on the surface of the patterned sapphire substrate, weakening the function of the patterned sapphire substrate, and causing a decrease in the crystal quality of the subsequently grown epitaxial layer; when the first preset temperature is too low, the NH3 decomposition rate is low, and N 3+ Insufficient material prevents the formation of the AlNO complex layer, resulting in minimal improvement in the crystal quality of the subsequently grown epitaxial layer.

[0156] Based on the data from Examples 1, 5 to 7, it can be seen that when the first preset pressure is too high, it will damage the structure of the patterned sapphire substrate, resulting in cracks on the surface of the patterned sapphire substrate, weakening the function of the patterned sapphire substrate, and causing a decrease in the crystal quality of the subsequently grown epitaxial layer; when the first preset pressure is too low, the NH3 decomposition rate is low, and N 3+ The amount of material was insufficient, and the resulting AlNO complex layer was too thin to achieve the desired effect.

[0157] Based on the data from Examples 1, 8, and 9, it can be seen that when the first preset time is too long, it will corrode the patterned sapphire substrate, causing a decrease in the crystal quality of the subsequently grown epitaxial layer; when the first preset time is too short, the NH3 decomposition time is short, and N... 3+ The amount of material was insufficient, and the resulting AlNO complex layer was too thin to achieve the desired effect.

[0158] Based on the data from Examples 1, 10 to 12, it can be seen that when the first preset flow rate is too high, it will corrode the patterned sapphire substrate, causing a decrease in the crystal quality of the subsequently grown epitaxial layer; when the first preset flow rate is too low, the fractured N... 3+ The amount of material was insufficient, and the resulting AlNO complex layer was too thin to achieve the desired effect.

[0159] Based on the data from Examples 1, 13, and 14, it can be seen that when the second preset temperature is too low, the diffusion rate of Ga grains on the surface of the composite layer is slow, resulting in uneven distribution of Ga grains in the Ga grain layer and a decrease in the crystal quality of the subsequently grown epitaxial layer; when the second preset temperature is too high, the Ga grains grow too fast, resulting in Ga grain clusters and a decrease in the crystal quality of the subsequently grown epitaxial layer.

[0160] Based on the data from Examples 1, 15, and 16, it can be seen that excessive or insufficient second preset pressure has no significant impact on the Ga layer.

[0161] Based on the data from Embodiments 1, 17, and 18, it can be seen that when the second preset time is too long, the Ga grains in the middle of the Ga layer grow better, but the warping will also be greater, and the warping will be convex, causing cracks to appear on the surface of the epitaxial layer that is subsequently grown; when the second preset time is too short, the Ga grains in the Ga layer grow unevenly, and the warping is concave, causing cracks to appear on the surface of the epitaxial layer that is subsequently grown.

[0162] Based on the data from Examples 1, 19, and 20, it can be seen that when the second preset flow rate is too high, the Ga grains in the Ga layer grow better, but the warping will also be greater, leading to cracks on the surface of the subsequently grown epitaxial layer; when the second preset flow rate is too low, the Ga grains in the Ga layer grow unevenly, and the improvement in the crystal quality of the subsequently grown epitaxial layer is not significant.

[0163] In summary, growing composite layers and Ga layers can effectively reduce dislocations and warpage, thereby improving the crystal quality of epitaxial layers.

[0164] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0165] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this patent should be determined by the appended claims.

Claims

1. A method for fabricating a light-emitting diode epitaxial wafer, characterized in that, The preparation method includes: Provide a patterned sapphire substrate; At a first preset temperature and a first preset pressure, NH3 is introduced at a first preset flow rate to pretreat the surface of the patterned sapphire substrate for a first preset time to form a composite layer; At a second preset temperature and a second preset pressure, TMGa is introduced at a second preset flow rate, and a Ga layer is formed on the composite layer for a second preset time, wherein the first preset temperature is higher than the second preset temperature; An AlGaN buffer layer, an undoped GaN layer, an N-type doped GaN layer, a multiple quantum well layer, an electron blocking layer, a P-type doped GaN layer, and a P-type contact layer are sequentially grown on the Ga layer.

2. The method for fabricating a light-emitting diode epitaxial wafer according to claim 1, characterized in that, The first preset temperature is 1000℃-1200℃, and the second preset temperature is 650℃-750℃.

3. The method for fabricating a light-emitting diode epitaxial wafer according to claim 1, characterized in that, The first preset flow rate is 30L / min-50L / min, and the second preset flow rate is 50sccm-100sccm.

4. The method for fabricating a light-emitting diode epitaxial wafer according to claim 1, characterized in that, The first preset pressure is 100 Torr-200 Torr, and the second preset pressure is 100 Torr-200 Torr.

5. The method for fabricating a light-emitting diode epitaxial wafer according to claim 1, characterized in that, The first preset time is 1 min to 5 min, and the second preset time is 30 s to 60 s.

6. The method for fabricating a light-emitting diode epitaxial wafer according to claim 1, characterized in that, The composite layer is an AlNO composite layer, and the Ga layer is a Ga grain layer.

7. The method for fabricating a light-emitting diode epitaxial wafer according to claim 1, characterized in that, The growth temperature of the AlGaN buffer layer is 800℃-900℃, and the growth pressure is 50Torr-100Torr.

8. A light-emitting diode epitaxial wafer, characterized in that, The light-emitting diode epitaxial wafer is prepared by the preparation method according to any one of claims 1-7, and the light-emitting diode epitaxial wafer comprises: Patterned sapphire substrate; A composite layer, a Ga layer, an AlGaN buffer layer, an undoped GaN layer, an N-type doped GaN layer, a multiple quantum well layer, an electron blocking layer, a P-type doped GaN layer, and a P-type contact layer are sequentially stacked on the patterned sapphire substrate.

9. The light-emitting diode epitaxial wafer according to claim 8, characterized in that, The composite layer is an AlNO composite layer with a thickness of 1nm-10nm, and the Ga layer is a Ga grain layer with a particle size of 0.5nm-5nm.

10. A light-emitting diode, characterized in that, The light-emitting diode includes the light-emitting diode epitaxial wafer as described in any one of claims 8 or 9.

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