A reverse polarity LED with superlattice structure and a preparation method thereof

Abstract

The application relates to an anti-polarity LED with a superlattice structure and a preparation method thereof, and belongs to the field of LED epitaxial structures. The epitaxial structure comprises, from bottom to top, an N-type GaAs substrate, a buffer layer, an etching stop layer, a GaAs ohmic contact layer, an AlGaInP roughening layer, an AlInP confinement layer, an MQW quantum well active layer, a P-type AlInP confinement layer, a transition layer and a P-GaP ohmic contact layer; x+y+z=1; a set of periodically distributed and alternately stacked vertical penetrating N-type Al x Ga 0.5‑x In 0.5 P / Al y Ga 0.5‑y In 0.5 P superlattice layers are inserted between the roughening layer and the confinement layer. The application can not only well improve the defects of the prior art, that is, the light extraction efficiency of the LED chip can be improved without the aid of a complex chip process, the aging attenuation is reduced, and the stability and repeatability of the epitaxial wafer structure and performance can be ensured.

Description

Technical Field

[0001] This invention relates to an antipolar LED with a superlattice structure and its preparation method, belonging to the field of LED epitaxial structure technology. Background Technology

[0002] Quaternary AlGaInP-based light-emitting diodes (LEDs) are widely used in full-color displays, indoor lighting, traffic signals, and garden lights due to their advantages such as long lifespan, energy saving, and low power consumption. While the development of AlGaInP-based LED chips has a mature structural framework, low light extraction efficiency and aging degradation remain major problems limiting their application. Light extraction efficiency is mainly limited by two factors: first, the mismatch between the refractive index of the epitaxial material and the surrounding air, leading to multiple total internal reflections at the interface; and second, uneven current density distribution, resulting in low radiative recombination efficiency in the active region. The second factor is also a significant cause of aging degradation in light extraction efficiency. Uneven current density distribution leads to current congestion in some areas of the chip, increasing junction temperature, causing defect proliferation and the formation of numerous non-radiative recombination centers, thus causing aging and light decay.

[0003] In existing technologies, several effective solutions for improving light extraction efficiency have been proposed based on chip manufacturing processes, such as surface roughening, changing chip shape, transparent substrate structures, and bonding techniques. However, to date, measures to improve light extraction efficiency from the perspective of epitaxial wafer structure optimization are rarely reported. Considering the unnecessary risks brought about by fluctuations in chip manufacturing processes, optimizing the epitaxial wafer structure to increase the effective light extraction window is imperative. Summary of the Invention

[0004] To address the shortcomings of existing technologies, this invention provides an antipolar LED with a superlattice structure and its fabrication method. This epitaxial structure and material preparation method not only effectively improves the deficiencies of existing technologies, namely, it can improve the light extraction efficiency of LED chips and reduce aging degradation without relying on complex chip manufacturing processes, but also ensures the stability and repeatability of the epitaxial wafer structure and performance.

[0005] The present invention adopts the following technical solution:

[0006] A reverse polarity LED with a superlattice structure, whose epitaxial structure, in the order of epitaxial growth from bottom to top, includes an N-type GaAs substrate, an N-type GaAs buffer layer, an N-type etching stop layer, an N-type GaAs ohmic contact layer, and an N-type Al... 0.35 Ga 0.15 In 0.5 P-coarsened layer, N-type AlInP confinement layer, MQW quantum well active layer, P-type AlInP confinement layer, Alx Ga y In z P-transition layer and P-GaP ohmic contact layer;

[0007] Among them, Al x Ga y In z In the P transition layer, x+y+z=1;

[0008] In the N-type Al 0.35 Ga 0.15 In 0.5 Between the P-coarsening layer and the N-type AlInP confinement layer, a set of periodically distributed, alternately stacked, vertically interlaced N-type Al layers are inserted. x Ga 0.5-x In 0.5 P / Al y Ga 0.5-y In 0.5 The p-type superlattice layer is called the N-type current spreading layer, in which Al x Ga 0.5-x In 0.5 P / Al y Ga 0.5-y In 0.5 In the P superlattice layer, 0≤x≤0.5, 0≤y≤0.5.

[0009] This invention utilizes N-type Al 0.35 Ga 0.15 In 0.5 Between the P-coarsening layer and the N-type AlInP confinement layer, a set of periodically distributed, alternately stacked, vertically interlaced N-type Al layers are inserted. x Ga 0.5-x In 0.5 P / Al y Ga 0.5-y In 0.5 The P-superlattice layer, without introducing lattice mismatch, utilizes the band difference of the superlattice to increase the lateral spread of the current, improve the uniformity of the current density distribution in the active region, thereby improving the light extraction efficiency of the LED and reducing its aging degradation.

[0010] A method for fabricating the above-mentioned antipolar LED with a superlattice structure, characterized in that it includes:

[0011] Select an N-type GaAs substrate suitable for epitaxial growth;

[0012] On an N-type GaAs substrate, an N-type GaAs buffer layer, an N-type etch stop layer, an N-type GaAs ohmic contact layer, and an N-type Al layer are sequentially grown. 0.35 Ga 0.15 In 0.5P-coarsening layer;

[0013] In the N-type Al 0.35 Ga 0.15 In 0.5 On the P-coarsened layer, a set of periodically distributed, alternately stacked, vertically interlaced N-type Al atoms are grown. x Ga 0.5-x In 0.5 P / Al y Ga 0.5-y In 0.5 P-superlattice layer;

[0014] In the N-type Al x Ga 0.5-x In 0.5 P / Al y Ga 0.5-y In 0.5 On the p-type superlattice layer, an N-type AlInP confinement layer, an MQW quantum well active layer, a p-type AlInP confinement layer, and an Al-type Al-type superlattice layer are grown sequentially. x Ga y In z P-transition layer and P-GaP ohmic contact layer.

[0015] Preferably, the specific steps of the preparation method are as follows:

[0016] (1) Place the substrate in the MOCVD reaction chamber, heat it to about 840℃, introduce an AsH3 source, perform a pretreatment for about 5 minutes, then cool it to about 700℃, introduce TMGa and Si2H6 sources, and grow an N-type GaAs buffer layer with a doping concentration of 0.5*10. 18 cm -3 -1*10 18 cm -3 ;

[0017] (2) Turn off the AsH3 source and introduce TMI and PH3 sources. At an ambient temperature of 700℃, grow an N-type GaInP layer to obtain an N-type etching stop layer with a doping concentration of 0.5*10⁻⁶. 18 cm -3 -1*10 18 cm -3 ;

[0018] (3) Turn off the TMI and PH3 sources, introduce the AsH3 source, and grow a GaAs layer at an ambient temperature of 700℃ to obtain an N-type ohmic contact layer with a doping concentration of 0.5*10⁻⁶. 18 cm -3 -1*10 18 cm -3 ;

[0019] (4) Turn off the AsH3 source, introduce TMAl, TMIn and PH3 sources, maintain the ambient temperature at 700℃, and grow N-type Al. 0.35 Ga 0.15 In 0.5 P-coarsened layer, with doping concentrations of 0.8*10 18 cm -3 -1.2*10 18 cm -3 ;

[0020] (5) Adjust the TMAl and TMGa sources, and set the ambient temperature to 700℃ to grow 20 pairs of periodically distributed, alternately stacked, vertically interlaced N-type Al atoms. x Ga 0.5-x In 0.5 P / Al y Ga 0.5-y In 0.5 P-type superlattice layer was used to obtain N-type current-spreading layer, with doping concentrations of 0.5*10⁻⁶. 18 cm -3 and 2*10 18 cm -3 ;

[0021] (6) Turn off the TMGa source, maintain the ambient temperature at 730℃, and grow an AlInP layer to obtain an N-type AlInP confinement layer with a doping concentration of 2*10⁻⁶. 18 cm -3 -3*10 18 cm -3 ;

[0022] (7) Turn off the doping source and continuously introduce TMAl, TMGa and TMIn sources at an ambient temperature of 720℃ to grow AlGaInP quantum barrier. Then turn off the Al source and grow GaInP quantum well. Repeat the growth for 8 to 15 cycles to form MQW quantum well active layer.

[0023] (8) Adjust the temperature to 730℃, turn off the Ga source, introduce the Cp2Mg source, and grow an AlInP layer with a doping concentration of 2*10. 18 cm -3 -3*10 18 cm -3 A P-type AlInP confinement layer is obtained;

[0024] (9) Introduce the TMGa source at an ambient temperature of 740℃ to grow Al. x Ga y In z The P-layer is constructed by simultaneously adjusting the composition of each source, causing the energy band and lattice to gradually transition from AlInP to GaP, thus forming Al. x Ga yIn z P-transition layer, with a doping concentration of 1*10⁻⁶. 18 cm -3 -2*10 18 cm -3 ;

[0025] (10) TMGa and PH3 sources were continuously introduced at an ambient temperature of 680℃ to grow a GaP layer, resulting in a P-GaP ohmic contact layer with a doping concentration of 0.5*10⁻⁶. 20 cm -3 -1*10 20 cm -3 .

[0026] Preferably, in step (5), N-type Al x Ga 0.5-x In o.5 P / Al y Ga 0.5-y In o.5 The growth method for P superlattice layers is as follows: In N-type Al... 0.35 Ga 0.15 In 0.5 At the end of the P-coarsening layer growth, the flow rates of TMAl and TMGa were adjusted to grow periodically distributed doped, alternately stacked, vertically interwoven N-type Al. x Ga 0.5-x In 0.5 P / Al y Ga 0.5-y In 0.5 P-superlattice layer;

[0027] N-type Al x Ga 0.5-x In 0.5 P / Al y Ga 0.5-y In 0.5 The doping concentration of the p-superlattice layer is between 0.5*10⁻⁶. 18 cm -3 -2.5*10 18 cm -3 .

[0028] The superlattice layer uses different chemical compositions and doping concentrations to increase the lateral spread of current, reduce current congestion, and improve the uniformity of current density distribution in the active region without introducing lattice mismatch, thereby improving the light extraction efficiency of LEDs and reducing their aging degradation.

[0029] Preferably, in step (5), N-type Al x Ga 0.5-x In 0.5 P / Al y Ga0.5-y In 0.5 The P superlattice layer has 20 cycles, each with a thickness of 40 nm, for a total thickness of 800 nm.

[0030] Preferably, in step (1), the GaAs buffer layer has a growth thickness of 50 nm; in step (2), the N-type GaInP layer has a growth thickness of about 100 nm.

[0031] Preferably, the thickness of the N-type ohmic contact in step (3) is about 50 nm; in step (4), the thickness of the N-type Al 0.35 Ga 0.15 In 0.5 The thickness of the P-coarsening layer is approximately 1500 nm.

[0032] Preferably, the growth thickness of the AlInP layer in step (6) is about 400 nm; the growth thickness of the AlGaInP quantum barrier in step (7) is 10 nm; and the growth thickness of the GaInP quantum well is 9 nm.

[0033] Preferably, the thickness of the P-type AlInP confinement layer in step (8) is approximately 550 nm; in step (9), the thickness of the P-type Al... x Ga y In z The thickness of the P layer is about 200 nm; the thickness of the GaP layer in step (10) is about 1600 nm.

[0034] For any details not covered in this invention, please refer to the prior art.

[0035] The beneficial effects of this invention are as follows:

[0036] This invention relates to the growth of N-type Al 0.35 Ga 0.15 In 0.5 On the P-coarsened layer, periodically distributed and alternately stacked vertically interwoven N-type Al atoms are grown. x Ga 0.5-x In 0.5 P / Al y Ga 0.5-y In 0.5In this invention, the superlattice layer employs a p-type superlattice with different Al and Ga compositions between its layers, resulting in varying band gap sizes. This band gap difference alters the electron and hole concentrations at the interlayer interfaces, allowing current-driven electrons and holes to effectively expand at each superlattice interface. The expanded current is more uniform than before, and then redistributes and expands again after passing through the next superlattice interface. Furthermore, the superlattice structure in this invention employs periodic doping, with relatively low doping in layers with larger band gaps and relatively high doping in layers with smaller band gaps. This doping increases the potential energy difference in the conduction bands between superlattice layers, further enhancing the current expansion capability within the material. Compared to the original structure, the introduction of a periodically distributed, alternatingly stacked, vertically interlaced superlattice structure with doped layers into the roughening layer allows for more uniform injection of electrons and holes into the active region, increasing the effective radiative recombination area and improving light extraction efficiency. Simultaneously, the addition of this superlattice structure to the roughening layer effectively reduces current congestion, blocks dislocations and defects, lowers junction temperature and aging-related light decay, and enhances its antistatic properties. Furthermore, this invention ensures the stability of the epitaxial wafer's performance and the repeatability of its production. Attached Figure Description

[0037] The accompanying drawings, which form part of this application, are used to provide a further understanding of this application. The illustrative embodiments of this application and their descriptions are used to explain this application and do not constitute an undue limitation of this application.

[0038] Figure 1 This is a schematic diagram of the extensional structure of the present invention;

[0039] Figure 2 N-type Al x Ga 0.5-x In o.5 P / Al y Ga 0.5-y In o.5 Schematic diagram of the P-superlattice structure.

[0040] In the figure: 1. N-type GaAs substrate, 2. N-type GaAs buffer layer, 3. N-type etch stop layer, 4. N-type GaAs ohmic contact layer, 5. N-type Al 0.35 Ga 0.15 In 0.5 P-coarsening layer, 6, N-type Al x Ga 0.5-x In 0.5 P / Al y Ga 0.5-y In 0.5 7. P-type superlattice layer, 8. N-type AlInP confinement layer, 9. MQW quantum well active layer, 10. P-type AlInP confinement layer, 11. Alx Ga y In z P-transition layer, 11, P-GaP ohmic contact layer;

[0041] 61. Al x Ga 0.5-x In o.5 P, 62, Al y Ga 0.5-y In o.5 P. Detailed Implementation

[0042] To enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. However, this is not the only description; all aspects not described in detail herein are based on conventional techniques in the art.

[0043] This invention utilizes metal-organic chemical vapor deposition (MOCVD) to grow epitaxial structures on N-type GaAs substrates. The epitaxial source materials used include trimethylaluminum (TMAl), trimethylgallium (TMGa), trimethylindium (TMIn), phosphine (PH3), arsine (AsH3), silane (Si2H6), and magnesium dicthene (cp2Mg), among others. Si2H6 and cp2Mg are used for N-type and P-type doping, respectively. Furthermore, nitrogen (N2) and hydrogen (H2) are used as carrier gases during the epitaxial growth process.

[0044] Example 1

[0045] An anti-polarity LED with a superlattice structure, such as Figure 1 As shown, its epitaxial structure, following the epitaxial growth sequence, includes, from bottom to top, an N-type GaAs substrate 1, an N-type GaAs buffer layer 2, an N-type etch stop layer 3, an N-type GaAs ohmic contact layer 4, and an N-type Al layer 5. 0.35 Ga 0.15 In 0.5 5. P-coarsening layer, 7. N-type AlInP confinement layer, 8. MQW quantum well active layer, 9. P-type AlInP confinement layer, x Ga y In z P-transition layer 10 and P-GaP ohmic contact layer 11;

[0046] Among them, Al x Ga y In z In transition layer 10, x+y+z=1;

[0047] In N-type Al 0.35 Ga 0.15In 0.5 Between the P-coarsening layer 5 and the N-type AlInP confinement layer 7, a set of periodically distributed and alternately stacked vertically interlaced N-type Al... x Ga 0.5-x In 0.5 P / Al y Ga 0.5-y In 0.5 The p-superlattice layer 6 is called the N-type current spreading layer, in which Al x Ga 0.5-x In 0.5 P / Al y Ga 0.5-y In 0.5 In the P superlattice layer, 0≤x≤0.5, 0≤y≤0.5.

[0048] This invention utilizes N-type Al 0.35 Ga 0.15 In 0.5 Between the P-coarsening layer and the N-type AlInP confinement layer, a set of periodically distributed, alternately stacked, vertically interlaced N-type Al layers are inserted. x Ga 0.5-x In 0.5 P / Al y Ga 0.5-y In 0.5 The P-superlattice layer, without introducing lattice mismatch, utilizes the band difference of the superlattice to increase the lateral spread of the current, improve the uniformity of the current density distribution in the active region, thereby improving the light extraction efficiency of the LED and reducing its aging degradation.

[0049] Example 2

[0050] A method for fabricating an antipolar LED with a superlattice structure, the specific steps of which are as follows:

[0051] (1) Place the substrate in the MOCVD reaction chamber, heat it to about 840℃, introduce an AsH3 source, perform a pretreatment for about 5 minutes, then cool it to about 700℃, introduce TMGa and Si2H6 sources, and grow an N-type GaAs buffer layer with a doping concentration of 0.5*10. 18 cm -3 -1*10 18 cm -3 ;

[0052] (2) Turn off the AsH3 source and introduce TMI and PH3 sources. At an ambient temperature of 700℃, grow an N-type GaInP layer to obtain an N-type etching stop layer with a doping concentration of 0.5*10⁻⁶. 18 cm -3 -1*10 18 cm -3 ;

[0053] (3) Turn off the TMI and PH3 sources, introduce the AsH3 source, and grow a GaAs layer at an ambient temperature of 700℃ to obtain an N-type ohmic contact layer with a doping concentration of 0.5*10⁻⁶. 18 cm -3 -1*10 18 cm -3 ;

[0054] (4) Turn off the AsH3 source, introduce TMAl, TMIn and PH3 sources, maintain the ambient temperature at 700℃, and grow N-type Al. 0.35 Ga 0.15 In 0.5 P-coarsened layer, with doping concentrations of 0.8*10 18 cm -3 -1.2*10 18 cm -3 ;

[0055] (5) Adjust the TMAl and TMGa sources, and set the ambient temperature to 700℃ to grow 20 pairs of periodically distributed, alternately stacked, vertically interlaced N-type Al atoms. 0.3 Ga 0.2 In 0.5 P and Al 0.1 Ga 0.4 In 0.5 A P-type superlattice layer is formed to create an N-type current-spreading layer, with doping concentrations of 0.5*10⁻⁶. 18 cm -3 and 2*10 18 cm -3 ;

[0056] (6) Turn off the TMGa source, maintain the ambient temperature at 730℃, and grow an AlInP layer to obtain an N-type AlInP confinement layer with a doping concentration of 2*10⁻⁶. 18 cm -3 -3*10 18 cm -3 ;

[0057] (7) Turn off the doping source and continuously introduce TMAl, TMGa and TMIn sources at an ambient temperature of 720℃ to grow AlGaInP quantum barrier. Then turn off the Al source and grow GaInP quantum well. Repeat the growth for 8 to 15 cycles to form MQW quantum well active layer.

[0058] (8) Adjust the temperature to 730℃, turn off the Ga source, introduce the Cp2Mg source, and grow an AlInP layer with a doping concentration of 2*10. 18 cm -3 -3*10 18 cm-3 A P-type AlInP confinement layer is obtained;

[0059] (9) Introduce the TMGa source at an ambient temperature of 740℃ to grow Al. x Ga y In z The P-layer is constructed by simultaneously adjusting the composition of each source, causing the energy band and lattice to gradually transition from AlInP to GaP, thus forming Al. x Ga y In z P-transition layer, with a doping concentration of 1*10⁻⁶. 18 cm -3 -2*10 18 cm -3 ;

[0060] (10) TMGa and PH3 sources were continuously introduced at an ambient temperature of 680℃ to grow a GaP layer, resulting in a P-GaP ohmic contact layer with a doping concentration of 0.5*10⁻⁶. 20 cm -3 -1*10 20 cm -3 .

[0061] In step (1), the GaAs buffer layer has a growth thickness of 50 nm; in step (2), the N-type GaInP layer has a growth thickness of approximately 100 nm; in step (3), the N-type ohmic contact has a thickness of approximately 50 nm; in step (4), the N-type Al… 0.35 Ga 0.15 In 0.5 The thickness of the P-coarsening layer is approximately 1500 nm.

[0062] In step (5), the superlattice layer has 20 cycles, each cycle has a thickness of 40 nm, and the total thickness is 800 nm.

[0063] In step (6), the AlInP layer has a growth thickness of approximately 400 nm; in step (7), the AlGaInP quantum barrier has a growth thickness of 10 nm; the GaInP quantum well has a growth thickness of 9 nm; in step (8), the P-type AlInP confinement layer has a thickness of approximately 550 nm; in step (9), the P-type Al... x Ga y In z The thickness of the P layer is about 200 nm; the thickness of the GaP layer in step (10) is about 1600 nm.

[0064] Example 3

[0065] A method for fabricating an antipolar LED with a superlattice structure, as described in Example 2, except that the grown periodically distributed doped and alternately stacked vertically interlaced N-type Al0.25 Ga 0.25 In 0.5 P and Al 0.15 Ga 0.35 In 0.5 The P-layer doping concentration is 0.5*10 18 cm -3 -2*10 18 cm -3 The thicknesses are 20nm and 20nm respectively.

[0066] Example 4

[0067] A method for fabricating an antipolar LED with a superlattice structure, as described in Example 2, except that the grown periodically distributed doped and alternately stacked vertically interlaced N-type Al 0.2 Ga 0.3 In 0.5 P and Al 0.15 Ga 0.35 In 0.5 The P-layer doping concentration is 0.5*10 18 cm -3 -2*10 18 cm -3 The thicknesses are 20nm and 20nm respectively.

[0068] Example 5

[0069] A method for fabricating an antipolar LED with a superlattice structure, as described in Example 2, except that the grown periodically distributed doped and alternately stacked vertically interlaced N-type Al 0.2 Ga 0.3 In 0.5 P and Al 0.15 Ga 0.35 In 0.5 The P-layer doping concentration is 0.75*10. 18 cm -3 -1.5*10 18 cm -3 The thicknesses are 20nm and 20nm respectively.

[0070] Example 6

[0071] A method for fabricating an antipolar LED with a superlattice structure, as described in Example 2, except that the grown periodically distributed doped and alternately stacked vertically interlaced N-type Al 0.2 Ga 0.3 In 0.5 P and Al 0.15 Ga 0.35 In 0.5The P-layer doping concentration is 1*10 18 cm -3 -1*10 18 cm -3 The thicknesses are 20nm and 20nm respectively.

[0072] Using the same chip fabrication process and testing conditions, the epitaxial wafers prepared in Examples 2-6 were processed and tested at 6.5 mil. All chips were tested at a working current of 20 mA. The conventional epitaxial wafer structure, i.e., the epitaxial wafer without a superlattice structure in the roughening layer (the N-type confinement layer is directly grown on top of the roughening layer), has a brightness of approximately 585 mcd and an aging degradation of approximately 8% at 85°C. The epitaxial wafer with a superlattice structure introduced in the roughening layer, after being fabricated using die-casting processes, shows the corresponding brightness and aging degradation data in Table 1.

[0073] Table 1: Brightness and Aging Decay Data Table

[0074] Example 2 <![CDATA[Al 0.3 Him 0.2 And 0.5 P / Al 0.1 Him 0.4 And 0.5 P]]> <![CDATA[0.5*10 18 cm -3 / 2*10 18 cm -3 ]]> 594mcd 6.3％ Example 3 <![CDATA[Al 0.25 Him 0.25 And 0.5 P / Al 0.15 Him 0.35 And 0.5 P]]> <![CDATA[0.5*10 18 cm -3 / 2*10 18 cm -3 ]]> 602mcd 3.5％ Example 4 <![CDATA[Al 0.2 Him 0.3 And 0.5 P / Al 0.15 Him 0.35 And 0.5 P]]> <![CDATA[0.5*10 18 cm -3 / 2*10 18 cm -3 ]]> 615mcd 1.8％ Example 5 <![CDATA[Al 0.2 Him 0.3 And 0.5 P / Al 0.15 Him 0.35 And 0.5 P]]> <![CDATA[0.3*10 18 cm -3 / 2.5*10 18 cm -3 ]]> 599mcd 5.1％ Example 6 <![CDATA[Al 0.2 Him 0.3 And 0.5 P / Al 0.15 Him 0.35 And 0.5 P]]> <![CDATA[1*10 18 cm -3 / 1*10 18 cm -3 ]]> 590mcd 5.7％

[0075] Examples 2, 3, and 4 compared the effects of different superlattice compositions on chip brightness and aging degradation; Examples 4, 5, and 6 compared the effects of different superlattice doping concentrations on chip brightness and aging degradation. Based on the above results, compared with chips with traditional epitaxial structures, the introduction of a superlattice structure into the roughening layer significantly improves brightness and resistance to aging degradation. Preferably, Example 4 has a more prominent effect on improving chip brightness and resistance to aging degradation.

[0076] The above description represents the preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A reverse polarity LED with a superlattice structure, characterized in that, Its epitaxial structure, following the epitaxial growth sequence, includes, from bottom to top, an N-type GaAs substrate, an N-type GaAs buffer layer, an N-type etch stop layer, an N-type GaAs ohmic contact layer, and an N-type Al layer. 0.35 Ga 0.15 In 0.5 P-coarsened layer, N-type AlInP confinement layer, MQW quantum well active layer, P-type AlInP confinement layer, Al x Ga y In z P-transition layer and P-GaP ohmic contact layer; Among them, Al x Ga y In z In the P transition layer, x+y+z=1; In the N-type Al 0.35 Ga 0.15 In 0.5 Twenty periodically distributed, alternately stacked, vertically interlaced N-type Al layers are inserted between the P-coarsening layer and the N-type AlInP confinement layer. x Ga 0.5-x In 0.5 P / Al y Ga 0.5-y In 0.5 The p-type superlattice layer is called the N-type current spreading layer, in which Al x Ga 0.5-x In 0.5 P / Al y Ga 0.5-y In 0.5 In the p-type superlattice layer, 0 ≤ x ≤ 0.5, 0 ≤ y ≤ 0.5; the doping concentration of the superlattice layer is 0.5 * 10⁻⁶. 18 cm -3 and 2*10 18 cm -3 .

2. A method for preparing a reverse polarity LED with a superlattice structure as described in claim 1, characterized in that, include: Select an N-type GaAs substrate suitable for epitaxial growth; On an N-type GaAs substrate, an N-type GaAs buffer layer, an N-type etch stop layer, an N-type GaAs ohmic contact layer, and an N-type Al layer are sequentially grown. 0.35 Ga 0.15 In 0.5 P-coarsening layer; In the N-type Al 0.35 Ga 0.15 In 0.5 On the P-coarsened layer, 20 periodically distributed and alternately stacked vertically interlaced N-type Al₂O₃ layers are grown. x Ga 0.5-x In 0.5 P / Al y Ga 0.5-y In 0.5 P-superlattice layer; In the N-type Al x Ga 0.5-x In 0.5 P / Al y Ga 0.5-y In 0.5 On the p-type superlattice layer, an N-type AlInP confinement layer, an MQW quantum well active layer, a p-type AlInP confinement layer, and an Al-type Al-type superlattice layer are grown sequentially. x Ga y In z P-transition layer and P-GaP ohmic contact layer.

3. The method for preparing a reverse polarity LED with a superlattice structure according to claim 2, characterized in that, The specific steps are as follows: (1) Place the substrate in the MOCVD reaction chamber, heat it to 840℃, introduce an AsH3 source, perform a pretreatment for 5 minutes, then cool it to 700℃, introduce TMGa and Si2H6 sources, and grow an N-type GaAs buffer layer with a doping concentration of 0.5*10 18 cm -3 -1*10 18 cm -3 ; (2) Turn off the AsH3 source and introduce TMI and PH3 sources. The ambient temperature is 700℃ to grow an N-type GaInP layer to obtain an N-type etching stop layer with a doping concentration of 0.5*10. 18 cm -3 -1*10 18 cm -3 ; (3) Turn off the TMI and PH3 sources, introduce the AsH3 source, and grow the GaAs layer at an ambient temperature of 700℃ to obtain an N-type ohmic contact layer with a doping concentration of 0.5*10. 18 cm -3 -1*10 18 cm -3 ; (4) Turn off the AsH3 source, introduce TMAl, TMIn and PH3 sources, and maintain the ambient temperature at 700℃ to grow N-type Al. 0.35 Ga 0.15 In 0.5 P-coarsening layer, with a doping concentration of 0.8*10 18 cm -3 -1.2*10 18 cm -3 ; (5) Adjust the TMAl and TMGa sources, and grow 20 periodically distributed and alternately stacked vertically interlaced N-type Al at an ambient temperature of 700℃. x Ga 0.5-x In 0.5 P / Al y Ga 0.5-y In 0.5 P-type superlattice layer was used to obtain N-type current-spreading layer, with doping concentrations of 0.5*10⁻⁶. 18 cm -3 and 2*10 18 cm -3 ; (6) Turn off the TMGa source, maintain the ambient temperature at 730℃, and grow an AlInP layer to obtain an N-type AlInP confinement layer with a doping concentration of 2*10. 18 cm -3 -3*10 18 cm -3 ; (7) Turn off the doping source and continuously introduce TMAl, TMGa and TMIn sources at an ambient temperature of 720℃ to grow AlGaInP quantum barrier. Then turn off the Al source and grow GaInP quantum well. Repeat the growth for 8 to 15 cycles to form MQW quantum well active layer. (8) Adjust the temperature to 730℃, turn off the Ga source, introduce the Cp2Mg source, and grow an AlInP layer with a doping concentration of 2*10. 18 cm -3 -3*10 18 cm -3 A P-type AlInP confinement layer is obtained; (9) Introduce the TMGa source at an ambient temperature of 740℃ to grow Al. x Ga y In z The P-layer is constructed by simultaneously adjusting the composition of each source, causing the energy band and lattice to gradually transition from AlInP to GaP, thus forming Al. x Ga y In z P-transition layer, with a doping concentration of 1*10⁻⁶. 18 cm -3 -2*10 18 cm -3 ; (10) TMGa and PH3 sources were continuously introduced at an ambient temperature of 680℃ to grow a GaP layer, resulting in a P-GaP ohmic contact layer with a doping concentration of 0.5*10. 20 cm -3 -1*10 20 cm -3 .

4. The method for preparing a reverse polarity LED with a superlattice structure according to claim 3, characterized in that, In step (5), N-type Al x Ga 0.5-x In 0.5 P / Al y Ga 0.5-y In 0.5 The growth method for P superlattice layers is as follows: In N-type Al... 0.35 Ga 0.15 In 0.5 At the end of the P-coarsening layer growth, the flow rates of TMAl and TMGa were adjusted to grow periodically distributed doped, alternately stacked, vertically interwoven N-type Al. x Ga 0.5-x In 0.5 P / Al y Ga 0.5-y In 0.5 P-superlattice layer.

5. The method for preparing a reverse polarity LED with a superlattice structure according to claim 3, characterized in that, In step (5), N-type Al x Ga 0.5-x In 0.5 P / Al y Ga 0.5-y In 0.5 The P superlattice layer has 20 cycles, each with a thickness of 40 nm, for a total thickness of 800 nm.

6. The method for preparing a reverse polarity LED with a superlattice structure according to claim 3, characterized in that, In step (1), the GaAs buffer layer has a growth thickness of 50 nm; in step (2), the N-type GaInP layer has a growth thickness of 100 nm.

7. The method for preparing an antipolar LED with a superlattice structure according to claim 3, characterized in that, In step (3), the thickness of the N-type ohmic contact is 50 nm; in step (4), the thickness of the N-type Al... 0.35 Ga 0.15 In 0.5 The thickness of the P roughening layer is 1500 nm.

8. The method for preparing a reverse polarity LED with a superlattice structure according to claim 3, characterized in that, In step (6), the AlInP layer has a growth thickness of 400 nm; in step (7), the AlGaInP quantum barrier has a growth thickness of 10 nm; and the GaInP quantum well has a growth thickness of 9 nm.

9. The method for preparing a reverse polarity LED with a superlattice structure according to claim 3, characterized in that, In step (8), the thickness of the P-type AlInP confinement layer is 550 nm; in step (9), the thickness of the P-type Al... x Ga y In z The thickness of the P layer is 200 nm; the thickness of the GaP layer in step (10) is 1600 nm.

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