Electronic device

Abstract

The present application provides an electronic device, which comprises an internal battery, a first converter for converting power provided by the internal battery or an external power source into a first power signal, a processor operating in an open state or switching to a closed state according to the first power signal, and a control circuit for controlling the first converter to selectively provide the first power signal to the processor. The processor of the electronic device provided by the present application can be adaptively operated in the open state or switched to the closed state, so that the external power source can be effectively prevented from being depleted when the engine of a vehicle stops operating. Moreover, in combination with a control signal and an enabling signal, the time point at which the power-on procedure and the power-off procedure of the processor are executed can be accurately controlled.

Description

Technical Field

[0001] This invention relates to the field of electronic information technology, and more particularly to an electronic device. Background Technology

[0002] With the development of the automotive industry, especially in response to the technological evolution of electric vehicles and intelligent autonomous vehicles, dashcams and Advanced Driver Assistance Systems (ADAS) have become ubiquitous in automobiles, almost becoming standard features. The power supply for dashcams and ADAS primarily comes from the car battery; that is, the car battery serves as an external power source for these devices. When the car is turned off and the engine is not running, the car battery cannot be charged, and therefore, dashcams and ADAS may deplete the car battery's power.

[0003] While some dashcams and advanced driver assistance systems (ADAS) can be equipped with internal batteries, these batteries cannot provide power indefinitely. Furthermore, the use of internal batteries increases the complexity of the power control circuitry in dashcams and ADAS.

[0004] Therefore, it is necessary to design a new type of electronic device to overcome the above-mentioned defects. Summary of the Invention

[0005] The purpose of this invention is to provide an electronic device that enables the processor to adapt to either an on state or a off state depending on the power supply provided by the internal battery and the external power source.

[0006] To achieve the above objectives, the present invention provides an electronic device comprising: an internal battery; a first converter for converting electrical energy provided by the internal battery or electrical energy provided by an external power source into a first power signal; a processor for operating in an on state or switching to an off state according to the first power signal; and a control circuit for controlling the first converter to selectively provide the first power signal to the processor.

[0007] Preferably, the processor is configured to: operate in the on state when the first converter provides the first power signal; and switch to the off state when the first converter does not provide the first power signal.

[0008] Preferably, the control circuit is used to: provide an enable signal to control the first converter; wherein, when the enable signal is high, the first converter provides the first power signal to the processor.

[0009] Preferably, the control circuit is further configured to: raise the enable signal to a high potential when the external power supply provides power; wherein, when the enable signal is at a high potential, the processor enters the power-on procedure.

[0010] Preferably, the control circuit is further configured to: reduce the enable signal to a low potential when the external power supply does not provide power and the processor enters a shutdown procedure, and after a first predetermined period has elapsed since the shutdown procedure is completed; wherein, when the shutdown procedure is completed, the processor switches to the off state.

[0011] Preferably, the processor is further configured to: provide a first control signal to the control circuit; wherein, after the first control signal has been reduced to a low potential for a first predetermined period, the control circuit reduces the enable signal to a low potential.

[0012] Preferably, the processor is further configured to: raise the first control signal to a high level when the power-on procedure is completed; and lower the first control signal to a low level when the power-off procedure is completed.

[0013] Preferably, the processor is further configured to: provide a second control signal to the control circuit; raise the second control signal to a high level when the power-on procedure is completed; and lower the second control signal to a low level when the power-off procedure is entered.

[0014] Preferably, the control circuit is further configured to: raise the enable signal to a high potential when the detection signal associated with the external power supply is at a high potential; wherein the detection signal is at a high potential when the external power supply provides power.

[0015] Preferably, the processor is further configured to: reduce the second control signal to a low potential after a second predetermined period has elapsed following the detection signal being reduced to a low potential; wherein the detection signal is at a low potential when the external power supply does not provide power.

[0016] Preferably, the electronic device further includes: a second converter for selectively receiving electrical energy provided by the internal battery and electrical energy provided by the external power source, and converting the received electrical energy into a second power signal; wherein, when the internal battery provides electrical energy, the control circuit maintains the enable signal at a high potential according to the second power signal.

[0017] Preferably, the voltage level of the power supplied by the external power source is 4.2V to 5V, the voltage level of the power supplied by the internal battery is 3.7V, the voltage level of the first power signal provided by the first converter is 3.3V, and the voltage level of the second power signal provided by the second converter is 3V.

[0018] Preferably, the electronic device further includes: a signal generator for generating a reset signal based on the first power signal; wherein, based on the rising edge of the reset signal, the control circuit raises the enable signal to a high potential.

[0019] Preferably, the control circuit includes: a flip-flop, the reset port of which is used to receive the reset signal; a first N-type transistor, the gate of which is coupled to the data output port of the flip-flop, and the source of which is coupled to ground; and a first P-type transistor, coupled between the first N-type transistor and the output terminal that outputs the enable signal; wherein the high-level reset signal resets the flip-flop, and the data output port is reset to a low level to turn off the first N-type transistor, and the enable signal remains at a high level.

[0020] Preferably, the flip-flop further includes: a data input port; an inverting data output port coupled to the data input port; and a clock input port for receiving the second control signal; wherein the low-level second control signal triggers the flip-flop to raise the data output port to a high level to turn on the first N-type transistor.

[0021] Preferably, the gate of the first P-type transistor is used to receive the first control signal, and the first P-type transistor is turned on when the first control signal drops to a low potential, and the enable signal is pulled down to a low potential through the turned-on first P-type transistor and the turned-on first N-type transistor.

[0022] Preferably, the control circuit further includes: a second N-type transistor, the gate of which is used to receive the detection signal or the first power supply signal, and the source of which is coupled to a ground terminal; and a second P-type transistor, the source of which is used to receive the second power supply signal, and the gate of which is coupled to a ground terminal via the second N-type transistor; wherein, when the detection signal or the first power supply signal rises to a high potential, both the second N-type transistor and the second P-type transistor are turned on, and the second power supply signal is provided as the enable signal via the turned-on second P-type transistor.

[0023] Compared to existing technologies, the processor of the electronic device provided by this invention can adaptably operate in an on state or switch to an off state, effectively preventing the external power supply from being depleted when the car engine stops. Furthermore, with the aid of control signals and enable signals, the timing of the processor's power-on and power-off procedures can be precisely controlled. Attached Figure Description

[0024] Figure 1 A partial circuit diagram of an electronic device provided for an embodiment of the present invention;

[0025] Figure 2 A timing diagram showing the voltage levels of various control signals and the operating state of the processor in an electronic device provided in an embodiment of the present invention;

[0026] Figure 3 A circuit diagram of the control circuit provided in an embodiment of the present invention. Detailed Implementation

[0027] To provide a further understanding of the purpose, structure, features and functions of the present invention, detailed descriptions are provided below with reference to embodiments.

[0028] Certain terms are used in the specification and claims to refer to specific elements. It will be understood by those skilled in the art that manufacturers may use different names to refer to the same element. This specification and claims do not distinguish elements by differences in name, but rather by differences in function. The term "comprising" throughout the specification and claims is an open-ended term and should be interpreted as "comprising but not limited to".

[0029] Figure 1 This is a partial circuit diagram of an electronic device 1000 provided in an embodiment of the present invention. The electronic device 1000 is, for example, a driving recorder or an advanced driver assistance system (ADAS). The electronic device 1000 is used to perform driving recording or driver assistance while the vehicle is in motion, and can also perform anti-theft or collision avoidance recording alerts when the vehicle is parked and the engine is off. Figure 1 The components in electronic device 1000 that perform image capture, photography, and video recording functions are not shown. See also Figure 1 The electronic device 1000 includes a processor 100, an internal battery 150, a first converter 300, a second converter 200, a control circuit 400, and a signal generator 500. Furthermore, the electronic device 1000 can be coupled to an external power supply 160.

[0030] Processor 100, such as a central processing unit (CPU) or microprocessor (MCU), is used to control the operation of electronic device 1000. Processor 100 can selectively receive electrical energy from internal battery 150 and / or external power source 160. External power source 160 is, for example, a car battery installed in the vehicle body. Internal battery 150 is, for example, a rechargeable battery (e.g., a lithium battery) installed inside electronic device 1000; it can charge when the vehicle engine is running. When the vehicle is in motion or when the vehicle is parked and turned off, processor 100 can selectively receive electrical energy P_int from internal battery 150 and / or electrical energy P_ext from external power source 160. The voltage level of electrical energy P_int from internal battery 150 is, for example, 3.7V, and the voltage level of electrical energy P_ext from external power source 160 is, for example, 4.2V to 5V. Figure 1 In this context, the electrical energy P_int of the internal battery 150 and the electrical energy P_ext of the external power supply 160 can be integrated and represented as the input power signal BAT_IN_2.

[0031] The first converter 300 is, for example, a DC-DC converter. The first converter 300 can selectively receive electrical energy P_int from the internal battery 150 or electrical energy P_ext from the external power supply 160, and reduce the voltage level of the electrical energy P_int or P_ext to convert it into a first power signal Main_DC. The voltage level of the first power signal Main_DC is, for example, 3.3V, and the first power signal Main_DC is provided to the input port Main_Vin of the processor 100, serving as the main power supply for the processor 100. The processor 100 can operate in an on state or switch to an off state based on the first power signal Main_DC. In one example, when the first converter 300 provides the first power signal Main_DC, the processor 100 operates in the on state; conversely, when the first converter 300 does not provide the first power signal Main_DC, the processor 100 switches to the off state.

[0032] On the other hand, the second converter 200 is, for example, a low-dropout DC-DC converter (LDO). Similarly, the second converter 200 can selectively receive electrical energy P_int from the internal battery 150 or electrical energy P_ext from the external power supply 160, and reduce the voltage level of electrical energy P_int or electrical energy P_ext to convert it into a second power signal VDD_RTC_3V0. The voltage level of the second power signal VDD_RTC_3V0 is, for example, 3V, and the second power signal VDD_RTC_3V0 is provided to the input port RTC_Vin of the processor 100, which can serve as a secondary power supply for the real-time clock (RTC) of the processor 100.

[0033] Processor 100 can provide a first control signal ACC_OFF_837 and a second control signal ACC_OFF_ACT via a general purpose input / output (GPIO) port. The first control signal ACC_OFF_837 and the second control signal ACC_OFF_ACT can indicate that processor 100 is in an on state, an off state, a boot process, or a shutdown process. Processor 100 can control the voltage levels of the first control signal ACC_OFF_837 and the second control signal ACC_OFF_ACT in response to the on state, the off state, and the voltage level of the detection signal ACC_DET. In one example, when processor 100 enters the on state and its boot process is completed, processor 100 can raise the voltage level of the first control signal ACC_OFF_837 to a high level and raise the voltage level of the second control signal ACC_OFF_ACT to a high level. On the other hand, after the detection signal ACC_DET drops to a low level and a second predetermined period T2 has elapsed, the processor 100 enters the shutdown procedure and lowers the voltage level of the second control signal ACC_OFF_ACT to a low level; the second predetermined period T2 is, for example, 2.5 seconds (s). When the shutdown procedure of the processor 100 is completed, the processor 100 can lower the voltage level of the first control signal ACC_OFF_837 to a low level. In summary, when the processor 100 is in the power-on state and the power-on procedure is completed, both the first control signal ACC_OFF_837 and the second control signal ACC_OFF_ACT are raised to a high level; when the processor 100 enters the shutdown procedure, the second control signal ACC_OFF_ACT drops to a low level; when the shutdown procedure of the processor 100 is completed, the first control signal ACC_OFF_837 drops to a low level.

[0034] The control circuit 400 controls the first converter 300 to selectively provide a first power signal Main_DC to the processor 100. The control circuit 400 can provide an enable signal Main_DC_EN to control the first converter 300; when the enable signal Main_DC_EN is high, the first converter 300 provides the first power signal Main_DC to the processor 100; conversely, when the enable signal Main_DC_EN is low, the first converter 300 does not provide the first power signal Main_DC to the processor 100. In one example, the control circuit 400 can receive a first control signal ACC_OFF_837, a second control signal ACC_OFF_ACT, a detection signal ACC_DET, a first power signal Main_DC, a second power signal VDD_RTC_3V0, and a reset signal Main_DC_RST. The control circuit 400 can also control the voltage level of the enable signal Main_DC_EN according to the aforementioned signals. For example, when the external power supply 160 provides power P_ext, the detection signal ACC_DET is at a high level, and the enable signal Main_DC_EN rises to a high level. When the shutdown procedure of the processor 100 is completed and a first predetermined period T1 has elapsed, the enable signal Main_DC_EN drops to a low level, and the first predetermined period T1 is, for example, 100 ms (milliseconds). In one example, the control circuit 400 can adjust the enable signal (Main_DC_EN) according to a first control signal (ACC_OFF_837). When the first control signal (ACC_OFF_837) drops to a low level and the first predetermined period T1 has elapsed, the control circuit 400 adjusts the enable signal (Main_DC_EN) to a low level.

[0035] The signal generator 500 generates a reset signal Main_DC_RST based on the first power signal Main_DC, and provides the reset signal Main_DC_RST to the control circuit 400. The control circuit 400 can adjust the enable signal Main_DC_EN to a high level based on the rising edge of the reset signal Main_DC_RST.

[0036] Figure 2 This is a timing diagram showing the voltage levels of various control signals and the operating states of the processor 100 of the electronic device 1000 provided in an embodiment of the present invention. (See also...) Figure 2 (and see also) Figure 1Between time points t0 and t1, neither the internal battery 150 nor the external power supply 160 provides power (i.e., the internal battery 150 does not provide power P_int, and the external power supply 160 does not provide power P_ext). At this time, the voltage level of the input power signal BAT_IN_2 is zero volts (0V). Furthermore, between time points t0 and t2, the processor 100 is in a powered-off state (CPU_state = "OFF").

[0037] At time t1, the internal battery 150 begins to supply power P_int, at which point the input power signal BAT_IN_2 is boosted to 3.7V (3.7V is the voltage level of power P_int). The second converter 200 converts the power P_int from the internal battery 150 into a second power signal VDD_RTC_3V0; therefore, at time t1, the second power signal VDD_RTC_3V0 is boosted to 3V. At this time, the second power signal VDD_RTC_3V0 is provided to the processor 100 via the input port RTC_Vin as a secondary power supply for the real-time clock of the processor 100.

[0038] Then, at time t2, the external battery 160 begins to supply power P_ext, at which point the input power signal BAT_IN_2 is boosted to 4.2V (4.2V is the voltage level of power P_ext). The first converter 300 can convert the power P_ext from the external battery 160 into a first power signal Main_DC, thus at time t2 the first power signal Main_DC is boosted to 3.3V. At this time, the first power signal Main_DC is provided to the processor 100 via the input port Main_Vin as the main power supply for the processor 100. Furthermore, the processor 100 detects that the external battery 160 has begun to supply power P_ext, therefore the detection signal ACC_DET is boosted to a high level at time t2. In one example, the processor 100 can monitor the car's ignition switch; if the ignition switch is detected to be activated, indicating that the external battery 160 has begun to supply power P_ext, the detection signal ACC_DET is boosted to a high level. At time t2, the reset signal Main_DC_RST rises from a low level to a higher voltage level; in response to the rising edge of the reset signal Main_DC_RST, the enable signal Main_DC_EN rises to a high level at time t2, and the processor 100 enters the boot state (CPU_state = "Boot") at time t2.

[0039] At time t4, processor 100 has completed the boot process. Therefore, after time t4, processor 100 officially begins operation and executes different functions, such as the first function ("Operation-A") and the second function ("Operation-B"). Furthermore, at time t4, processor 100 raises the first control signal ACC_OFF_837 and the second control signal ACC_OFF_ACT to a high level, indicating that processor 100 has officially started operation.

[0040] When processor 100 is operating, at time t5, external power supply 160 is turned off, thus disabling power P_ext, and the first power signal Main_DC drops to a low level. Processor 100 detects that external power supply 160 is not providing power P_ext, so the detection signal ACC_DET also begins to drop at time t5, until time t6 when the detection signal ACC_DET drops to a low level. Since the detection signal ACC_DET drops to a low level at time t6 and the second predetermined period T2 has passed, it can be confirmed that external power supply 160 is completely turned off. Therefore, at time t7 after the second predetermined period T2, processor 100 enters the shutdown procedure, and processor 100 lowers the second control signal ACC_OFF_ACT to a low level (indicating that processor 100 has entered the shutdown procedure).

[0041] Subsequently, at time t8, the processor 100 has completed the shutdown procedure, and at time t8, the processor 100 lowers the first control signal ACC_OFF_837 to a low level (indicating that the processor 100 has completed the shutdown procedure). After the shutdown procedure is completed at time t8 and the first predetermined period T1 has elapsed, it can be confirmed that the processor 100 has fully entered the shutdown state (CPU_state = "OFF"). Therefore, at time t9, after the first predetermined period T1, the control circuit 400 lowers the enable signal Main_DC_EN to a low level, so that the first converter 300 stops providing the first power signal Main_DC to the processor 100. Furthermore, at time t9, the reset signal Main_DC_RST also lowers to a low level.

[0042] Then, at time t10, the internal battery 150 stops providing power P_int, so the input power signal BAT_IN_2 and the second power signal VDD_RTC_3V0 drop to a low potential (e.g., 0V) at time t10.

[0043] Figure 3 This is a circuit diagram of the control circuit 400 according to an embodiment of the present invention. See also... Figure 3The control circuit 400 includes a flip-flop (FF) 410, a first N-type transistor 420N, a first P-type transistor 420P, a second N-type transistor 430N, and a second P-type transistor 430P.

[0044] The flip-flop 410 is, for example, a "D Flip-Flop". The flip-flop 410 has a reset port CLR', a clock input port CK, a data input port D, a data output port Q, an inverted data output port Q', and a DC power supply port VCC. The reset port CLR' receives the reset signal Main_DC_RST, the clock input port CK receives the second control signal ACC_OFF_ACT, the data output port Q is coupled to the gate of the first N-type transistor 420N, the inverted data output port Q' is coupled to the data input port D, and the DC power supply port VCC receives the first power supply signal Main_DC.

[0045] The source of the first N-type transistor 420N is coupled to ground GND, the drain of the first N-type transistor 420N is coupled to the drain of the first P-type transistor 420P, and the source of the first P-type transistor 420P is coupled to the output of the enable signal Main_DC_EN. Furthermore, the gate of the first P-type transistor 420P receives the first control signal ACC_OFF_837.

[0046] On the other hand, the source of the second N-type transistor 430N is coupled to the ground terminal GND. The gate of the second N-type transistor 430N receives the detection signal ACC_DET and the first power supply signal Main_DC via diodes D1 and D2, respectively. The drain of the second N-type transistor 430N is coupled to the gate of the second P-type transistor 430P, and the source of the second P-type transistor 430P receives the second power supply signal VDD_RTC_3V0. In addition, the drain of the second P-type transistor 430P is coupled to the output terminal of the enable signal Main_DC_EN.

[0047] In operation, when the internal battery 150 provides power P_int, the input power signal BAT_IN_2 is converted into a second power signal VDD_RTC_3V0 via the second converter 200, raising the second power signal VDD_RTC_3V0 to a high potential (e.g., 3V). Furthermore, when the external power supply 160 provides power P_ext, the activation of the car's ignition key can be detected, thus raising the detection signal ACC_DET to a high potential. The high-potential detection signal ACC_DET can turn on the second N-type transistor 430N, which pulls down the gate voltage level of the second P-type transistor 430P to the low potential of ground GND, thus turning on the second P-type transistor 430P. Accordingly, the high-potential second power signal VDD_RTC_3V0 can be provided as a high-potential enable signal Main_DC_EN via the turned-on second P-type transistor 430P.

[0048] Furthermore, when the external power supply 160 provides power P_ext, the input power signal BAT_IN_2 is converted into a first power signal Main_DC via the first converter 300, causing the first power signal Main_DC to rise to a high level (e.g., 3.3V). The high-level first power signal Main_DC is provided to the flip-flop 410 via the DC power port VCC, and when the reset signal Main_DC_RST rises to a high level, the reset signal Main_DC_RST can reset the data output port Q of the flip-flop 410 to a low level. The low level output by the data output port Q can turn off the first N-type transistor 420N. Therefore, the output of the enable signal Main_DC_EN will not be connected to the ground terminal GND, and the enable signal Main_DC_EN can be maintained at a high level according to the high-level second power signal VDD_RTC_3V0.

[0049] On the other hand, when the external power supply 160 stops supplying power P_ext, the processor 100 enters the shutdown procedure and lowers the second control signal ACC_OFF_ACT to a low level. The voltage level drop of the second control signal ACC_OFF_ACT can trigger the flip-flop 410, causing the signal received at the data input port D2 of the flip-flop 410 to be transmitted to the data output port Q, raising the data output port Q to a high level and turning on the first N-type transistor 420N. Furthermore, when the processor 100 has completed the shutdown procedure, the processor 100 lowers the first control signal ACC_OFF_837 to a low level, and the low-level first control signal ACC_OFF_837 can turn on the first P-type transistor 420P. At this time, both the first N-type transistor 420N and the first P-type transistor 420P are turned on, and the output terminal of the enable signal Main_DC_EN can be turned on to the ground terminal GND through the first N-type transistor 420N and the first P-type transistor 420P. Therefore, the enable signal Main_DC_EN is pulled down to a low potential.

[0050] In summary, when the internal battery 150 provides power P_int and the external power supply 160 provides power P_ext, the control circuit 400 can output a high-level enable signal Main_DC_EN in response to the high-level first power signal Main_DC, the high-level second power signal VDD_RTC_3V0, and the high-level detection signal ACC_DET, and stably maintain the enable signal Main_DC_EN at a high level; thereby, the first converter 300 can be controlled to provide the first power signal Main_DC to the processor 100. On the other hand, when the external power supply 160 stops providing power P_ext and the processor 100 completes the shutdown procedure, the control circuit 400 can pull the enable signal Main_DC_EN down to a low level in response to the low-level first control signal ACC_OFF_837 and the low-level second control signal ACC_OFF_ACT; thereby, the first converter 300 can be controlled to stop providing the first power signal Main_DC to the processor 100.

[0051] The present invention has been described in the above-described embodiments; however, these embodiments are merely examples for implementing the present invention. It must be noted that the disclosed embodiments do not limit the scope of the present invention. Conversely, any modifications and refinements made without departing from the spirit and scope of the present invention are within the scope of patent protection of the present invention.

Claims

1. An electronic device, characterized in that, The electronic device includes: Internal battery; The first converter is used to convert the electrical energy provided by the internal battery or the electrical energy provided by the external power source into a first power signal. The processor operates in an on state or switches to an off state according to the first power signal; and A control circuit is provided to provide an enable signal to control the first converter, so that the first converter selectively provides the first power signal to the processor; When the enable signal is at a high level, the first converter provides the first power signal to the processor; When the external power supply does not provide power and the processor enters the shutdown procedure, and after a first predetermined period has elapsed since the shutdown procedure is completed, the enable signal is reduced to a low potential; wherein, when the shutdown procedure is completed, the processor switches to the off state.

2. The electronic device as claimed in claim 1, characterized in that, This processor is used for: When the first converter provides the first power signal, it operates in the on state; and When the first converter does not provide the first power signal, it switches to the off state.

3. The electronic device as claimed in claim 1, characterized in that, This control circuit is also used for: When the external power source provides electrical energy, the enable signal is raised to a high potential; When the enable signal is at a high level, the processor enters the boot process.

4. The electronic device as claimed in claim 1, characterized in that, This processor is also used for: Provide a first control signal to the control circuit; Specifically, after the first control signal is reduced to a low potential and the first predetermined period has elapsed, the control circuit reduces the enable signal to a low potential.

5. The electronic device as claimed in claim 4, characterized in that, This processor is also used for: When the power-on process is complete, the first control signal is raised to a high level; and When the shutdown procedure is complete, the first control signal is lowered to a low level.

6. The electronic device as claimed in claim 5, characterized in that, This processor is also used for: Provide a second control signal to the control circuit; When the power-on process is complete, the second control signal is raised to a high level; and When entering the shutdown procedure, the second control signal is lowered to a low level.

7. The electronic device as claimed in claim 6, characterized in that, This control circuit is also used for: When the detection signal associated with the external power supply is at a high level, the enable signal is boosted to a high level. When the external power source provides electrical energy, the detection signal is at a high potential.

8. The electronic device as claimed in claim 7, characterized in that, This processor is also used for: When the detection signal is reduced to a low level and a second predetermined period has elapsed, the second control signal is reduced to a low level. When the external power source does not provide power, the detection signal is at a low potential.

9. The electronic device as claimed in claim 8, characterized in that, The electronic device also includes: The second converter is used to selectively receive electrical energy provided by the internal battery and electrical energy provided by the external power source, and convert the received electrical energy into a second power signal. When the internal battery provides power, the control circuit maintains the enable signal at a high potential according to the second power signal.

10. The electronic device as claimed in claim 9, characterized in that, The voltage level of the power supplied by the external power source is 4.2V to 5V, the voltage level of the power supplied by the internal battery is 3.7V, the voltage level of the first power signal provided by the first converter is 3.3V, and the voltage level of the second power signal provided by the second converter is 3V.

11. The electronic device as claimed in claim 10, characterized in that, The electronic device also includes: A signal generator is used to generate a reset signal based on the first power signal; Specifically, based on the rising edge of the reset signal, the control circuit raises the enable signal to a high potential.

12. The electronic device as claimed in claim 11, characterized in that, The control circuit includes: A flip-flop, the reset port of which is used to receive the reset signal; A first N-type transistor, the gate of which is coupled to the data output port of the flip-flop, and the source of which is coupled to ground; and A first P-type transistor is coupled between the first N-type transistor and the output terminal that outputs the enable signal; The high-potential reset signal resets the flip-flop, and the data output port is reset to a low potential to turn off the first N-type transistor, while the enable signal remains at a high potential.

13. The electronic device as claimed in claim 12, characterized in that, The flip-flop also includes: Data input port; A reverse data output port, coupled to the data input port; and The clock input port is used to receive the second control signal; The low-potential second control signal triggers the flip-flop to raise the data output port to a high potential to turn on the first N-type transistor.

14. The electronic device as claimed in claim 12, characterized in that, The gate of the first P-type transistor is used to receive the first control signal. When the first control signal drops to a low potential, the first P-type transistor is turned on, and the enable signal is pulled down to a low potential through the turned-on first P-type transistor and the turned-on first N-type transistor.

15. The electronic device as claimed in claim 12, characterized in that, The control circuit also includes: A second N-type transistor, the gate of which is used to receive the detection signal or the first power supply signal, and the source of which is coupled to ground; and The second P-type transistor has its source used to receive the second power supply signal, and its gate is coupled to the ground terminal via the second N-type transistor. When the detection signal or the first power signal is raised to a high potential, both the second N-type transistor and the second P-type transistor are turned on, and the second power signal is provided as the enable signal through the turned-on second P-type transistor.

Images