Switching converter and bias circuit therefor

Abstract

The application discloses a switching converter and a bias circuit thereof. The bias circuit comprises a starting module having a first end connected with a power supply end and a second end for providing a starting current; a voltage generating module connected with the starting module, for generating at least one control voltage and a first current according to the starting current; a current mirror module connected with the voltage generating module, for providing a mirror current of the first current; and an output module connected with the voltage generating module and the current mirror module, for providing at least one bias voltage according to the mirror current of the first current and the at least one control voltage. The voltage generating module comprises a first transistor and a second transistor, and the first transistor and the second transistor both work in a sub-threshold region, so that the bias circuit can always work in a low-power-consumption mode.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and in particular to a switching converter and its bias circuit. Background Technology

[0002] DC-DC (Direct Current-Direct Current) converters, also known as switching converters, are widely used in integrated circuits as voltage converters that can change the input voltage and effectively output a fixed voltage. Switching converters can provide two different operating modes, light load and heavy load, to improve their adaptability and meet the power supply needs of more different types of downstream loads.

[0003] Figure 1 A circuit diagram of a prior art switching converter is shown. Figure 1 This is just one example of a switching converter, such as... Figure 1 As shown, the switching converter includes logic and drive circuitry 10, feedback network 20, error amplifier EA, comparator COMP, bias circuitry 100 providing bias current Ibias to comparator COMP and error amplifier EA respectively, switching transistors MD1 and MD2 connected sequentially between the input voltage Vin and ground, inductor L connected between the second terminal of switching transistor MD1 and the output voltage Vout, and compensation resistor Rea and compensation capacitor Cea connected sequentially between the output terminal of error amplifier EA and ground. Both error amplifier EA and comparator COMP are implemented using operational amplifier circuitry 200.

[0004] In the prior art, when a switching converter operates in light-load mode, in order to improve efficiency, some internal circuits, such as the comparator COMP, error amplifier EA, and bias circuit 100, need to be switched to low-power or even sleep mode to reduce quiescent current and improve light-load efficiency. However, when the switching converter switches from light-load mode to heavy-load mode, it is necessary to wake up these circuits in sleep mode and switch the circuits in low-power mode to normal mode. This takes a long time, resulting in slow load transient response of the switching converter and large negative voltage spikes in the output voltage.

[0005] Therefore, a new switching converter is needed to solve the above problems. Summary of the Invention

[0006] In view of the above problems, the purpose of the present invention is to provide a switching converter and its bias circuit, so that the bias circuit can always operate in a low power mode.

[0007] According to one aspect of the present invention, a bias circuit for a switching converter is provided, comprising: a startup module having a first terminal connected to a power supply terminal and a second terminal providing a startup current; a voltage generation module connected to the startup module for generating at least one control voltage and a first current according to the startup current; a current mirror module connected to the voltage generation module for providing a mirror current of the first current; and an output module connected to the voltage generation module and the current mirror module, and providing at least one bias voltage according to the mirror current of the first current and the at least one control voltage, wherein the voltage generation module includes a first transistor and a second transistor, both of which operate in the subthreshold region.

[0008] Optionally, the startup module is configured to provide a startup current to the voltage generation module when the power supply terminal is powered on.

[0009] Optionally, the voltage generation module further includes: a first resistor, a second resistor, and a third resistor connected sequentially between the second terminal of the first transistor and a reference ground, wherein the first terminal of the first transistor is connected to the startup current and the current mirror module, the second terminal is connected to a first node through the first resistor, and the control terminal is connected to the control terminal of the second transistor; the first terminal of the second transistor is connected to the current mirror module, the second terminal is connected to the first node, and the control terminal is connected to its first terminal, wherein the control terminal of the second transistor provides a first control voltage, and the common node of the second resistor and the third resistor provides a second control voltage.

[0010] Optionally, the output module includes: a third transistor, with its first terminal connected to the mirror current and its control terminal connected to the first control voltage; a fourth transistor, with its first terminal connected to the second terminal of the third transistor, its second terminal connected to reference ground, and its control terminal connected to the second control voltage; a first filtering module for filtering the voltage at the first terminal of the third transistor to provide a first bias voltage; and a second filtering module for filtering the voltage at the first terminal of the fourth transistor to provide a second bias voltage.

[0011] According to another aspect of the present invention, a switching converter is provided, comprising: a power circuit including at least one switching transistor and an inductor; an error amplifier for comparing a feedback voltage of the output voltage of the switching converter with a reference voltage to generate an error signal; a comparator for comparing the error signal with a ramp signal and controlling the on and off states of the at least one switching transistor according to the comparison result; and a bias circuit as described in any one of claims 1-4 for providing bias voltages to the error amplifier and the comparator respectively, wherein the error amplifier and the comparator are implemented by an operational amplifier circuit.

[0012] Optionally, the operational amplifier circuit includes: an input module for receiving a differential input signal; and a bias module connected to the input module at a second node for providing a bias current to the input module according to the bias voltage. The bias module includes: a fifth transistor, a fourth resistor, and a sixth transistor connected in series between the input module and a reference ground. The control terminal of the fifth transistor is connected to the bias voltage, and the control terminal of the sixth transistor is connected to a control signal.

[0013] Optionally, the control signal is used to control the switching converter to switch between light load mode and heavy load mode.

[0014] Optionally, the operational amplifier circuit further includes a fifth resistor connected between the second terminal of the fifth transistor and ground.

[0015] Optionally, the operational amplifier circuit is turned off when the switching converter operates in light-load mode and turned on when the switching converter operates in heavy-load mode.

[0016] Optionally, the operational amplifier circuit operates in a low-current mode when the switching converter operates in a light-load mode and in a high-current mode when the switching converter operates in a heavy-load mode.

[0017] The present invention provides a switching converter and its bias circuit. The bias circuit includes a voltage generation module, which comprises a first transistor and a second transistor that operate continuously in the subthreshold region. The voltage generation module has extremely low current, and by providing current to the first node through the first and second transistors operating in the subthreshold region, the power consumption of the voltage generation module is minimized. Therefore, the bias circuit can always operate in a low-power mode. When the bias circuit is applied to the switching converter, the bias voltage it provides is a fixed value. When the switching converter switches from a light load to a heavy load, the bias circuit does not need to switch the bias voltage value. The comparator's bias module can quickly reach a steady state through the bias voltage provided by the bias circuit, thereby improving the transient response speed and reducing the negative impulse (dropout) of the output voltage. Attached Figure Description

[0018] The above and other objects, features and advantages of the present invention will become more apparent from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0019] Figure 1 A circuit diagram of a prior art switching converter is shown;

[0020] Figure 2 A circuit diagram of the bias circuit of a prior art switching converter is shown;

[0021] Figure 3A circuit diagram of the operational amplifier circuit of a prior art switching converter is shown;

[0022] Figure 4 A schematic diagram showing the tail current of the operational amplifier circuit of a prior art switching converter as a function of a control signal is shown.

[0023] Figure 5 A circuit diagram of a switching converter according to an embodiment of the present invention is shown;

[0024] Figure 6 A circuit diagram of the bias circuit of a switching converter according to an embodiment of the present invention is shown;

[0025] Figure 7 A circuit diagram of the operational amplifier circuit of a switching converter according to a first embodiment of the present invention is shown;

[0026] Figure 8 A circuit diagram of the operational amplifier circuit of a switching converter according to a second embodiment of the present invention is shown;

[0027] Figure 9 A comparison diagram is shown showing the tail current of an operational amplifier circuit of a switching converter according to an embodiment of the present invention and an operational amplifier circuit of a prior art switching converter as a function of a control signal. Detailed Implementation

[0028] Various embodiments of the invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements or modules are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0029] It should be understood that, in the following description, "circuit" may include single or combined hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by the programmable circuit. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it may be directly coupled or connected to the other element, or there may be intermediate elements; the connection between elements may be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0030] Furthermore, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0031] In this application, a MOS transistor (Metal-Oxide-Semiconductor Field-Effect Transistor) includes a first terminal, a second terminal, and a control terminal. For example, the first terminal, second terminal, and control terminal of a PMOS transistor can be the source, drain, and gate, respectively, and the first terminal, second terminal, and control terminal of an NMOS transistor can be the drain, source, and gate, respectively.

[0032] Figure 2 A circuit diagram of the bias circuit of a prior art switching converter is shown. For example... Figure 2 As shown, the bias circuit 100 includes a current generating circuit 110, a mirror circuit 120, and a mirror circuit 130.

[0033] The current generating circuit 110 includes an operational amplifier amp, transistors mn1 and mn2, and resistors R1 and R2. The positive input terminal of the operational amplifier amp is connected to the reference voltage Vref, the negative input terminal is connected to the second terminal of transistor mn2, and the output terminal is connected to the control terminal of transistor mn2. The first terminal of transistor mn2 is used to provide input current to the mirror circuit 120. The second terminal of transistor mn2 is also grounded via resistor R2 to transistor mn1, and also grounded via resistor R1. The operating mode of the operational amplifier amp and the on / off state of transistor mn1 are controlled by the control signal S. Resistor R1 is greater than resistor R2.

[0034] The mirror circuit 120 includes transistors mp1-mp3. The second terminal of transistor mp1 is connected to the first terminal of transistor mn2. Transistor mp2 is used to mirror the input current of transistor mp1 and outputs to the mirror circuit 130. Transistor mp3 is used to mirror the input current of transistor mp1 and provides bias current Ibias1 from its second terminal. Bias current Ibias1 can be used to bias comparator COMP or error amplifier EA.

[0035] The mirror circuit 130 includes transistors mn3-mn4. The first terminal of transistor mn3 is connected to the second terminal of transistor mp2. The first terminal of transistor mn3 is used to receive the output current of transistor mp2. Transistor mn4 is used to mirror the input current of transistor mn3 and its first terminal provides bias current Ibias2. Bias current Ibias2 can be used to bias comparator COMP or error amplifier EA.

[0036] Among them, there is a capacitor C0 between the output terminal of the operational amplifier amp and ground, a capacitor C2 between the control terminal of transistors mp1 and mp2 and the power supply terminal VDD, and a capacitor C1 between the control terminal of transistors mn3 and mn4 and the reference ground. Capacitors C0-C2 are filter capacitors or parasitic capacitances of transistors.

[0037] The control signal S is used to control the switching converter to switch between light load mode and heavy load mode. When the switching converter switches between light load mode and heavy load mode, the current value of bias current Ibias1 (Ibias2) also needs to switch. At this time, the voltage on parasitic capacitors C0, C1 and C2 will switch from one steady state to another steady state. This process requires current charging and is relatively slow, which results in a relatively long time for bias currents Ibias1 and Ibias2 to establish to the correct current value.

[0038] Figure 3 A circuit diagram of the operational amplifier circuit of a prior art switching converter is shown, such as... Figure 3 As shown, the operational amplifier circuit 200 includes an input module 210 and a bias module 220.

[0039] The input module 210 includes transistors mn5-mn6 forming an input transistor pair and transistors mp4-mp5 forming a common source cascode transistor pair. The bias module 220 includes transistors mn7-mn8 forming a current mirror.

[0040] In bias module 220, transistor mn7 receives bias current Ibias1 (Ibias2), and transistor mn8 mirrors the bias current Ibias1 (Ibias2) into bias current Ibias3 to provide to the second terminals of transistors mn5 and mn6. In input module 210, the control terminals of transistors mn5 and mn6 receive differential input signals IN1 and IN2, respectively. The common node of transistors mn6 and mn5 provides the output signal OUT.

[0041] Among them, there is a capacitor C3 between the control terminals of transistors mn7 and mn8 and the reference ground. Capacitor C3 is either a filter capacitor or a parasitic capacitance of the transistor. When the switching converter switches between light load mode and heavy load mode, the current value of bias current Ibias1 (Ibias2) also needs to switch. At this time, the voltage on parasitic capacitor C3 will switch from one steady state to another steady state. This process requires current charging, which is slow, resulting in a relatively long time for bias current Ibias3 to establish to the correct current value.

[0042] When the switching converter enters light-load mode, the control signal S switches from 1 to 0, the operational amplifier amp switches to low-power mode, and transistor mn1 is turned off. Because resistor R1 > R2, both bias currents Ibias1 and Ibias2 decrease, and the quiescent currents of error amplifier EA and comparator COMP also decrease synchronously. If a higher quiescent current is required, the bias circuit 100 also needs to further reduce the current, which will switch the size ratio of transistors mn3 and mn4 to a smaller value, making the quiescent current of error amplifier EA and comparator COMP even smaller. When the switching converter quickly switches from light-load to heavy-load, the error amplifier EA and comparator COMP need to be quickly established; otherwise, the output voltage Vout of the switching converter will have a large negative overshoot. However, because the voltage across parasitic capacitors C0, C1, C2, and C3 transitions from one steady state to another, requiring a longer charging time, this increases the settling time of operational amplifier amp, bias currents Ibias1, Ibias2, and Ibias3, comparator COMP, and error amplifier EA. This results in a slower transient response of the switching converter and a larger negative impulse in the output voltage Vout. Furthermore, in the heavy-load mode of the switching converter, bias circuit 100 cannot operate in low-power mode; otherwise, noise interference will cause abnormal outputs in comparator COMP and error amplifier EA, leading to higher power consumption of the switching converter.

[0043] Figure 4 A schematic diagram showing the variation of the tail current of the operational amplifier circuit in a prior art switching converter with the mode control signal is shown, such as... Figure 4 As shown, when the switching converter switches between light load mode and heavy load mode, that is, when the control signal S switches levels, the tail current of the operational amplifier circuit 200, i.e. the bias current Ibias3, takes a long time to reach steady state.

[0044] Figure 5 A circuit diagram of a switching converter according to an embodiment of the present invention is shown. Figure 5 This is merely one example of a switching converter. Figure 5As shown, the switching converter includes logic and drive circuitry 10, feedback network 20, error amplifier EA, comparator COMP, bias circuitry 300 providing bias voltages Vbias1 and Vbias2 to comparator COMP and error amplifier EA respectively, switching transistors MD1 and MD2 connected sequentially between the input voltage Vin and ground, inductor L connected between the second terminal of switching transistor MD1 and the output voltage Vout, and compensation resistor Rea and compensation capacitor Cea connected sequentially between the output terminal of error amplifier EA and ground. The error amplifier EA and comparator COMP are implemented by operational amplifier circuitry 400 or 500.

[0045] Of course, the present invention is not limited to this. The present invention is also applicable to asynchronous rectified switching converters, in which one of the switching transistors MD1 and MD2 is replaced by a rectifier diode.

[0046] Figure 6 A circuit diagram of the bias circuit of a switching converter according to an embodiment of the present invention is shown, as follows: Figure 6 As shown, the bias circuit 300 includes a startup module 310, a current mirror module 320, a voltage generation module 330, and an output module 340.

[0047] The startup module 310 has a first terminal connected to the power supply terminal VDD and a second terminal providing startup current. The startup module 310 is configured to provide startup current to the voltage generation module 330 when the power supply terminal VDD is powered on, and to shut down after the power supply terminal VDD is powered on.

[0048] The voltage generation module 330 is connected to the startup module 310 and is used to generate at least one control voltage and a current I1 based on the startup current. The voltage generation module 330 includes transistors m4 and m5 and resistors Ra, Rb, and Rc. The first terminal of transistor m5 is connected to the mirror current I1, and the first terminal of transistor m5 is also connected to its control terminal. The second terminal of transistor m5 is connected to node A. The first terminal of transistor m4 is connected to the startup current, and the control terminal of transistor m4 is connected to the control terminal of transistor m5. The second terminal of transistor m4 is connected to node A through resistor Ra. Resistors Rb and Rc are connected sequentially between node A and reference ground. The control terminal of transistor m4, i.e., node G, provides the control voltage VG, and the common node B of resistors Rb and Rc provides the control voltage VB.

[0049] The current mirror module 320 is connected to the voltage generation module 330 and is used to provide a mirror current I2 for the current I1. The current mirror module 320 includes transistors m1-m3. The first terminal of transistor m1 is connected to the power supply terminal VDD, the second terminal of transistor m1 is connected to the first terminal of transistor m4, and the second terminal of transistor m1 is also connected to its control terminal. The first terminal of transistor m2 is connected to the power supply terminal VDD, the control terminal of transistor m2 is connected to the control terminal of transistor m1, and the second terminal of transistor m2 receives the current I1. The first terminal of transistor m3 is connected to the power supply terminal VDD, the control terminal of transistor m3 is connected to the control terminal of transistor m1, and the second terminal of transistor m3 provides the mirror current I2.

[0050] Furthermore, the gate-source voltage Vgs_m4 of transistor m4 is less than its threshold voltage Vth_m4, and the gate-source voltage Vgs_m5 of transistor m5 is less than its threshold voltage Vth_m5. Therefore, both transistor m4 and transistor m5 operate in the subthreshold region, with extremely low current and low power consumption.

[0051] Output module 340 is connected to current mirror module 320 and voltage generation module 330, and is used to provide at least one bias voltage based on the mirrored current I2 and at least one control voltage. Specifically, output module 340 includes transistors m6 and m7 connected between the second terminal of transistor m3 and ground, and filter modules 341 and 342. The control terminal of transistor m6 receives control voltage VG, and the control terminal of transistor m7 receives control voltage VB. The voltage at the first terminal of transistor m6 is filtered by filter module 341 to obtain bias voltage Vbias1, and the voltage at the first terminal of transistor m7 is filtered by filter module 342 to obtain bias voltage Vbias2.

[0052] The expression for the bias voltage Vbias1 is:

[0053]

[0054] The expression for the bias voltage Vbias2 is:

[0055]

[0056] Where Vgs_m5 is the gate-source voltage of transistor m5, Vgs_m6 is the gate-source voltage of transistor m6, Vgs_m7 is the gate-source voltage of transistor m7, (W / L)5 is the aspect ratio of transistor m5, (W / L)4 is the aspect ratio of transistor m4, q is the charge of an electron, k is the Boltzmann constant, and T is the thermodynamic temperature.

[0057] Furthermore, The current IA flowing into node A is equal to the current flowing through resistor Ra and the current at the second terminal of transistor m5.

[0058] The filter module 341 includes a filter resistor R1 connected between the first terminal of transistor m6 and the output terminal of bias voltage Vbias1, and a filter capacitor C1 connected between the output terminal of bias voltage Vbias1 and reference ground.

[0059] The filter module 342 includes a filter resistor R2 connected between the first terminal of transistor m7 and the output terminal of bias voltage Vbias2, and a filter capacitor C2 connected between the output terminal of bias voltage Vbias2 and reference ground.

[0060] The bias circuit 300 and voltage generation module 330 provided in this embodiment of the invention have transistors m4 and m5 that operate continuously in the subthreshold region, with extremely low current. Current is supplied to node A through transistors m4 and m5, resulting in low power consumption for the voltage generation module 330, allowing it to operate in a low-power mode. Furthermore, the bias voltages Vbias1 and Vbias2 provided by the output module 350 are both RC-filtered before output, providing strong noise immunity.

[0061] Figure 7 A circuit diagram of the operational amplifier circuit of a switching converter according to a first embodiment of the present invention is shown. Figure 7 As shown, the operational amplifier circuit 400 includes an input module 410 and a bias module 420 that provides a bias current Ibias4 to the input module 410, wherein the input module 410 and the bias module 420 are connected to node E.

[0062] The input module 410 includes transistors m11 and m12 forming a current mirror, and transistors m13 and m14 forming a common-source, common-gate pair. Transistors m11 and m13 are sequentially connected between the power supply terminal VDD and node E, and transistors m12 and m14 are sequentially connected between the power supply terminal VDD and node E. The control terminals of transistors m11 and m12 are connected to the second terminal of transistor m11, and the control terminals of transistors m13 and m14 are respectively connected to differential input signals IN1 and IN2.

[0063] The bias module 420 has an input terminal for receiving bias voltages Vbias1 (Vbias2) and an output terminal for providing bias current Ibias4. The bias module 420 includes a transistor m15, a resistor R1, and a transistor m16 connected sequentially between its output terminal and ground, and a capacitor C3 connected between its input terminal and ground. The control terminal of transistor m15 is connected to its input terminal, and the control terminal of transistor m16 is connected to a control signal S. The capacitor C3 is either a filter capacitor or a parasitic capacitance of the transistor.

[0064] The switching converter using bias circuit 300 and operational amplifier circuit 400 has bias voltage Vbias1 or bias voltage Vbias2 provided by bias circuit 300 to operational amplifier circuit 400. When the switching converter enters light load mode, control signal S = 0, transistor m16 is turned off, bias current Ibias4 is 0, and operational amplifier circuit 400 is turned off. When the switching converter switches from light load to heavy load, control signal S switches to 1, transistor m16 is turned on, bias current Ibias4 is the current flowing through resistor R1, and operational amplifier circuit 400 is turned on. During the load change process of the switching converter, because the bias circuit 300 always operates in low power mode, there is no need to switch the voltage value of the bias voltage Vbias1 (Vbias2) provided by the bias circuit 300, thus saving the settling time of capacitors C0-C3. Therefore, when the control signal S switches from 0 to 1, the bias current Ibias4 of the operational amplifier circuit 400 will be established quickly, and the operational amplifier circuit 400 will also be established quickly. Therefore, compared with the prior art, the transient response speed of the switching converter provided by the present invention is much faster.

[0065] Figure 8 A circuit diagram of the operational amplifier circuit of a switching converter according to a second embodiment of the present invention is shown. Figure 8 As shown, the operational amplifier circuit 500 has a similar structure to the operational amplifier circuit 400. The only difference is that the bias module 520 of the operational amplifier circuit 500 also has a resistor R2 between the common node F of the resistor R1 and the transistor m15 and ground. The resistance value of the resistor R2 is greater than the resistance value of the resistor R1.

[0066] Unlike operational amplifier circuit 400, which can switch between on and off modes, operational amplifier circuit 500 can switch between high-current and low-current modes. Specifically, when S=0 and transistor m16 is off, the bias current Ibias5 is the current flowing through resistor R2. Since the bias current Ibias5 is relatively small, the quiescent current of operational amplifier circuit 500 is also small, resulting in low power consumption. When S is switched to 1, transistor m16 is turned on, and the bias current Ibias5 rapidly increases to the sum of the currents flowing through resistors R1 and R2. At this time, the quiescent current of operational amplifier circuit 500 is also larger, resulting in higher power consumption.

[0067] Figure 9 A comparison graph showing the tail current variation with control signal of an operational amplifier circuit of a switching converter according to an embodiment of the present invention and an operational amplifier circuit of a prior art switching converter is shown. Figure 9As shown, regardless of whether the control signal S switches from 1 to 0 or from 0 to 1, the time for the bias current, i.e. the tail current, of the operational amplifier circuit 400 or the operational amplifier circuit 500 to reach steady state is much faster than that of the prior art. Therefore, the switching converter provided in this embodiment of the invention has a much faster transient response speed when the load changes than that of the prior art, which can reduce the negative impulse amplitude of the output voltage Vout.

[0068] Of course, the operational amplifier circuit 400, operational amplifier circuit 500 and bias circuit 300 provided in the embodiments of the present invention can be used in any integrated circuit, and are not limited to switching converters.

[0069] In the switching converter provided by this embodiment, transistors m4 and m5 in the bias circuit 300 always operate in the subthreshold region, with low current. Current is supplied to node A through transistors m4 and m5 operating in the subthreshold region, resulting in low power consumption of the voltage generation module 330. Therefore, the bias circuit 300 can always operate in a low-power mode, providing a fixed bias voltage. When the switching converter switches from light load to heavy load, the bias circuit does not need to switch the bias voltage value. The bias module 420 of the operational amplifier circuit 400 can quickly reach a steady state through the bias voltage provided by the bias circuit 300, accelerating the transient response speed of the switching converter from light load to heavy load and reducing the negative impulse amplitude (drop amplitude) of the output voltage Vout. Furthermore, both bias voltages Vbias1 and Vbias2 are output after RC filtering, providing strong noise immunity.

[0070] As described above, these embodiments of the present invention do not exhaustively describe all details, nor do they limit the invention to specific embodiments. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to effectively utilize the invention and its modifications. The scope of protection of this invention should be determined by the scope defined in the claims and their equivalents.

Claims

1. A bias circuit for a switching converter, comprising: A startup module having a first terminal connected to a power supply terminal and a second terminal providing startup current; A voltage generation module, connected to the startup module, is used to generate at least one control voltage and a first current based on the startup current; A current mirror module, connected to the voltage generation module, is used to provide a mirror current of the first current; The output module is connected to the voltage generation module and the current mirror module, and provides at least one bias voltage based on the mirror current of the first current and the at least one control voltage. The voltage generation module includes a first transistor and a second transistor, both of which operate in the subthreshold region. The voltage generation module further includes: A first resistor, a second resistor, and a third resistor are sequentially connected between the second terminal of the first transistor and the reference ground. The first terminal of the first transistor is connected to the startup current and the current mirror module, the second terminal is connected to the first node through the first resistor, and the control terminal is connected to the control terminal of the second transistor. The first terminal of the second transistor is connected to the current mirror module, the second terminal is connected to the first node, and the control terminal is connected to its first terminal. The control terminal of the second transistor provides a first control voltage, and the common node of the second resistor and the third resistor provides a second control voltage.

2. The bias circuit according to claim 1, wherein, The startup module is configured to provide a startup current to the voltage generation module when the power supply terminal is powered on.

3. The bias circuit according to claim 1, wherein, The output module includes: The third transistor has its first terminal connected to the mirror current and its control terminal connected to the first control voltage. The fourth transistor has its first terminal connected to the second terminal of the third transistor, its second terminal connected to reference ground, and its control terminal connected to the second control voltage. A first filtering module is used to filter the voltage at the first terminal of the third transistor to provide a first bias voltage; The second filtering module is used to filter the voltage at the first terminal of the fourth transistor to provide a second bias voltage.

4. A switching converter, comprising: A power circuit, the power circuit including at least one switching transistor and an inductor; An error amplifier is used to compare the feedback voltage of the output voltage of the switching converter with a reference voltage to generate an error signal; A comparator is used to compare the error signal with a ramp signal and control the on and off of at least one switching transistor based on the comparison result. The bias circuit as described in any one of claims 1-3 is used to provide bias voltages to the error amplifier and the comparator, respectively. The error amplifier and the comparator are implemented through operational amplifier circuits.

5. The switching converter according to claim 4, wherein, The operational amplifier circuit includes: The input module is used to receive differential input signals; A bias module, connected to the input module at the second node, is used to provide a bias current to the input module based on the bias voltage. The bias module includes: A fifth transistor, a fourth resistor, and a sixth transistor are connected in series between the input module and the reference ground. The control terminal of the fifth transistor is connected to the bias voltage, and the control terminal of the sixth transistor is connected to the control signal.

6. The switching converter according to claim 5, wherein, The control signal is used to control the switching converter to switch between light load mode and heavy load mode.

7. The switching converter according to claim 6, wherein, The operational amplifier circuit also includes: A fifth resistor connected between the second terminal of the fifth transistor and ground.

8. The switching converter according to claim 5, wherein, The operational amplifier circuit is turned off when the switching converter is operating in light-load mode and turned on when the switching converter is operating in heavy-load mode.

9. The switching converter according to claim 7, wherein, The operational amplifier circuit operates in low-current mode when the switching converter is in light-load mode and in high-current mode when the switching converter is in heavy-load mode.

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