A load detection circuit, an electronic circuit, an electronic device

Abstract

The application provides a load detection circuit for detecting a load circuit, wherein the load circuit comprises a driving power tube; the detection circuit comprises a current mirror module, a voltage comparison module and a comparison power tube; the current mirror module is used for providing a constant reference current for the voltage comparison module; the voltage comparison module comprises a first triode and a second triode; the first triode is used for generating a fixed first base-emitter voltage according to the reference current; the second triode is used for comparing a second base-emitter voltage of the second triode with the first base-emitter voltage; when the second base-emitter voltage is smaller than the first base-emitter voltage, the collector voltage of the second triode is raised to a first threshold value, and it is judged that the load circuit is disconnected; and the load current after the load circuit is disconnected is obtained through the comparison power tube; wherein the parameters of the first triode and the second triode are the same, and the parameters of the comparison power tube and the driving power tube are the same.

Description

Technical Field

[0001] This invention relates to the field of open circuit detection, and more particularly to a load detection circuit, electronic circuit, and electronic device. Background Technology

[0002] In analog chips used in automotive and industrial applications, to protect the low-side and high-side drive power transistors in the event of an open circuit in the load circuit, many chips provide load detection functionality. This functionality detects the load current to determine if an open circuit has occurred. Commonly used methods in the market include... Figure 1 The main problem is that when the driving power transistor requires a large drive current, its resistance is very small; if the load circuit is open when the driving power transistor is turned on, the drain-source voltage of the driving power transistor is generally only about 10mV, or even less. Figure 1 In this method, an operational amplifier is used to make the voltages Va and Vb equal. Thus, the current Isense flowing through the Sense MOSFET circuit is equal to a proportionally reduced load current ILOAD, which is then compared with a reference current IRef. When ISense is greater than IRef, causing V_OL to rise, an open circuit in the load circuit is detected. However, the error voltage inherent in the operational amplifier or comparator itself can severely affect the detection accuracy; this error voltage is typically 3-5mV. To improve detection accuracy, methods can be used to eliminate the error voltage, but this increases the complexity of the circuit. Summary of the Invention

[0003] This invention provides a load detection circuit, electronic circuit, and electronic device that accurately detects whether an open circuit has occurred in the load circuit with a simple circuit design.

[0004] According to a first aspect of the present invention, a load detection circuit is provided for detecting the load of a load circuit, wherein the load circuit includes a drive power transistor, and the load in the load circuit is connected to the input terminal of the drive power transistor; the detection circuit includes:

[0005] The current mirror module includes a first current mirror branch, a second current mirror branch, and a third current mirror branch; wherein, a current source is provided on the first current mirror branch to provide a constant reference current for the first current mirror branch; when the load is operating normally, the current flowing through the second current mirror branch and the third current mirror branch is equal to the reference current;

[0006] The voltage comparison module includes a first transistor and a second transistor. The collector of the first transistor is connected to the output terminal of the second current mirror branch, its emitter is connected to the first terminal of the driving power transistor, and its base is connected to the base of the second transistor. The collector of the second transistor is connected to the output terminal of the third current mirror branch.

[0007] The comparison power transistor has its first terminal connected to the emitter of the second transistor, its second terminal connected to the second terminal of the driving power transistor, and its third terminal connected to the third terminal of the driving power transistor; wherein the parameters of the first transistor are the same as the parameters of the second transistor, and the parameters of the comparison power transistor are the same as the parameters of the driving power transistor.

[0008] The collector of the second transistor serves as a voltage detection port. By detecting the voltage at the voltage detection port, the condition of the load circuit is monitored. When the voltage at the voltage detection port exceeds a first threshold, the load circuit is disconnected.

[0009] Optionally, the load is a non-inductive load; the first terminal of the driving power transistor is the input terminal, and the first terminal of the comparison power transistor is the input terminal; the second terminal of the driving power transistor is the output terminal, and the second terminal of the comparison power transistor is the output terminal.

[0010] Optionally, the load is an inductive load; the first terminal of the driving power transistor is the output terminal, and the first terminal of the comparator power transistor is the output terminal; the second terminal of the driving power transistor is the input terminal, and the second terminal of the comparator power transistor is the input terminal.

[0011] Optionally, the first current mirror branch includes a first MOSFET; the second current mirror branch includes a second MOSFET; and the third MOSFET includes a third MOSFET.

[0012] The first terminal of the first MOS transistor is connected to the current source and its own gate; the gate of the first MOS transistor is connected to the gate of the second MOS transistor and the gate of the third MOS transistor.

[0013] The first end of the third MOS transistor is connected to the collector of the second transistor;

[0014] The second terminals of the first MOSFET, the second MOSFET, and the third MOSFET are all connected to the power supply voltage.

[0015] Optionally, the first MOS transistor, the second MOS transistor, and the third MOS transistor are all PMOS transistors.

[0016] Optionally, both the first transistor and the second transistor are NPN transistors.

[0017] Optionally, the driving power transistor and the comparator power transistor are PMOS transistors.

[0018] Optionally, the driving power transistor and the comparator power transistor are NMOS transistors.

[0019] According to a second aspect of the present invention, an electronic circuit is provided, which includes the load detection circuit provided by the first aspect and alternative solutions of the present invention.

[0020] According to a third aspect of the present invention, an electronic device is provided, comprising the electronic circuitry provided in the second aspect and alternative embodiments of the present invention.

[0021] This invention provides a load detection circuit. In the load detection circuit, the collector of a first transistor is connected to the output terminal of a second current mirror branch, its emitter is connected to the first terminal of a driving power transistor, and its base is connected to the base of the second transistor. The collector of the second transistor is connected to the output terminal of a third current mirror branch, and the emitter of the second transistor is connected to the first terminal of a comparison power transistor. By replacing the comparator in the prior art with the circuit structure composed of the first and second transistors, the detection accuracy can be greatly improved without adding an error voltage elimination circuit compared to the prior art. Furthermore, the fact that the parameters of the first and second transistors are the same, and the parameters of the comparison power transistor and the driving power transistor are the same, also improves the detection accuracy. Attached Figure Description

[0022] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0023] Figure 1 This is a load detection circuit based on existing technology;

[0024] Figure 2 A schematic diagram of the load detection circuit provided in an embodiment of the present invention. Figure 1 ;

[0025] Figure 3 A schematic diagram of the load detection circuit provided in an embodiment of the present invention. Figure 2 .

[0026] Figure label:

[0027] 10-Current Mirror Module;

[0028] 101 - First current mirror branch;

[0029] 102 - Second current mirror branch;

[0030] 103 - Third current mirror branch;

[0031] 20 - Voltage Comparison Module;

[0032] M1 - Drive power transistor;

[0033] M2 - Comparator power transistor;

[0034] M3 - First MOSFET;

[0035] M4 - Second MOSFET;

[0036] M5 - Third MOSFET;

[0037] B1 - First transistor;

[0038] B2 - Second transistor;

[0039] ISK - Current Source;

[0040] Iref - Reference current;

[0041] ILOAD - Load current;

[0042] Vb - First comparison voltage;

[0043] Va - Second comparison voltage;

[0044] Vbe0 - First base-emitter voltage;

[0045] Vbe1 - Second base-emitter voltage;

[0046] V_OL - Voltage to be detected;

[0047] VB - Power Supply Terminal;

[0048] VDD - Power supply voltage. Detailed Implementation

[0049] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. The terms "first," "second," "third," "fourth," etc. (if present) in the specification, claims, and accompanying drawings of the present invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the present invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or devices.

[0050] Given that existing technologies require the addition of error voltage elimination circuits, which increases circuit design costs, this invention creatively proposes a new load detection circuit that can accurately detect whether an open circuit has occurred in the load circuit with a simple circuit design.

[0051] Please refer to Figure 2 and Figure 3 An embodiment of the present invention provides a load detection circuit for detecting the load of a load circuit, wherein the load circuit includes a drive power transistor M1, and the load in the load circuit is connected to the input terminal of the drive power transistor M1; the detection circuit includes:

[0052] The current mirror module 10 includes a first current mirror branch 101, a second current mirror branch 102, and a third current mirror branch 103; wherein, a current source ISK is provided on the first current mirror branch 101 to provide a constant reference current Iref for the first current mirror branch 101; when the load is operating normally, the current flowing through the second current mirror branch 102 and the third current mirror branch 103 is equal to the reference current Iref;

[0053] The voltage comparison module 20 includes a first transistor B1 and a second transistor B2. The collector of the first transistor B1 is connected to the output terminal of the second current mirror branch 102, its emitter is connected to the first terminal of the driving power transistor M1, and its base is connected to the base of the second transistor B2. The collector of the second transistor B2 is connected to the output terminal of the third current mirror branch 103. The transistor circuit structure is chosen here to replace the comparator in the prior art because the error voltage of the comparator is about 1mV, which is 2-4mV lower than the error voltage of the existing comparator, thus improving the detection accuracy.

[0054] The comparison power transistor M2 has its first terminal connected to the emitter of the second transistor B2, its second terminal connected to the second terminal of the driving power transistor M1, and its third terminal connected to the third terminal of the driving power transistor M1. The parameters of the first transistor B1 and the second transistor B2 are the same, and the parameters of the comparison power transistor M2 and the driving power transistor M1 are the same. Ensuring that the parameters of the first transistor and the second transistor B2 are the same is to guarantee that when Vbe is the same, both transistors B1 and B2 can withstand the same load. To reduce detection errors, the current-carrying capacity of the comparison power transistor M2 is kept the same as that of the driving power transistor M1. This also helps reduce detection errors. If the parameters of the comparison power transistor M2 and the driving power transistor M1 are different, the error changes in the equivalent resistance of the comparison power transistor M2 and the driving power transistor M1 will be inconsistent. For example, the equivalent resistance error of the comparison power transistor M2 might increase by 1Ω, while the equivalent resistance error of the driving power transistor M1 might decrease by 2Ω. When the parameters of the comparison power transistor M2 and the driving power transistor M1 are the same, the error changes in the equivalent resistance of the comparison power transistor M2 and the driving power transistor M1 will be consistent, reducing the impact of process errors on detection accuracy.

[0055] The collector of the second transistor B2 serves as a voltage detection port. The condition of the load circuit is monitored by detecting the voltage V_OL at the voltage detection port. When the voltage at the voltage detection port exceeds a first threshold, the load circuit is disconnected.

[0056] Please refer to Figure 2 In one specific implementation, the load is a non-inductive load; the first terminal of the driving power transistor M1 is the input terminal, and the first terminal of the comparison power transistor M2 is the input terminal; the second terminal of the driving power transistor M1 is the output terminal, and the second terminal of the comparison power transistor M2 is the output terminal.

[0057] Please refer to Figure 3In one specific implementation, the load is an inductive load; the first terminal of the driving power transistor M1 is the output terminal, and the first terminal of the comparison power transistor M2 is the output terminal; the second terminal of the driving power transistor M1 is the input terminal, and the second terminal of the comparison power transistor M2 is the input terminal.

[0058] Please refer to Figure 2 and Figure 3 In one specific implementation, both the driving power transistor M1 and the comparator power transistor M2 are NMOS transistors; the input terminal of the driving power transistor M1 is the drain, and the input terminal of the comparator power transistor M2 is the drain; the output terminal of the driving power transistor M1 is the source, and the output terminal of the comparator power transistor M2 is the source. Alternatively, the driving power transistor M1 and the comparator power transistor M2 can also be PMOS transistors, where the input terminal of the driving power transistor M1 is the source, and its output terminal is the drain; the input terminal of the comparator power transistor M2 is the source, and its output terminal is the drain, with everything else remaining unchanged.

[0059] In one specific embodiment, the first current mirror branch 101 includes a first MOSFET M3; the second current mirror branch 102 includes a second MOSFET M4; and the third MOSFET M5 includes a third MOSFET M5.

[0060] The first terminal of the first MOS transistor M3 is connected to the current source ISK and its own gate; the gate of the first MOS transistor M3 is connected to the gate of the second MOS transistor M4 and the gate of the third MOS transistor M5.

[0061] The first end of the third MOS transistor M5 is connected to the collector of the second transistor B2;

[0062] The second terminal of the first MOSFET M3, the second terminal of the second MOSFET M4, and the second terminal of the third MOSFET M5 are all connected to the power supply voltage VDD.

[0063] In one specific implementation, the first MOS transistor M3, the second MOS transistor M4, and the third MOS transistor M5 are all PMOS transistors.

[0064] In one specific implementation, both the first transistor B1 and the second transistor B2 are NPN transistors.

[0065] The specific working principle of the load detection circuit provided in this embodiment of the invention is as follows: Please refer to... Figure 2The load is a non-inductive load, and the driving power transistor M1 and the comparator power transistor M2 are NMOS transistors; the load current ILOAD of the load circuit is input from the drain of the driving power transistor M1 to the driving power transistor M1, and a first comparison voltage Vb is generated at the drain of the driving power transistor M1; the formula for the first comparison voltage Vb is:

[0066] Vb = ILOAD * R1; where R1 is the equivalent resistance of the driving power transistor M1.

[0067] The reference current Iref is not included here because in actual circuits, the reference current Iref is negligible compared to the load current ILOAD. For example, if the load current ILOAD is initially 2 mA, the reference current Iref is only 1 μA. When the load circuit is open-circuited, the load current ILOAD drops to 1.5 mA, and the open circuit is detected. At this time, the reference current Iref is also negligible compared to the load current ILOAD.

[0068] The current source ISK of the current mirror module 10 transmits a constant reference current Iref to the second current mirror branch 102 and the third current mirror branch 103 through the first current mirror branch 101; and outputs the reference current Iref to the first transistor B1 and the second transistor B2 through the second current mirror branch 102 and the third current mirror branch 103, respectively.

[0069] The collector of the first transistor B1 is connected to its own base. In this case, the first transistor B1 acts as a forward-conducting diode. When the current flowing through the first transistor B1 is fixed, the first base-emitter voltage Vbe0 of the first transistor B1 is fixed, and its formula is:

[0070] Vbe0 = Vbase - Vb; where Vbe0 is the turn-on voltage of the first transistor B1, and Vbase is the base voltage of the first transistor and the second transistor B2.

[0071] The formula for the second base-emitter voltage Vbe1 of the second transistor B2 is:

[0072] Vbe1 = Vbase - Va; where Va is the second comparison voltage at the drain terminal of the comparison power transistor M2.

[0073] The formula for the second comparison voltage Va is:

[0074] Va = Iref * R2; where R2 is the equivalent resistance of the comparison power transistor M2.

[0075] According to Kirchhoff's voltage law, we have: Vb + Vbe0 = Vbe1 + Va

[0076] Because the parameters of the first transistor B1 and the second transistor B2 are the same, the driving current capability of the first transistor B1 is the same as that of the second transistor B2. When the load current ILOAD is normal, according to the formulas for the first comparison voltage Vb and the second comparison voltage Va, the first comparison voltage Vb is much larger than the second comparison voltage Va. Therefore, the second base-emitter voltage Vbe1 is also initially larger than the first base-emitter voltage Vbe0.

[0077] When the load circuit is open-circuited, the load current ILOAD decreases, causing the first comparison voltage Vb to gradually decrease. Since the first base-emitter voltage Vbe0 remains constant, the base voltage decreases. Because the equivalent resistance of the comparison power transistor M2 and the reference current Iref remain constant, the second comparison voltage Va remains constant, causing the second base-emitter voltage Vbe1 of the second transistor B2 to decrease until the first base-emitter voltage Vbe0 and the second base-emitter voltage Vbe1 are equal. Because the driving current capability of the first transistor B1 and the second transistor B2 are the same, the maximum current that the second transistor B2 can drive at this time is the reference current Iref. When the load current ILOAD continues to decrease, causing the second base-emitter voltage Vbe1 to decrease, the driving current capability of the second transistor B2 decreases, thereby reducing the collector current input to the second transistor B2. Meanwhile, the reference current Iref output from the third current mirror branch 103 remains unchanged. This is equivalent to a current shunting at the collector of the second transistor B2. One part of the current is input to the second transistor B2 through its collector, while the other part boosts the detection voltage V_OL at the collector of the second transistor B2. When the collector voltage of the second transistor B2 exceeds the first threshold, it outputs the load current ILOAD. The formula for calculating the load current ILOAD at this time is:

[0078] ILOAD = Iref * R2 / R1

[0079] The specific principle is as follows: According to Kirchhoff's voltage law, when the first base-emitter voltage Vbe0 and the second base-emitter voltage Vbe1 are equal, the first comparison voltage Vb and the second comparison voltage Va are also equal. This is equivalent to a critical point. When the second base-emitter voltage Vbe1 decreases a little more, it will quickly boost the voltage of the collector of the second transistor B2. Therefore, the load current ILOAD is output when the first comparison voltage Vb and the second comparison voltage Va are equal.

[0080] Please refer to Figure 3 The load is inductive, and the driving power transistor M1 and the comparator power transistor M2 are NMOS transistors. Because the load is inductive, the load current ILOAD of the load circuit flows from the drain of the driving power transistor M1 to the power supply terminal VB. Therefore, the connection relationships between the first transistor B1 and the second transistor B2 and the driving power transistor M1 and the comparator power transistor M2, respectively, also need to be adjusted. However, the method and principle of determining whether the load circuit is open-circuited by checking whether the collector voltage V_OL of the second transistor B2 exceeds the first threshold remains unchanged, and will not be elaborated here. Of course, the above examples are based on the premise that both the driving power transistor and the comparator power transistor are NMOS transistors. The driving power transistor and the comparator power transistor can also be PMOS transistors, and the determination method and principle are the same as above, and will not be elaborated here.

[0081] This invention also provides an electronic circuit, which includes the load detection circuit and other electronic circuit components.

[0082] This invention also provides an electronic device, which includes the aforementioned electronic circuit.

[0083] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A load detection circuit, characterized in that, This detection circuit is used to detect the load of a load circuit, wherein the load circuit includes a driving power transistor, and the load in the load circuit is connected to the input terminal of the driving power transistor; the detection circuit includes: The current mirror module includes a first current mirror branch, a second current mirror branch, and a third current mirror branch; wherein, a current source is provided on the first current mirror branch to provide a constant reference current for the first current mirror branch; when the load is operating normally, the current flowing through the second current mirror branch and the third current mirror branch is equal to the reference current; The voltage comparison module includes a first transistor and a second transistor. The collector of the first transistor is connected to the output terminal of the second current mirror branch, its emitter is connected to the first terminal of the driving power transistor, and its base is connected to the base of the second transistor. The collector of the second transistor is connected to the output terminal of the third current mirror branch. The comparison power transistor has its first terminal connected to the emitter of the second transistor, its second terminal connected to the second terminal of the driving power transistor, and its third terminal connected to the third terminal of the driving power transistor; wherein the parameters of the first transistor are the same as the parameters of the second transistor, and the parameters of the comparison power transistor are the same as the parameters of the driving power transistor. The collector of the second transistor serves as a voltage detection port. By detecting the voltage at the voltage detection port, the condition of the load circuit is monitored. When the voltage at the voltage detection port exceeds a first threshold, the load circuit is disconnected.

2. The load detection circuit according to claim 1, characterized in that, The load is a non-inductive load; The first terminal of the driving power transistor is the input terminal, and the first terminal of the comparison power transistor is the input terminal; the second terminal of the driving power transistor is the output terminal, and the second terminal of the comparison power transistor is the output terminal.

3. The load detection circuit according to claim 1, characterized in that, The load is an inductive load; The first terminal of the driving power transistor is the output terminal, and the first terminal of the comparator power transistor is the output terminal; the second terminal of the driving power transistor is the input terminal, and the second terminal of the comparator power transistor is the input terminal.

4. The load detection circuit according to any one of claims 1 to 3, characterized in that, The first current mirror branch includes a first MOSFET; the second current mirror branch includes a second MOSFET; and the third current mirror branch includes a third MOSFET. The first terminal of the first MOS transistor is connected to the current source and its own gate; the gate of the first MOS transistor is connected to the gate of the second MOS transistor and the gate of the third MOS transistor. The first end of the third MOS transistor is connected to the collector of the second transistor; The second terminals of the first MOSFET, the second MOSFET, and the third MOSFET are all connected to the power supply voltage.

5. The load detection circuit according to claim 4, characterized in that, The first MOS transistor, the second MOS transistor, and the third MOS transistor are all PMOS transistors.

6. The load detection circuit according to any one of claims 1 to 3, characterized in that, Both the first transistor and the second transistor are NPN transistors.

7. The load detection circuit according to claim 6, characterized in that, The driving power transistor and the comparator power transistor are PMOS transistors.

8. The load detection circuit according to claim 7, characterized in that, The driving power transistor and the comparator power transistor are NMOS transistors.

9. An electronic circuit, characterized in that, Includes the load detection circuit as described in any one of claims 1 to 8.

10. An electronic device, characterized in that, Includes the electronic circuit described in claim 9.

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