Nitride resonant tunneling diode with symmetric differential negative resistance characteristic and fabrication method thereof

Abstract

This invention discloses a symmetrical differential negative resistance characteristic gallium nitride resonant tunneling diode, mainly addressing the problems of poor reliability and consistency, and low peak-to-valley current ratio in existing non-polarized gallium nitride resonant tunneling diodes. From bottom to top, it includes a substrate, an emitter ohmic contact layer, a bottom resonant tunneling diode, a parallel layer, a top resonant tunneling diode, a collector ohmic contact layer, and a collector. A gate is disposed on the parallel layer, and an emitter is disposed on the emitter ohmic contact layer. The bottom and top resonant tunneling diodes are epitaxially grown, with the collector and emitter interconnected to form a parallel structure with the gate. When the gate bias is positive, the bottom resonant tunneling diode conducts, exhibiting a differential negative resistance effect, while the top resonant tunneling diode is cut off; when the gate bias is negative, the top resonant tunneling diode conducts, exhibiting a differential negative resistance effect, while the bottom resonant tunneling diode is cut off. This invention features symmetrical differential negative resistance characteristics and high performance consistency, making it suitable for high-speed digital circuits.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor device technology, and specifically relates to a nitride resonant tunneling diode that can be used in high-frequency terahertz radiation sources and high-speed digital logic circuits. Background Technology

[0002] Resonant tunneling diodes (RTDs) are quantum effect devices with double-barrier unipolar tunneling transport. They have attracted widespread attention due to their unique differential negative resistance characteristics and show significant application potential in high-frequency terahertz radiation sources and high-speed digital logic circuits. RTDs possess small junction capacitance and short carrier transport time, and oscillator circuits based on RTDs typically have extremely high operating frequencies, making them important solid-state electronic devices for realizing terahertz radiation sources. Currently, various materials have been used to fabricate RTDs, such as arsenide and antimony materials, and the highest oscillation frequency of the developed terahertz oscillator reaches 1.92 THz.

[0003] Nitride materials are ideal for fabricating high-frequency, high-output-power resonant tunneling diodes at room temperature due to their advantages such as high breakdown field strength, high saturated electron velocity, high thermal conductivity, thermal stability, and wide tunable bandgap. Gallium nitride (GaN) heterojunction materials exhibit significant conduction band discontinuities at the heterojunction interface, and GaN materials possess a longitudinal optical phonon energy as high as 92 meV, enabling GaN-based resonant tunneling diodes to achieve high output current and a high peak-to-valley current ratio at room temperature. Therefore, GaN-based resonant tunneling diodes have significant application prospects in high-speed broadband wireless communication, spectral imaging, terahertz detection, and security and medical applications. However, due to the central asymmetry of the crystal structure of wurtzite nitride materials, strong spontaneous polarization effects exist internally, causing the band structure of traditional GaN-based resonant tunneling diodes to bend and become asymmetrical. This results in a wide depletion region on the collector side and a quantum well on the emitter side, accumulating electrons. The output characteristics of the device are asymmetrical under forward and reverse bias, making it difficult to achieve a symmetrical differential negative resistance effect. This presents challenges for circuit design based on gallium nitride resonant tunneling diodes, often requiring additional rectifier circuits, increasing circuit design complexity, and limiting the application of gallium nitride resonant tunneling diodes in digital circuits.

[0004] To address the asymmetry in output characteristics and differential negative resistance effect of traditional wurtzite-structured gallium nitride resonant tunneling diodes under forward and reverse bias, Rong Taotao, Yang Lin'an, and others conducted theoretical calculations on gallium nitride-based resonant tunneling diodes with nonpolar-oriented wurtzite structures in their paper "Performance of resonant tunneling diodes based on the nonpolar-oriented AlGaN / GaNheterostructures." They predicted that this structure device has symmetrical differential negative resistance characteristics. However, due to the limitations of the epitaxial quality of nonpolar materials, no experimental reports on this structure device have been found to date.

[0005] Zainal, Novikov, et al., in their paper "Current-voltage characteristics of zinc-blende (cubic) Al" 0.3 Ga 0.7 The article "N / GaN double barrier resonant tunneling diodes" reports a gallium nitride resonant tunneling diode based on a polarization-free cubic zincblende structure, such as... Figure 1 As shown. It includes n from bottom to top. + GaAs substrate, GaN Epitaxial layer, n + GaN emitter ohmic contact layer, first GaN isolation layer, first AlGaN barrier layer, GaN quantum well layer, second AlGaN barrier layer, second GaN isolation layer, n + GaN collector ohmic contact layer and collector electrode, in n + A ring-shaped emitter electrode is provided on the GaN emitter ohmic contact layer. This device achieves symmetrical differential negative resistance characteristics, but it has the following drawbacks:

[0006] 1. This device is fabricated using nonpolarized cubic zincblende structure nitride material. Since cubic zincblende structure GaN is a metastable material, it is prone to phase transition under electrical stress, thermal stress, and mechanical stress, which leads to the degradation of device reliability and cannot meet the requirements of long-term high-frequency applications.

[0007] 2. The epitaxial growth technology of cubic zincblende GaN material is difficult. The interface of the double-barrier quantum well is rough and uneven. The active region interface of the fabricated device has high-density dislocation defects. These dislocations act as scattering centers and leakage channels, which will reduce the peak-to-valley current ratio of the device. In addition, the trap effect related to the interface defects leads to the unstable and non-repeating differential negative resistance effect of the device.

[0008] 3. The cubic zincblende structure of GaN heterostructure has a small discontinuous conduction band at the interface, which cannot achieve high device peak current and is not conducive to high-power applications. Summary of the Invention

[0009] The purpose of this invention is to address the shortcomings of the existing technologies by proposing a nitride resonant tunneling diode with symmetrical differential negative resistance characteristics and its fabrication method. This invention aims to achieve symmetrical differential negative resistance characteristics under both forward and reverse bias, thereby improving peak current density and device reliability, and meeting the application requirements of high-frequency oscillation sources and high-speed digital circuits.

[0010] The technical solution of this invention is implemented as follows:

[0011] 1. A nitride resonant tunneling diode with symmetrical differential negative resistance characteristics, comprising, from bottom to top, a substrate, an emitter ohmic contact layer, a first isolation layer, a first barrier layer, a first well layer, a fourth barrier layer, a fourth isolation layer, a collector ohmic contact layer, and a collector, wherein an emitter is disposed above the emitter ohmic contact layer, and a passivation layer is wrapped around these layers and the electrode, characterized in that:

[0012] A second barrier layer, a second isolation layer, a parallel layer, a third isolation layer, a third barrier layer, and a second well layer are sequentially added between the first well layer and the fourth barrier layer. A gate is provided above the parallel layer. The second barrier layer, the second isolation layer, the first isolation layer, the first barrier layer, and the first well layer constitute a bottom resonant tunneling diode. The third isolation layer, the third barrier layer, the second well layer, the fourth barrier layer, and the fourth isolation layer constitute a top resonant tunneling diode. The top resonant tunneling diode is realized by vertical epitaxial growth of the parallel layer on the bottom resonant tunneling diode.

[0013] The emitter and collector are connected by an interconnecting metal and form a parallel structure with the gate. When the gate bias is positive, the bottom resonant tunneling diode conducts and exhibits a differential negative resistance effect, while the top diode is reverse-biased and cut off. When the gate bias is negative, the top resonant tunneling diode conducts and exhibits a differential negative resistance effect, while the bottom diode is reverse-biased and cut off.

[0014] Furthermore, the thickness of both the first barrier layer and the second barrier layer is 1nm-3nm, and they are both made of any one of AlN, AlGaN, InAlN, ScAlN, YAlN, BAlN, AlPN, and BPN materials.

[0015] Furthermore, the thickness of the first potential well layer is 1nm-3nm, and it is made of any one of GaN, InGaN, ScGaN, YGaN, and BGaN materials;

[0016] Furthermore, the thickness of both the first and second isolation layers is 4nm-15nm, and they are both made of any one of GaN, InGaN, ScGaN, YGaN, and BGaN materials.

[0017] Furthermore, the thickness of the third barrier layer and the fourth barrier layer is 1nm-3nm, and they are both made of any one of AlN, AlGaN, InAlN, ScAlN, YAlN, BAlN, AlPN, and BPN materials.

[0018] The thickness of the second potential well layer is 1nm-3nm, and it can be any one of GaN, InGaN, ScGaN, YGaN, and BGaN materials;

[0019] The thickness of the third and fourth isolation layers is 4nm-15nm, and they are both made of any one of GaN, InGaN, ScGaN, YGaN, and BGaN materials.

[0020] Furthermore, the thickness of both the emitter ohmic contact layer and the collector ohmic contact layer is 50nm-200nm, and both employ a doping concentration of 1x10⁻⁶. 19 cm -3 -1x10 20 cm -3 Any one of the following: n-type GaN, n-type InGaN, n-type ScGaN, n-type YGaN, and n-type BGaN materials;

[0021] Furthermore, the thickness of the parallel layer is 50nm-200nm, and it uses a doping concentration of 1x10⁻⁶. 19 cm -3 -1x10 20 cm -3 Any one of the following: n-type GaN, n-type InGaN, n-type ScGaN, n-type YGaN, and n-type BGaN materials;

[0022] Furthermore, the substrate is made of any one of the following materials: sapphire, silicon, silicon carbide, diamond, gallium nitride, aluminum nitride, boron nitride, and gallium oxide.

[0023] Furthermore, the passivation layer is made of any one of SiN, Al2O3, or HfO2 materials.

[0024] 2. A method for fabricating a nitride resonant tunneling diode with the above-mentioned symmetrical differential negative resistance characteristics, characterized by comprising the following steps:

[0025] 1) Using molecular beam epitaxy, an emitter ohmic contact layer with a thickness of 50nm-200nm is grown on a substrate.

[0026] 2) Using molecular beam epitaxy, a first isolation layer with a thickness of 4nm-15nm is grown on the emitter ohmic contact layer;

[0027] 3) Using molecular beam epitaxy, a first barrier layer with a thickness of 1nm-3nm is grown on the first isolation layer;

[0028] 4) Using molecular beam epitaxy, a first potential well layer with a thickness of 1nm-3nm is grown on the first barrier layer;

[0029] 5) Using molecular beam epitaxy, a second barrier layer with a thickness of 1 nm-3 nm is grown on the first potential well layer;

[0030] 6) Using molecular beam epitaxy, a second isolation layer with a thickness of 4nm-15nm is grown on the second barrier layer;

[0031] 7) Using molecular beam epitaxy, a parallel layer with a thickness of 50nm-200nm is grown on the second isolation layer;

[0032] 8) Using molecular beam epitaxy, a third isolation layer with a thickness of 4nm-15nm is grown on the parallel layer;

[0033] 9) Using molecular beam epitaxy, a third barrier layer with a thickness of 1nm-3nm is grown on the third isolation layer;

[0034] 10) Using molecular beam epitaxy, a second potential well layer with a thickness of 1 nm-3 nm is grown on the third barrier layer;

[0035] 11) Using molecular beam epitaxy, a fourth barrier layer with a thickness of 1 nm-3 nm is grown on the second potential well layer;

[0036] 12) Using molecular beam epitaxy, a fourth isolation layer with a thickness of 4nm-15nm is grown on the fourth barrier layer;

[0037] 13) Using molecular beam epitaxy, a collector ohmic contact layer with a thickness of 50nm-200nm is grown on the fourth isolation layer;

[0038] 14) Using photolithography, a mesa isolation pattern is formed on the collector ohmic contact layer. Then, using photoresist as a mask, the collector ohmic contact layer is etched to the upper part of the substrate using an inductively coupled plasma etching method with a BCl3 / Cl2 gas source to form a mesa isolation shallow trench with a depth of 200nm-800nm.

[0039] 15) Using photoresist as a mask, a collector region is set on the collector ohmic contact layer after mesa isolation, and metal Ti / Au / Ni is deposited in this region by electron beam evaporation process to form a collector.

[0040] 16) Using the collector metal as a mask, the collector ohmic contact layer is etched to the upper surface of the parallel layer using the inductively coupled plasma etching method with a BCl3 / Cl2 gas source, forming a cylindrical mesa from the third isolation layer to the collector.

[0041] 17) Using photoresist as a mask, a gate region is set on the parallel layer, and metal Ti / Au is deposited in this region by electron beam evaporation to form the gate.

[0042] 18) Using photoresist as a mask, the parallel layer is etched to the upper surface of the emitter ohmic contact layer using inductively coupled plasma etching method with BCl3 / Cl2 gas source to form the gate mesa from the first isolation layer to the parallel layer.

[0043] 19) Using photoresist as a mask, an emitter region is set on the emitter ohmic contact layer, and metal Ti / Au is deposited in this region using electron beam evaporation to form the emitter;

[0044] 20) A passivation layer with a thickness of 50nm-200nm is deposited over the entire sample area using plasma-enhanced chemical vapor deposition or atomic layer deposition.

[0045] 21) Using photoresist as a mask, reactive ion etching is employed with an SF6 gas source to etch the passivation layer, forming circular collector vias, rectangular gate vias, and rectangular emitter vias, respectively.

[0046] 22) Using photolithography, the collector and emitter interconnect metal patterns and the gate pin pattern are defined on the passivation layer. Then, using photoresist as a mask, the Au metal layer is evaporated using electron beam evaporation to form the metal interconnect between the collector and emitter electrodes, which serves as one end electrode of the diode; the interconnect between the gate and the gate pin is formed, which serves as the other end electrode of the diode, thus completing the fabrication of a nitride resonant tunneling diode with symmetrical differential negative resistance characteristics.

[0047] Compared with the prior art, the present invention has the following advantages:

[0048] 1. This invention, by adding a second barrier layer, a second isolation layer, a third isolation layer, a third barrier layer, and a second well layer, forms a bottom resonant tunneling diode composed of the second barrier layer, the second isolation layer, and the first isolation layer, the first barrier layer, and the first well layer; and a top resonant tunneling diode composed of the third isolation layer, the third barrier layer, the second well layer, and the fourth barrier layer and the fourth isolation layer. The bottom and top resonant tunneling diodes form a parallel structure with the gate through the interconnection of their collectors and emitters, enabling the device to achieve symmetrical differential negative resistance characteristics under both forward and reverse biases. That is, when the gate bias voltage is positive, the bottom resonant tunneling diode undergoes resonant tunneling, exhibiting differential negative resistance characteristics, while the top resonant tunneling diode is reverse-biased and cut off; when the gate bias voltage is negative, the top resonant tunneling diode undergoes resonant tunneling, exhibiting differential negative resistance characteristics, while the bottom resonant tunneling diode is reverse-biased and cut off.

[0049] 2. This invention uses stable polar wurtzite nitride materials. Due to their mature growth process, no special design or polarization control is required for the device structure, avoiding the problems of crystal phase instability and high defect density encountered during the growth of non-polarized cubic wurtzite materials, thus simplifying the device fabrication process. Simultaneously, the active region of the device can achieve a high-quality quantum well interface and low dislocation density, enabling highly stable operation and high consistency in device performance.

[0050] 3. The device of this invention utilizes the strong polarization effect of polar wurtzite nitride materials to generate a large amount of polarization charge at the interfaces of each layer, resulting in high peak current and improving the peak-to-valley current ratio of the device. Simultaneously, this structure increases the freedom and scope of gallium nitride resonant tunneling diode structure design, providing insights for gallium nitride-based integrated circuit design. Attached Figure Description

[0051] Figure 1 This is a structural diagram of an existing nonpolarized cubic zincblende structure gallium nitride resonant tunneling diode;

[0052] Figure 2 This is a structural diagram of the nitride resonant tunneling diode with symmetrical differential negative resistance characteristics of the present invention;

[0053] Figure 3 This is a top view of the nitride resonant tunneling diode with symmetrical differential negative resistance characteristics of the present invention.

[0054] Figure 4 This is a schematic diagram of the process for fabricating a nitride resonant tunneling diode with symmetrical differential negative resistance characteristics according to the present invention. Detailed Implementation

[0055] The embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.

[0056] Reference Figure 2 and Figure 3 This example of a nitride resonant tunneling diode with symmetrical differential negative resistance characteristics includes a substrate, an emitter ohmic contact layer, a parallel layer, a collector ohmic contact layer, four isolation layers, four barrier layers, two potential well layers, a passivation layer, an emitter, a collector, a gate, and interconnect metal, wherein:

[0057] The substrate 1 is made of any one of the following materials: sapphire, silicon, silicon carbide, diamond, gallium nitride, aluminum nitride, boron nitride, and gallium oxide.

[0058] The emitter ohmic contact layer 2 is located on the substrate 1 and has a doping concentration of 1x10⁻⁶. 19 cm -3 -1x10 20 cm -3 Any one of the following materials: n-type GaN, n-type InGaN, n-type ScGaN, n-type YGaN, and n-type BGaN, with a thickness of 50nm-200nm;

[0059] The first isolation layer 3 is located above the emitter ohmic contact layer 2, and it is made of any one of GaN, InGaN, ScGaN, YGaN, and BGaN materials, with a thickness of 4nm-15nm.

[0060] The first barrier layer 4 is located above the first isolation layer 3, and it is made of any one of AlN, AlGaN, InAlN, ScAlN, YAlN, BAlN, AlPN, and BPN materials, with a thickness of 1nm-3nm.

[0061] The first potential well layer 5 is located above the first potential barrier layer 4, and it is made of any one of GaN, InGaN, ScGaN, YGaN, or BGaN materials, with a thickness of 1nm-3nm.

[0062] The second barrier layer 6 is located above the first well layer 5, and it is made of any one of AlN, AlGaN, InAlN, ScAlN, YAlN, BAlN, AlPN, and BPN materials, with a thickness of 1nm-3nm.

[0063] The second isolation layer 7 is located above the second barrier layer 6, and it is made of any one of GaN, InGaN, ScGaN, YGaN, and BGaN materials, with a thickness of 4nm-15nm.

[0064] The parallel layer 8 is located above the second isolation layer 7, and it has a doping concentration of 1x10⁻⁶. 19 cm -3 -1x10 20 cm-3 Any one of the following materials: n-type GaN, n-type InGaN, n-type ScGaN, n-type YGaN, and n-type BGaN, with a thickness of 50nm-200nm;

[0065] The third isolation layer 9 is located above the parallel layer 8, and it is made of any one of GaN, InGaN, ScGaN, YGaN, and BGaN materials, with a thickness of 4nm-15nm.

[0066] The third barrier layer 10 is located above the third isolation layer 9, and it is made of any one of AlN, AlGaN, InAlN, ScAlN, YAlN, BAlN, AlPN, and BPN materials, with a thickness of 1nm-3nm.

[0067] The second potential well layer 11 is located above the third potential barrier layer 10. It is made of any one of GaN, InGaN, ScGaN, YGaN, or BGaN materials and has a thickness of 1nm-3nm.

[0068] The fourth barrier layer 12 is located above the second potential well layer 11, and it is made of any one of AlN, AlGaN, InAlN, ScAlN, YAlN, BAlN, AlPN, and BPN materials, with a thickness of 1nm-3nm.

[0069] The fourth isolation layer 13 is located above the fourth barrier layer 12, and it is made of any one of GaN, InGaN, ScGaN, YGaN, and BGaN materials, with a thickness of 4nm-15nm.

[0070] The collector ohmic contact layer 14 is located above the fourth isolation layer 13, and it has a doping concentration of 1x10⁻⁶. 19 cm -3 -1x10 20 cm -3 Any one of the following materials: n-type GaN, n-type InGaN, n-type ScGaN, n-type YGaN, and n-type BGaN, with a thickness of 50nm-200nm;

[0071] The gate is located above the parallel layer 8;

[0072] The emitter is located above the emitter ohmic contact layer 2;

[0073] The current collector is located on the current collector ohmic contact layer 14;

[0074] The first isolation layer 3, the first barrier layer 4, the first potential well layer 5, the second barrier layer 6, and the second isolation layer 7 constitute a bottom resonant tunneling diode.

[0075] The third isolation layer 9, the third barrier layer 10, the second potential well layer 11, the fourth barrier layer 12, and the fourth isolation layer 13 constitute a top resonant tunneling diode.

[0076] The emitter and collector are connected by an interconnecting metal and form a parallel structure with the gate. When the gate bias voltage is positive, the bottom resonant tunneling diode undergoes resonant tunneling and exhibits differential negative resistance characteristics, while the top resonant tunneling diode is reverse-biased and cut off. When the gate bias voltage is negative, the top resonant tunneling diode undergoes resonant tunneling and exhibits differential negative resistance characteristics, while the bottom resonant tunneling diode is reverse-biased and cut off.

[0077] The passivation layer 15 is made of any one of SiN, Al2O3, or HfO2 materials and is wrapped around the outside of all layers except for the electrode pins and interconnect metal.

[0078] Reference Figure 4 The present invention fabricates a nitride resonant tunneling diode with the above-mentioned symmetrical differential negative resistance characteristics, and provides the following three embodiments.

[0079] Example 1: A GaN first well layer, a GaN second well layer, an AlN first barrier layer, an AlN second barrier layer, an AlN third barrier layer, an AlN fourth barrier layer, a GaN first isolation layer, a GaN second isolation layer, a GaN third isolation layer, and a GaN fourth isolation layer are fabricated on a gallium nitride substrate, with a doping concentration of 1x10⁻⁶. 20 cm -3 A nitride resonant tunneling diode with symmetrical differential negative resistance characteristics of n-type GaN emitter ohmic contact layer, n-type GaN collector ohmic contact layer, and n-type GaN parallel layer.

[0080] Step 1: Epitaxially grow n-type GaN emitter ohmic contact layer 2 using molecular beam epitaxy (MBE), such as... Figure 4 (a).

[0081] The set temperature is 750℃, nitrogen flow rate is 0.6 sccm, and gallium beam equilibrium vapor pressure is 3.5 × 10⁻⁶. -7 Torr, the equilibrium vapor pressure of the silicon beam is 3.5 × 10⁻⁶. -8 Under the process conditions of Torr and a nitrogen RF source power of 380W, molecular beam epitaxy was used to epitaxially grow a thickness of 50nm and a doping concentration of 1x10 on a gallium nitride substrate 1. 20 cm -3 n-type GaN emitter ohmic contact layer 2.

[0082] Step 2: Epitaxially grow the first GaN isolation layer 3 using molecular beam epitaxy, such as... Figure 4 (b)

[0083] The set temperature is 750℃, the nitrogen flow rate is 0.6 sccm, and the gallium beam equilibrium vapor pressure is 3.5 × 10⁻⁶. -7 Torr, with a nitrogen RF source power of 380W, uses molecular beam epitaxy to epitaxially form a 15nm thick GaN first isolation layer 3 on an n-type GaN emitter ohmic contact layer 2.

[0084] Step 3: Epitaxially grow the first barrier layer 4 of AlN using molecular beam epitaxy, as shown below. Figure 4 (c)

[0085] The set temperature is 750℃, the nitrogen flow rate is 0.6 sccm, and the aluminum beam equilibrium vapor pressure is 0.6 × 10⁻⁶. -7 Torr, with a nitrogen RF source power of 380W, uses molecular beam epitaxy to epitaxially form an AlN first barrier layer 4 with a thickness of 1nm on the GaN first isolation layer 3.

[0086] Step four: Epitaxially grow the first GaN well layer 5 using molecular beam epitaxy, as shown below. Figure 4 (d)

[0087] The set temperature is 750℃, the nitrogen flow rate is 0.6 sccm, and the gallium beam equilibrium vapor pressure is 3.5 × 10⁻⁶. -7 Torr, with a nitrogen RF source power of 380W, used molecular beam epitaxy to epitaxially form a GaN first well layer 5 with a thickness of 2nm on the AlN first barrier layer 4.

[0088] Step 5: Epitaxially grow the second barrier layer 6 of AlN using molecular beam epitaxy, as shown below. Figure 4 (e).

[0089] The set temperature is 750℃, the nitrogen flow rate is 0.6 sccm, and the aluminum beam equilibrium vapor pressure is 0.6 × 10⁻⁶. -7 Torr, with a nitrogen RF source power of 380W, used molecular beam epitaxy to epitaxially form a 1nm thick AlN second barrier layer 6 on the GaN first well layer 5.

[0090] Step six, use molecular beam epitaxy to epitaxially grow the second GaN isolation layer 7, such as... Figure 4 (f).

[0091] The set temperature is 750℃, the nitrogen flow rate is 0.6 sccm, and the gallium beam equilibrium vapor pressure is 3.5 × 10⁻⁶. -7Torr, with a nitrogen RF source power of 380W, uses molecular beam epitaxy to epitaxially grow a GaN second isolation layer 7 with a thickness of 15nm on the AlN second barrier layer 6. The second isolation layer 7, together with the first isolation layer 3, the first barrier layer 4, the first well layer 5, and the second barrier layer 6, constitutes the bottom gallium nitride resonant tunneling diode.

[0092] Step 7: Epitaxially grow n-type GaN parallel layers 8 using molecular beam epitaxy, such as... Figure 4 (g)

[0093] The set temperature is 750℃, the nitrogen flow rate is 0.6 sccm, and the gallium beam equilibrium vapor pressure is 3.5 × 10⁻⁶. -7 Torr, the equilibrium vapor pressure of the silicon beam is 3.5 × 10⁻⁶. -8 Torr, with a nitrogen RF source power of 380W, used molecular beam epitaxy to epitaxially grow a 50nm thick GaN second isolation layer 7 with a doping concentration of 1x10⁻⁶. 20 cm -3 8 n-type GaN parallel layers.

[0094] Step 8: Epitaxially grow the third GaN isolation layer 9 using molecular beam epitaxy, such as... Figure 4 (h).

[0095] The set temperature is 750℃, the nitrogen flow rate is 0.6 sccm, and the gallium beam equilibrium vapor pressure is 3.5 × 10⁻⁶. -7 Torr, with a nitrogen RF source power of 380W, uses molecular beam epitaxy to epitaxially grow a 15nm thick GaN third isolation layer 9 on an n-type GaN parallel layer 8.

[0096] Step nine, use molecular beam epitaxy to epitaxially grow the third barrier layer 10 of AlN, as shown below. Figure 4 (i).

[0097] The set temperature is 750℃, the nitrogen flow rate is 0.6 sccm, and the aluminum beam equilibrium vapor pressure is 0.6 × 10⁻⁶. -7 Torr, with a nitrogen RF source power of 380W, used molecular beam epitaxy to epitaxially form an AlN third barrier layer 10 with a thickness of 1nm on the GaN third isolation layer 9.

[0098] Step 10: Epitaxially grow the second GaN potential well layer 11 using molecular beam epitaxy, as shown below. Figure 4 (j).

[0099] The set temperature is 750℃, the nitrogen flow rate is 0.6 sccm, and the gallium beam equilibrium vapor pressure is 3.5 × 10⁻⁶. -7Torr, with a nitrogen RF source power of 380W, used molecular beam epitaxy to epitaxially form a GaN second well layer 11 with a thickness of 2nm on the AlN third barrier layer 10.

[0100] Step 11: Epitaxially grow the fourth barrier layer 12 of AlN using molecular beam epitaxy, as shown below. Figure 4 (k).

[0101] The set temperature is 750℃, the nitrogen flow rate is 0.6 sccm, and the aluminum beam equilibrium vapor pressure is 0.6 × 10⁻⁶. -7 Torr, with a nitrogen RF source power of 380W, used molecular beam epitaxy to epitaxially form an AlN fourth barrier layer 12 with a thickness of 1nm on the GaN second well layer 11.

[0102] Step 12: Epitaxially grow the fourth GaN isolation layer 13 using molecular beam epitaxy, as shown below. Figure 4 (l).

[0103] The set temperature is 750℃, the nitrogen flow rate is 0.6 sccm, and the gallium beam equilibrium vapor pressure is 3.5 × 10⁻⁶. -7 Torr, with a nitrogen RF source power of 380W, uses molecular beam epitaxy to epitaxially grow a GaN fourth isolation layer 13 with a thickness of 15nm on the AlN fourth barrier layer 12. The fourth isolation layer 13, together with the third isolation layer 9, the third barrier layer 10, the second well layer 11, and the fourth barrier layer 12, constitutes the top gallium nitride resonant tunneling diode.

[0104] Step thirteen, use molecular beam epitaxy to epitaxially grow an n-type GaN collector ohmic contact layer 14, such as... Figure 4 (m).

[0105] The set temperature is 750℃, the nitrogen flow rate is 0.6 sccm, and the gallium beam equilibrium vapor pressure is 3.5 × 10⁻⁶. -7 Torr, the equilibrium vapor pressure of the silicon beam is 3.5 × 10⁻⁶. -8 Torr, with a nitrogen RF source power of 380W, molecular beam epitaxy was used to epitaxially grow a 50nm thick GaN fourth isolation layer 13 with a doping concentration of 1x10⁻¹⁰. 20 cm -3 n-type GaN collector ohmic contact layer 14.

[0106] Step fourteen: Spin-coating, photolithography, development, and etching are performed on the n-type GaN collector ohmic contact layer 14 to form a mesh-like mesa isolation shallow trench with a depth of 400 nm, such as... Figure 4 (n).

[0107] 14.1) A mesa isolation pattern is formed on the collector ohmic contact layer 14 using photolithography:

[0108] 14.1a) Spin-coating AZ5214 photoresist onto the collector ohmic contact layer 14, i.e., first spin-coating at a rotation speed of 500 rad / min and an acceleration of 1000 rad. 2 Spin coating at 4000 rad / min for 3 seconds; then at 2000 rad / min and 4000 rad / min. 2 Spin coat at 30 s / min for 30 s; then bake at 95 ℃ for 90 s;

[0109] 14.1b) The AZ5214 photoresist on the collector ohmic contact layer 14 is exposed using conventional optical lithography.

[0110] 14.1c) The exposed photoresist was developed using RZX-3038 developer for 45 seconds to form a grid-like mesa isolation pattern.

[0111] 14.2) The collector ohmic contact layer 14 is etched according to the mesa isolation pattern to form a shallow mesa isolation trench:

[0112] With process conditions set at Cl2 gas flow rate of 10 sccm, BCl3 gas flow rate of 25 sccm, and etching time of 200 s, inductively coupled plasma etching was used. Using photoresist as a mask, the collector ohmic contact layer 14 was etched according to the mesa isolation pattern to form a grid-like mesa isolation shallow trench with a depth of 400 nm.

[0113] Step 15: Fabricate the current collector using electron beam evaporation technology, such as... Figure 4 (o).

[0114] 15.1) Spin-coating PMMA A4 photoresist onto the n-type GaN collector ohmic contact layer 14: First, spin-coat the photoresist at a rotation speed of 500 rad / min and an acceleration of 1000 rad. 2 / Spin coating for 3 seconds at a speed of 4000 rad / min and an acceleration of 2000 rad / min. 2 Spin coat at 180℃ for 30 seconds; then bake at 180℃ for 90 seconds.

[0115] 15.2) Photolithography was used to expose PMMA A4 photoresist with an electron dose ratio of 750.

[0116] 15.3) A solution of tetramethyl dipentanone and isopropanol in a ratio of 3:1 was used to develop the exposed photoresist for 120 seconds, and then fixed with isopropanol for 30 seconds to form a circular collector pattern with a diameter of 1 μm.

[0117] 15.4) Using the electron beam evaporation method, the electrode pattern is applied according to... Ti / Au / Ni metal with a thickness of 20 / 80 / 50 nm was evaporated at a certain rate and then soaked in acetone solution to form a current collector electrode.

[0118] Step sixteen: Using inductively coupled plasma etching (ICP-E) technology, a collector cylindrical mesa is etched, as shown below. Figure 4 (p).

[0119] With process conditions set at Cl2 gas flow rate of 10 sccm, BCl3 gas flow rate of 25 sccm, and etching time of 150 s, using the collector metal as a mask, inductively coupled plasma etching was employed to etch the n-type GaN collector ohmic contact layer 14 to the upper surface of the n-type GaN parallel layer 8, forming a collector cylindrical mesa with a diameter of 1 μm from the third isolation layer 9 to the collector.

[0120] Step 17: Fabricate a semi-circular ring gate using electron beam evaporation technology, such as... Figure 4 (q).

[0121] 17.1) Spin-coating AZ5214 photoresist onto the n-type GaN parallel layer 8, first at a rotation speed of 500 rad / min and an acceleration of 1000 rad. 2 / Spin coating for 3 seconds at a speed of 4000 rad / min and an acceleration of 2000 rad / min. 2 Spin coat at 30 s / min for 30 s; then bake at 95 ℃ for 90 s;

[0122] 17.2) Optical lithography was used to expose the AZ5214 photoresist on the n-type GaN parallel layer 8;

[0123] 17.3) The photoresist after exposure is developed with RZX-3038 developer for 45s to form a semi-circular gate electrode pattern. The inner circumference of the semi-circular ring is 5μm from the cylindrical mesa.

[0124] 17.4) Using electron beam evaporation, with a semi-circular ring gate electrode pattern as a mask, [the process is as follows] on the n-type GaN parallel layer 8. A Ti / Au metal with a thickness of 20 / 80 nm is evaporated at a certain rate and then soaked in acetone solution to form a semi-circular ring gate. The inner circumference of this electrode is 5 μm away from the cylindrical mesa of the collector electrode.

[0125] Step 18: Spin-coating, photolithography, development, and etching are performed on the n-type GaN parallel layer 8 to form a semi-cylindrical gate mesa, as shown below. Figure 4 (r).

[0126] 18.1) A semi-cylindrical gate mesa pattern is formed on the parallel layer 8, the collector, and the gate using photolithography:

[0127] 18.1a) Spin-coat AZ5214 photoresist onto the parallel layer 8 and the collector and gate electrodes, i.e., first spin-coat at a rotation speed of 500 rad / min and an acceleration of 1000 rad. 2 Spin coating at 4000 rad / min for 3 seconds; then at 2000 rad / min and 4000 rad / min. 2 Spin coat at 30 s / min for 30 s; then bake at 95 ℃ for 90 s;

[0128] 18.1b) Using conventional optical lithography, the AZ5214 photoresist on the parallel layer 8 and the collector and gate electrodes is exposed and processed;

[0129] 18.1c) The exposed photoresist is developed using RZX-3038 developer for 45 seconds to form a semi-cylindrical gate mesa pattern.

[0130] 18.2) The parallel layer 8 is etched according to the semi-cylindrical gate mesa pattern to form the semi-cylindrical gate mesa:

[0131] With process conditions set at Cl2 gas flow rate of 10 sccm, BCl3 gas flow rate of 25 sccm, and etching time of 150 s, inductively coupled plasma etching is used, with photoresist as a mask, to etch the parallel layer 8 to the upper surface of the emitter ohmic contact layer 2, forming a semi-cylindrical gate mesa from the first isolation layer 3 to the collector.

[0132] Step nineteen: Fabricate a semi-circular emitter using electron beam evaporation technology, such as... Figure 4 (s).

[0133] 19.1) AZ5214 photoresist was spin-coated onto the n-type GaN emitter ohmic contact layer 2, first at a rotation speed of 500 rad / min and an acceleration of 1000 rad. 2 / Spin coating for 3 seconds at a speed of 4000 rad / min and an acceleration of 2000 rad / min. 2 Spin coat at 30 s / min for 30 s; then bake at 95 ℃ for 90 s;

[0134] 19.2) Optical lithography was used to expose the AZ5214 photoresist on the n-type GaN emitter ohmic contact layer 2;

[0135] 19.3) The photoresist after exposure is developed with RZX-3038 developer for 45s to form a semi-circular emitter electrode pattern. The inner circumference of the pattern is 5μm away from the cylindrical collector mesa.

[0136] 19.4) Using the electron beam evaporation method, with a semi-circular annular emitter electrode pattern as a mask, an electron beam evaporation is performed on the n-type GaN emitter ohmic contact layer 2 according to... A Ti / Au metal with a thickness of 20 / 80 nm is evaporated at a certain rate and then soaked in acetone solution to form a semi-circular annular emitter. The inner circumference of this electrode is 5 μm away from the cylindrical collector mesa.

[0137] Step 20: Deposit an Al2O3 passivation layer 15 using atomic layer deposition (ALD) technology, as shown below. Figure 4 (t).

[0138] The process conditions were set as follows: time 40s, pressure 2000mTorr, temperature 300℃, Al(CH3)3 flow rate 850sccm, H2O flow rate 350sccm, and N2 flow rate 1000sccm. An Al2O3 passivation layer 15 with a thickness of 50nm was deposited over the entire sample area using atomic layer deposition.

[0139] Step 21: Fabricate gate vias, collector vias, and emitter vias on the Al2O3 passivation layer 15, as follows: Figure 4 (u).

[0140] The process conditions were set as follows: pressure 1500 mTorr, power 200 W, SF6 flow rate 8 sccm, CHF3 flow rate 10 sccm, and He flow rate 150 sccm. Using photoresist as a mask, reactive ion etching was used to etch the Al2O3 passivation layer 15 to the metal surfaces of the gate, collector, and emitter, forming a collector via with a diameter of 0.5 μm, a rectangular gate via with a length of 0.5 μm and a width of 0.1 μm, and a rectangular emitter via, respectively.

[0141] Step twenty-two: Using photolithography and electron beam evaporation, the metal interconnects between the collector and emitter electrodes, and the interconnects between the gate and gate pins, are formed to complete device fabrication, such as... Figure 4 (v).

[0142] First, using photolithography, the collector and emitter interconnect metal patterns and the gate electrode pin patterns are formed respectively; then, the... Under the specified process conditions, an 80nm thick Au metal was evaporated onto the collector-emitter interconnect metal pattern and each electrode pin pattern using electron beam evaporation. Then, it was soaked in acetone to achieve the interconnection of the collector and emitter and the gate pin, thus realizing the parallel structure of the bottom resonant tunneling diode and the top resonant tunneling diode. The interconnected collector and emitter were used as one end electrode of the diode, and the interconnected gate and gate pin were used as the other end electrode of the diode, thus completing the fabrication of the resonant tunneling diode.

[0143] Example 2: Fabrication of Sc on an aluminum nitride substrate 0.15 Ga 0.85 N first potential well layer, Sc 0.15 Ga 0.85N is the second potential well layer, Sc 0.18 Al 0.82 N first barrier layer, Sc 0.18 Al 0.82 N second barrier layer, Sc 0.18 Al 0.82 N third barrier layer, Sc 0.18 Al 0.82 N is the fourth barrier layer, Sc 0.15 Ga 0.85 N First isolation layer, Sc 0.15 Ga 0.85 N Second isolation layer, Sc 0.15 Ga 0.85 N Third isolation layer, Sc 0.15 Ga 0.85 The fourth isolation layer has a doping concentration of 5 x 10⁻⁶. 19 cm -3 n-type Sc 0.15 Ga 0.85 N-emitter ohmic contact layer, n-type Sc 0.15 Ga 0.85 N-collector ohmic contact layer, n-type Sc 0.15 Ga 0.85 Symmetric differential negative resistance characteristic nitride resonant tunneling diode with N parallel layers.

[0144] Step 1, epitaxial n-type Sc 0.15 Ga 0.85 N-emitter ohmic contact layer 2, such as Figure 4 (a).

[0145] Molecular beam epitaxy was used to epitaxially grow a 100 nm thick layer on an aluminum nitride substrate 1 with a doping concentration of 5 x 10⁻⁶. 19 cm -3 n-type Sc 0.15 Ga 0.85 N-emitter ohmic contact layer 2.

[0146] The process conditions for molecular beam epitaxy were: temperature 650℃, nitrogen flow rate 3.0 sccm, and scandium beam equilibrium vapor pressure 1.2 × 10⁻⁶. -8 Torr, the equilibrium vapor pressure of the gallium beam is 6.5 × 10⁻⁶. -7 Torr, the equilibrium vapor pressure of the silicon beam is 3.2 × 10⁻⁶. - 8 The Torr uses a nitrogen-based radio frequency source with a power of 350W.

[0147] Step 2, extension Sc 0.15 Ga 0.85 N First isolation layer 3, such as Figure 4 (b)

[0148] Using molecular beam epitaxy, in n-type Sc 0.15 Ga 0.85 The Sc epitaxial layer with a thickness of 12 nm is located on the N-emitter ohmic contact layer 2. 0.15 Ga 0.85 N First isolation layer 3.

[0149] The process conditions for molecular beam epitaxy were: temperature 650℃, nitrogen flow rate 3.0 sccm, and scandium beam equilibrium vapor pressure 1.2 × 10⁻⁶. -8 Torr, the equilibrium vapor pressure of the gallium beam is 6.5 × 10⁻⁶. -7 The Torr uses a nitrogen-based radio frequency source with a power of 350W.

[0150] Step 3, epitaxial Sc 0.18 Al 0.82 N first barrier layer 4, such as Figure 4 (c)

[0151] Using molecular beam epitaxy, in Sc 0.15 Ga 0.85 The first isolation layer (3) has an epitaxial thickness of 2nm on the Sc. 0.18 Al 0.82 N is the first barrier layer 4.

[0152] The process conditions for molecular beam epitaxy were: temperature 650℃, nitrogen flow rate 3.0 sccm, and scandium beam equilibrium vapor pressure 5.0 × 10⁻⁶. -8 Torr, the equilibrium vapor pressure of the aluminum beam is 1.2 × 10⁻⁶. -7 The Torr uses a nitrogen-based radio frequency source with a power of 350W.

[0153] Step 4, epitaxial Sc 0.15 Ga 0.85 N is the first potential well layer 5, such as Figure 4 (d)

[0154] Using molecular beam epitaxy, in Sc 0.18 Al 0.82 The first barrier layer 4 has an epitaxial thickness of 1 nm on the Sc layer. 0.15 Ga 0.85 N is the first potential well layer 5.

[0155] The process conditions for molecular beam epitaxy were: temperature 650℃, nitrogen flow rate 3.0 sccm, and scandium beam equilibrium vapor pressure 5.0 × 10⁻⁶. -8 Torr, the equilibrium vapor pressure of the gallium beam is 6.5 × 10⁻⁶. -7 The Torr uses a nitrogen-based radio frequency source with a power of 350W.

[0156] Step 5, epitaxial Sc 0.15 Al0.85 N second barrier layer 6, such as Figure 4 (e).

[0157] Using molecular beam epitaxy, in Sc 0.15 Ga 0.85 The first potential well layer 5 has an epitaxial thickness of 2nm on the Sc. 0.18 Al 0.82 N is the second barrier layer 6.

[0158] The process conditions for molecular beam epitaxy were: temperature 650℃, nitrogen flow rate 3.0 sccm, and scandium beam equilibrium vapor pressure 5.0 × 10⁻⁶. -8 Torr, the equilibrium vapor pressure of the aluminum beam is 1.2 × 10⁻⁶. -7 The Torr uses a nitrogen-based radio frequency source with a power of 350W.

[0159] Step 6, Extension Sc 0.15 Ga 0.85 N Second isolation layer 7, such as Figure 4 (f).

[0160] Using molecular beam epitaxy, in Sc 0.18 Al 0.82 The Sc epitaxial layer with a thickness of 12nm is located on the second barrier layer 6. 0.15 Ga 0.85 The second isolation layer 7, together with the first isolation layer 3, the first barrier layer 4, the first well layer 5, and the second barrier layer 6, constitutes the bottom gallium nitride resonant tunneling diode.

[0161] The process conditions for molecular beam epitaxy were: temperature 650℃, nitrogen flow rate 3.0 sccm, and scandium beam equilibrium vapor pressure 5.0 × 10⁻⁶. -8 Torr, the equilibrium vapor pressure of the gallium beam is 6.5 × 10⁻⁶. -7 The Torr uses a nitrogen-based radio frequency source with a power of 350W.

[0162] Step 7, epitaxial n-type Sc 0.15 Ga 0.85 N parallel layers 8, such as Figure 4 (g)

[0163] Using molecular beam epitaxy, in Sc 0.15 Ga 0.85 The epitaxial thickness of the second isolation layer 7 is 100 nm, and the doping concentration is 5 x 10⁻⁶. 19 cm -3 n-type Sc 0.15 Ga 0.85 N parallel layers 8.

[0164] The process conditions for molecular beam epitaxy were: temperature 650℃, nitrogen flow rate 3.0 sccm, and scandium beam equilibrium vapor pressure 5.0 × 10⁻⁶. -8 Torr, the equilibrium vapor pressure of the gallium beam is 6.5 × 10⁻⁶. -7 Torr, the equilibrium vapor pressure of the silicon beam is 3.2 × 10⁻⁶. - 8 The Torr uses a nitrogen-based radio frequency source with a power of 350W.

[0165] Step 8, Extension Sc 0.15 Ga 0.85 N third isolation layer 9, such as Figure 4 (h).

[0166] Using molecular beam epitaxy, in n-type Sc 0.15 Ga 0.85 The Sc epitaxial layer with a thickness of 12nm is located on the N parallel layer 8. 0.15 Ga 0.85 N Third isolation layer 9.

[0167] The process conditions for molecular beam epitaxy were: temperature 650℃, nitrogen flow rate 3.0 sccm, and scandium beam equilibrium vapor pressure 5.0 × 10⁻⁶. -8 Torr, the equilibrium vapor pressure of the gallium beam is 6.5 × 10⁻⁶. -7 The Torr uses a nitrogen-based radio frequency source with a power of 350W.

[0168] Step 9, Extension Sc 0.15 Al 0.85 N is the third barrier layer 10, such as Figure 4 (i).

[0169] Using molecular beam epitaxy, in Sc 0.15 Ga 0.85 The third isolation layer 9 has an epitaxial thickness of 2nm on the Sc layer. 0.18 Al 0.82 N is the third barrier layer 10.

[0170] The process conditions for molecular beam epitaxy were: temperature 650℃, nitrogen flow rate 3.0 sccm, and scandium beam equilibrium vapor pressure 5.0 × 10⁻⁶. -8 Torr, the equilibrium vapor pressure of the aluminum beam is 1.2 × 10⁻⁶. -7 The Torr uses a nitrogen-based radio frequency source with a power of 350W.

[0171] Step 10, Extension Sc 0.15 Ga 0.85 N is the second potential well layer 11, such as Figure 4 (j).

[0172] Using molecular beam epitaxy, in Sc 0.18 Al0.82 The Sc epitaxial layer with a thickness of 1 nm is located on the third barrier layer 10. 0.15 Ga 0.85 N is the second potential well layer 11.

[0173] The process conditions for molecular beam epitaxy were: temperature 650℃, nitrogen flow rate 3.0 sccm, and scandium beam equilibrium vapor pressure 5.0 × 10⁻⁶. -8 Torr, the equilibrium vapor pressure of the gallium beam is 6.5 × 10⁻⁶. -7 The Torr uses a nitrogen-based radio frequency source with a power of 350W.

[0174] Step 11, epitaxial Sc 0.15 Al 0.85 N fourth barrier layer 12, such as Figure 4 (k).

[0175] Using molecular beam epitaxy, in Sc 0.15 Ga 0.85 The second potential well layer 11 has an epitaxial thickness of 2nm on the Sc. 0.18 Al 0.82 N is the fourth barrier layer 12.

[0176] The process conditions for molecular beam epitaxy were: temperature 650℃, nitrogen flow rate 3.0 sccm, and scandium beam equilibrium vapor pressure 5.0 × 10⁻⁶. -8 Torr, the equilibrium vapor pressure of the aluminum beam is 1.2 × 10⁻⁶. -7 The Torr uses a nitrogen-based radio frequency source with a power of 350W.

[0177] Step 12, extension Sc 0.15 Ga 0.85 N fourth isolation layer 13, such as Figure 4 (l).

[0178] Using molecular beam epitaxy, in Sc 0.18 Al 0.82 The Sc epitaxial layer with a thickness of 12nm is located on the fourth barrier layer 12. 0.15 Ga 0.85 The fourth isolation layer 13, together with the third isolation layer 9, the third barrier layer 10, the second well layer 11, and the fourth barrier layer 12, constitutes the top gallium nitride resonant tunneling diode.

[0179] The process conditions for molecular beam epitaxy were: temperature 650℃, nitrogen flow rate 3.0 sccm, and scandium beam equilibrium vapor pressure 5.0 × 10⁻⁶. -8 Torr, the equilibrium vapor pressure of the gallium beam is 6.5 × 10⁻⁶. -7 The Torr uses a nitrogen-based radio frequency source with a power of 350W.

[0180] Step 13, epitaxial n-type Sc 0.15 Ga 0.85 N-collector ohmic contact layer 14, such as Figure 4 (m).

[0181] Using molecular beam epitaxy, in Sc 0.15 Ga 0.85 The epitaxial thickness of the fourth isolation layer 13 is 100 nm, and the doping concentration is 5 x 10⁻⁶. 19 cm -3 n-type Sc 0.15 Ga 0.85 N-collector ohmic contact layer 14.

[0182] The process conditions for molecular beam epitaxy were: temperature 650℃, nitrogen flow rate 3.0 sccm, and scandium beam equilibrium vapor pressure 5.0 × 10⁻⁶. -8 Torr, the equilibrium vapor pressure of the gallium beam is 6.5 × 10⁻⁶. -7 Torr, the equilibrium vapor pressure of the silicon beam is 3.2 × 10⁻⁶. - 8 The Torr uses a nitrogen-based radio frequency source with a power of 350W.

[0183] Step 14, in n-type Sc 0.15 Ga 0.85 A mesh-like mesa isolation trench with a depth of 600 nm was formed by homogenization, photolithography, development, and etching on the N-collector ohmic contact layer 14. Figure 4 (n).

[0184] 14a) A mesa isolation pattern is formed on the collector ohmic contact layer 14 using photolithography:

[0185] The specific implementation of this step is the same as step 14.1) in Embodiment 1.

[0186] 14b) Etch the collector ohmic contact layer 14 according to the mesa isolation pattern to form mesa isolation:

[0187] Using inductively coupled plasma etching, photoresist is used as a mask to etch the collector ohmic contact layer 14 according to the mesa isolation pattern, forming a grid-like mesa isolation shallow trench with a depth of 600 nm.

[0188] The process conditions for inductively coupled plasma etching are as follows: Cl2 gas flow rate of 10 sccm, BCl3 gas flow rate of 25 sccm, and etching time of 250 s.

[0189] Step 15, fabricate the current collector, such as... Figure 4 (o).

[0190] 15a) In n-type Sc 0.15 Ga0.85 PMMA A4 photoresist was spin-coated onto the N-collector ohmic contact layer 14: the first spin-coating was performed at a rotation speed of 500 rad / min and an acceleration of 1000 rad. 2 / Spin coating for 3 seconds at a speed of 4000 rad / min and an acceleration of 2000 rad / min; second coating at a speed of 4000 rad / min and an acceleration of 2000 rad / min. 2 Spin coat at 180℃ for 30 seconds; then bake at 180℃ for 90 seconds.

[0191] 15b) Photolithography was used to expose PMMA A4 photoresist with an electron dose ratio of 750.

[0192] 15c) For the photoresist after exposure, first develop it with a solution of tetramethyl dipentanone and isopropanol in a ratio of 3:1 for 120s, and then fix it with isopropanol for 30s to form a circular collector pattern with a diameter of 5μm.

[0193] 15d) Using electron beam evaporation, the electrode pattern is applied according to... Ti / Au / Ni metal with a thickness of 20 / 80 / 50 nm was evaporated at a certain rate and then soaked in acetone solution to form a current collector electrode.

[0194] Step 16: Etch to form the collector cylindrical mesa, as shown. Figure 4 (p).

[0195] Inductively coupled plasma etching (ICP-C) was used, with the collector metal as a mask, to etch n-type Sc. 0.15 Ga 0.85 N-collector ohmic contact layer 14 to n-type Sc 0.15 Ga 0.85 On the upper surface of the N parallel layer 8, a collector cylindrical mesa with a diameter of 5 μm is formed, extending from the third isolation layer 9 to the collector.

[0196] The etching process conditions are: Cl2 gas flow rate of 10 sccm, BCl3 gas flow rate of 25 sccm, and etching time of 100 s.

[0197] Step 17: Fabricate a semi-circular ring gate with an inner circumference distance of 8 μm from the collector cylindrical mesa, as shown below. Figure 4 (q).

[0198] The specific implementation of this step is the same as step seventeen in Example 1.

[0199] Step 18: Spin coating, photolithography, development, and etching on n-type Sc 0.15 Ga 0.85 A semi-cylindrical gate mesa is formed on the N parallel layer 8, such as Figure 4 (r).

[0200] 18a) A semi-cylindrical gate mesa pattern is formed on the parallel layer 8 and the collector and gate using photolithography:

[0201] The specific implementation of this step is the same as step 18.1) in Embodiment 1.

[0202] 18b) Etch the parallel layer 8 according to the semi-cylindrical gate mesa pattern to form the semi-cylindrical gate mesa:

[0203] Using inductively coupled plasma etching, with photoresist as a mask, the parallel layer 8 is etched to the upper surface of the emitter ohmic contact layer 2 to form a semi-cylindrical gate mesa from the first isolation layer 3 to the collector.

[0204] The process conditions for inductively coupled plasma etching are as follows: Cl2 gas flow rate of 10 sccm, BCl3 gas flow rate of 25 sccm, and etching time of 100 s.

[0205] Step 19: Fabricate a semi-circular annular emitter with an inner circumference 8 μm from the cylindrical collector mesa, as shown below. Figure 4 (s).

[0206] The specific implementation of this step is the same as step nineteen in Example 1.

[0207] Step 20, deposit SiN passivation layer 15, as follows Figure 4 (t).

[0208] A 200 nm thick SiN passivation layer 15 was deposited over the entire sample area using plasma-enhanced chemical vapor deposition.

[0209] The process conditions used in the plasma-enhanced chemical vapor deposition method are: time 60s, pressure 2200mTorr, temperature 350℃, SiH4 flow rate 13.5sccm, NH3 flow rate 10sccm, and N2 flow rate 1000sccm.

[0210] Step 21: Fabricate the gate via, collector via, and emitter via, as follows: Figure 4 (u).

[0211] Using photoresist as a mask, reactive ion etching is employed to etch the SiN passivation layer 15 to the metal surfaces of the gate, collector, and emitter, forming a collector via with a diameter of 4μm, a rectangular gate via with a length of 4μm and a width of 1μm, and a rectangular emitter via, respectively.

[0212] The process conditions used in the reactive ion etching method are: pressure of 1500 mTorr, power of 200 W, SF6 flow rate of 8 sccm, CHF3 flow rate of 10 sccm, and He flow rate of 150 sccm.

[0213] Step 22, deposit interconnect metal and gate pins, as follows Figure 4 (v).

[0214] Using photolithography, the collector and emitter interconnect metal patterns and the gate electrode pin patterns are formed respectively. Using electron beam evaporation, an 80nm thick layer of Au metal is evaporated onto the collector and emitter interconnect metal patterns and each electrode pin pattern. Then, it is immersed in acetone to realize the interconnection between the collector and emitter and the gate pin, realizing the parallel structure of the bottom resonant tunneling diode and the top resonant tunneling diode. The interconnected collector and emitter are used as one end electrode of the diode, and the interconnected gate and gate pin are used as the other end electrode of the diode, thus completing the fabrication of the resonant tunneling diode.

[0215] Example 3: Fabrication of In on a silicon carbide substrate 0.1 Ga 0.9 N first potential well layer, In 0.1 Ga 0.9 N is the second potential well layer, In 0.17 Al 0.83 N First Barrier Layer, In 0.17 Al 0.83 N second barrier layer, In 0.17 Al 0.83 N third barrier layer, In 0.17 Al 0.83 N is the fourth barrier layer, In 0.1 Ga 0.9 N First isolation layer, In 0.1 Ga 0.9 N Second isolation layer, In 0.1 Ga 0.9 N Third isolation layer, In 0.1 Ga 0.9 N is the fourth isolation layer, with a doping concentration of 1x10. 19 cm -3 n-type In 0.1 Ga 0.9 N-emitter ohmic contact layer, n-type In 0.1 Ga 0.9 N-collector ohmic contact layer, n-type In 0.1 Ga 0.9 Symmetric differential negative resistance characteristic nitride resonant tunneling diode with N parallel layers.

[0216] Step A, grow n-type In 0.1 Ga 0.9 N-emitter ohmic contact layer 2, such as Figure 4 (a).

[0217] Using molecular beam epitaxy (MBE), at a temperature of 500℃, a nitrogen flow rate of 1.8 sccm, and an indium beam equilibrium vapor pressure of 2.1 × 10⁻⁶, an MBE was achieved. -7 Torr, the equilibrium vapor pressure of the gallium beam is 9.5 × 10⁻⁶. -7 Torr, the equilibrium vapor pressure of the silicon beam is 3.0 × 10⁻⁶. -8 Under the process conditions of Torr, with a nitrogen RF source power of 320W, a 200nm thick substrate with a doping concentration of 1x10⁻¹⁰ was grown on silicon carbide substrate 1. 19 cm -3 n-type In 0.1 Ga 0.9 N-emitter ohmic contact layer 2.

[0218] Step B, growth In 0.1 Ga 0.9 N First isolation layer 3, such as Figure 4 (b)

[0219] Using molecular beam epitaxy (MBE), at a temperature of 500℃, a nitrogen flow rate of 1.8 sccm, and an indium beam equilibrium vapor pressure of 2.1 × 10⁻⁶, an MBE was achieved. -7 Torr, the equilibrium vapor pressure of the gallium beam is 9.5 × 10⁻⁶. -7 Torr, with a nitrogen RF source power of 320W, in n-type In 0.1 Ga 0.9 An 8nm thick In layer is grown on the N-emitter ohmic contact layer 2. 0.1 Ga 0.9 N First isolation layer 3.

[0220] Step C, growth In 0.17 Al 0.83 N first barrier layer 4, such as Figure 4 (c)

[0221] Using molecular beam epitaxy (MBE), at a temperature of 500℃, a nitrogen flow rate of 1.8 sccm, and an indium beam equilibrium vapor pressure of 2.1 × 10⁻⁶, an MBE was achieved. -7 Torr, the equilibrium vapor pressure of the aluminum beam is 3.2 × 10⁻⁶. -7 Torr, with a nitrogen RF source power of 320W, under In... 0.1 Ga 0.9 In with a thickness of 3 nm is grown on the first isolation layer 3. 0.17 Al 0.83 N is the first barrier layer 4.

[0222] Step D, growth In 0.1 Ga 0.9 N is the first potential well layer 5, such as Figure 4 (d)

[0223] Using molecular beam epitaxy (MBE), at a temperature of 500℃, a nitrogen flow rate of 1.8 sccm, and an indium beam equilibrium vapor pressure of 2.1 × 10⁻⁶, an MBE was achieved. -7 Torr, the equilibrium vapor pressure of the gallium beam is 9.5 × 10⁻⁶. -7 Torr, with a nitrogen RF source power of 320W, under In... 0.17 Al 0.83 An In layer with a thickness of 3 nm is grown on the first barrier layer 4. 0.1 Ga 0.9 N is the first potential well layer 5.

[0224] Step E, growth In 0.17 Al 0.83 N second barrier layer 6, such as Figure 4 (e).

[0225] Using molecular beam epitaxy (MBE), at a temperature of 500℃, a nitrogen flow rate of 1.8 sccm, and an indium beam equilibrium vapor pressure of 2.1 × 10⁻⁶, an MBE was achieved. -7 Torr, the equilibrium vapor pressure of the aluminum beam is 3.2 × 10⁻⁶. -7 Torr, with a nitrogen RF source power of 320W, under In... 0.1 Ga 0.9 An In layer with a thickness of 3 nm is grown on the first potential well layer 5. 0.17 Al 0.83 N is the second barrier layer 6.

[0226] Step F, growth In 0.1 Ga 0.9 N Second isolation layer 7, such as Figure 4 (f).

[0227] Using molecular beam epitaxy (MBE), at a temperature of 500℃, a nitrogen flow rate of 1.8 sccm, and an indium beam equilibrium vapor pressure of 2.1 × 10⁻⁶, an MBE was achieved. -7 Torr, the equilibrium vapor pressure of the gallium beam is 9.5 × 10⁻⁶. -7 Torr, with a nitrogen RF source power of 320W, under In... 0.17 Al 0.83 An 8nm thick In layer is grown on the second barrier layer 6. 0.1 Ga 0.9 The second isolation layer 7, together with the first isolation layer 3, the first barrier layer 4, the first well layer 5, and the second barrier layer 6, constitutes the bottom gallium nitride resonant tunneling diode.

[0228] Step G, grow n-type In 0.1 Ga 0.9 N parallel layers 8, such as Figure 4 (g)

[0229] Using molecular beam epitaxy (MBE), at a temperature of 500℃, a nitrogen flow rate of 1.8 sccm, and an indium beam equilibrium vapor pressure of 2.1 × 10⁻⁶, an MBE was achieved. -7 Torr, the equilibrium vapor pressure of the gallium beam is 9.5 × 10⁻⁶. -7 Torr, the equilibrium vapor pressure of the silicon beam is 3.0 × 10⁻⁶. -8 Torr, with a nitrogen RF source power of 320W, under In... 0.1 Ga 0.9 A 200 nm thick layer with a doping concentration of 1 x 10⁻⁶ is grown on the second isolation layer 7. 19 cm -3 n-type In 0.1 Ga 0.9 N parallel layers 8.

[0230] Step H, growth In 0.1 Ga 0.9 N third isolation layer 9, such as Figure 4 (h).

[0231] Using molecular beam epitaxy (MBE), at a temperature of 500℃, a nitrogen flow rate of 1.8 sccm, and an indium beam equilibrium vapor pressure of 2.1 × 10⁻⁶, an MBE was achieved. -7 Torr, the equilibrium vapor pressure of the gallium beam is 9.5 × 10⁻⁶. -7 Torr, with a nitrogen RF source power of 320W, in n-type In 0.1 Ga 0.9 An 8nm thick In layer is grown on the N parallel layer 8. 0.1 Ga 0.9 N Third isolation layer 9.

[0232] Step I, Growth In 0.17 Al 0.83 N is the third barrier layer 10, such as Figure 4 (i).

[0233] Using molecular beam epitaxy (MBE), at a temperature of 500℃, a nitrogen flow rate of 1.8 sccm, and an indium beam equilibrium vapor pressure of 2.1 × 10⁻⁶, an MBE was achieved. -7 Torr, the equilibrium vapor pressure of the aluminum beam is 3.2 × 10⁻⁶. -7 Torr, with a nitrogen RF source power of 320W, under In... 0.1 Ga 0.9 In with a thickness of 3 nm is grown on the third isolation layer 9. 0.17 Al 0.83 N is the third barrier layer 10.

[0234] Step J, growth In 0.1 Ga 0.9 N is the second potential well layer 11, such as Figure 4 (j).

[0235] Using molecular beam epitaxy (MBE), at a temperature of 500℃, a nitrogen flow rate of 1.8 sccm, and an indium beam equilibrium vapor pressure of 2.1 × 10⁻⁶, an MBE was achieved. -7 Torr, the equilibrium vapor pressure of the gallium beam is 9.5 × 10⁻⁶. -7 Torr, with a nitrogen RF source power of 320W, under In... 0.17 Al 0.83 An In layer with a thickness of 3 nm is grown on the third barrier layer 10. 0.1 Ga 0.9 N is the second potential well layer 11.

[0236] Step K, growth In 0.17 Al 0.83 N fourth barrier layer 12, such as Figure 4 (k).

[0237] Using molecular beam epitaxy (MBE), at a temperature of 500℃, a nitrogen flow rate of 1.8 sccm, and an indium beam equilibrium vapor pressure of 2.1 × 10⁻⁶, an MBE was achieved. -7 Torr, the equilibrium vapor pressure of the aluminum beam is 3.2 × 10⁻⁶. -7 Torr, with a nitrogen RF source power of 320W, under In... 0.1 Ga 0.9 An In layer with a thickness of 3 nm is grown on the second potential well layer 11. 0.17 Al 0.83 N is the fourth barrier layer 12.

[0238] Step L, growth In 0.1 Ga 0.9 N fourth isolation layer 13, such as Figure 4 (l).

[0239] Using molecular beam epitaxy (MBE), at a temperature of 500℃, a nitrogen flow rate of 1.8 sccm, and an indium beam equilibrium vapor pressure of 2.1 × 10⁻⁶, an MBE was achieved. -7 Torr, the equilibrium vapor pressure of the gallium beam is 9.5 × 10⁻⁶. -7 Torr, with a nitrogen RF source power of 320W, under In... 0.17 Al 0.83 An 8nm thick In layer is grown on the fourth barrier layer 12. 0.1 Ga 0.9 The fourth isolation layer 13, together with the third isolation layer 9, the third barrier layer 10, the second well layer 11, and the fourth barrier layer 12, constitutes the top gallium nitride resonant tunneling diode.

[0240] Step M, growing n-type In 0.1 Ga0.9 N-collector ohmic contact layer 14, such as Figure 4 (m).

[0241] Using molecular beam epitaxy (MBE), at a temperature of 500℃, a nitrogen flow rate of 1.8 sccm, and an indium beam equilibrium vapor pressure of 2.1 × 10⁻⁶, an MBE was achieved. -7 Torr, the equilibrium vapor pressure of the gallium beam is 9.5 × 10⁻⁶. -7 Torr, the equilibrium vapor pressure of the silicon beam is 3.0 × 10⁻⁶. -8 Torr, with a nitrogen RF source power of 320W, under In... 0.1 Ga 0.9 A 200 nm thick layer with a doping concentration of 1 x 10⁻⁶ is grown on the fourth isolation layer 13. 19 cm -3 n-type In 0.1 Ga 0.9 N-collector ohmic contact layer 14.

[0242] Step N, in n-type In 0.1 Ga 0.9 A mesh-like mesa isolation trench with a depth of 800 nm was formed by homogenization, photolithography, development, and etching on the N-collector ohmic contact layer 14. Figure 4 (n).

[0243] N1) A mesa isolation pattern is formed on the collector ohmic contact layer 14 using photolithography:

[0244] The specific implementation of this step is the same as step 14.1) in Embodiment 1.

[0245] N2) Etch the collector ohmic contact layer 14 according to the mesa isolation pattern to form the mesa isolation:

[0246] Using photoresist as a mask, and employing inductively coupled plasma etching, under process conditions of Cl2 gas flow rate of 10 sccm, BCl3 gas flow rate of 25 sccm, and etching time of 300 s, the collector ohmic contact layer 14 is etched according to the mesa isolation pattern to form a grid-like mesa isolation shallow trench with a depth of 800 nm.

[0247] Step O, fabricate the collector, such as Figure 4 (o).

[0248] O1) in n-type In 0.1 Ga 0.9 PMMA A4 photoresist was spin-coated onto the N-collector ohmic contact layer 14: the first spin-coating was performed at a rotation speed of 500 rad / min and an acceleration of 1000 rad. 2 / Spin coating for 3 seconds at a speed of 4000 rad / min and an acceleration of 2000 rad / min; second coating at a speed of 4000 rad / min and an acceleration of 2000 rad / min.2 Spin coat at 180℃ for 30 seconds; then bake at 180℃ for 90 seconds.

[0249] O2) Photolithography was used to expose PMMA A4 photoresist with an electron dose ratio of 750.

[0250] O3) For the photoresist after exposure, first develop it with a solution of tetramethyl dipentanone and isopropanol in a ratio of 3:1 for 120s, and then fix it with isopropanol for 30s to form a circular collector pattern with a diameter of 10μm.

[0251] O4) Using electron beam evaporation, the collector pattern is applied according to... Ti / Au / Ni metal with a thickness of 20 / 80 / 50 nm was evaporated at a certain rate and then soaked in acetone solution to form a current collector electrode.

[0252] Step P, etching the collector ohmic contact layer 14 to form a collector cylindrical mesa, as shown. Figure 4 (p).

[0253] Using the collector metal as a mask, inductively coupled plasma etching was performed under the following conditions: Cl2 gas flow rate of 10 sccm, BCl3 gas flow rate of 25 sccm, and etching time of 200 s. This resulted in the etching of n-type In. 0.1 Ga 0.9 N-collector ohmic contact layer 14 to n-type In 0.1 Ga 0.9 N parallel layers 8 form a collector cylindrical mesa with a diameter of 10 μm, extending from the third isolation layer 9 to the collector.

[0254] Step Q: Fabricate a semi-circular ring gate with an inner circumference distance of 10 μm from the collector cylindrical mesa, as shown below. Figure 4 (q).

[0255] The specific implementation of this step is the same as step seventeen in Example 1.

[0256] Step R, in n-type In 0.1 Ga 0.9 Spin coating, photolithography, development, and etching are performed on N parallel layers 8 to form a semi-cylindrical gate mesa, such as Figure 4 (r).

[0257] R1) A semi-cylindrical gate mesa pattern is formed on the parallel layer 8, collector, and gate using photolithography:

[0258] The specific implementation of this step is the same as step 18.1) in Embodiment 1.

[0259] R2) Etch parallel layer 8 according to the semi-cylindrical gate mesa pattern to form the semi-cylindrical gate mesa:

[0260] Using photoresist as a mask, inductively coupled plasma etching is employed under the following process conditions: Cl2 gas flow rate of 10 sccm, BCl3 gas flow rate of 25 sccm, and etching time of 200 s. The parallel layer 8 is etched to the upper surface of the emitter ohmic contact layer 2 to form a semi-cylindrical gate mesa from the first isolation layer 3 to the collector.

[0261] Step S: Fabricate a semi-circular annular emitter with an inner circumference 10 μm from the cylindrical collector mesa, as shown below. Figure 4 (s).

[0262] The specific implementation of this step is the same as step nineteen in Example 1.

[0263] Step T, deposit HfO2 passivation layer 15, as follows Figure 4 (t).

[0264] Using atomic layer deposition (ALD), a 100 nm thick HfO2 passivation layer 16 was deposited over the entire sample area under the following conditions: time 70 s, temperature 280 °C, ethyl methylamino hafnium flow rate 1200 sccm, H2O flow rate 110 sccm, and N2 flow rate 1000 sccm.

[0265] Step U: A gate via, a collector via, and an emitter via are fabricated on the HfO2 passivation layer 15, as follows... Figure 4 (u).

[0266] Using photoresist as a mask, reactive ion etching was employed under the following process conditions: pressure of 1500 mTorr, power of 200 W, SF6 flow rate of 8 sccm, CHF3 flow rate of 10 sccm, and He flow rate of 150 sccm. The HfO2 passivation layer 15 was etched to the metal surfaces of the gate, collector, and emitter, forming a collector via with a diameter of 9 μm, a rectangular gate via with a length of 9 μm and a width of 2 μm, and a rectangular emitter via, respectively.

[0267] Step V, deposit interconnect metal and gate pins, as follows Figure 4 (v).

[0268] Using photolithography, the collector and emitter interconnect metal patterns and the gate electrode pin patterns are formed respectively. An 80nm thick layer of Au metal is evaporated onto the collector and emitter interconnect metal patterns and each electrode pin pattern using electron beam evaporation. Then, acetone is used to immerse the layers, achieving collector-emitter interconnection and gate-gate pin interconnection, thus realizing a parallel structure of a bottom-resonant tunneling diode and a top-resonant tunneling diode. The interconnected collector and emitter are used as one electrode of the diode, and the interconnected gate and gate pin are used as the other electrode, completing the fabrication of the resonant tunneling diode.

[0269] The above descriptions are merely three specific examples of the present invention and do not constitute any limitation on the present invention. Obviously, those skilled in the art, after understanding the content and principles of the present invention, can make various modifications and changes in form and detail without departing from the principles and structure of the present invention. For example, in addition to the already used gallium nitride, aluminum nitride, and silicon carbide materials, the substrate can also use any one of sapphire, silicon, diamond, boron nitride, and gallium oxide materials; in addition to the already used AlN, InAlN, and ScAlN materials, the first, second, third, and fourth barrier layers can also use any one of AlGaN, InAlGaN, YAlN, AlPN, BAlN, and BPN materials; in addition to the already used GaN, InGaN, and ScGaN materials, the first and second well layers can also use any one of YGaN and BGaN materials; the doping concentration of the emitter ohmic contact layer, collector ohmic contact layer, and parallel layer can also be different from the already used 1x10⁻¹⁰. 20 cm -3 5x10 19 cm -3 1x10 19 cm -3 It can also be used in 1x10 19 cm -3 -1x10 20 cm -3 The concentration can be any value between these parameters; however, these modifications and changes based on the ideas of this invention are still within the scope of the claims of this invention.

Claims

1. A nitride resonant tunneling diode with symmetrical differential negative resistance characteristics, comprising, from bottom to top, a substrate (1), an emitter ohmic contact layer (2), a first isolation layer (3), a first barrier layer (4), a first well layer (5), a fourth barrier layer (12), a fourth isolation layer (13), a collector ohmic contact layer (14), and a collector, wherein an emitter is disposed above the emitter ohmic contact layer (2), and a passivation layer (15) is wrapped around the outside of these layers and the electrode, characterized in that: A second barrier layer (6), a second isolation layer (7), a parallel layer (8), a third isolation layer (9), a third barrier layer (10), and a second well layer (11) are sequentially added between the first well layer (5) and the fourth barrier layer (12). A gate is provided above the parallel layer (8). The second barrier layer (6), the second isolation layer (7), the first isolation layer (3), the first barrier layer (4), and the first well layer (5) constitute a bottom resonant tunneling diode. The third isolation layer (9), the third barrier layer (10), the second well layer (11), the fourth barrier layer (12), and the fourth isolation layer (13) constitute a top resonant tunneling diode. The top resonant tunneling diode is vertically epitaxially grown on the bottom resonant tunneling diode through the parallel layer (8). The emitter and collector are connected by an interconnecting metal and form a parallel structure with the gate. When the gate bias is positive, the bottom resonant tunneling diode conducts and exhibits a differential negative resistance effect, while the top diode is reverse-biased and cut off. When the gate bias is negative, the top resonant tunneling diode conducts and exhibits a differential negative resistance effect, while the bottom diode is reverse-biased and cut off.

2. The diode as described in claim 1, characterized in that, The materials and parameters of each layer constituting the bottom resonant tunneling diode are as follows: The thickness of the first barrier layer (4) and the second barrier layer (6) is 1nm-3nm, and they are both made of any one of AlN, AlGaN, InAlN, ScAlN, YAlN, BAlN, AlPN and BPN materials. The thickness of the first potential well layer (5) is 1nm-3nm, and it is made of any one of GaN, InGaN, ScGaN, YGaN, or BGaN materials; The thickness of the first isolation layer (3) and the second isolation layer (7) is 4nm-15nm, and they are both made of any one of GaN, InGaN, ScGaN, YGaN and BGaN materials.

3. The diode as described in claim 1, characterized in that, The materials and parameters of each layer constituting the top resonant tunneling diode are as follows: The thickness of the third barrier layer (10) and the fourth barrier layer (12) is 1nm-3nm, and they are both made of any one of AlN, AlGaN, InAlN, ScAlN, YAlN, BAlN, AlPN and BPN materials. The thickness of the second potential well layer (11) is 1nm-3nm, and it is made of any one of GaN, InGaN, ScGaN, YGaN, and BGaN materials; The thickness of the third isolation layer (9) and the fourth isolation layer (13) is 4nm-15nm, and they are both made of any one of GaN, InGaN, ScGaN, YGaN and BGaN materials.

4. The resonant tunneling diode as described in claim 1, characterized in that: The emitter ohmic contact layer (2) and the collector ohmic contact layer (14) are both 50nm-200nm thick and are doped with a concentration of 1x10⁻⁶. 19 cm -3 -1x10 20 cm -3 It can be any one of the following: n-type GaN, n-type InGaN, n-type ScGaN, n-type YGaN, and n-type BGaN materials.

5. The resonant tunneling diode as described in claim 1, characterized in that: The thickness of the parallel layer (8) is 50nm-200nm, and it uses a doping concentration of 1x10⁻⁶. 19 cm -3 -1x10 20 cm -3 It can be any one of the following: n-type GaN, n-type InGaN, n-type ScGaN, n-type YGaN, and n-type BGaN materials.

6. The resonant tunneling diode as described in claim 1, characterized in that: The substrate (1) is made of any one of the following materials: sapphire, silicon, silicon carbide, diamond, gallium nitride, aluminum nitride, boron nitride, and gallium oxide.

7. The resonant tunneling diode as described in claim 1, characterized in that: The passivation layer (15) is made of any one of SiN, Al2O3, or HfO2.

8. A method for fabricating a nitride resonant tunneling diode with symmetrical differential negative resistance characteristics, characterized in that, Includes the following steps: 1) Using molecular beam epitaxy, an emitter ohmic contact layer (2) with a thickness of 50nm-200nm is grown on a substrate (1); 2) Using molecular beam epitaxy, a first isolation layer (3) with a thickness of 4nm-15nm is grown on the emitter ohmic contact layer (2); 3) Using molecular beam epitaxy, a first barrier layer (4) with a thickness of 1nm-3nm is grown on the first isolation layer (3); 4) Using molecular beam epitaxy, a first potential well layer (5) with a thickness of 1nm-3nm is grown on the first barrier layer (4); 5) Using molecular beam epitaxy, a second barrier layer (6) with a thickness of 1 nm-3 nm is grown on the first potential well layer (5); 6) Using molecular beam epitaxy, a second isolation layer (7) with a thickness of 4nm-15nm is grown on the second barrier layer (6); 7) Using molecular beam epitaxy, a parallel layer (8) with a thickness of 50nm-200nm is grown on the second isolation layer (7); 8) Using molecular beam epitaxy, a third isolation layer (9) with a thickness of 4nm-15nm is grown on the parallel layer (8); 9) Using molecular beam epitaxy, a third barrier layer (10) with a thickness of 1 nm-3 nm is grown on the third isolation layer (9); 10) Using molecular beam epitaxy, a second potential well layer (11) with a thickness of 1 nm-3 nm is grown on the third barrier layer (10); 11) Using molecular beam epitaxy, a fourth barrier layer (12) with a thickness of 1 nm-3 nm is grown on the second potential well layer (11); 12) Using molecular beam epitaxy, a fourth isolation layer (13) with a thickness of 4nm-15nm is grown on the fourth barrier layer (12); 13) Using molecular beam epitaxy, a collector ohmic contact layer (14) with a thickness of 50 nm-200 nm is grown on the fourth isolation layer (13); 14) Using photolithography, a mesa isolation pattern is formed on the collector ohmic contact layer (14). Then, using photoresist as a mask, the collector ohmic contact layer (14) is etched to the upper part of the substrate (1) using an inductively coupled plasma etching method with a BCl3 / Cl2 gas source to form a mesa isolation shallow trench with a depth of 200nm-800nm. 15) Using photoresist as a mask, a collector region is set on the collector ohmic contact layer (14) after the mesa is isolated, and metal Ti / Au / Ni is deposited in the region by electron beam evaporation process to form a collector. 16) Using the collector metal as a mask, the collector ohmic contact layer (14) to the upper surface of the parallel layer (8) is etched using the inductively coupled plasma etching method with a BCl3 / Cl2 gas source to form a cylindrical mesa from the third isolation layer (9) to the collector. 17) Using photoresist as a mask, a gate region is set on the parallel layer (8), and metal Ti / Au is deposited in the region by electron beam evaporation process to form the gate; 18) Using photoresist as a mask, the parallel layer (8) is etched to the upper surface of the emitter ohmic contact layer (2) using the inductively coupled plasma etching method and the BCl3 / Cl2 gas source, forming a gate mesa from the first isolation layer (3) to the parallel layer (8); 19) Using photoresist as a mask, an emitter region is set on the emitter ohmic contact layer (2), and metal Ti / Au is deposited in the region by electron beam evaporation to form an emitter; 20) A passivation layer with a thickness of 50nm-200nm is deposited over the entire sample area using plasma-enhanced chemical vapor deposition or atomic layer deposition (15); 21) Using photoresist as a mask, reactive ion etching is employed with SF6 gas source to etch the passivation layer (15) to form circular collector vias, rectangular gate vias and rectangular emitter vias, respectively. 22) Using photolithography, the collector and emitter interconnect metal pattern and the gate pin pattern are defined on the passivation layer (15). Then, using photoresist as a mask, the Au metal layer is evaporated by electron beam evaporation to form the metal interconnect between the collector and emitter electrodes, which serves as one end electrode of the diode; the gate and gate pin interconnect is formed, which serves as the other end electrode of the diode, thus completing the fabrication of a nitride resonant tunneling diode with symmetrical differential negative resistance characteristics.

9. The manufacturing method as described in claim 8, characterized in that, The molecular beam epitaxy method in steps 1)-13) has the following process conditions: The temperature is 500℃-750℃; Nitrogen flow rate is 0.6 sccm-3.0 sccm; The equilibrium vapor pressure of the gallium beam is 3.5 × 10⁻⁶. -7 Torr-9.5×10 -7 Torr; The equilibrium vapor pressure of the aluminum beam is 0.6 × 10⁻⁶. -7 Torr-3.2×10 -7 Torr; The equilibrium vapor pressure of the indium beam is 0.8 × 10⁻⁶. -7 Torr-2.1×10 -7 Torr; The equilibrium vapor pressure of the scandium beam is 1.2 × 10⁻⁶. -8 Torr-5.0×10 -8 Torr; The equilibrium vapor pressure of the yttrium beam is 1.0 × 10⁻⁶. -8 Torr-2.0×10 -8 Torr; The equilibrium vapor pressure of the silicon beam is 3.0 × 10⁻⁶. -8 Torr-3.5×10 -8 Torr; The equilibrium vapor pressure of the boron beam is 2.0 × 10⁻⁶. -8 Torr-4.0×10 -8 Torr; The equilibrium vapor pressure of the phosphorus beam is 1.0 × 10⁻⁶. -8 Torr-3.0×10 -8 Torr; The nitrogen RF source has a power of 320W-380W.

10. The manufacturing method as described in claim 8, characterized in that: The collector region in step 15) is circular in shape with a diameter of 1μm-10μm. The gate region in step 17) is semi-circular in shape, and the distance from its inner circumference to the collector cylindrical mesa is 5μm-10μm. The rectangular gate via and the rectangular emitter via in step 21) have a length of 0.5μm-9μm and a width of 0.1μm-2μm.

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