LED chip and preparation method thereof

Abstract

The application discloses an LED chip and a preparation method thereof, and relates to the technical field of semiconductors. The preparation method comprises the following steps: providing a substrate and growing an epitaxial layer on the substrate; etching the epitaxial layer to form a P-type electrode area, an N-type electrode area and an isolation groove area on the epitaxial layer; introducing a preset reaction source to deposit an Al2O3 layer with a preset thickness at a first preset temperature and a first preset pressure; performing annealing treatment on the Al2O3 layer at a second preset temperature for a preset time under the condition of light with a preset power and a preset wavelength; etching the Al2O3 layer on the P-type electrode area and the N-type electrode area by using an etching liquid to form a P-type electrode groove and an N-type electrode groove; and depositing a P-type electrode in the P-type electrode groove and depositing an N-type electrode in the N-type electrode groove. The application can solve the technical problem that the sidewall of a micro LED chip prepared by using a dry etching process is prone to defects, which affects the performance of a device.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and more specifically to an LED chip and its fabrication method. Background Technology

[0002] A light-emitting diode (LED) is a semiconductor component. LEDs are known as the fourth generation of lighting sources or green light sources, characterized by energy saving, environmental friendliness, long lifespan, and small size. They are widely used in various indication, display, decoration, backlighting, general lighting, and urban nightscape applications. Based on their function, LEDs can be categorized into five main types: information display, signal lights, automotive lighting, LCD backlighting, and general lighting.

[0003] As LED chips become increasingly miniaturized, the ratio of their specific surface area (sidewall area / volume) gradually increases when the chip size shrinks to the micrometer level. This increases the impact of the sidewalls on the overall size. Furthermore, during chip fabrication, dry etching processes can damage the chip sidewalls, leading to more severe surface defects in miniaturized LED chips and ultimately reducing the device's quantum efficiency (QE). Simultaneously, sidewall defects can easily create leakage channels, allowing charge carriers to diffuse towards the edges, increasing nonradiative recombination efficiency and leakage current, thus affecting device performance. Summary of the Invention

[0004] In view of the shortcomings of the prior art, the purpose of this invention is to provide an LED chip and its fabrication method, which aims to solve the technical problem that the sidewall of miniaturized LED chips produced by dry etching process in the prior art is prone to sidewall defects, which affect the performance of the device.

[0005] The present invention provides a method for fabricating an LED chip, the method comprising:

[0006] A substrate is provided, and an epitaxial layer is grown on the substrate;

[0007] According to the first preset etching pattern, the epitaxial layer is etched to form a P-type electrode region in the first region of the epitaxial layer, an N-type electrode region in the second region of the epitaxial layer, and an isolation trench region in the third region of the epitaxial layer.

[0008] A preset reaction source is introduced into the etched epitaxial layer, and an Al2O3 layer of preset thickness is deposited at a first preset temperature and a first preset pressure, so that the Al2O3 layer completely covers the sidewalls of the epitaxial layer, the P-type electrode region, the N-type electrode region, and the isolation trench region.

[0009] After the Al2O3 layer is deposited, annealing is performed at a second preset temperature for a preset time under preset power and preset wavelength light conditions.

[0010] According to the second preset etching pattern, the Al2O3 layer on the P-type electrode region and the N-type electrode region is etched by etching solution until the P-type electrode region and the N-type electrode region are exposed, forming P-type electrode groove and N-type electrode groove.

[0011] A P-type electrode is deposited in the P-type electrode groove, and an N-type electrode is deposited in the N-type electrode groove.

[0012] Compared with the prior art, the beneficial effects of the present invention are as follows: the LED chip fabrication method provided by the present invention can effectively repair surface defects and damage introduced by etching. Specifically, the LED chip fabrication method includes: etching an epitaxial layer according to a first preset etching pattern; forming a P-type electrode region in a first region of the epitaxial layer; forming an N-type electrode region in a second region of the epitaxial layer; forming an isolation trench region in a third region of the epitaxial layer; after etching, depositing an Al2O3 layer of a preset thickness on the surface and sidewalls of the epitaxial layer, so that the Al2O3 layer completely covers the sidewalls, P-type electrode region, N-type electrode region, and isolation trench region of the epitaxial layer; after the Al2O3 layer is deposited, under the illumination conditions of preset power and preset wavelength, the PN junction formed by the epitaxial layer will form a potential difference on the surface of the PN junction under the action of photocurrent, and the H in the Al2O3 layer... + Under the influence of the potential difference, H- ions tend to move towards the chip surface, and annealing is performed at a second preset temperature to allow the H- ions in the Al2O3 layer to... + H-ions bond with dangling bonds on the surface and sidewalls of the N-type electrode region, repairing surface defects and damage. Furthermore, Mg-H complexes are formed on the surface and sidewalls of the P-type electrode region, indirectly reducing the doping concentration of the P-type electrode region and creating a high-resistivity region. This reduces carrier diffusion to the edge, decreases the probability of nonradiative recombination of carriers, and reduces leakage current, thereby improving device performance. This solves the technical problem that sidewall defects are easily caused in miniaturized LED chips using dry etching processes, affecting device performance.

[0013] According to one aspect of the above technical solution, the preset reaction source includes TMA1 and H2O, the first preset temperature is 80℃-340℃, and the first preset pressure is 0.1mbar-10mbar.

[0014] According to one aspect of the above technical solution, in the growth step of the isolation layer, the first preset thickness is...

[0015] According to one aspect of the above technical solution, the preset power is 2kW-10kW, and the preset wavelength is 350nm-400nm.

[0016] According to one aspect of the above technical solution, the second preset temperature is 230℃-650℃, and the preset time is 1h-4h.

[0017] According to one aspect of the above technical solution, the etching solution includes a hydrochloric acid solution or a potassium hydroxide solution, and the concentration of the etching solution is 5%-15%.

[0018] According to one aspect of the above technical solution, the epitaxial layer includes an N-type semiconductor layer, a multiple quantum well layer, a P-type semiconductor layer, and a current spreading layer grown sequentially.

[0019] According to one aspect of the above technical solution, the steps of etching the epitaxial layer according to a first preset etching pattern, forming a P-type electrode region in a first region of the epitaxial layer, forming an N-type electrode region in a second region of the epitaxial layer, and forming an isolation trench region in a third region of the epitaxial layer specifically include:

[0020] The current spreading layer is etched on the first region of the epitaxial layer until the P-type semiconductor layer is exposed to form a patterned current spreading layer as a P-type electrode region.

[0021] The current spreading layer, the P-type semiconductor layer, the multiple quantum well layer to the N-type semiconductor layer are etched on the second region of the epitaxial layer, and the exposed N-type semiconductor layer is etched to form an N-type electrode region.

[0022] The epitaxial layer is etched into the substrate in a third region of the epitaxial layer, and the etched substrate forms an isolation trench region.

[0023] Another aspect of the present invention is to provide an LED chip, the LED chip being prepared by the LED chip preparation method described above, the LED chip comprising a substrate, an epitaxial layer stacked on the substrate, the epitaxial layer comprising an N-type semiconductor layer, a multiple quantum well layer, a P-type semiconductor layer, and a current spreading layer stacked sequentially;

[0024] The first region of the epitaxial layer is provided with a P-type electrode region, the second region of the epitaxial layer is provided with an N-type electrode region, and the third region of the epitaxial layer is provided with an isolation trench region.

[0025] The P-type electrode region includes a P region and a non-P region connected to the P region; the N-type electrode region includes an N region and a non-N region connected to the N region; a P-type electrode is provided on the P region; and an N-type electrode is provided on the N region.

[0026] Al2O3 layers are respectively provided on the sidewalls of the epitaxial layer, the non-P region, the non-N region, and the isolation trench region.

[0027] According to one aspect of the above technical solution, the P-type electrode region is disposed on the current spreading layer, the current spreading layer is an ITO layer, and the thickness of the current spreading layer is [missing information]. The N-type electrode region is disposed on the N-type semiconductor layer, and the isolation trench region is disposed on the substrate. Attached Figure Description

[0028] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:

[0029] Figure 1 This is a flowchart of the LED chip fabrication method in this invention;

[0030] Figure 2 This is a schematic diagram of the LED chip fabrication method in this invention;

[0031] Component symbol explanation in the attached diagram:

[0032] Substrate 100, isolation trench region 101, N-type semiconductor layer 200, N-type electrode region 201, multiple quantum well layer 300, P-type semiconductor layer 400, current spreading layer 500, P-type electrode region 501, Al2O3 layer 600, P-type electrode 700, N-type electrode 800. Detailed Implementation

[0033] To make the objectives, features, and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Several embodiments of the present invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of the present invention will be more thorough and complete.

[0034] It should be noted that when an element is referred to as being "fixed to" another element, it can be directly on the other element or there may be an intervening element. When an element is considered to be "connected" to another element, it can be directly connected to the other element or there may be an intervening element. The terms "vertical," "horizontal," "left," "right," "upper," "lower," and similar expressions used herein are for illustrative purposes only and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as limiting the invention.

[0035] In this invention, unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal communication between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances. The term "and / or" as used herein includes any and all combinations of one or more of the related listed items.

[0036] Please see Figures 1-2 The image shows a method for fabricating an LED chip according to the present invention, the method comprising steps S10-S15:

[0037] Step S10: Provide a substrate and grow an epitaxial layer on the substrate;

[0038] The substrate 100 is a growth substrate for the epitaxial layer. The substrate 100 is a patterned sapphire substrate with a thickness of 650μm-660μm.

[0039] In addition, the epitaxial layer includes an N-type semiconductor layer 200, a multiple quantum well layer 300, a P-type semiconductor layer 400, and a current spreading layer 500 grown sequentially.

[0040] Specifically, the N-type semiconductor layer 200 is an N-type GaN layer with a thickness of 2μm-3μm; the multiple quantum well layer 300 has a thickness of 90nm-260nm; and the P-type semiconductor layer 400 has a thickness of 200nm-550nm.

[0041] In addition, the current spreading layer 500 is an ITO layer with a thickness of [missing information]. Specifically, an ITO layer is deposited on the P-type semiconductor layer 400 by electron beam evaporation or magnetron sputtering, and then annealed at 450℃-600℃ for 5 minutes using rapid thermal annealing to obtain the current spreading layer 500.

[0042] Step S11: Etch the epitaxial layer according to the first preset etching pattern, form a P-type electrode region on the first region of the epitaxial layer, form an N-type electrode region on the second region of the epitaxial layer, and form an isolation trench region on the third region of the epitaxial layer.

[0043] Specifically, the current spreading layer 500 is etched on the first region of the epitaxial layer until the P-type semiconductor layer 400 is exposed to form a patterned current spreading layer 500, which serves as the P-type electrode region 501.

[0044] The process involves setting the temperature between 120℃ and 170℃, coating hexamethyldisilazane (HMDS) on the first region of the epitaxial layer as a viscosity enhancer, selecting positive photoresist as a mask layer for photolithography, immersing the epitaxial wafer in ITO etching solution for 120s-800s under a 40℃ water bath heating condition, and then removing the photoresist to form a patterned current spreading layer 500, which serves as the P-type electrode region 501.

[0045] The current spreading layer 500, the P-type semiconductor layer 400, the multiple quantum well layer 300 to the N-type semiconductor layer 200 are etched on the second region of the epitaxial layer, and the exposed N-type semiconductor layer 200 is etched to form an N-type electrode region 201.

[0046] In this process, a photoresist mask layer is formed by combining a mask with a Mesa-patterned surface with photolithography technology. The current extension layer 500, the P-type semiconductor layer 400, the multiple quantum well layer 300 to the N-type semiconductor layer 200 are etched using ICP etching technology. The exposed N-type semiconductor layer 200 is etched to form the N-type electrode region 201, and then the photoresist is removed.

[0047] The epitaxial layer is etched into the substrate 100 in the third region of the epitaxial layer, and the etched substrate 100 forms an isolation trench region 101.

[0048] In this process, a photoresist mask layer is formed by combining a mask with an ISO mesa pattern with photolithography technology. The epitaxial layer is etched to the substrate 100 using ICP etching technology. The etched substrate 100 forms an isolation trench region 101, and then the photoresist is removed.

[0049] Among them, the P-type electrode area 501 is used to connect the P-type electrode 700, the N-type electrode area 201 is used to connect the N-type electrode 800, and the isolation trench area 101 is used to isolate each chip.

[0050] Step S12: A preset reaction source is introduced into the etched epitaxial layer, and an Al2O3 layer of preset thickness is deposited at a first preset temperature and a first preset pressure, so that the Al2O3 layer completely covers the sidewalls of the epitaxial layer, the P-type electrode region, the N-type electrode region and the isolation trench region.

[0051] The preset reaction sources include TMAl and H2O, the first preset temperature is 80℃-340℃, and the first preset pressure is 0.1mbar-10mbar. The reaction is performed using ALD technology, i.e., nuclear deposition technology. An Al2O3 layer 600 is formed by nuclear deposition of TMAl and H2O at the first preset temperature and first preset pressure. The Al2O3 layer 600 covers the sidewalls of the epitaxial layer, the P-type electrode region 501, the N-type electrode region 201, and the isolation trench region 101.

[0052] By setting the first preset temperature and the first preset pressure, ALD technology deposition is achieved to obtain an Al2O3 layer 600 with excellent crystal quality, uniformity, good density and high coverage. It can be uniformly deposited and covered on the sidewalls of the epitaxial layer, the P-type electrode region 501, the N-type electrode region 201 and the sidewalls and bottom of the isolation trench region 101, so as to facilitate the repair of damage and surface defects caused by the etching process.

[0053] In addition, the first preset thickness is When the first preset thickness is too thin, the coverage is too low and the repair effect is limited; when the first preset thickness is too thick, the improvement on the subsequent repair effect is not obvious and the cost is increased.

[0054] Step S13: After the Al2O3 layer is deposited, annealing is performed at a second preset temperature for a preset time under light conditions of preset power and preset wavelength.

[0055] Among them, annealing under light illumination causes a potential difference to form on the surface of the PN junction formed by the epitaxial layer under the action of photocurrent, and the H in the Al2O3 layer 600 + H - Under the influence of the potential difference, ions tend to move towards the chip surface, repairing dangling bonds in the surface and sidewalls of the N-type electrode region 201. This forms Mg-H complexes on the surface and sidewalls of the P-type electrode region 501, indirectly reducing the doping concentration and creating a high-resistivity region. This reduces carrier diffusion to the edges, decreases the probability of non-radiative recombination, and reduces leakage current. Specifically, the H+ in the Al2O3 layer 600... + H - The ions originate from the TMAl of the pre-defined reaction source.

[0056] Preferably, the preset power is 2kW-10kW and the preset wavelength is 350nm-400nm. The preset wavelength setting will affect the photocurrent generated by the PN junction. When the illumination conditions are not within the preset wavelength range, the PN junction cannot be excited to generate photocurrent. In addition, the preset power parameter setting will affect the size of the repair area. When the preset power is too low, the depth or length of the repair area is too small, limiting the repair of damage to the LED chip and the improvement of LED chip performance. When the preset power is too high, the repair area reaches saturation, increasing costs.

[0057] Furthermore, the second preset temperature is 230℃-650℃, and the preset time is 1h-4h. Specifically, when the H in the Al2O3 layer 600... + H -When ions move towards the chip surface under the influence of the potential difference, the chip is heated through annealing, causing them to bond with dangling bonds on the surface and sidewalls of the N-type electrode region 201, and to form Mg-H bonds on the surface and sidewalls of the P-type electrode region 501, thus improving the bonding strength. If the second preset temperature is too low, the covalent bonds and Mg-H bonds formed with the dangling bonds have low and unstable bonding strength, affecting the device performance. If the second preset temperature is too high, the crystal quality of the epitaxial layer decreases, accompanied by the diffusion of dopant impurities, leading to impurity contamination and affecting the LED chip performance.

[0058] In addition, when the preset time is too short, there are too few bonded dangling bonds and Mg-H bonds, resulting in limited repair of the damaged area; when the preset time is too long, it will not affect the performance of the LED chip, but will increase cost and energy consumption.

[0059] In addition, the Al2O3 layer 600 can also be used as a passivation layer to protect the PN junction.

[0060] Step S14: According to the second preset etching pattern, the Al2O3 layer on the P-type electrode region and the N-type electrode region is etched with etching solution until the P-type electrode region and the N-type electrode region are exposed, forming P-type electrode groove and N-type electrode groove.

[0061] Specifically, the etching solution includes hydrochloric acid solution or potassium hydroxide solution, which reacts with the Al2O3 layer 600 to remove the Al2O3 layer 600 on the P-type electrode region 501 and the N-type electrode region 201.

[0062] Among them, using etching solution can effectively reduce the damaged area at the edge, reduce the non-radiative recombination efficiency of edge carriers, and avoid excessive edge damage caused by plasma bombardment etching in dry etching.

[0063] In addition, the concentration of the etching solution should be 5%-15%. When the concentration of the etching solution is too high, the etching will be too fast and the etched surface will be rough. When the concentration of the etching solution is too low, the etching angle will be bent, which will affect the performance of the LED chip.

[0064] Step S15: Deposit a P-type electrode in the P-type electrode groove and deposit an N-type electrode in the N-type electrode groove.

[0065] Both the P-type electrode 700 and the N-type electrode 800 are prepared using electron beam evaporation technology, and both the P-type electrode 700 and the N-type electrode 800 include one or more of Cr, Al, Ti, and Au.

[0066] In addition, the present invention also provides an LED chip, which is prepared by the LED chip preparation method described above. The LED chip includes a substrate and an epitaxial layer stacked on the substrate. The epitaxial layer includes an N-type semiconductor layer, a multiple quantum well layer, a P-type semiconductor layer, and a current spreading layer stacked sequentially.

[0067] Before etching, an Al2O3 layer with a thickness of [missing information] was formed on the sidewalls and surface of the epitaxial layer. Under light-heating conditions, H in the Al2O3 layer + H - Ions repair the sidewalls and surface of the epitaxial layer, reducing surface defects and damage caused by etching.

[0068] A P-type electrode region is provided on the first region of the epitaxial layer, an N-type electrode region is provided on the second region of the epitaxial layer, and an isolation trench region is provided on the third region of the epitaxial layer. The current spreading layer is etched in the first region using an etching process until the P-type semiconductor layer is exposed, forming a patterned current spreading layer that serves as the P-type electrode region. Therefore, the P-type electrode region is located on the current spreading layer, which is an ITO layer with a thickness of [missing information].

[0069] The current spreading layer, P-type semiconductor layer, multiple quantum well layer to N-type semiconductor layer are etched in the second region by etching process. The N-type semiconductor layer exposed by etching forms N-type electrode region. Therefore, N-type electrode region is located on N-type semiconductor layer.

[0070] The epitaxial layer is etched to the substrate in the third region by an etching process, and the etched substrate forms an isolation trench region on the substrate.

[0071] The P-type electrode region includes a P region and a non-P region connected to the P region, and the N-type electrode region includes an N region and a non-N region connected to the N region. The P region is provided with a P-type electrode, and the N region is provided with an N-type electrode.

[0072] The sidewalls, non-P region, non-N region, and isolation trench region of the epitaxial layer are each provided with an Al2O3 layer.

[0073] In this process, the Al2O3 layer forms P and N regions through etching, so that the epitaxial layer connects the P-type electrode and the N-type electrode, and the LED chip emits light after being energized.

[0074] In addition, the remaining Al2O3 layer serves as a passivation layer to protect the LED chip.

[0075] The present invention is further illustrated below with specific embodiments:

[0076] Example 1

[0077] The first embodiment of the present invention provides a method for fabricating an LED chip, the method comprising steps S10-S15:

[0078] Step S10: Provide a substrate and grow an epitaxial layer on the substrate;

[0079] The substrate is a patterned sapphire substrate with a thickness of 650μm-660μm.

[0080] In addition, the epitaxial layer includes an N-type semiconductor layer, a multiple quantum well layer, a P-type semiconductor layer, and a current spreading layer grown sequentially.

[0081] Specifically, the N-type semiconductor layer is an N-type GaN layer with a thickness of 2μm-3μm; the thickness of the multiple quantum well layer is 90nm-260nm; and the thickness of the P-type semiconductor layer is 200nm-550nm.

[0082] In addition, the current spreading layer is an ITO layer with a thickness of [missing information].

[0083] Step S11: Etch the epitaxial layer according to the first preset etching pattern, form a P-type electrode region on the first region of the epitaxial layer, form an N-type electrode region on the second region of the epitaxial layer, and form an isolation trench region on the third region of the epitaxial layer.

[0084] Specifically, the current spreading layer is etched on the first region of the epitaxial layer until the P-type semiconductor layer is exposed to form a patterned current spreading layer as a P-type electrode region.

[0085] The current spreading layer, the P-type semiconductor layer, the multiple quantum well layer to the N-type semiconductor layer are etched on the second region of the epitaxial layer, and the exposed N-type semiconductor layer is etched to form an N-type electrode region.

[0086] The epitaxial layer is etched into the substrate in a third region of the epitaxial layer, and the etched substrate forms an isolation trench region.

[0087] The P-type electrode area is used to connect P-type electrodes, the N-type electrode area is used to connect N-type electrodes, and the isolation trench area is used to isolate each chip.

[0088] Step S12: A preset reaction source is introduced into the etched epitaxial layer, and an Al2O3 layer of preset thickness is deposited at a first preset temperature and a first preset pressure, so that the Al2O3 layer completely covers the sidewalls of the epitaxial layer, the P-type electrode region, the N-type electrode region and the isolation trench region.

[0089] The preset reaction sources include TMA1 and H2O, the first preset temperature is 210℃, and the first preset pressure is 5 mbar. Additionally, the first preset thickness is...

[0090] Step S13: After the Al2O3 layer is deposited, annealing is performed at a second preset temperature for a preset time under light conditions of preset power and preset wavelength.

[0091] Preferably, the preset power is 5kW and the preset wavelength is 350nm-400nm.

[0092] Furthermore, the second preset temperature is 650℃ and the preset time is 2.5h.

[0093] Step S14: According to the second preset etching pattern, the Al2O3 layer on the P-type electrode region and the N-type electrode region is etched with etching solution until the P-type electrode region and the N-type electrode region are exposed, forming P-type electrode groove and N-type electrode groove.

[0094] Specifically, the etching solution includes hydrochloric acid solution or potassium hydroxide solution, which reacts with the Al2O3 layer to remove the Al2O3 layer on the P-type electrode region and the N-type electrode region.

[0095] In addition, the concentration of the etching solution is 5%-15%.

[0096] Step S15: Deposit a P-type electrode in the P-type electrode groove and deposit an N-type electrode in the N-type electrode groove.

[0097] Both the P-type and N-type electrodes are prepared using electron beam evaporation technology, and both the P-type and N-type electrodes include one or more of Cr, Al, Ti, and Au.

[0098] Example 2

[0099] The second embodiment of the present invention provides a method for fabricating an LED chip. The difference between the LED chip fabrication method in this embodiment and the LED chip fabrication method in the first embodiment is that:

[0100] The first preset thickness is

[0101] Example 3

[0102] The third embodiment of the present invention provides a method for fabricating an LED chip. The difference between the LED chip fabrication method in this embodiment and the LED chip fabrication method in the first embodiment is that:

[0103] The first preset thickness is

[0104] Example 4

[0105] The fourth embodiment of the present invention provides a method for fabricating an LED chip. The difference between the LED chip fabrication method in this embodiment and the LED chip fabrication method in the first embodiment is that:

[0106] The preset power is 3kW.

[0107] Example 5

[0108] The fifth embodiment of the present invention provides a method for fabricating an LED chip. The difference between the LED chip fabrication method in this embodiment and the LED chip fabrication method in the first embodiment is that:

[0109] The preset power is 8kW.

[0110] Example 6

[0111] The sixth embodiment of the present invention provides a method for fabricating an LED chip. The difference between the LED chip fabrication method in this embodiment and the LED chip fabrication method in the first embodiment is that:

[0112] The second preset temperature is 450℃.

[0113] Example 7

[0114] The seventh embodiment of the present invention provides a method for fabricating an LED chip. The difference between the LED chip fabrication method in this embodiment and the LED chip fabrication method in the first embodiment is that:

[0115] The second preset temperature is 550℃.

[0116] Example 8

[0117] The eighth embodiment of the present invention provides a method for fabricating an LED chip. The difference between the LED chip fabrication method in this embodiment and the LED chip fabrication method in the first embodiment is that:

[0118] The preset time is 1 hour.

[0119] Example 9

[0120] The ninth embodiment of the present invention provides a method for fabricating an LED chip. The difference between the LED chip fabrication method in this embodiment and the LED chip fabrication method in the first embodiment is that:

[0121] The preset time is 1.5 hours.

[0122] Example 10

[0123] The tenth embodiment of the present invention provides a method for fabricating an LED chip. The difference between the LED chip fabrication method in this embodiment and the LED chip fabrication method in the first embodiment is that:

[0124] The preset time is 2 hours.

[0125] Example 11

[0126] The eleventh embodiment of the present invention provides a method for fabricating an LED chip. The difference between the LED chip fabrication method in this embodiment and the LED chip fabrication method in the first embodiment is that:

[0127] The preset time is 4 hours.

[0128] Comparative Example 1

[0129] The first comparative example of this invention provides a method for fabricating an LED chip. The difference between the LED chip fabrication method in this comparative example and the LED chip fabrication method in the first embodiment is that:

[0130] There is no Al2O3 layer.

[0131] Please refer to Table 1 below, which shows the parameters corresponding to Embodiments 1 to 11 and Comparative Example 1 of the present invention.

[0132] Table 1

[0133]

[0134]

[0135] It should be noted that the LED chips of Examples 1 to 11 and Comparative Example 1 were manufactured using the same process conditions and their performance was tested at a current of 100mA.

[0136] Based on the data from Examples 1 to 11 and Comparative Example 1, it can be seen that by setting an Al2O3 layer, surface defects and damage introduced by etching can be effectively repaired, thereby improving the luminous brightness of the LED chip.

[0137] Based on the data from Examples 1 to 3, it can be seen that when the first preset thickness is too thin, the coverage is too low and the repair effect is limited; when the first preset thickness is too thick, the improvement on the subsequent repair effect is not significant and the cost is increased.

[0138] Based on the data from Examples 1, 4, and 5, it can be seen that when the preset power is too low, the depth or length of the repaired area is too small, the repair of LED chip damage is limited, and the performance improvement of LED chip is limited; when the preset power is too high, the repaired area reaches saturation, increasing costs.

[0139] Based on the data from Examples 1, 6, and 7, it can be seen that when the second preset temperature is too low, the covalent bonds and Mg-H bonds formed with the dangling bonds have low and unstable bond strength, which affects the performance of the device.

[0140] Based on the data from Examples 1, 8 to 11, it can be seen that when the preset time is too short, there are too few bonded dangling bonds and Mg-H bonds, resulting in limited repair of the damaged area; when the preset time is too long, it will not affect the performance of the LED chip, but will increase cost and energy consumption.

[0141] In summary, by setting an Al2O3 layer, surface defects and damage introduced by etching can be effectively repaired, leakage current can be reduced, and the performance of LED chips can be improved.

[0142] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0143] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this patent should be determined by the appended claims.

Claims

1. A method for fabricating an LED chip, characterized in that, The method for preparing the LED chip includes: A substrate is provided, and an epitaxial layer is grown on the substrate; According to the first preset etching pattern, the epitaxial layer is etched to form a P-type electrode region in the first region of the epitaxial layer, an N-type electrode region in the second region of the epitaxial layer, and an isolation trench region in the third region of the epitaxial layer. A preset reaction source is introduced into the etched epitaxial layer, and an Al2O3 layer of preset thickness is deposited at a first preset temperature and a first preset pressure, so that the Al2O3 layer completely covers the sidewalls of the epitaxial layer, the P-type electrode region, the N-type electrode region, and the isolation trench region. After the Al2O3 layer is deposited, annealing is performed at a second preset temperature for a preset time under preset power and preset wavelength light conditions. According to the second preset etching pattern, the Al2O3 layer on the P-type electrode region and the N-type electrode region is etched by etching solution until the P-type electrode region and the N-type electrode region are exposed, forming P-type electrode groove and N-type electrode groove. A P-type electrode is deposited in the P-type electrode groove, and an N-type electrode is deposited in the N-type electrode groove.

2. The method for preparing an LED chip according to claim 1, characterized in that, The preset reaction source includes TMA1 and H2O, the first preset temperature is 80℃-340℃, and the first preset pressure is 0.1mbar-10mbar.

3. The method for preparing an LED chip according to claim 1, characterized in that, The first preset thickness is 4. The method for preparing an LED chip according to claim 1, characterized in that, The preset power is 2kW-10kW, and the preset wavelength is 350nm-400nm.

5. The method for preparing an LED chip according to claim 1, characterized in that, The second preset temperature is 230℃-650℃, and the preset time is 1h-4h.

6. The method for preparing an LED chip according to claim 1, characterized in that, The etching solution includes a hydrochloric acid solution or a potassium hydroxide solution, and the concentration of the etching solution is 5%-15%.

7. The method for preparing an LED chip according to claim 1, characterized in that, The epitaxial layer comprises an N-type semiconductor layer, a multiple quantum well layer, a P-type semiconductor layer, and a current spreading layer grown sequentially.

8. The method for preparing an LED chip according to claim 7, characterized in that, The steps of etching the epitaxial layer according to a first preset etching pattern, forming a P-type electrode region in a first region of the epitaxial layer, forming an N-type electrode region in a second region of the epitaxial layer, and forming an isolation trench region in a third region of the epitaxial layer specifically include: The current spreading layer is etched on the first region of the epitaxial layer until the P-type semiconductor layer is exposed to form a patterned current spreading layer as a P-type electrode region. The current spreading layer, the P-type semiconductor layer, the multiple quantum well layer to the N-type semiconductor layer are etched on the second region of the epitaxial layer, and the exposed N-type semiconductor layer is etched to form an N-type electrode region. The epitaxial layer is etched into the substrate in a third region of the epitaxial layer, and the etched substrate forms an isolation trench region.

9. An LED chip, characterized in that, The LED chip is prepared by the method for preparing an LED chip according to any one of claims 1-8. The LED chip includes a substrate and an epitaxial layer stacked on the substrate. The epitaxial layer includes an N-type semiconductor layer, a multiple quantum well layer, a P-type semiconductor layer, and a current spreading layer stacked sequentially. The first region of the epitaxial layer is provided with a P-type electrode region, the second region of the epitaxial layer is provided with an N-type electrode region, and the third region of the epitaxial layer is provided with an isolation trench region. The P-type electrode region includes a P region and a non-P region connected to the P region; the N-type electrode region includes an N region and a non-N region connected to the N region; a P-type electrode is provided on the P region; and an N-type electrode is provided on the N region. Al2O3 layers are respectively provided on the sidewalls of the epitaxial layer, the non-P region, the non-N region, and the isolation trench region.

10. The LED chip according to claim 9, characterized in that, The P-type electrode region is disposed on the current spreading layer, which is an ITO layer with a thickness of [missing information]. The N-type electrode region is disposed on the N-type semiconductor layer, and the isolation trench region is disposed on the substrate.

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