A composite substrate containing a charge-barrier layer, a composite thin film and its preparation method
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-05-30
- Publication Date
- 2026-08-14
AI Technical Summary
但是其存在以下问题:当对该复合衬底、复合薄膜进行表面加工处理时,例如表面离子束轰击,会导致复合衬底、复合薄膜的表面电压增加,达到击穿电压,出现电荷下溢的现象,给器件带来后续的不良影响
[0054] The composite substrate and/or composite film of the present invention not only have a defect layer rich in carrier traps to capture carriers and suppress the PSC effect, but also add a charge barrier layer between the substrate layer and the defect layer to prevent charge overflow in the defect layer. This can significantly improve the impedance of the interface between the substrate layer and the defect layer and prevent charge overflow in the defect layer from affecting the application of the composite substrate and/or composite film in the subsequent fabrication of electronic components.
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Figure CN116721912B_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of semiconductor device fabrication, and specifically relates to a composite substrate containing a charge barrier layer, a composite thin film, and a method for preparing the same. Background Technology
[0002] Thin film materials are becoming increasingly important in today's semiconductor industry. They meet the demands of electronic components for miniaturization, low power consumption, and high performance. In recent years, a type of material known as thin film-on-insulator (SCI) structure has attracted increasing attention from the industry. It mainly consists of an uppermost active layer, a middle insulating dielectric layer, and a semiconductor substrate. This SCI structure has demonstrated excellent performance in applications such as CPU chips, memory, amplifiers, filters, and modulators.
[0003] When an insulator comes into contact with a semiconductor material, the presence of defect energy levels at the interface attracts charge carriers from the nearby semiconductor material to concentrate near the interface, resulting in parasitic surface conductance (PSC). This effect can have a detrimental impact on the final performance of some components, such as the electrical performance stability of metal-oxide-semiconductor (MOS) devices, and the RF losses of some radio frequency devices such as amplifiers, filters, and modulators.
[0004] CN 112260660 A illustrates a schematic diagram of the layer structure of a prior art thin-film material. The prior art introduces a defect layer rich in carrier traps between the insulating layer and the substrate layer to capture carriers and suppress the PSC effect. CN114497197 A discloses a composite substrate with a trapping structure, its preparation method, and electronic components. The negatively charged active centers in the trapping structure can adsorb adjacent metal cations, suppressing the PSC effect. However, it has the following problem: when the composite substrate or composite film undergoes surface processing, such as surface ion beam bombardment, the surface voltage of the composite substrate or composite film increases, reaching the breakdown voltage, resulting in charge underflow and causing adverse effects on the device. Summary of the Invention
[0005] In view of the above-mentioned problems existing in the prior art, the first technical problem to be solved by the present invention is to provide a composite substrate containing a charge blocking layer, and to prepare a composite film using the composite substrate; the second technical problem to be solved by the present invention is to provide a method for preparing the composite substrate and the composite film; the third technical problem to be solved by the present invention is to provide the application of the composite substrate and the composite film in the preparation of electronic components.
[0006] To address the above problems, the present invention provides the following technical solution:
[0007] In a first aspect, a composite substrate containing a charge-blocking layer comprises, in sequence: a substrate layer, a charge-blocking layer, a defect layer, and an isolation layer; wherein the charge-blocking layer is used to prevent charge from overflowing from the defect layer.
[0008] As a preferred embodiment of the present invention, the charge barrier layer is prepared by performing interfacial thermal diffusion doping or ion implantation doping on the process surface of the substrate layer based on interfacial thermal diffusion doping or ion implantation doping, with a doping concentration of 0.1 at% to 10 at%.
[0009] As a preferred embodiment of the present invention, when preparing the charge barrier layer based on the interfacial thermal diffusion method, the process surface of the substrate layer is bonded to the Ge wafer, and the bonding is achieved by interfacial thermal diffusion annealing under vacuum or inert atmosphere conditions. After annealing, the Ge wafer is cleaned, peeled off, and dried.
[0010] As a preferred embodiment of the present invention, when preparing the charge barrier layer based on the interfacial thermal diffusion doping method, the process surface of the substrate layer is bonded to the Ge wafer. Under a He atmosphere and a positive pressure of 0.1 Pa, the substrate is thermally diffused and annealed at 400-600°C for 10-14 hours in a discharge plasma sintering furnace. After annealing, the Ge wafer is removed by RCA cleaning, the SCA1 cleaning solution is used to finish the cleaning, and the substrate is centrifuged to dry.
[0011] As a preferred embodiment of the present invention, the material undergoes thermal diffusion annealing at 500°C for 12 hours in a discharge plasma sintering furnace.
[0012] As a preferred embodiment of the present invention, Ge is used when preparing the charge barrier layer based on the ion implantation doping method. + and / or P 5+ Ion implantation doping is performed on the process surface of the defect layer; the ion implantation dose is ≤1×10⁻⁶. 14 ions / cm 2 The implantation energy was 20–30 keV, and the implantation depth was 1–10 nm. After ion implantation doping, the cells were cleaned with RCA and finished with SCA1 cleaning solution, and then centrifuged to dry.
[0013] In a second aspect, a composite thin film containing a charge-blocking layer includes a composite substrate and a thin film layer composited on an isolation layer of the composite substrate.
[0014] Thirdly, a method for preparing a composite thin film containing a charge-blocking layer includes the following steps:
[0015] S1. Prepare the substrate and thin film substrate;
[0016] S2. A charge barrier layer is prepared by interfacial thermal diffusion doping or ion implantation doping on the process surface of the substrate. Then, a defect layer is prepared on the doped substrate. The defect layer is prepared by deposition on the substrate, etching the substrate, or implanting the substrate to generate implantation damage to form a defect layer. Then, an isolation layer is prepared on the defect layer by deposition or oxidation to form a composite substrate.
[0017] S3. Ions are implanted into the process surface of the thin film substrate using the ion implantation method to obtain a thin film substrate implantation sheet, wherein the thin film substrate implantation sheet comprises a thin film layer, an implantation layer and a residual material layer in sequence.
[0018] S4. The thin film substrate is injected and bonded to the isolation layer of the composite substrate to form a bonded body. The bonded body is heat-treated to peel off the residual layer along the injection layer from the bonded body, and the thin film layer is transferred to the composite substrate to form a composite thin film.
[0019] In this example, the substrate material can be any material that can be used as a substrate in the prior art, without special limitation, and can be specifically selected according to actual needs. For example, it can be silicon, sapphire, quartz, silicon carbide, silicon nitride, lithium niobate, lithium tantalate, or quartz glass.
[0020] In this example, the thin film substrate refers to a base material with a certain thickness used to obtain the thin film layer. The material of the thin film substrate can be any material that can be used as a thin film substrate in the prior art, without special limitation, and can be specifically selected according to actual needs. For example, it can be lithium niobate crystal, lithium tantalate crystal, gallium arsenide, silicon, ceramic, lithium tetraborate, gallium arsenide, potassium titanium oxyphosphate, rubidium titanium oxyphosphate crystal, or quartz.
[0021] As a preferred embodiment of the present invention, the defect layer material is selected from at least one of polycrystalline or amorphous silicon carbide layer, silicon layer, silicon nitride layer or polycrystalline germanium.
[0022] As a preferred embodiment of the present invention, a defect layer material is deposited on the doped substrate using a deposition method. For example, polycrystalline silicon is deposited using a deposition method, polycrystalline silicon carbide is deposited using a deposition method (deposition will not result in an amorphous state), or polycrystalline germanium is deposited using a deposition method. If the substrate is a silicon substrate, then the substrate wafer is etched using an etching method or implanted using an implantation method to generate implantation damage, forming an amorphous silicon defect layer (an amorphous state is generated only by etching and implantation).
[0023] Because of the presence of a certain density of lattice defects in the defect layer, charge carriers between adjacent layers of the defect layer can be captured, preventing charge carrier aggregation and reducing the loss of the composite thin film.
[0024] As a preferred embodiment of the present invention, the thickness of the defect layer is 300 nm to 5000 nm.
[0025] As a preferred embodiment of the present invention, the material of the isolation layer is selected from silicon dioxide, silicon oxynitride, and silicon nitride.
[0026] As a preferred embodiment of the present invention, an isolation layer is prepared on the defect layer by deposition or oxidation. The isolation layer prepared by oxidation is silicon dioxide, while the isolation layer prepared by deposition can be silicon dioxide, silicon nitride, aluminum oxide, or aluminum nitride.
[0027] In this example, when the isolation layer is prepared by deposition, the deposition method is not particularly limited and can be chemical vapor deposition (CVD), physical vapor deposition (PVD), or magnetron sputtering.
[0028] As a preferred embodiment of the present invention, when the isolation layer is prepared by deposition, the thickness of the isolation layer is 200 nm to 3000 nm.
[0029] In this example, when the isolation layer is prepared by oxidation, the side of the defect layer away from the substrate undergoes oxidation, while the other side does not.
[0030] As a preferred embodiment of the present invention, the oxidation temperature is 900–1000°C.
[0031] As a preferred embodiment of the present invention, when the defect layer material is a polycrystalline silicon layer, the isolation layer material is silicon dioxide after oxidation treatment.
[0032] In this example, when ions are implanted into the process surface of the thin film substrate to obtain a thin film substrate implanted wafer based on the ion implantation method, there is no particular limitation on the ion implantation method, and any ion implantation method in the prior art can be used.
[0033] As a preferred embodiment of the present invention, the injected ions are ions that can generate gas through heat treatment.
[0034] As a preferred embodiment of the present invention, the implanted ions are selected from one of hydrogen ions, helium ions, nitrogen ions, oxygen ions, and argon ions, with hydrogen ions or helium ions being preferred.
[0035] As a preferred embodiment of the present invention, when the injected ion is a hydrogen ion, the injection dose is 3 × 10⁻⁶. 16 ions / cm 2 ~8×10 16 ions / cm 2 The injected energy is 100keV to 400keV.
[0036] As a preferred embodiment of the present invention, when the injected ion is a hydrogen ion, the injection dose is 4 × 10⁻⁶. 16 ions / cm 2The injected energy is 180 keV.
[0037] As a preferred embodiment of the present invention, when the injected ion is helium ion, the injection dose is 1×10⁻⁶. 16 ions / cm 2 ~1×10 17 ions / cm 2 The injected energy is 50keV to 1000keV.
[0038] As a preferred embodiment of the present invention, when the injected ion is helium ion, the injection dose is 4 × 10⁻⁶. 16 ions / cm 2 The injected energy is 200 keV.
[0039] As a preferred embodiment of the present invention, when the injected ion is a nitrogen ion, the injection dose is 2 × 10⁻⁶. 16 ions / cm 2 The injected energy is 200 keV.
[0040] As a preferred embodiment of the present invention, when the injected ion is an oxygen ion, the injection dose is 1×10⁻⁶. 16 ions / cm 2 The injected energy is 300 keV.
[0041] In this example, the thickness of the thin film is adjusted by changing the depth of ion implantation, and the depth of ion implantation is directly proportional to the thickness of the thin film.
[0042] In this example, the width of the implanted layer is adjusted by adjusting the ion implantation dose, which is directly proportional to the diffusion width of the implanted layer.
[0043] In this example, the bonding method for bonding the thin film substrate implantation sheet and the isolation layer of the composite substrate to form a bonded body is not particularly limited. Any bonding method in the prior art can be used. For example, the bonding surface of the thin film substrate implantation sheet can be surface activated, the bonding surface of the composite substrate can also be surface activated, and then the two activated surfaces can be bonded to obtain a bonded body.
[0044] In this example, the method of surface activation of the bonding surface of the thin film substrate implantation sheet is not particularly limited. Any existing method for surface activation of the process surface of the thin film can be used, such as plasma activation or chemical solution activation.
[0045] In this example, the method of surface activation of the bonding surface of the composite substrate is not particularly limited. Any existing method that can be used to activate the bonding surface of the composite substrate can be adopted, such as plasma activation.
[0046] As a preferred embodiment of the present invention, the bonded body is placed in a heating device and subjected to annealing heat treatment at a preset temperature. During the annealing heat treatment, bubbles are formed in the injection layer and connect together, causing the injection layer to crack until the residual material layer is peeled off from the bonded body along the injection layer, leaving a thin film layer.
[0047] As a preferred embodiment of the present invention, the high-temperature annealing process is carried out in a vacuum environment or under a protective atmosphere formed by at least one inert gas.
[0048] As a preferred embodiment of the present invention, the annealing heat treatment includes a first annealing treatment and a second annealing treatment, wherein the temperature of the annealing heat treatment is 100-600°C.
[0049] As a preferred embodiment of the present invention, the temperature of the annealing treatment is 100-300°C, the purpose of which is to peel off the residual material layer and separate the film layer from the residual material layer.
[0050] As a preferred embodiment of the present invention, the temperature of the second annealing treatment is 300-600°C, the purpose of which is to restore the damage to the thin film layer caused by ion implantation, so that the properties of the thin film layer are close to the properties of the thin film substrate.
[0051] As a preferred embodiment of the present invention, the bonding body is subjected to annealing heat treatment to leave a thin film layer. After the thin film layer is transferred to the composite substrate, the thin film layer is further polished and thinned to 50-3000 nm, for example 400 nm, to form a composite film.
[0052] Fourthly, the application of the composite substrate or the composite film in the fabrication of electronic components is also within the scope of protection of this invention.
[0053] Compared with the prior art, the present invention has the following beneficial effects:
[0054] The composite substrate and / or composite film of the present invention not only have a defect layer rich in carrier traps to capture carriers and suppress the PSC effect, but also add a charge barrier layer between the substrate layer and the defect layer to prevent charge overflow in the defect layer. This can significantly improve the impedance of the interface between the substrate layer and the defect layer and prevent charge overflow in the defect layer from affecting the application of the composite substrate and / or composite film in the subsequent fabrication of electronic components. Attached Figure Description
[0055] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0056] Figure 1 This diagram illustrates the process of preparing a composite thin film that prevents charge underflow in a defect layer according to the present invention.
[0057] Figure 2 This illustration shows a layer structure diagram of a composite substrate that prevents charge underflow in a defect layer, as provided in this embodiment.
[0058] Figure 3 This diagram illustrates the layer structure of a composite thin film that prevents charge underflow in a defect layer, as provided in this embodiment.
[0059] Explanation of reference numerals in the attached figures:
[0060] 100-Thin film substrate, 200-Composite substrate, 300-Bonding body, 110-Mass layer, 120-Impplanted layer, 130-Thin film layer, 210-Substrate layer, 220-Charge barrier layer, 230-Defect layer, 240-Isolation layer. Detailed Implementation
[0061] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0062] Example 1
[0063] See Figure 1 Embodiment 1 of this application provides a method for preparing a composite thin film containing a charge-blocking layer, comprising the following steps:
[0064] S100: Prepare a thin film substrate 100 and a substrate, with the substrate serving as the substrate layer 210.
[0065] S200, the substrate 210 is processed to prepare a composite substrate 200. The preparation method of the composite substrate 200 is as follows: the process surface of the substrate 210 is subjected to interfacial thermal diffusion doping or ion implantation doping to obtain a charge barrier layer 220. Then, a defect layer 230 is prepared on the doped substrate. The defect layer is prepared by deposition on the substrate, etching the substrate, or implanting the substrate to generate implantation damage to form the defect layer 230. Then, an isolation layer 240 is prepared on the defect layer 230 by deposition or oxidation to form the composite substrate 200.
[0066] The substrate can be a single-layer substrate or a composite substrate; this application does not limit its application in this regard. The materials of each layer in a composite substrate can be the same or different; this application also does not limit its application in this regard. The substrate material can be silicon, sapphire, quartz, silicon carbide, silicon nitride, lithium niobate, lithium tantalate, or quartz glass; this application does not limit its application in this regard.
[0067] A thin film substrate refers to a base material with a certain thickness used to obtain a thin film layer. The material of the thin film substrate can be any material that can be used as a thin film substrate in the prior art, without special limitation, and can be specifically selected according to actual needs. For example, it can be lithium niobate crystal, lithium tantalate crystal, gallium arsenide, silicon, ceramics, lithium tetraborate, gallium arsenide, potassium titanium oxyphosphate, rubidium titanium oxyphosphate crystal, or quartz.
[0068] Figure 2 A schematic diagram of the layer structure of a composite substrate is shown. The composite substrate 200 is a material including a substrate layer 210, a charge barrier layer 220, a defect layer 230 and an isolation layer 240, obtained by a series of processing of a substrate.
[0069] S300, Ions are implanted into the thin film substrate 100 by ion implantation, and the thin film substrate 100 is sequentially divided into a residual layer 110, an implantation layer 120 and a thin film layer 130.
[0070] Ions are implanted into the process surface of a thin film substrate using ion implantation to obtain a thin film substrate implanted wafer. There are no particular restrictions on the ion implantation method, and any existing ion implantation method can be used.
[0071] The injected ions are those that can generate gas through heat treatment. For example, the injected ions can be hydrogen ions, helium ions, nitrogen ions, oxygen ions, or argon ions.
[0072] S400, the ion-implanted thin film substrate 100, i.e., the thin film substrate implantation sheet, is bonded to the composite substrate 200 to obtain the bonded body 300.
[0073] This application does not impose any particular limitation on the bonding method. Any bonding method in the prior art can be used. For example, the bonding surface of the ion-implanted thin film substrate can be surface activated, the bonding surface of the composite substrate can also be surface activated, and then the two activated surfaces can be bonded to obtain a bonded body.
[0074] S500, the bonded body 300 is heat-treated to separate the residual layer 110 from the thin film layer 130, thus obtaining a composite film.
[0075] The bonded composite is subjected to annealing heat treatment at 180–600°C for 1–100 hours. During this heat treatment, bubbles form within the implanted layer; for example, hydrogen ions form hydrogen gas, and helium ions form helium gas. As the heat treatment progresses, the bubbles within the implanted layer merge together, eventually causing the implanted layer to crack and separate from the thin film layer. This allows the excess layer to be peeled off the bonded composite, forming a thin film layer on the top surface of the treated substrate. The thin film layer is then polished and thinned to 50–3000 nm, for example, 400 nm, to obtain the composite thin film.
[0076] Figure 3 A schematic diagram of the layer structure of a composite thin film is shown; it includes a composite substrate 200 and a thin film layer 130 composited on an isolation layer 240 of the composite substrate 200.
[0077] Example 2
[0078] A method for preparing a composite thin film containing a charge-blocking layer includes the following steps:
[0079] Step 1: Prepare 6-inch silicon wafers and lithium tantalate wafers. Use the silicon wafer as the substrate and the lithium tantalate wafer as the thin film substrate. Fix the silicon wafer or the lithium tantalate wafer on the porous ceramic chuck of the polishing equipment and perform chemical mechanical polishing to obtain a smooth surface. Then, perform semiconductor RCA cleaning on both types of wafers to obtain a clean surface.
[0080] Step 2: Ge-coating the surface of the silicon wafer + Implantation doping, implantation dose ≤ 1E14 ions / cm 2 The implantation energy was approximately 20–30 keV, and the implantation depth was adjusted within the range of 1–10 nm. After ion implantation, the ions were cleaned with PCA (with SCA1 cleaning solution as the final step), centrifuged to dry, and then cleaned with RCA before Ge... + It will not diffuse upwards. The doping concentration is controlled at 5 at%. The doped substrate is subjected to PolySi deposition at 600-650℃ with a deposition thickness of 500nm.
[0081] Step 3: A silicon dioxide isolation layer is fabricated on PolySi using thermal oxidation methods (including but not limited to sputtering, evaporation, electroplating, etc.), followed by chemical mechanical polishing to a thickness of 700nm to obtain a smooth surface. RCA cleaning is then performed to obtain a clean surface, ultimately forming a composite substrate.
[0082] Step 4: Nitrogen ions are implanted into the treated lithium tantalate wafer using ion implantation, causing the lithium tantalate wafer to be sequentially divided into a residual layer, an implantation layer, and a lithium tantalate thin film layer starting from the implantation surface. Nitrogen ions are distributed in the implantation layer, resulting in a lithium tantalate implanted wafer. The implantation parameters for nitrogen ion implantation are: implantation dose of 2 × 10⁻⁶. 16ions / cm 2 The injected energy is 200 keV.
[0083] Step 5: Clean the thin film layer and silicon dioxide layer of the single-crystal lithium tantalate wafer. Use plasma bonding to bond the process surface of the cleaned lithium tantalate thin film layer to the silicon dioxide isolation layer to form a bond. This application does not specifically limit the method of surface activation of the process surface of the lithium tantalate thin film; any existing method for surface activation of the thin film's process surface can be used, such as plasma activation or chemical solution activation. Similarly, this application does not specifically limit the method of surface activation of the silicon dioxide bonding surface; any existing method suitable for surface activation of the silicon dioxide bonding surface can be used, such as plasma activation.
[0084] Step 6: The bonded body is then placed in a heating device for high-temperature annealing until the residual layer separates from the bonded body to form a lithium niobate composite film. The high-temperature annealing process is carried out in a vacuum environment or under a protective atmosphere formed by at least one of nitrogen and other inert gases. The annealing temperature is 100–600°C, and the annealing time is 1 minute–48 hours. This includes a first anneal and a second anneal. The first anneal, with a temperature range of 100–300°C, aims to remove the residual layer, separating the film layer from the residual layer. The second anneal, with a temperature range of 300–600°C, aims to eliminate implantation damage. This step can increase the bonding force by more than 10 MPa and recover from the damage caused by ion implantation to the film layer, making the obtained lithium niobate film layer closely resemble the properties of a lithium niobate wafer. The bonded body is placed in a heating device and held at a predetermined temperature for a predetermined period of time. During this process, the ions in the implanted layer undergo chemical reactions, transforming into gas molecules or atoms and generating tiny bubbles. As the heating time or temperature increases, the number of bubbles increases, and their volume gradually expands. When these bubbles coalesce, the residual mass layer separates from the implanted layer, allowing the thin film layer to transfer onto the isolation layer and form a composite structure. Next, the composite structure can be placed in a heating device and held at a predetermined temperature to eliminate damage caused by the ion implantation process. Then, the thin film layer on the isolation layer can be ground and polished to a predetermined thickness to obtain the composite thin film.
[0085] Step 7: Fix the composite film onto the porous ceramic chuck of the polishing equipment, then perform chemical mechanical polishing to remove 80nm, and finally perform RCA cleaning to obtain a clean composite film.
[0086] Example 3
[0087] A method for preparing a composite thin film containing a charge-blocking layer includes the following steps:
[0088] Step 1: Prepare 6-inch silicon wafers and lithium niobate wafers. Use the silicon wafer as the substrate and the lithium niobate wafer as the thin film substrate. Fix the silicon wafer or the lithium niobate wafer on the porous ceramic chuck of the polishing equipment and perform chemical mechanical polishing to obtain a smooth surface. Then, perform semiconductor RCA cleaning on both types of wafers to obtain a clean surface.
[0089] Step 2: Ge-coating the surface of the silicon wafer + Implantation doping, implantation dose ≤ 1E14 ions / cm 2 The implantation energy was approximately 20–30 keV, and the implantation depth was adjusted within the range of 1–10 nm. After ion implantation, the ions were cleaned with PCA (with SCA1 cleaning solution as the final step), centrifuged to dry, and then cleaned with RCA before Ge... + It will not diffuse upwards. The doping concentration is controlled at 10 at%. The doped substrate is subjected to PolySi deposition at 600-650℃ with a deposition thickness of 500nm.
[0090] Step 3: A silicon dioxide isolation layer is fabricated on PolySi using thermal oxidation methods (including but not limited to sputtering, evaporation, electroplating, etc.), followed by chemical mechanical polishing to a thickness of 100nm to obtain a smooth surface. RCA cleaning is then performed to obtain a clean surface, ultimately forming a composite substrate.
[0091] Step 4: The lithium niobate wafer processed in Step 1 is implanted with oxygen ions using a stripping ion implantation method. This process sequentially divides the lithium niobate wafer from the implantation surface into a residual layer, a separation layer, and a thin film layer. Oxygen ions are distributed in the implantation layer, resulting in a single-crystal lithium niobate wafer implanted. The implantation parameters for the stripping ion implantation method are: implantation depth of 440 nm, implantation energy of 300 keV, and implantation dose of 1 × 10⁻⁶. 16 ions / cm 2 .
[0092] Step 5: Clean the thin film layer and silicon dioxide layer of the single-crystal lithium niobate wafer. Use plasma bonding to bond the process surface of the cleaned lithium niobate thin film layer to the silicon dioxide layer to form a bond. This application does not specifically limit the method of surface activation of the process surface of the lithium niobate thin film; any existing method for surface activation of the thin film's process surface can be used, such as plasma activation or chemical solution activation. Similarly, this application does not specifically limit the method of surface activation of the silicon dioxide bonding surface; any existing method suitable for surface activation of the silicon dioxide bonding surface can be used, such as plasma activation.
[0093] Step 6: The bonded body is then placed in a heating device for high-temperature annealing until the residual layer separates from the bonded body to form a lithium niobate composite film. The high-temperature annealing process is carried out in a vacuum environment or under a protective atmosphere formed by at least one of nitrogen and other inert gases. The annealing temperature is 100–600°C, and the annealing time is 1 minute–48 hours. This includes a first anneal and a second anneal. The first anneal, with a temperature range of 100–300°C, aims to remove the residual layer, separating the film layer from the residual layer. The second anneal, with a temperature range of 300–600°C, aims to eliminate implantation damage. This step can increase the bonding force by more than 10 MPa and recover from the damage caused by ion implantation to the film layer, making the obtained lithium niobate film layer closely resemble the properties of a lithium niobate wafer. The bonded body is placed in a heating device and held at a predetermined temperature for a predetermined period of time. During this process, the ions in the implanted layer undergo chemical reactions, transforming into gas molecules or atoms and generating tiny bubbles. As the heating time or temperature increases, the number of bubbles increases, and their volume gradually expands. When these bubbles coalesce, the residual mass layer separates from the implanted layer, allowing the thin film layer to transfer onto the isolation layer and form a composite structure. Next, the composite structure can be placed in a heating device and held at a predetermined temperature to eliminate damage caused by the ion implantation process. Then, the thin film layer on the isolation layer can be ground and polished to a predetermined thickness to obtain the composite thin film.
[0094] Step 7: Fix the composite film onto the porous ceramic chuck of the polishing equipment, then perform chemical mechanical polishing to remove 20nm, and finally perform RCA cleaning to obtain a clean composite film.
[0095] Example 4
[0096] A method for preparing a composite thin film containing a charge-blocking layer includes the following steps:
[0097] Step 1: Prepare 3-inch silicon wafers and lithium niobate wafers. Use the silicon wafer as the substrate and the lithium niobate wafer as the thin film substrate. Fix the silicon wafer or the lithium niobate wafer on the porous ceramic chuck of the polishing equipment and perform chemical mechanical polishing to obtain a smooth surface. Then, perform semiconductor RCA cleaning on both types of wafers to obtain a clean surface.
[0098] Step 2: Clean the Si wafer using PCA (with DHF cleaning solution as the final step), dry it using IPA, and then bond the Si and Ge wafers together. Under a He atmosphere (positive pressure 0.1 Pa), perform thermal diffusion annealing at 500°C for 12 hours in a discharge plasma sintering furnace. After annealing, perform RCA (with SC1 cleaning solution as the final step) cleaning to remove the Ge wafer, and dry it using centrifugal force. The doping concentration is controlled at around 1%, and the doping depth is controlled at 1-10 nm. Deposit PolySi on the treated Si wafer.
[0099] Step 3: A silicon dioxide isolation layer is fabricated on PolySi using thermal oxidation, followed by chemical mechanical polishing to obtain a smooth surface with a thickness of 1 μm. RCA cleaning is then performed to obtain a clean surface, ultimately forming a composite substrate.
[0100] Step 4: He is implanted into the lithium niobate wafer processed in Step 1 using the stripping ion implantation method. + This allows the lithium niobate wafer to be sequentially divided into a residual mass layer, an implantation layer, and a thin film layer, starting from the implantation surface. + He is distributed in the implantation layer to obtain a single-crystal lithium niobate wafer implantation sheet. He is implanted using the stripping ion implantation method. + The implantation parameters were: ion implantation depth of 840 nm, implantation energy of 250 keV, and implantation dose of 2 × 10⁻⁶. 16 ions / cm 2 .
[0101] Step 5: Clean the thin film layer and silicon dioxide layer of the single-crystal lithium niobate wafer. Use plasma bonding to bond the process surface of the cleaned lithium niobate thin film layer to the silicon dioxide layer to form a bond. This application does not specifically limit the method of surface activation of the process surface of the lithium niobate thin film; any existing method for surface activation of the thin film's process surface can be used, such as plasma activation or chemical solution activation. Similarly, this application does not specifically limit the method of surface activation of the silicon dioxide bonding surface; any existing method suitable for surface activation of the silicon dioxide bonding surface can be used, such as plasma activation.
[0102] Step 6: The bonded body is then placed in a heating device for high-temperature annealing until the residual layer separates from the bonded body to form a lithium niobate composite film. The high-temperature annealing process is carried out in a vacuum environment or under a protective atmosphere formed by at least one of nitrogen and other inert gases. The annealing temperature is 100–600°C, and the annealing time (1 minute–48 hours) includes a first anneal and a second anneal. The first anneal, with a temperature range of 100–300°C, aims to remove the residual layer, separating the film layer from the residual layer. The second anneal, with a temperature range of 300–600°C, aims to eliminate implantation damage. This step can increase the bonding force by more than 10 MPa and recover from the damage caused by ion implantation to the film layer, making the obtained lithium niobate film layer closely resemble the properties of a lithium niobate wafer. The bonded body is placed in a heating device and held at a predetermined temperature for a predetermined period of time. During this process, the ions in the implanted layer undergo chemical reactions, transforming into gas molecules or atoms and generating tiny bubbles. As the heating time or temperature increases, the number of bubbles increases, and their volume gradually expands. When these bubbles coalesce, the residual mass layer separates from the implanted layer, allowing the thin film layer to transfer onto the isolation layer and form a composite structure. Next, the composite structure can be placed in a heating device and held at a predetermined temperature to eliminate damage caused by the ion implantation process. Then, the thin film layer on the isolation layer can be ground and polished to a predetermined thickness to obtain the composite thin film.
[0103] Step 7: Fix the composite film onto the porous ceramic chuck of the polishing equipment, then perform chemical mechanical polishing to remove 10nm, and finally perform RCA cleaning to obtain a clean composite film.
[0104] Example 5
[0105] A method for preparing a composite thin film containing a charge-blocking layer includes the following steps:
[0106] Step 1: Prepare 4-inch silicon wafers and lithium niobate wafers. Use the silicon wafer as the substrate and the lithium niobate wafer as the thin film substrate. Fix the silicon wafer or the lithium niobate wafer on the porous ceramic chuck of the polishing equipment and perform chemical mechanical polishing to obtain a smooth surface. Then, perform semiconductor RCA cleaning on both types of wafers to obtain a clean surface.
[0107] Step 2: Clean the Si wafer using PCA (with DHF cleaning solution as the finishing touch), dry it using IPA, and then bond the Si and Ge wafers together. Under a He atmosphere (positive pressure 0.1 Pa), perform thermal diffusion annealing at 500°C for 12 hours in a discharge plasma sintering furnace. After annealing, perform RCA (with SC1 cleaning solution as the finishing touch) cleaning to remove the Ge wafer, and dry it using centrifugal force. The doping concentration is controlled at around 0.1%, and the doping depth is controlled at 1-10 nm. Then, PolySi is deposited on the treated Si wafer to form a PolySi substrate.
[0108] Step 3: A silicon dioxide layer is fabricated on PolySi using PECVD (including but not limited to sputtering, evaporation, electroplating, etc.), followed by chemical mechanical polishing to obtain a smooth surface with a thickness of 500nm, and RCA cleaning to obtain a clean surface, finally forming a composite substrate.
[0109] Step 4: He is implanted into the lithium niobate wafer processed in Step 1 using the stripping ion implantation method. + This allows the lithium niobate wafer to be sequentially divided into a residual mass layer, an implantation layer, and a thin film layer, starting from the implantation surface. + He is distributed in the implantation layer to obtain a single-crystal lithium niobate wafer implantation sheet. He is implanted using the stripping ion implantation method. + The implantation parameters were: ion implantation depth of 840 nm, implantation energy of 250 keV, and implantation dose of 2 × 10⁻⁶. 16 ions / cm 2 .
[0110] Step 5: Clean the thin film layer and silicon dioxide layer of the single-crystal lithium niobate wafer. Use plasma bonding to bond the process surface of the cleaned lithium niobate thin film layer to the silicon dioxide layer to form a bond. This application does not specifically limit the method of surface activation of the process surface of the lithium niobate thin film; any existing method for surface activation of the thin film's process surface can be used, such as plasma activation or chemical solution activation. Similarly, this application does not specifically limit the method of surface activation of the silicon dioxide bonding surface; any existing method suitable for surface activation of the silicon dioxide bonding surface can be used, such as plasma activation.
[0111] Step 6: The bonded body is then placed in a heating device for high-temperature annealing until the residual layer separates from the bonded body to form a lithium niobate composite film. The high-temperature annealing process is carried out in a vacuum environment or under a protective atmosphere formed by at least one of nitrogen and other inert gases. The annealing temperature is 100–600°C, and the annealing time is 1 minute–48 hours. This includes a first anneal and a second anneal. The first anneal, with a temperature range of 100–300°C, aims to remove the residual layer, separating the film layer from the residual layer. The second anneal, with a temperature range of 300–600°C, aims to eliminate implantation damage. This step can increase the bonding force by more than 10 MPa and recover from the damage caused by ion implantation to the film layer, making the obtained lithium niobate film layer closely resemble the properties of a lithium niobate wafer. The bonded body is placed in a heating device and held at a predetermined temperature for a predetermined period of time. During this process, the ions in the implanted layer undergo chemical reactions, transforming into gas molecules or atoms and generating tiny bubbles. As the heating time or temperature increases, the number of bubbles increases, and their volume gradually expands. When these bubbles coalesce, the residual mass layer separates from the implanted layer, allowing the thin film layer to transfer onto the isolation layer and form a composite structure. Next, the composite structure can be placed in a heating device and held at a predetermined temperature to eliminate damage caused by the ion implantation process. Then, the thin film layer on the isolation layer can be ground and polished to a predetermined thickness to obtain the composite thin film.
[0112] Step 7: Fix the composite film onto the porous ceramic chuck of the polishing equipment, then perform chemical mechanical polishing to remove 10nm, and finally perform RCA cleaning to obtain a clean composite film.
[0113] In some of the processes described in the specification, claims, and accompanying drawings of this invention, multiple operations are included in a specific order. However, it should be clearly understood that these operations may not be performed in the order they appear herein, or they may be performed in parallel. The operation numbers, such as S100, S200, etc., are merely used to distinguish different operations and do not themselves represent any execution order. Furthermore, these processes may include more or fewer operations, and these operations may be performed sequentially or in parallel.
[0114] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion.
[0115] The present application has been described in detail above with reference to specific embodiments and exemplary examples; however, these descriptions should not be construed as limiting the present application. Those skilled in the art will understand that various equivalent substitutions, modifications, or improvements can be made to the technical solutions and implementation methods of the present application without departing from the spirit and scope of the present application, and all such modifications and improvements fall within the scope of the present application. The scope of protection of the present application is determined by the appended claims.
Claims
1. A composite substrate containing a charge-barrier layer, characterized in that, In order, they include: Substrate layer, charge barrier layer, defect layer and isolation layer; The charge barrier layer is used to prevent charge from overflowing from the defect layer; The charge barrier layer is prepared by interfacial thermal diffusion doping of the substrate layer on the process surface using the interfacial thermal diffusion doping method. When preparing a charge barrier layer based on the interfacial thermal diffusion doping method, the process plane of the substrate layer is bonded to the Ge wafer. The bonding is achieved by interfacial thermal diffusion annealing under vacuum or inert atmosphere conditions. After annealing, the Ge wafer is cleaned, peeled off, and dried.
2. A composite substrate containing a charge-barrier layer, characterized in that, In order, they include: Substrate layer, charge barrier layer, defect layer and isolation layer; The charge barrier layer is used to prevent charge from overflowing from the defect layer; The charge barrier layer is fabricated by ion implantation doping of the substrate surface using an ion implantation doping method. When preparing charge barrier layers based on ion implantation doping, Ge is used + and / or P 5+ Ion implantation doping is performed; the dose of the ion implantation is ≤1×10⁻⁶. 14 ions / cm 2 The ion implantation energy is 20 ~ 30 kev, and the ion implantation depth is 1 ~ 10 nm.
3. A composite thin film containing a charge-blocking layer, characterized in that, It includes the composite substrate as described in claim 1 or 2 and the thin film layer composited on the isolation layer of the composite substrate.
4. A method for preparing the composite thin film containing a charge-barrier layer as described in claim 3, characterized in that, Includes the following steps: S1. Prepare the substrate and thin film substrate; S2. A charge barrier layer is prepared by interfacial thermal diffusion doping or ion implantation doping on the process surface of the substrate. Then, a defect layer is prepared on the doped substrate. The defect layer is prepared by deposition on the substrate, etching the substrate, or implanting the substrate to generate implantation damage to form a defect layer. Then, an isolation layer is prepared on the defect layer by deposition or oxidation to form a composite substrate. S3. Ions are implanted into the process surface of the thin film substrate using the ion implantation method to obtain a thin film substrate implantation sheet, wherein the thin film substrate implantation sheet comprises a thin film layer, an implantation layer and a residual material layer in sequence. S4. The thin film substrate is injected and bonded to the isolation layer of the composite substrate to form a bonded body. The bonded body is heat-treated to peel off the residual layer along the injection layer from the bonded body, and the thin film layer is transferred to the composite substrate to form a composite thin film.
5. The method according to claim 4, characterized in that, In step S1, the substrate material is selected from at least one of silicon, sapphire, quartz, silicon carbide, silicon nitride, lithium niobate, lithium tantalate, and quartz glass; the thin film substrate material is selected from at least one of lithium niobate crystal, lithium tantalate crystal, gallium arsenide, silicon, ceramic, lithium tetraborate, potassium titanium oxyphosphate, rubidium titanium oxyphosphate crystal, or quartz.
6. The method according to claim 4, characterized in that, In step S2, the defect layer material is selected from at least one of polycrystalline or amorphous silicon carbide, silicon, silicon nitride, or polycrystalline germanium.
7. The method according to claim 4, characterized in that, In step S3, when ions are implanted onto the process surface of the thin film substrate to obtain the implanted thin film substrate sheet based on the ion implantation method, the implanted ions are selected from one of hydrogen ions, helium ions, nitrogen ions, oxygen ions, and argon ions; the thickness of the thin film layer and the diffusion width of the implanted layer are adjusted by adjusting the ion implantation depth and dose.
8. The application of the composite substrate containing the charge-blocking layer as described in claim 1 or 2, or the composite thin film containing the charge-blocking layer as described in claim 3, in the fabrication of electronic components.
Citation Information
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