Efficiency improvement method for staggered parallel totem-pole converter based on predictive control

Abstract

The full title of this invention is "A Method for Improving the Efficiency of Interleaved Parallel Totem-Pole Converters Based on Predictive Control." To reduce the complexity of parameter calculations and control process complexity in multi-interleaved totem-pole bridgeless power factor correction (PFC) converters and to implement multiple constraints, this invention employs duty cycle predictive control. To address the issue that multi-interleaved parallel totem-pole bridgeless PFC converters can only operate in a single state, resulting in low utilization of switching transistors and unnecessary losses, a phase-cutting technique is proposed. Furthermore, to improve the operating efficiency of the switching transistors and the overall circuit efficiency of the multi-interleaved totem-pole bridgeless PFC converter, a phase-cutting technique based on predictive control is employed. Based on duty cycle prediction, efficiency curves for each state are obtained. The effective value of the input current at the optimal phase-cutting point is obtained from the efficiency curves and used as the phase-cutting standard. To avoid frequent phase-cutting near the phase-cutting point due to small disturbances, hysteresis comparison is employed. This method can achieve higher utilization of switching transistors under non-full load conditions while satisfying PFC, significantly reducing the total harmonic distortion (THD) and improving efficiency, thus improving power quality.

Description

Technical Field

[0001] This invention belongs to the field of power electronic converter control technology, specifically relating to a method for improving the efficiency of an interleaved parallel totem pole converter based on predictive control. Background Technology

[0002] The new energy industry is developing rapidly, and chargers, as bridges connecting AC and DC, are mainly used to power new energy vehicles and other energy supply applications. Totem-pole bridgeless PFC chargers offer advantages such as high frequency, miniaturization, modularity, high power density, and simple topology. Furthermore, predictive control algorithms can overcome the complex structure and high computational load of power factor correction (PFC) algorithms, making them widely applicable in HEV / EV traction inverters, HEV / EV on-board chargers, and HEV / EV DC / DC converters.

[0003] When using a multi-interleaved totem-pole bridgeless PFC, the problem of reduced circuit operating efficiency arises. Under non-full load conditions, this leads to inactive periods for the switching transistors and various circuit loops. The totem-pole bridgeless PFC topology also suffers from the limitation that the circuit can only operate in a single state in response to load changes. It cannot adjust phase additions or subtractions according to load variations, resulting in wasted switching transistor time, reduced transistor utilization, shortened transistor lifespan, and unnecessary losses.

[0004] The technical problem to be solved by this invention is that the multi-interleaved parallel totem pole bridgeless PFC topology cannot add or subtract phases under varying load power, resulting in low efficiency under non-full load conditions. Summary of the Invention

[0005] To address the aforementioned shortcomings in the existing technology, this invention provides a method for improving the efficiency of interleaved parallel totem pole converters based on predictive control.

[0006] To achieve the aforementioned objectives, the overall technical solution adopted in this invention is a phase-cutting technique based on duty cycle prediction control, and its main circuit structure diagram is as follows: Figure 1 As shown, Figure 2 The control structure shown obtains the reference current through a phase-locked loop, obtains the predicted duty cycle through a prediction module, controls the switch to turn on, and switches the load through a hysteresis comparator.

[0007] A method for improving the efficiency of an interleaved parallel totem-pole converter based on predictive control, wherein the phase-locked loop (PLL) stage comprises the following:

[0008] The phase-locked loop detects the grid voltage and the DC bus voltage. It obtains the grid angular velocity and phase from the grid voltage, and the error between the grid voltage and the reference voltage from the DC bus voltage. It also obtains the amplitude A of the reference current through a PI loop. Finally, it obtains the reference current at the current moment using the amplitude and phase obtained above.

[0009] To obtain the reference current at the next moment, a period is added to the reference current at the current moment. The predicted reference current value for the next moment is obtained through the above process. The reference current i at the next moment. Lref (n+1) can be represented as:

[0010] i Lref (n+1)=Asin(wt n+1 )=Asin(w(t n +T))=Asin(wt n cos(wT) + Acos(wt) n sin(wT)

[0011] =i ref (n)cos(wT)+Acos(wt n sin(wT) Equation 1

[0012] In the formula, A is the absolute value of the error between the reference voltage and the DC bus voltage, w is the grid angular velocity obtained through the phase-locked loop, and T is the grid period.

[0013] A method for improving the efficiency of an interleaved parallel totem-pole converter based on predictive control, wherein the duty cycle prediction module is described in detail below:

[0014] Taking phase a as an example, the mathematical model of the three-phase interleaved parallel totem pole topology, when substituted into the differential equation, can be expressed as:

[0015]

[0016]

[0017] Where i La (n) represents the initial inductor current value at the nth sampling time; i La (t n +D n T) is the current value at which switch G2 is turned off at time n; i La (n+1) represents the current value at time n+1.

[0018] The duty cycle expression can be obtained from Equation 3:

[0019]

[0020] Similarly:

[0021]

[0022] Because under ideal conditions, the inductance values ​​of each phase are equal, and the duty cycle is equal within the same period, i.e., D n =D na =D nb =D nc Let V be the value within one period. dc U g For a constant value, use V ref Replace V dc The predicted current i at the next moment L (n+1) should theoretically be equal to the value of the reference current at the next moment, i.e., i Lref (n+1)=i L (n+1), replacing the predicted current value with the reference current value at the next moment, we have:

[0023]

[0024] set up

[0025]

[0026] Then there is

[0027] D n =D n1 +D n2 Formula 8

[0028] D n1 As a current term, it can control the inductor current to track the reference current, D n2 For the voltage term, feedback control of the output voltage can be implemented to realize the function of the voltage loop module.

[0029] A method for improving the efficiency of an interleaved parallel totem-pole converter based on predictive control, wherein the phase-cutting technique for improving efficiency is detailed below:

[0030] Since the converter does not always operate under maximum load conditions, a phase-switching control scheme is adopted to improve light-load efficiency and broaden its high-efficiency operating range. This scheme changes the number of operating phases at different power levels, ensuring that each phase operates on its maximum efficiency curve, thus achieving higher circuit efficiency. Phase switching can improve efficiency in interleaved applications by optimizing conduction and switching losses. This design has three stages, therefore three different configurations are available, as detailed below. Figure 3 As shown.

[0031] In these modes, the phase shift between each mode must be adjusted. In two-phase mode, a 180° phase shift is required between PWM signals. In three-phase mode, a 120° phase shift is required.

[0032] The calculation of the phase-cutting point can determine whether phase cutting is necessary based on different parameters. Since the load size can be directly reflected by the input current value, using the root mean square current significantly reduces the phase change delay, and using the effective current value avoids switch malfunctions due to current spikes. Therefore, this paper uses the effective value of the input inductor current as the basis for circuit phase cutting. The principle of parallel interleaved phase cutting is as follows: Figure 4 As shown.

[0033] Based on the efficiency curves measured under different phases and load conditions, the phase with the highest efficiency among different phases under the same load is selected as the optimal operating state, and the efficiency inflection point is selected as the optimal phase switching point, such as... Figure 5 The diagram shows the efficiency of each phase.

[0034] Table 1. Operating Status of Each Phase

[0035]

[0036] From the table above, we take I1 = 10A and I2 = 17A. The phase state switching control is as follows: Figure 4 As shown in (a), some hysteresis occurs around the phase switching point. To avoid frequent switching between different phase operating ranges at the phase switching point, a hysteresis comparator is installed. Considering that sudden circuit transitions can cause significant electromagnetic interference, a hysteresis comparator is used when suddenly switching from single-phase to three-phase or from three-phase to single-phase. Figure 4 As shown in (b), the buffer interval is Δi.

[0037] The control block diagram during phase cutting is as follows: Figure 6 As shown, after the effective value of the inductor current is input, a hysteresis comparator determines the operating state of each phase circuit. If the condition is met, the comparator outputs a high level, which, together with the PWM, acts on the switching transistor to turn it on; otherwise, it turns it off. This achieves the goal of adjusting the number of operating phases based on load conditions, thereby reducing losses and improving efficiency.

[0038] Due to the application of the above technical solution, the present invention has the following characteristics:

[0039] (1) This invention adopts predictive control and establishes a duty cycle prediction model for a three-phase interleaved parallel totem bridgeless PFC. Considering the different parameters of each phase, a duty cycle is predicted and compared with the carrier to obtain a switching sequence, which is used to control the switching transistor, greatly reducing the amount of calculation and also realizing multiple constraints.

[0040] (2) The present invention adopts automatic phase cutting technology to find the optimal phase cutting point, so that it operates on the optimal operating efficiency curve, thereby improving the effective utilization time of the switching transistor, reducing losses, and greatly improving the operating efficiency of the circuit.

[0041] (3) The present invention adds a hysteresis comparison circuit, which utilizes the effective value of the input current to reduce the phase delay, widens the range of current variation, and avoids frequent operation of the phase switching under small disturbances. Attached Figure Description

[0042] Figure 1 The three-phase interleaved parallel totem pole bridgeless PFC main circuit diagram of this invention

[0043] Figure 2 The predictive control structure diagram in this invention

[0044] Figure 3 Diagram of the phase-cutting process of the three-phase interleaved parallel totem pole bridgeless PFC in this invention.

[0045] Figure 4 The parallel interleaved phase cutting principle block diagram of this invention

[0046] Figure 5 Efficiency diagrams of each phase operating under theoretical conditions in this invention.

[0047] Figure 6 The phase-cutting state control diagram in this invention

[0048] Figure 7 The waveform diagram of input current and grid voltage in this invention

[0049] Figure 8 A comparison chart of efficiency under phase-cutting and non-phase-cutting conditions in this invention. Detailed Implementation

[0050] The technical solution will be clearly and completely described below with reference to preferred embodiments and accompanying drawings. It should be understood that the preferred embodiments are merely illustrative of the invention and not intended to limit the scope of protection of the invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without inventive effort are within the scope of protection of the present invention.

[0051] This invention provides a method for improving the efficiency of a multi-interleaved parallel totem-pole bridgeless PFC topology. By analyzing efficiency and current curves for single-phase, two-phase, and three-phase circuits, the optimal phase-cutting point current value is obtained. This effective current value is used as the criterion for adding or subtracting phases. Load changes directly cause changes in the input current. The effective input current value is compared with the current value at the optimal phase-cutting point. When the input current is greater than the optimal phase-cutting point current, the circuit adds a phase; when the input current is less than the optimal phase-cutting point current, it subtracts a phase. A hysteresis comparator is added to avoid frequent current changes near the phase-cutting point, which would cause repeated phase-cutting. Phase-cutting ensures the current operates at high efficiency. This reduces unnecessary switching losses, improves the effective utilization of switching transistors, and significantly enhances circuit efficiency.

[0052] A control block diagram of one embodiment is shown below. Figure 2 As shown, the phase cutting process diagram is as follows: Figure 3 As shown, the schematic diagram of the phase cutting is as follows: Figure 4 As shown, the main contents of this embodiment include the following steps:

[0053] Step S1: Detect the grid voltage and the DC bus voltage. Obtain the grid angular velocity from the sampled grid voltage. Obtain the phase of the grid voltage from the collected grid voltage. Obtain the error between the collected DC bus voltage and the reference voltage. Obtain the amplitude A of the reference current through a PI circuit. Obtain the reference current at the current moment using the amplitude and phase obtained above, and predict the reference current at the next moment.

[0054] Step S2: Based on the circuit relationship, the predicted duty cycle is obtained from the reference current, detection current, reference voltage, and grid voltage obtained in Step 1 above. The predicted duty cycle is compared with the carrier wave to obtain the PWM switching sequence.

[0055] Step S3: Obtain more than ten points on the relationship between efficiency and current of single-phase totem pole bridgeless PFC through experimental recording. With efficiency as the vertical axis and the effective value of the input current as the horizontal axis, obtain the points on the relationship between efficiency and current of single-phase totem pole bridgeless PFC. Obtain the efficiency and current relationship curve by plotting the points.

[0056] Step S4: Same as step S3 above, in the same coordinate system, draw the curve relationship between efficiency and current for single-phase, two-phase, and three-phase. Take the upper envelope of the curve as the optimal efficiency operating curve, the intersection of the upper envelope with each phase as the optimal phase-cutting point, and the horizontal axis current corresponding to the optimal phase-cutting point as the phase-cutting current when cutting phase.

[0057] Step S5: Introduce Δi as a changing current in the hysteresis comparison circuit. 2Δi is the range of current variation near the phase-cutting current. The effective value of the input current is compared with the phase-cutting current. When the effective value of the input current is greater than the phase-cutting current, the circuit starts to add phase. The current value is within the hysteresis comparison region, and the hysteresis comparison output is low.

[0058] Step S6: A decrease in load power causes a decrease in the effective value of the input current. When the effective value of the input current is less than the phase-cutting current, the circuit begins phase-reduction operation. If the current value is within the fluctuation range of the hysteresis comparator, the hysteresis comparator will still output a high level. Specific phase-cutting state control is as follows: Figure 6 As shown.

[0059] Step S7: The output of the hysteresis comparator and the pulse generated by the PWM generator work together to power the high-frequency switching transistor. When both the hysteresis comparator and the PWM generator output a high level, the switching transistor turns on; otherwise, it does not turn on. This achieves the addition / subtraction of phases based on load changes.

[0060] With a machine that adopts such Figure 1 As shown, taking a 6.6kW 400V DC output totem-pole bridgeless PFC charger as an example, the effectiveness of the proposed improvement in totem-pole efficiency based on predictive control is verified. The efficiency of a three-phase interleaved parallel totem-pole bridgeless PFC charger with and without phase cutting is compared. Figure 7 The waveforms are input current and grid voltage. Figure 8 This is a comparison of efficiency under phase-cut and non-phase-cut conditions.

[0061] Table 1 lists the parameters of the totem pole bridgeless PFC converter system.

[0062] <![CDATA[U g (V)]]> Input voltage RMS value 220 <![CDATA[V dc (V)]]> Output DC voltage 400 <![CDATA[L a (mH)]]> A-phase input inductor 5 <![CDATA[L b (mH)]]> B-phase input inductance 5 <![CDATA[L c (mH)]]> C-phase input inductor 5 C(mF) Output capacitor 3 f(kHz) Switching frequency 100 MOSFET C3M0065100K

[0063] Figure 7 The waveform diagram of the input current tracking the grid voltage is obtained from... Figure 7 It can be seen that the input current can effectively track the phase of the grid voltage, thus achieving the function of power factor correction (PFC). Figure 8 The output shows the efficiency curves for the circuit with and without phase cutting. Figure 8 It can be seen that under phase-cut operation conditions, the efficiency is higher. When the power is approximately 3.7kW and the circuit is operating in a three-phase state, the efficiency is basically the same whether the phase-cut or non-phase-cut operation is performed. This can improve the efficiency of the circuit under non-heavy load conditions, reduce energy loss, and make it more economical.

[0064] The above embodiments are merely illustrative of the technical concept and features of the present invention, intended to enable those skilled in the art to understand the content of the present invention and implement it accordingly. They should not be construed as limiting the scope of protection of the present invention. The general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein. All equivalent changes or modifications made according to the spirit and essence of the present invention should be covered within the scope of protection of the present invention.

Claims

1. A method for improving the efficiency of an interleaved parallel totem-pole converter based on predictive control, characterized in that, The method includes the following steps: S1. Detect the grid voltage and the DC bus voltage. Obtain the grid angular velocity from the sampled grid voltage. Obtain the phase of the grid voltage from the sampled grid voltage. Obtain the error between the sampled DC bus voltage and the reference voltage. Obtain the amplitude A of the reference current through the PI circuit. Obtain the reference current at the current moment using the amplitude and phase obtained above, and predict the reference current at the next moment. S2. Based on the circuit relationship, the predicted duty cycle is obtained from the reference current, detection current, reference voltage, and grid voltage obtained in step S1 above. The predicted duty cycle is compared with the carrier wave to obtain the PWM switching sequence. S3. Through experimental recording, obtain more than ten points showing the relationship between efficiency and current of single-phase totem pole bridgeless PFC. With efficiency as the vertical axis and the effective value of the input current as the horizontal axis, obtain the points showing the relationship between efficiency and current of single-phase totem pole bridgeless PFC. By plotting the points, obtain the efficiency-current relationship curve. S4. Similar to step S3 above, in the same coordinate system, draw the curve relationship between efficiency and current for single-phase, two-phase, and three-phase. Take the upper envelope of the curve as the optimal efficiency operating curve, the intersection of the upper envelope with each phase as the optimal phase-cutting point, and the horizontal axis current corresponding to the optimal phase-cutting point as the phase-cutting current when cutting phase. S5. In the hysteresis comparison circuit, a current variation range Δi is introduced. The current variation range near the phase current I is [I-Δi, I+Δi]. The effective value of the input current is compared with the phase current. When the effective value of the input current is greater than the phase current, the circuit starts to add phase. When the current value is within the hysteresis comparison region, the hysteresis comparison output is low. S6. When the load power decreases, the effective value of the input current decreases. When the effective value of the input current is less than the phase-cutting current, the circuit starts to operate in phase-reduction mode. When the current value is within the fluctuation range of the hysteresis comparator, the hysteresis comparator will still output a high level.

2. The method for improving the efficiency of an interleaved parallel totem-pole converter based on predictive control according to claim 1, characterized in that, The phase-locking process in step S1 specifically includes: The phase-locked loop (PLL) detects the grid voltage and the DC bus voltage. It obtains the grid angular velocity and phase from the acquired grid voltage, and the error between the acquired DC bus voltage and the reference voltage. A PI controller then calculates the amplitude A of the reference current. Using the obtained amplitude and phase, the current reference current is calculated. To obtain the reference current for the next time step, a period is added to the current reference current. This process yields the predicted reference current i for the next time step. Lref The characteristic of (n+1) is represented as: In the formula, A is the absolute value of the error between the reference voltage and the DC bus voltage, w is the grid angular velocity obtained through the phase-locked loop, and T is the grid period.

3. The method for improving the efficiency of an interleaved parallel totem-pole converter based on predictive control according to claim 1, characterized in that, The specific steps for duty cycle prediction in step S2 are as follows: Duty cycle prediction characteristics are: In the formula i Lref (n+1) represents the predicted reference current for the next time step, i L (n) represents the current value sampled at time n; V ref Ug is the reference voltage for DC output, and Ug is the input voltage value. ， Formula 3 D n1 As a current term, it can control the inductor current to track the reference current, D n2 This is a voltage term that enables feedback control of the output voltage, thus realizing the function of a voltage loop module.

4. The method for improving the efficiency of an interleaved parallel totem-pole converter based on predictive control according to claim 1, characterized in that, The specific steps for improving the efficiency of the S3 phase cutting are as follows: A phase-cutting control scheme is adopted to change the number of operating phases of the circuit at different power levels, so that each phase circuit can operate on the maximum efficiency curve, thereby achieving higher circuit efficiency. This involves three stages, resulting in three different configurations. In these configurations, the phase shift between each mode must be adjusted. Under light load conditions, the circuit operates in single-phase mode; under half-load conditions, it operates in two-phase mode, requiring a 180° phase shift between PWM signals, with each phase operating alternately by 180° electrical angle; under heavy load conditions, it operates in three-phase mode, requiring a 120° phase shift between PWM signals, with each of the three phases operating alternately by 120° electrical angle. The effective value of the input inductor current is used as the basis for circuit phase cutting. Based on the efficiency curves measured under different phases and load conditions, the number of phases with the highest efficiency under the same load is selected as the optimal operating state. The efficiency inflection point is selected as the optimal phase cutting point. A hysteresis comparator is set to prevent the phase cutting switch from frequently adding and subtracting phases. The current change range between buffer zones is Δi. After the effective value of the inductor current is input, the operating state of each phase circuit is determined by the hysteresis comparator. If the condition is met, the comparator outputs a high level, which works together with the PWM on the switching transistor to turn it on; otherwise, it turns it off.

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