A voltage-controlled oscillator based on series resonance, integrated circuit and electronic device

CN116722822BActive Publication Date: 2026-08-11TSINGHUA UNIVERSITY
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-04-25
Publication Date
2026-08-11

AI Technical Summary

Technical Problem

然而为了进一步实现超低相位噪声,需要实现更多核数的振荡器时,核与核的不匹配会严重影响性能,同时巨大的面积开销也是不可避免的

Benefits of technology

[0050]在具体结构上,任一有源模块均利用两个NMOS管构成的反相器实现驱动;任一串联谐振腔均包括:串联谐振单元和串联调谐单元;串联谐振单元包括:串联连接的谐振电感和谐振电容;串联调谐单元包括:串联连接的变压电感和可调电容阵,变压电感的一端与可调电容阵连接,另一端作为串联谐振腔的输出端;谐振电感的线圈与变压电感的线圈之间呈预设比例。

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Abstract

This invention provides a voltage-controlled oscillator (VCO), integrated circuit, and electronic device based on series resonance, relating to the field of radio frequency integrated circuit technology. It includes: two structurally identical half-circuits, each half-circuit comprising: two structurally identical sub-units; each sub-unit comprising: an active module and a series resonant cavity connected in series; for any sub-unit, the input terminal of the active module is connected to the output terminal of the series resonant cavity in the target sub-unit; wherein the active module is driven by an inverter composed of two NMOS transistors; the series resonant unit includes: a resonant inductor and a resonant capacitor connected in series; the series tuning unit includes: a transformer inductor and an adjustable capacitor array connected in series. This invention achieves a lower phase noise level and conveniently realizes frequency tuning. It effectively reduces the overall size of the VCO, optimizes the overall trace layout, and the coupling between them helps ensure the stability of the oscillation.
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Description

Technical Field

[0001] This invention relates to the field of radio frequency integrated circuit technology, and in particular to a voltage-controlled oscillator, integrated circuit, and electronic device based on series resonance. Background Technology

[0002] The most advanced high-performance transceivers (TRX) and digital-to-analog / analog-to-digital converters (AD / DA) generally require the clock system to guarantee strict in-band and out-of-band spectral purity. This places high demands on the on-chip frequency synthesizer (PLL), which must have ultra-low jitter performance. Ultra-low jitter performance is limited by voltage-controlled oscillators (VCOs) with ultra-low phase noise.

[0003] Currently, the most commonly used on-chip oscillator structure is the parallel LC oscillator structure. This type of oscillator typically consists of an active negative resistor and a passive inductor-capacitor resonant network. The active negative resistor provides energy, while the passive component determines the resonant frequency. Frequency tuning is achieved by changing the capacitance. Its phase noise is proportional to the square of the voltage swing; the larger the swing, the better the noise. Due to reliability limitations, the maximum achievable voltage swing of the parallel oscillator structure is 2-3VDD; otherwise, a large voltage amplitude would cause the transistor to age rapidly.

[0004] Due to limited voltage swing, single-core parallel LC oscillators typically have limited phase noise performance, and performance improvements cannot be directly achieved by increasing power consumption. Multi-core oscillators, especially dual-core and quad-core oscillators, can effectively optimize phase noise. Ideally, N noisy, incoherent oscillators can couple together, reducing phase noise by 10logN dB. However, to achieve even ultra-low phase noise, oscillators with more cores are needed. Core mismatch severely impacts performance, and significant area overhead is unavoidable. Summary of the Invention

[0005] In view of the above problems, the present invention proposes a voltage-controlled oscillator, integrated circuit and electronic device based on series resonance.

[0006] This invention provides a voltage-controlled oscillator based on series resonance, the voltage-controlled oscillator comprising: two structurally identical half-circuits, each half-circuit comprising: two structurally identical sub-units;

[0007] Each of the sub-units includes: an active module and a resonant cavity connected in series;

[0008] For any sub-unit: the input terminal of the active module is connected to the output terminal of the series resonant cavity in the target sub-unit, and the target sub-unit is two sub-units in a half-circuit that does not contain this sub-unit;

[0009] The active module utilizes an inverter composed of two NMOS transistors for driving.

[0010] The series resonant cavity includes: a series resonant unit and a series tuning unit;

[0011] The series resonant unit includes: a resonant inductor and a resonant capacitor connected in series;

[0012] The series tuning unit includes: a transformer inductor and an adjustable capacitor array connected in series, one end of the transformer inductor is connected to the adjustable capacitor array, and the other end serves as the output terminal of the series resonant cavity;

[0013] The coil of the resonant inductor and the coil of the transformer inductor are in a predetermined ratio.

[0014] Optionally, the active module includes: two NMOS transistors connected in series; each sub-unit further includes: two voltage divider capacitors connected in parallel;

[0015] One voltage divider capacitor has its first terminal serving as one input terminal of the active module and its second terminal connected to an NMOS transistor. The first terminal of another voltage divider capacitor serves as another input terminal of the active module, and its second terminal is connected to another NMOS transistor.

[0016] Both voltage-dividing capacitors are used to attenuate the voltage output from the series resonant cavity in the target subunit, thereby reducing the voltage value.

[0017] Optionally, the two identical half-circuits include: a first half-circuit and a second half-circuit; the first half-circuit includes: a first sub-unit and a second sub-unit; the second half-circuit includes: a third sub-unit and a fourth sub-unit;

[0018] The first subunit includes: a first active module and a first series resonant cavity; the second subunit includes: a second active module and a second series resonant cavity; the third subunit includes: a third active module and a third series resonant cavity; the fourth subunit includes: a fourth active module and a fourth series resonant cavity.

[0019] For the first sub-unit: the first active module includes: a first NMOS transistor and a second NMOS transistor; the two parallel voltage divider capacitors include: a first voltage divider capacitor and a second voltage divider capacitor;

[0020] The drain and gate of the first NMOS transistor both receive the power supply voltage, and its gate is connected to the second terminal of the first voltage divider capacitor.

[0021] The source of the first NMOS transistor is connected to the drain of the second NMOS transistor and the first series resonant cavity, respectively;

[0022] The gate of the second NMOS transistor receives the power supply voltage, and its gate is connected to the second terminal of the second voltage divider capacitor; the source of the second NMOS transistor is grounded.

[0023] The first terminal of the first voltage-dividing capacitor is connected to the output terminal of the fourth series resonant cavity;

[0024] The first end of the second voltage divider capacitor is connected to the output end of the third series resonant cavity.

[0025] Optionally, for the second sub-unit: the second active module includes: a third NMOS transistor and a fourth NMOS transistor; the two parallel voltage divider capacitors include: a third voltage divider capacitor and a fourth voltage divider capacitor;

[0026] The width-to-length ratio of the third NMOS transistor is the same as that of the first NMOS transistor, and the width-to-length ratio of the fourth NMOS transistor is the same as that of the second NMOS transistor.

[0027] The capacitance of the third voltage divider capacitor is the same as that of the first voltage divider capacitor, and the capacitance of the fourth voltage divider capacitor is the same as that of the second voltage divider capacitor.

[0028] Optionally, the drain and gate of the third NMOS transistor both receive the power supply voltage, and its gate is connected to the second terminal of the third voltage divider capacitor;

[0029] The source of the third NMOS transistor is connected to the drain of the fourth NMOS transistor and the second series resonant cavity, respectively.

[0030] The gate of the fourth NMOS transistor receives the power supply voltage, and its gate is connected to the second terminal of the fourth voltage divider capacitor. The source of the fourth NMOS transistor is grounded.

[0031] The first terminal of the third voltage-dividing capacitor is connected to the output terminal of the third series resonant cavity;

[0032] The first terminal of the fourth voltage divider capacitor is connected to the output terminal of the fourth series resonant cavity.

[0033] Optionally, the first series resonant cavity includes: a first resonant inductor, a first resonant capacitor, a first transformer inductor, and a first adjustable capacitor array;

[0034] The second series resonant cavity includes: a second resonant inductor, a second resonant capacitor, a second transformer inductor, and a second adjustable capacitor array;

[0035] The inductance value of the first resonant inductor is the same as the inductance value of the second resonant inductor, and the inductance value of the first transformer inductor is the same as the inductance value of the second transformer inductor;

[0036] The capacitance value of the first resonant capacitor is the same as that of the second resonant capacitor, and the adjustable capacitance value range of the first adjustable capacitor array is the same as that of the second adjustable capacitor array.

[0037] The first end of the first resonant inductor is connected to the source of the first NMOS transistor and the drain of the second NMOS transistor, respectively, and the second end of the first resonant inductor is connected to the first end of the first resonant capacitor.

[0038] The first end of the second resonant inductor is connected to the source of the third NMOS transistor and the drain of the fourth NMOS transistor, respectively, and the second end of the second resonant inductor is connected to the first end of the second resonant capacitor.

[0039] The second terminal of the first transformer inductor is connected to the first terminal of the first adjustable capacitor array;

[0040] The second terminal of the second transformer inductor is connected to the first terminal of the second adjustable capacitor array;

[0041] The first terminal of the first transformer inductor is connected to the first terminal of the fifth capacitor in the third subunit and the seventh capacitor in the fourth subunit. The capacitance value of the fifth capacitor is the same as that of the first capacitor, and the capacitance value of the seventh capacitor is the same as that of the second capacitor.

[0042] The first terminal of the second transformer inductor is connected to the first terminal of the sixth capacitor in the third subunit and the eighth capacitor in the fourth subunit. The capacitance value of the sixth capacitor is the same as that of the second capacitor, and the capacitance value of the eighth capacitor is the same as that of the first capacitor.

[0043] The second terminals of both the first resonant capacitor and the second resonant capacitor are grounded;

[0044] The second terminals of both the first adjustable capacitor array and the second adjustable capacitor array are grounded.

[0045] Optionally, if the phase of the output voltage of the first series resonant cavity is 90 degrees, then the phase of the output voltage of the second series resonant cavity is 270 degrees, the phase of the output voltage of the third series resonant cavity is 180 degrees, and the phase of the output voltage of the fourth series resonant cavity is 0 degrees.

[0046] Optionally, the preset ratio is 1:3.

[0047] This invention also provides an integrated circuit, which includes: a voltage-controlled oscillator based on series resonance as described above.

[0048] This invention also provides an electronic device, which includes: a voltage-controlled oscillator based on series resonance as described above.

[0049] The voltage-controlled oscillator based on series resonance provided by the present invention includes: two structurally identical half-circuits, each half-circuit including: two structurally identical sub-units; each sub-unit including: an active module and a series resonant cavity connected in series; for any sub-unit, the input terminal of the active module is connected to the output terminal of the series resonant cavity in the target sub-unit, the so-called target sub-unit refers to: two sub-units in the half-circuit that does not contain the target sub-unit.

[0050] In terms of specific structure, each active module is driven by an inverter composed of two NMOS transistors; each series resonant cavity includes a series resonant unit and a series tuning unit; the series resonant unit includes a resonant inductor and a resonant capacitor connected in series; the series tuning unit includes a transformer inductor and an adjustable capacitor array connected in series, one end of the transformer inductor is connected to the adjustable capacitor array, and the other end serves as the output terminal of the series resonant cavity; the coil of the resonant inductor and the coil of the transformer inductor are in a preset ratio.

[0051] The passive part of this invention is a series resonant cavity structure with a high quality factor, which achieves a voltage amplitude much higher than that of a parallel resonant oscillator, thereby obtaining a lower phase noise level. At the same time, since the high voltage amplitude node is not on the active transistor, there is no reliability problem. This structure provides greater possibilities for on-chip design of high-performance clocks and solves the mismatch problem of multi-core oscillators.

[0052] Furthermore, due to the large voltage swing, frequency tuning is required. This invention decouples the series resonant cavity, constructing a high-Q inductor-capacitor series resonant structure at one end to highlight the advantages of series resonance, and introducing a parallel capacitor array at the other end to achieve tuning. A transformer is used to decouple the tuning method, conveniently realizing frequency tuning; at the same time, the introduced transformer shapes the current and optimizes noise performance.

[0053] Furthermore, by using a folded transformer as the implementation method for the series resonant cavity, the current flow of the differential circuit can be in the form of an electromagnetic resonant cavity. This implementation method can effectively reduce the overall size of the voltage-controlled oscillator, optimize the overall wiring layout, and the coupling between them helps to ensure the stability of the oscillation. Attached Figure Description

[0054] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0055] Figure 1 This is a diagram of the current parallel LC oscillator and multi-core oscillator architectures;

[0056] Figure 2 This is a basic architecture diagram of the active and passive structures in the embodiments of the present invention;

[0057] Figure 3 This is a schematic diagram of a preferred series resonance structure in an embodiment of the present invention;

[0058] Figure 4 This is a schematic diagram of the overall layout of the series resonant voltage-controlled oscillator based on a folded transformer in an embodiment of the present invention. Detailed Implementation

[0059] To make the above-mentioned objects, features, and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present invention, and are only some, not all, embodiments of the present invention, and are not intended to limit the present invention.

[0060] The inventors discovered that the commonly used on-chip oscillator structure is a parallel LC oscillator structure, such as... Figure 1 The parallel LC oscillator and multi-core oscillator shown are Figure 1 The dashed box on the left shows the structure of a single parallel LC oscillator, while the right side schematically illustrates the architecture of multiple oscillators. A single parallel LC oscillator typically consists of an active negative resistor and a passive inductor-capacitor resonant network. The active negative resistor provides energy, while the passive component determines the resonant frequency. Frequency tuning is achieved by changing the capacitance. The oscillator's phase noise is proportional to the square of the voltage swing; a larger swing results in better noise. Due to reliability limitations, the maximum voltage swing achievable with a parallel oscillator structure is 2-3VDD (VDD generally refers to the power supply voltage). Otherwise, a large voltage amplitude would cause the transistors to age rapidly, thus limiting the voltage swing.

[0061] Further research by the inventors revealed that, due to limited voltage swing, the phase noise performance of single-core parallel LC oscillators is typically limited, and performance improvements cannot be directly achieved by increasing power consumption. Multi-core oscillators, especially dual-core and quad-core oscillators (such as…),… Figure 1 As shown in the diagram, a quad-core oscillator can effectively optimize phase noise. Ideally, N noisy, incoherent oscillators are coupled together, and the phase noise can be reduced by 10logN dB. However, to achieve even lower phase noise, an oscillator with more cores is needed. The mismatch between cores will severely affect performance, and a huge area overhead is also unavoidable.

[0062] To address the aforementioned problems, the inventors have creatively proposed a voltage-controlled oscillator, integrated circuit, and electronic device based on series resonance according to this invention. The following provides a detailed explanation and description of the voltage-controlled oscillator, integrated circuit, and electronic device based on series resonance proposed in this invention.

[0063] The voltage-controlled oscillator based on series resonance proposed in this invention essentially includes both active and passive structures. See also Figure 2 The diagram shows the basic architecture of the active and passive structures, with the passive structure creatively utilizing a series resonant cavity with a high quality factor. For the series resonant cavity, it is driven by a voltage source, and the corresponding series impedance r... s Very small. Assuming the voltage source is a square wave with amplitude VDD, the corresponding current amplitude of the series resonant cavity is 2VDD / (π×r). s The voltage amplitude at the L (resonant inductor) C (resonant capacitor) node can reach 2VDD×Q / π. Figure 2 (This is represented by the swing amplitude boost), so a voltage amplitude much higher than that of a parallel resonant oscillator can be achieved, thus obtaining a lower phase noise level. At the same time, since the high voltage amplitude node is not on the transistor in the active structure, there is no reliability problem.

[0064] For the active structure portion, an NMOS-NMOS inverter structure is required for driving. No auxiliary units are needed during startup. The transistors in the active structure are designed to be large enough to ensure high current flow, and the transistors operate mostly in the linear or cutoff regions. This structure introduces very low phase noise into the active portion. However, because the input voltage experiences a ±90-degree phase shift after passing through a single-stage series resonant cavity, the entire voltage-controlled oscillator requires four cascaded series resonant cavities to meet the startup conditions, essentially making the voltage-controlled oscillator a four-phase oscillator.

[0065] Based on the above considerations, the voltage-controlled oscillator based on series resonance proposed in this invention comprises: two structurally identical half-circuits, each half-circuit comprising: two structurally identical sub-units; each sub-unit comprising: an active module and a series resonant cavity connected in series; that is, each sub-unit comprises the aforementioned active structure and passive structure. The entire voltage-controlled oscillator is equivalent to having four structurally identical sub-units.

[0066] For any given sub-unit, the input terminal of the active module is connected to the output terminal of the series resonant cavity in the target sub-unit, which is one of two sub-units in a half-circuit that does not contain this sub-unit. For example, four structurally identical sub-units of a voltage-controlled oscillator are numbered 1, 2, 3, and 4, where sub-units 1 and 2 are in the same half-circuit, and sub-units 3 and 4 are in the same half-circuit. Therefore, if the input terminal of the active module in sub-units 1 and 2 is connected to the output terminal of the series resonant cavity in sub-units 3 and 4, it is naturally understood that the input terminal of the active module in sub-units 3 and 4 is connected to the output terminal of the series resonant cavity in sub-units 1 and 2.

[0067] As described above, each sub-unit has an active module driven by an inverter composed of two NMOS transistors; each sub-unit's series resonant cavity includes a series resonant unit and a series tuning unit. The series resonant unit includes a resonant inductor and a resonant capacitor connected in series; the series tuning unit includes a transformer inductor and an adjustable capacitor array connected in series, with one end of the transformer inductor connected to the adjustable capacitor array and the other end serving as the output terminal of the series resonant cavity; the coils of the resonant inductor and the transformer inductor are in a preset ratio.

[0068] Because of the large voltage swing at the LC node in a series resonant cavity, it is necessary to consider how to conveniently achieve frequency tuning. This invention creatively decouples the series resonant cavity, constructing a high-Q inductor and capacitor at one end to highlight the advantages of series resonance, and introducing a parallel capacitor array (i.e., a tunable capacitor array) at the other end to achieve tuning. Because of the introduction of multiple series capacitors, neither the capacitor array nor the transistors in the active module will withstand large voltages.

[0069] In addition, to further improve the voltage swing and frequency tuning, and to facilitate the decoupling of the series resonant cavity and the miniaturization of the overall size, a transformer structure is designed in the series resonant cavity. Therefore, the output voltage of the series resonant cavity will be relatively high. This output voltage needs to be fed back to the input of the next stage active module. In order to avoid the transistors bearing excessive voltage, a capacitor can be introduced in front of the active module to divide and attenuate the high output voltage.

[0070] Based on the above considerations, in one possible embodiment, the active module includes two NMOS transistors connected in series; each sub-unit further includes two voltage divider capacitors connected in parallel. The first terminal of one voltage divider capacitor serves as one input terminal of the active module, and the second terminal is connected to one NMOS transistor; while the first terminal of the other voltage divider capacitor serves as the other input terminal of the active module, and the second terminal of the other voltage divider capacitor is connected to another NMOS transistor.

[0071] Both voltage-dividing capacitors are used to attenuate the voltage output from the series resonant cavity in the target subunit, thereby reducing the voltage value.

[0072] To more clearly explain and illustrate the voltage-controlled oscillator based on series resonance proposed in this invention, refer to... Figure 3 The diagram shows a preferred series resonant structure. Figure 3 The circuit is divided into two halves by a dashed line: the left half is the first half (circuit 1), and the right half is the second half (circuit 2). In the first half, the upper part is the first sub-unit, and the lower part is the second sub-unit; in the second half, the upper part is the third sub-unit, and the lower part is the fourth sub-unit.

[0073] The first sub-unit includes: a first voltage divider capacitor C3 and a second voltage divider capacitor C4; the first active module includes: a first NMOS transistor M1 and a second NMOS transistor M2. The first series resonant cavity includes: a first resonant inductor L1, a first resonant capacitor C1, a first transformer inductor L2, and a first adjustable capacitor array C2.

[0074] The second subunit includes: a third voltage divider capacitor C7 and a fourth voltage divider capacitor C8; the second active module includes: a third NMOS transistor M3 and a fourth NMOS transistor M4. The second series resonant cavity includes: a second resonant inductor L3, a second resonant capacitor C5, a second transformer inductor L4, and a second adjustable capacitor array C6.

[0075] The components of the remaining third and fourth sub-units are easily understood from the previous description and will not be repeated here. Figure 3 It can be seen that the two series resonant cavities of the same half-circuit are actually a series-coupled resonant cavity. Figure 3 The dashed box A on the right exemplifies that the third and fourth series resonant cavities are a series coupled resonant cavity.

[0076] Therefore, in the specific connection relationship, the drain and gate of the first NMOS transistor M1 both receive the power supply voltage VDD, and its gate is connected to the second end of the first voltage divider capacitor C3; the source of the first NMOS transistor M1 is connected to the drain of the second NMOS transistor M2 and the first end of the first resonant inductor L1 in the first series resonant cavity, respectively.

[0077] The gate of the second NMOS transistor M2 receives the power supply voltage VDD, and its gate is connected to the second terminal of the second voltage divider capacitor C4. The source of the second NMOS transistor M2 is grounded. The first terminal of the first voltage divider capacitor C3 is connected to the output terminal of the fourth series resonant cavity, i.e., the first terminal of the transformer inductor L8.

[0078] The first terminal of the second voltage divider capacitor C4 is connected to the output terminal of the third series resonant cavity, i.e., the first terminal of the transformer inductor L6.

[0079] The drain and gate of the third NMOS transistor M3 both receive the power supply voltage VDD, and its gate is connected to the second terminal of the third voltage divider capacitor C7; the source of the third NMOS transistor M3 is connected to the drain of the fourth NMOS transistor M4 and the first terminal of the resonant inductor L3 in the second series resonant cavity, respectively.

[0080] The gate of the fourth NMOS transistor M4 receives the power supply voltage VDD, and its gate is connected to the second terminal of the fourth voltage divider capacitor C8. The source of the fourth NMOS transistor M4 is grounded.

[0081] The first terminal of the third voltage-dividing capacitor C7 is connected to the output terminal of the third series resonant cavity, i.e., the first terminal of the transformer inductor L6; the first terminal of the fourth voltage-dividing capacitor C8 is connected to the output terminal of the fourth series resonant cavity, i.e., the first terminal of the transformer inductor L8. The width-to-length ratio of the third NMOS transistor M3 is the same as that of the first NMOS transistor M1, and the width-to-length ratio of the fourth NMOS transistor M4 is the same as that of the second NMOS transistor M2; the capacitance value of the third voltage-dividing capacitor C7 is the same as that of the first voltage-dividing capacitor C3, and the capacitance value of the fourth voltage-dividing capacitor C8 is the same as that of the second voltage-dividing capacitor C4.

[0082] In the same half-circuit, the inductance value of the first resonant inductor L1 is the same as that of the second resonant inductor L3, the inductance value of the first transformer inductor L2 is the same as that of the second transformer inductor L4, the capacitance value of the first resonant capacitor C1 is the same as that of the second resonant capacitor C5, and the adjustable capacitance range of the first adjustable capacitor array C2 is the same as that of the second adjustable capacitor array C6.

[0083] The first end of the first resonant inductor L1 is connected to the source of the first NMOS transistor M1 and the drain of the second NMOS transistor M2, respectively, and the second end of the first resonant inductor L1 is connected to the first end of the first resonant capacitor C1.

[0084] The first end of the second resonant inductor L3 is connected to the source of the third NMOS transistor M3 and the drain of the fourth NMOS transistor M4, respectively, and the second end of the second resonant inductor L3 is connected to the first end of the second resonant capacitor C5.

[0085] The second terminal of the first transformer inductor L2 is connected to the first terminal of the first adjustable capacitor array C2; the second terminal of the second transformer inductor L4 is connected to the first terminal of the second adjustable capacitor array C6; the first terminal of the first transformer inductor L2 is connected to the first terminal of the fifth capacitor C11 in the third sub-unit and the seventh capacitor C15 in the fourth sub-unit. The capacitance value of the fifth capacitor C11 is the same as the capacitance value of the first capacitor C3, and the capacitance value of the seventh capacitor C15 is the same as the capacitance value of the second capacitor C4.

[0086] The first terminal of the second transformer inductor L4 is connected to the first terminal of the sixth capacitor C12 in the third subunit and the eighth capacitor C16 in the fourth subunit. The capacitance value of the sixth capacitor C12 is the same as that of the second capacitor C4, and the capacitance value of the eighth capacitor C16 is the same as that of the first capacitor C3.

[0087] The second terminal of the first resonant capacitor C1 and the second terminal of the second resonant capacitor C5 are both grounded; the second terminal of the first adjustable capacitor array C2 and the second terminal of the second adjustable capacitor array C6 are both grounded.

[0088] The principle and structure of the voltage-controlled oscillator have been explained and illustrated above using the first half-circuit as an example. The second half-circuit can be easily understood by referring to the explanation and illustration of the first half-circuit, and will not be repeated here.

[0089] It should be noted that this invention essentially utilizes a transformer inductor to achieve the function of a transformer. Therefore, the coils of the resonant inductor and the transformer inductor are in a predetermined ratio. For example, the coils of the first resonant inductor L1 and the first transformer inductor L2 are in a predetermined ratio, and the coils of the second resonant inductor L3 and the second transformer inductor L4 are also in a predetermined ratio. Through simulation and testing, the inventors have found that a predetermined ratio of 1:3 is optimal. That is, the number of turns of the coils of the first resonant inductor L1 is in a 1:3 ratio with the number of turns of the coils of the first transformer inductor L2, the number of turns of the coils of the second resonant inductor L3 is in a 1:3 ratio with the number of turns of the coils of the second transformer inductor L4, and choosing this predetermined ratio for the other two sub-units is also an optimal choice.

[0090] As described above, the input voltage will have a 90-degree phase shift after passing through a single-stage series resonant cavity. Therefore, if the phase of the output voltage of the first series resonant cavity is 90 degrees... Figure 3 If V90 is used to represent this value, then the phase of the output voltage of the second series resonant cavity is 270 degrees. Figure 3 (represented by V270 in Chinese), the phase of the output voltage of the third series resonant cavity is 180 degrees. Figure 3 (represented by V180 in the text), the phase of the output voltage of the fourth series resonant cavity is 0 degrees. Figure 3 (represented by V0 in Chinese).

[0091] In practical circuit applications, inductors made of high-layer metal can be used, and voltage-controlled oscillators can be fabricated using CMOS technology. Based on Figure 3 The principle structure diagram shows that this invention proposes a folded transformer as a implementation method for a series resonant cavity, referring to... Figure 4 The diagram shows the overall layout of a series resonant voltage-controlled oscillator based on a folded transformer.

[0092] Figure 4 The structure within the dashed box can be considered as Figure 3The schematic diagram corresponds to the layout, with active components (i.e., active modules) and capacitors (i.e., voltage divider capacitors) represented in the dashed box in the middle. Figure 3 The active module structure and voltage divider capacitors in the middle.

[0093] Since the two sub-units in the half-circuit have identical structures, they can be merged to obtain the overall layout shown below. The current flow of the differential circuit can be represented by an electromagnetic resonant cavity. This implementation effectively reduces the overall size of the voltage-controlled oscillator (VCO), optimizes the overall trace layout, and the coupling between them helps ensure oscillation stability. Furthermore, the impact of this implementation on the inductor Q value is negligible. In the overall layout, the two sides are series resonant cavities with high quality factors, their phase difference is 90 degrees, and the current flows in a figure-eight pattern. The middle section contains large-size active transistors arranged vertically in a switching-like operating mode. Figure 4 The solid box 12 represents the structure of four active modules and eight voltage divider capacitors. Solid boxes 10 and 11 represent four adjustable capacitor arrays. Figure 4 For the sake of simplicity and clarity, only half of the connection between the transistors and the voltage divider capacitors in the active section is shown. The remaining half of the connection between the four NMOS transistors M1, M2, M3, and M4 and the voltage divider capacitors C3, C7, C4, and C8 can be found by referring to [the diagram]. Figure 3 and Figure 4 Half of the wiring can be easily obtained. In addition, in order to ensure that the resonant inductor functions properly after merging, the length or area of ​​the resonant inductors L1, L4, L5, and L7 needs to be increased during the manufacturing process, so that the original one-turn inductor becomes half of the trace inductance.

[0094] Generally, oscillator performance is mainly considered based on several indicators such as operating frequency, power consumption, and phase noise. The FoM (intermediate frequency) can comprehensively reflect the performance of these factors, and its specific expression is:

[0095] FoM=-20lg(f0 / △f)+PN+10lg(PDC / 1mW)

[0096] The smaller the FoM value, the better the overall performance of the oscillator.

[0097] To verify the superiority of the voltage-controlled oscillator based on series resonance proposed in this invention, the performance of the voltage-controlled oscillator based on series resonance proposed in this invention was tested with that of currently known ultra-low phase noise oscillators. The comprehensive performance results are shown in the table below:

[0098]

[0099] Therefore, it can be seen that, when using CMOS technology, the phase noise of the voltage-controlled oscillator proposed in this invention is more than 5dB better than other oscillators, and it has four-phase output, which has great potential to improve the performance of ultra-low phase noise.

[0100] In this embodiment of the invention, based on the above-described voltage-controlled oscillator, an integrated circuit is also proposed, the integrated circuit comprising: a voltage-controlled oscillator based on series resonance as described above.

[0101] In this embodiment of the invention, based on the above-described voltage-controlled oscillator, an electronic device is also proposed, the electronic device comprising: a voltage-controlled oscillator based on series resonance as described above.

[0102] In summary, the voltage-controlled oscillator based on series resonance of the present invention includes: two structurally identical half-circuits, each half-circuit including: two structurally identical sub-units; each sub-unit including: an active module and a series resonant cavity connected in series; for any sub-unit, the input terminal of the active module is connected to the output terminal of the series resonant cavity in the target sub-unit, the so-called target sub-unit being: two sub-units in the half-circuit that does not contain the target sub-unit.

[0103] In terms of specific structure, each active module is driven by an inverter composed of two NMOS transistors; each series resonant cavity includes a series resonant unit and a series tuning unit; the series resonant unit includes a resonant inductor and a resonant capacitor connected in series; the series tuning unit includes a transformer inductor and an adjustable capacitor array connected in series, one end of the transformer inductor is connected to the adjustable capacitor array, and the other end serves as the output terminal of the series resonant cavity; the coil of the resonant inductor and the coil of the transformer inductor are in a preset ratio.

[0104] The passive part of this invention is a series resonant cavity structure with a high quality factor, which achieves a voltage amplitude much higher than that of a parallel resonant oscillator, thereby obtaining a lower phase noise level. At the same time, since the high voltage amplitude node is not on the active transistor, there is no reliability problem. This structure provides greater possibilities for on-chip design of high-performance clocks and solves the mismatch problem of multi-core oscillators.

[0105] Furthermore, due to the large voltage swing, frequency tuning is required. This invention decouples the series resonant cavity, constructing a high-Q inductor-capacitor series resonant structure at one end to highlight the advantages of series resonance, and introducing a parallel capacitor array at the other end to achieve tuning. A transformer is used to decouple the tuning method, conveniently realizing frequency tuning; at the same time, the introduced transformer shapes the current and optimizes noise performance.

[0106] Furthermore, by using a folded transformer as the implementation method for the series resonant cavity, the current flow of the differential circuit can be in the form of an electromagnetic resonant cavity. This implementation method can effectively reduce the overall size of the voltage-controlled oscillator, optimize the overall wiring layout, and the coupling between them helps to ensure the stability of the oscillation.

[0107] Although preferred embodiments of the present invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the embodiments of the present invention.

[0108] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or terminal device. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or terminal device that includes said element.

[0109] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims. All of these forms are within the protection scope of the present invention.

Claims

1. A voltage-controlled oscillator based on series resonance, characterized in that, The voltage-controlled oscillator includes two identical half-circuits, each half-circuit including two identical sub-units; Each of the sub-units includes: an active module and a resonant cavity connected in series; For any sub-unit: the input terminal of the active module is connected to the output terminal of the series resonant cavity in the target sub-unit, and the target sub-unit is two sub-units in a half-circuit that does not contain this sub-unit; The active module utilizes an inverter composed of two NMOS transistors for driving. The series resonant cavity includes: a series resonant unit and a series tuning unit; The series resonant unit includes: a resonant inductor and a resonant capacitor connected in series; The series tuning unit includes: a transformer inductor and an adjustable capacitor array connected in series, one end of the transformer inductor is connected to the adjustable capacitor array, and the other end serves as the output terminal of the series resonant cavity; The coil of the resonant inductor and the coil of the transformer inductor are mutually coupled and in a predetermined ratio.

2. The voltage-controlled oscillator according to claim 1, characterized in that, The active module includes two NMOS transistors connected in series; each sub-unit also includes two voltage divider capacitors. One voltage divider capacitor has its first terminal serving as one input terminal of the active module and its second terminal connected to an NMOS transistor. The first terminal of another voltage divider capacitor serves as another input terminal of the active module, and its second terminal is connected to another NMOS transistor. Both voltage-dividing capacitors are used to attenuate the voltage output from the series resonant cavity in the target subunit, thereby reducing the voltage value.

3. The voltage-controlled oscillator according to claim 1, characterized in that, Two identical half-circuits include: a first half-circuit and a second half-circuit; the first half-circuit includes: a first sub-unit and a second sub-unit; the second half-circuit includes: a third sub-unit and a fourth sub-unit; The first subunit includes: a first active module and a first series resonant cavity; the second subunit includes: a second active module and a second series resonant cavity; the third subunit includes: a third active module and a third series resonant cavity; the fourth subunit includes: a fourth active module and a fourth series resonant cavity. For the first sub-unit: the first active module includes: a first NMOS transistor and a second NMOS transistor; the two voltage divider capacitors include: a first voltage divider capacitor and a second voltage divider capacitor; The drain and gate of the first NMOS transistor both receive the power supply voltage, and its gate is connected to the second terminal of the first voltage divider capacitor. The source of the first NMOS transistor is connected to the drain of the second NMOS transistor and the first series resonant cavity, respectively; The gate of the second NMOS transistor receives the power supply voltage, and its gate is connected to the second terminal of the second voltage divider capacitor; the source of the second NMOS transistor is grounded. The first terminal of the first voltage-dividing capacitor is connected to the output terminal of the fourth series resonant cavity; The first end of the second voltage divider capacitor is connected to the output end of the third series resonant cavity.

4. The voltage-controlled oscillator according to claim 3, characterized in that, For the second sub-unit: the second active module includes: a third NMOS transistor and a fourth NMOS transistor; the two voltage divider capacitors include: a third voltage divider capacitor and a fourth voltage divider capacitor; The width-to-length ratio of the third NMOS transistor is the same as that of the first NMOS transistor, and the width-to-length ratio of the fourth NMOS transistor is the same as that of the second NMOS transistor. The capacitance of the third voltage divider capacitor is the same as that of the first voltage divider capacitor, and the capacitance of the fourth voltage divider capacitor is the same as that of the second voltage divider capacitor.

5. The voltage-controlled oscillator according to claim 4, characterized in that, The drain and gate of the third NMOS transistor both receive the power supply voltage, and its gate is connected to the second terminal of the third voltage divider capacitor. The source of the third NMOS transistor is connected to the drain of the fourth NMOS transistor and the second series resonant cavity, respectively. The gate of the fourth NMOS transistor receives the power supply voltage, and its gate is connected to the second terminal of the fourth voltage divider capacitor. The source of the fourth NMOS transistor is grounded. The first terminal of the third voltage-dividing capacitor is connected to the output terminal of the third series resonant cavity; The first terminal of the fourth voltage divider capacitor is connected to the output terminal of the fourth series resonant cavity.

6. The voltage-controlled oscillator according to claim 4, characterized in that, The first series resonant cavity includes: a first resonant inductor, a first resonant capacitor, a first transformer inductor, and a first adjustable capacitor array; The second series resonant cavity includes: a second resonant inductor, a second resonant capacitor, a second transformer inductor, and a second adjustable capacitor array; The inductance value of the first resonant inductor is the same as the inductance value of the second resonant inductor, and the inductance value of the first transformer inductor is the same as the inductance value of the second transformer inductor; The capacitance value of the first resonant capacitor is the same as that of the second resonant capacitor, and the adjustable capacitance value range of the first adjustable capacitor array is the same as that of the second adjustable capacitor array. The first end of the first resonant inductor is connected to the source of the first NMOS transistor and the drain of the second NMOS transistor, respectively, and the second end of the first resonant inductor is connected to the first end of the first resonant capacitor. The first end of the second resonant inductor is connected to the source of the third NMOS transistor and the drain of the fourth NMOS transistor, respectively, and the second end of the second resonant inductor is connected to the first end of the second resonant capacitor. The second terminal of the first transformer inductor is connected to the first terminal of the first adjustable capacitor array; The second terminal of the second transformer inductor is connected to the first terminal of the second adjustable capacitor array; The first terminal of the first transformer inductor is connected to the first terminal of the fifth voltage divider capacitor in the third subunit and the seventh voltage divider capacitor in the fourth subunit. The capacitance value of the fifth voltage divider capacitor is the same as that of the first voltage divider capacitor, and the capacitance value of the seventh voltage divider capacitor is the same as that of the second voltage divider capacitor. The first terminal of the second transformer inductor is connected to the first terminal of the sixth voltage divider capacitor in the third subunit and the eighth voltage divider capacitor in the fourth subunit. The capacitance value of the sixth voltage divider capacitor is the same as that of the second voltage divider capacitor, and the capacitance value of the eighth voltage divider capacitor is the same as that of the first voltage divider capacitor. The second terminals of both the first resonant capacitor and the second resonant capacitor are grounded; The second terminals of both the first adjustable capacitor array and the second adjustable capacitor array are grounded.

7. The voltage-controlled oscillator according to claim 4, characterized in that, If the phase of the output voltage of the first series resonant cavity is 90 degrees, then the phase of the output voltage of the second series resonant cavity is 270 degrees, the phase of the output voltage of the third series resonant cavity is 180 degrees, and the phase of the output voltage of the fourth series resonant cavity is 0 degrees.

8. The voltage-controlled oscillator according to claim 1, characterized in that, The preset ratio is 1:

3.

9. An integrated circuit, characterized in that, The integrated circuit includes: a voltage-controlled oscillator based on series resonance as described in any one of claims 1-8.

10. An electronic device, characterized in that, The electronic device includes: a voltage-controlled oscillator based on series resonance as described in any one of claims 1-8.