Steep slope transistor device and method of fabricating the same

Abstract

This invention relates to a steep-slope transistor device and its fabrication method. The device includes: a gate oxide layer; a channel layer disposed on the upper surface of the gate oxide layer; a dielectric layer, a portion of which is disposed on the upper surface of the gate oxide layer and a portion of which is disposed on the upper surface of the channel layer; and an electrode layer including a source, a gate, and a drain disposed at intervals. The source and the gate are disposed on the upper surface of the dielectric layer, and the orthogonal projections of the source and the gate toward the gate oxide layer fall on the channel layer. The drain is disposed on the upper surface of the channel layer. Using the steep-slope transistor device provided in this application, a threshold switching device with variable resistance can be composited onto the transistor device. When the threshold switching device is in a low-resistance state, the subthreshold swing of the transistor device is significantly reduced, overcoming the Boltzmann thermodynamic limitations of traditional transistor devices.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and in particular to a steep-slope transistor device and its fabrication method. Background Technology

[0002] A field-effect transistor (FET) is a type of transistor that conducts electricity using majority carriers; it is also known as a unipolar transistor. It is a voltage-controlled semiconductor device with advantages such as high input resistance, low noise, low power consumption, wide dynamic range, ease of integration, no secondary breakdown, and a wide safe operating area. It has become a strong competitor to bipolar transistors and power transistors.

[0003] A field-effect transistor (FET) is a semiconductor device that uses the electric field effect of the input circuit to control the current in the output circuit. Subthreshold swing is a performance metric that measures the rate of transition between the on and off states of a FET. It represents the change in gate voltage required for a tenfold change in source-drain current, also known as the S-factor. A smaller S-factor indicates a faster on / off rate. However, traditional transistors are typically subject to Boltzmann thermodynamic limitations, meaning that a minimum gate voltage of 60 mV (VT) is usually required at room temperature. G Only by changing the source-drain current (I) can the source-drain current (I) be changed. DS The voltage change is tenfold, making it difficult to further reduce the operating voltage of transistor devices. To address this problem, improvements to the structure of traditional transistor devices are needed. Summary of the Invention

[0004] Therefore, it is necessary to provide a steep-slope transistor device and its fabrication method to address the Boltzmann thermodynamic limitation problem in the prior art.

[0005] To achieve the above objectives, in one aspect, the present invention provides a steep-slope transistor device, comprising:

[0006] Silicon dioxide layer;

[0007] A channel layer is disposed on the upper surface layer of the silicon dioxide layer;

[0008] A dielectric layer, wherein a portion of the dielectric layer is disposed on the upper surface of the silicon dioxide layer, and a portion of the dielectric layer is disposed on the upper surface of the channel layer;

[0009] An electrode layer includes a source, a gate, and a drain disposed at intervals; wherein the source and the gate are disposed on the upper surface of the dielectric layer, and the orthogonal projection of the source and the gate toward the silicon dioxide layer falls on the channel layer, and the drain is disposed on the upper surface of the channel layer.

[0010] In one embodiment, the source, the dielectric layer, and the channel layer form a threshold switching device, which exhibits multiple resistive states.

[0011] In one embodiment, the source electrode serves as the external source electrode of the steep-slope transistor device, the channel layer serves as the internal source electrode of the steep-slope transistor device, and the dielectric layer serves as the resistive switching layer of the threshold switching device.

[0012] In one embodiment, the plurality of resistive states include a high-resistance state and a low-resistance state, and when the threshold switching device switches from the high-resistance state to the low-resistance state under a preset excitation, the output current of the steep-slope transistor device increases.

[0013] In one embodiment, the preset excitation is to apply a positive bias voltage signal to the source and a negative scan voltage signal to the gate; wherein, when the negative scan voltage signal increases to a preset threshold, the threshold switching device switches from the high-resistance state to the low-resistance state.

[0014] In one embodiment, the total voltage of the threshold switching device and the steep-slope transistor device is the difference between the gate voltage applied to the gate and the source voltage applied to the source.

[0015] In one embodiment, the first voltage of the threshold switching device is positively correlated with the first resistance of the threshold switching device, and the second voltage of the steep-slope transistor device is positively correlated with the second resistance of the steep-slope transistor device; wherein, the first voltage is the voltage difference between the external source electrode and the internal source electrode, and the second voltage is the voltage difference between the drain electrode and the internal source electrode.

[0016] In one embodiment, the conductivity of the channel layer of the steep-slope transistor device is positively correlated with the absolute value of the channel voltage.

[0017] In one embodiment, the channel layer is a semiconductor tellurium electrode layer.

[0018] In one embodiment, the dielectric layer is a metal oxide layer.

[0019] On the other hand, the present invention also provides a method for fabricating a steep-slope transistor device, comprising:

[0020] A substrate layer is provided, and a silicon dioxide layer is formed on the substrate layer;

[0021] A channel layer is formed on the silicon dioxide layer;

[0022] A dielectric layer is formed on a portion of the silicon dioxide layer and a portion of the channel layer;

[0023] An electrode layer is formed, the electrode layer including a source, a gate and a drain disposed at intervals; wherein the source and the gate are formed on the upper surface layer of the dielectric layer, and the orthogonal projection of the source and the gate toward the silicon dioxide layer falls on the channel layer, and the drain is formed on the upper surface layer of the channel layer.

[0024] The aforementioned steep-slope transistor device and its fabrication method involve forming a channel layer on a silicon dioxide layer, forming a dielectric layer on the upper surface of a portion of the silicon dioxide layer and a portion of the channel layer, forming the source and gate of the transistor on a portion of the dielectric layer, and forming the gate of the transistor on a portion of the channel layer. This allows the source of the transistor, the dielectric layer, and the channel layer to simultaneously form a threshold switching device exhibiting multiple resistive states. The threshold switching device and the transistor device form a series circuit. This novel steep-slope transistor device allows the threshold switching device and the transistor device to work synergistically in the series circuit, which helps to overcome the Boltzmann thermodynamic limitation problem commonly found in traditional transistors. Attached Figure Description

[0025] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0026] Figure 1 This is a schematic diagram of the structure of a steep-slope transistor device provided in one embodiment;

[0027] Figure 2 This is a flowchart of a method for fabricating a steep-slope transistor device provided in one embodiment;

[0028] Figure 3 This is an equivalent circuit diagram of a transistor device and a threshold switching device provided in one embodiment;

[0029] Figure 4 This is a schematic diagram of the threshold switching device in one embodiment;

[0030] Figure 5 This is a quasi-DC characteristic curve of a threshold switching device in one embodiment;

[0031] Figure 6 This is a schematic diagram of the resistive switching mechanism of a threshold switching device in one embodiment;

[0032] Figure 7 This is a transfer characteristic curve of a steep-slope transistor device in one embodiment. Detailed Implementation

[0033] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0034] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0035] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, the element or feature described as “below,” “under,” or “below” will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.

[0036] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, in this specification, the term “and / or” includes any and all combinations of the associated listed items.

[0037] Embodiments of the present invention should not be limited to the specific shapes of the regions shown herein, but include shape deviations due to, for example, manufacturing techniques. The regions shown in the figures are substantially schematic, and their shapes do not represent the actual shapes of regions of the device, nor do they limit the scope of the invention.

[0038] Please see Figure 1 and Figure 2 This invention provides a method for fabricating a steep-slope transistor device. In one embodiment, the method for fabricating the steep-slope transistor device includes steps 202-208.

[0039] Step 202: Provide a substrate layer and form a silicon dioxide layer on the substrate layer.

[0040] The substrate can be a Si substrate, and the silicon dioxide layer can be SiO2. The silicon dioxide layer can be prepared on the substrate by means of growth or deposition.

[0041] Step 204: Form a channel layer on the silicon dioxide layer.

[0042] The channel layer is a p-type semiconductor, such as a tellurium (Te) electrode layer.

[0043] Step 206: Form a dielectric layer on a portion of the silicon dioxide layer and a portion of the channel layer.

[0044] For details, please refer to Figure 1 A portion of the dielectric layer is formed on the upper surface of the silicon dioxide layer, and another portion is formed on the upper surface of the channel layer. The dielectric layer is Ta2O5.

[0045] Step 208: Form an electrode layer, the electrode layer including a source, a gate and a drain disposed at intervals; wherein the source and the gate are formed on the upper surface of the dielectric layer, and the orthogonal projection of the source and the gate toward the silicon dioxide layer falls on the channel layer, and the drain is formed on the upper surface of the channel layer.

[0046] The electrode layer can be made of an inert metal, such as Pt, and the source, gate, and drain are arranged sequentially at intervals. The source, dielectric layer, and channel layer can form a threshold switch (TS) structure. The dielectric layer serves as the resistive switching layer of the threshold switch, enabling the threshold switch to switch between multiple resistive states.

[0047] Each layer or electrode can be prepared by methods such as magnetron sputtering, spin coating, and chemical vapor deposition, and the thickness and shape of each layer or electrode are not limited herein.

[0048] In the above example, by forming a channel layer on a silicon dioxide layer, forming a dielectric layer on the upper surface of a portion of the silicon dioxide layer and a portion of the channel layer, forming the source and gate of a transistor on a portion of the dielectric layer, and forming the gate of a transistor on a portion of the channel layer, the source of the transistor, the dielectric layer, and the channel layer simultaneously form a threshold switching device exhibiting multiple resistive states. The threshold switching device and the transistor device form a series circuit. This novel steep-slope transistor device allows the threshold switching device and the transistor device to work synergistically in the series circuit, which helps to overcome the Boltzmann thermodynamic limitation problem that is common in traditional transistors.

[0049] It should be understood that, although Figure 2 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders. Figure 2 At least some of the steps in the process may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but may be executed at different times. The execution order of these steps or stages is not necessarily sequential, but may be executed in turn or alternately with other steps or at least some of the steps or stages in other steps.

[0050] Please continue reading. Figure 1 The present invention also provides a steep-slope transistor device, comprising:

[0051] Silica layer 102.

[0052] The channel layer 104 is disposed on the upper surface layer of the silicon dioxide layer 102.

[0053] Dielectric layer 106, a portion of which is disposed on the upper surface of silicon dioxide layer 102, and a portion of which is disposed on the upper surface of channel layer 104.

[0054] The electrode layer 108 includes a source 1081, a gate 1082, and a drain 1083 spaced apart; wherein the source 1081 and the gate 1082 are disposed on the upper surface of the dielectric layer 106, and the orthographic projection of the source 1081 and the gate 1082 toward the silicon dioxide layer 106 falls on the channel layer 104, and the drain 1083 is disposed on the upper surface of the channel layer 104.

[0055] In this embodiment, a channel layer is formed on a silicon dioxide layer, a dielectric layer is formed on the upper surface of a portion of the silicon dioxide layer and a portion of the channel layer, a source and a gate of a transistor are formed on a portion of the dielectric layer, and a gate of a transistor is formed on a portion of the channel layer. This allows the source, the dielectric layer, and the channel layer to form a threshold switching device exhibiting multiple resistive states. The threshold switching device and the transistor device form a series circuit, allowing the threshold switching device and the transistor device to work together in the series circuit.

[0056] In one embodiment, a substrate layer 100 is further included, wherein the silicon dioxide layer 102 is located on the upper surface of the substrate layer 100.

[0057] The substrate layer may be a silicon substrate.

[0058] In one embodiment, the source 1081, the dielectric layer 106 and the channel layer 104 form a threshold switching device, which exhibits multiple resistive states.

[0059] Depend on Figure 1 As can be seen from the structural diagram, the threshold switch device and the transistor device form a series circuit, and its equivalent circuit diagram is as follows. Figure 3 As shown. The resistance state of the threshold switching device can change with external excitation. When the resistance state of the threshold switching device changes, the resistance of the entire series circuit will also change accordingly, thereby causing the output current of the transistor device to change.

[0060] The plurality of resistive states include a high-resistance state and a low-resistance state. When the threshold switching device switches from the high-resistance state to the low-resistance state under a preset excitation, the output current of the steep-slope transistor device increases.

[0061] The preset excitation is to apply a positive bias voltage signal to the source 1081 and a negative scan voltage signal to the gate 1082; wherein, when the negative scan voltage signal increases to a preset threshold, the threshold switching device switches from the high resistance state to the low resistance state.

[0062] In this embodiment, the source, the dielectric layer, and the channel layer form a threshold switching device exhibiting multiple resistance states. When the threshold switching device switches to a low resistance state, the current in the series circuit increases significantly, thereby significantly reducing the subthreshold swing of the transistor device. This overcomes the Boltzmann thermodynamic limitations of traditional transistor devices, thereby further reducing the operating voltage of the transistor device.

[0063] In one embodiment, the channel layer 104 is a semiconductor tellurium electrode layer, and the dielectric layer 106 is a metal oxide layer.

[0064] For details, please continue to refer to [the website / information]. Figure 1 In this structure, tellurium (Te) semiconductor serves as the channel layer 104, and a low thermal conductivity material serves as the dielectric layer 106 (Ta2O5 is used as an example to illustrate its resistive switching mechanism). The source 1081, drain 1083, and gate 1082 are inert electrodes (Pt is used as an example). Due to its unique electrothermal properties, the Te semiconductor can serve not only as the channel for a three-terminal transistor (FET) but also as the active electrode for a volatile two-terminal threshold switch (TS). The Ta2O5 layer can serve as both the dielectric layer for the transistor and the resistive switching layer for the threshold switch. The entire structure can be viewed as a three-terminal transistor connected in series with a two-terminal threshold switch (Pt / Ta2O5 / Te), as shown in the equivalent circuit diagram below. Figure 3 As shown.

[0065] In one embodiment, the source 1081 serves as the external source electrode (S) of the steep-slope transistor device, the channel layer 104 serves as the internal source electrode (S') of the steep-slope transistor device, and the dielectric layer 106 serves as the resistive switching layer of the threshold switching device.

[0066] For simplicity, the source Pt electrode on the Ta2O5 dielectric layer is referred to as the external (S) electrode, and the tellurium electrode in the 104 channel layer is referred to as the internal (S') electrode. The resistance of the Ta2O5 dielectric layer can be changed under a preset excitation.

[0067] Figure 3 In the middle, V G V represents the gate voltage. D V represents the drain voltage. S V represents the source (external) voltage. S’ Represents the internal voltage.

[0068] In one embodiment, the total voltage of the threshold switching device and the steep-slope transistor device is the difference between the gate voltage applied to the gate 1082 and the source voltage applied to the source 1081.

[0069] The first voltage of the threshold switching device is positively correlated with the first resistance of the threshold switching device, and the second voltage of the steep slope transistor device is positively correlated with the second resistance of the steep slope transistor device; wherein, the first voltage is the voltage difference between the external source electrode and the internal source electrode, and the second voltage is the voltage difference between the drain electrode and the internal source electrode.

[0070] Specifically, the total voltage V applied to the transistor device and the threshold switch device GS V is the difference between the voltage applied to the gate 1082 and the voltage applied to the source 1081. GS =V G -V S Drain-source voltage V DS =V D -V S This is the total voltage applied to the transistor channel and the threshold switching device.

[0071] The first voltage V1, i.e., the voltage division of the threshold switching device, is the voltage difference between the external electrode (S) 1081 and the internal electrode (S') 104, V1 = V S’ -V S The second voltage V2, i.e., the voltage division of the transistor device, is the voltage difference between the drain 1083 and the internal source electrode (S') 104, V2 = V D -V S’ .

[0072] In one embodiment, the conductivity of the channel layer of the steep-slope transistor device is positively correlated with the absolute value of the channel voltage.

[0073] V DS’ =V D - V S’ The voltage applied to the transistor channel can be used to adjust the channel conductivity. When the channel voltage is negative, the larger its absolute value, the smaller the channel conductivity.

[0074] Since Te is a p-type semiconductor, a negative voltage needs to be applied to the gate 1082 to turn on the transistor device. Furthermore, the resistance switching of the threshold switching device Pt / Ta₂O₅ / Te is unidirectional; it only turns on when the bias voltage of the inert Pt electrode relative to the active Te electrode is positive. Please refer to [further details needed]. Figure 3 During the test, the change process of the threshold switching device and the transistor device is illustrated by applying a positive bias voltage (such as a fixed voltage of 5 V) to the source 1081, grounding the drain, and applying a negative scan voltage (such as 0 V → -15 V) to the gate 1082.

[0075] From the perspective of threshold devices at both ends Figure 4 This is a structural diagram of a threshold switching device. Figure 5 This is a quasi-DC IV characteristic curve of the threshold switching device. During the voltage scan, a positive voltage is applied to the top electrode Pt (source 1081), and the bottom electrode Te (channel layer 104) is grounded. The mechanism of resistive switching of the threshold device Pt / Ta2O5 / Te during the scan is as follows: Figure 6 As shown, the threshold switching device is initially in a high-impedance state. When the voltage increases to a certain threshold (V... th When the threshold switching device is subjected to the preset excitation, the device becomes a low-resistance state, and the current suddenly increases (process 1). When the reverse scan voltage decreases to the holding voltage (V... hold When the current drops below a certain threshold, the device returns from a low-resistance state to a high-resistance state (process 2). When a positive voltage is applied to the Pt electrode, Te is reduced to Te. 2− Anions, under the influence of an electric field, Te 2− Anions migrate towards the counter electrode Pt and are then oxidized to Te. As the oxidation and reduction process continues, the accumulation of Te atoms leads to the formation of a conductive filament that penetrates the high-resistivity oxide layer, connecting the two electrodes and transforming the device into a low-resistivity state. However, due to the low thermal conductivity and low melting point of Te, and the relatively low thermal conductivity of the oxide layer, the thermal effect during resistive switching is not negligible. During reverse voltage scan, the high current flowing through the device and the accumulated Joule heating effect are sufficient to melt the newly grown Te conductive filament, causing the device to return to the high-resistivity state.

[0076] From the perspective of the transistor device, conventional transistors typically require a minimum gate voltage of 60 mV at room temperature. G Only by changing the source-drain current (I) can the source-drain current (I) be changed. DS The resistance changes tenfold, which is the so-called Boltzmann limit. The excellent subthreshold characteristics of the transistor device designed in this application are due to the resistance change of the threshold switching device.

[0077] Figure 7 The transfer characteristic curve (I) of the designed steep-slope transistor device DS - V G During the test, the source forward bias voltage was a fixed 5 V, the drain was grounded, and a negative gate scan voltage (0 V → -15 V) was applied. Initially, the threshold switching device was in a high-impedance state, and the source-drain current (I0) was... DS The current remains at a low level, insufficient to trigger the formation of Te conductive filaments through the threshold switching device. As the gate voltage increases negatively to a certain threshold, the voltage division of the threshold switching device becomes large enough to induce the formation of Te conductive filaments, bringing them to a low-resistance state. Simultaneously, due to voltage redistribution, the carrier concentration in the channel increases, and the channel resistance reaches a low level. At this point, the overall resistance of the series circuit decreases sharply, and the current suddenly increases. Figure 7 The behavior is characterized by a steep subthreshold swing, thus overcoming the Boltzmann limitation.

[0078] In the description of this specification, references to terms such as "some embodiments," "other embodiments," and "ideal embodiments" indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0079] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0080] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A steep slope transistor device, characterized by, include: Silicon dioxide layer; A channel layer is disposed on the upper surface layer of the silicon dioxide layer; A dielectric layer, wherein a portion of the dielectric layer is disposed on the upper surface of the silicon dioxide layer, and a portion of the dielectric layer is disposed on the upper surface of the channel layer; An electrode layer includes a source, a gate, and a drain disposed at intervals; wherein the source and the gate are disposed on the upper surface of the dielectric layer, and the orthogonal projection of the source and the gate toward the silicon dioxide layer falls on the channel layer, and the drain is disposed on the upper surface of the channel layer.

2. The abrupt transistor device of claim 1, wherein, The source, the dielectric layer, and the channel layer form a threshold switching device, which exhibits multiple resistive states.

3. The abrupt transistor device of claim 2, wherein, in, The source electrode serves as the external electrode of the steep-slope transistor device, the channel layer serves as the internal electrode of the steep-slope transistor device, and the dielectric layer serves as the resistive switching layer of the threshold switching device.

4. The steep-slope transistor device according to claim 3, characterized in that, The plurality of resistive states include a high-resistance state and a low-resistance state. When the threshold switching device switches from the high-resistance state to the low-resistance state under a preset excitation, the output current of the steep-slope transistor device increases.

5. The steep-slope transistor device according to claim 4, characterized in that, The preset excitation is to apply a positive bias voltage signal to the source and a negative scan voltage signal to the gate; wherein, when the negative scan voltage signal increases to a preset threshold, the threshold switching device switches from the high resistance state to the low resistance state.

6. The steep-slope transistor device according to claim 3, characterized in that, The total voltage of the threshold switching device and the steep-slope transistor device is the difference between the gate voltage applied to the gate and the source voltage applied to the source.

7. The steep-slope transistor device according to claim 6, characterized in that, The first voltage of the threshold switching device is positively correlated with the first resistance of the threshold switching device, and the second voltage of the steep slope transistor device is positively correlated with the second resistance of the steep slope transistor device; wherein, the first voltage is the voltage difference between the external source electrode and the internal source electrode, and the second voltage is the voltage difference between the drain electrode and the internal source electrode.

8. The steep-slope transistor device according to claim 7, characterized in that, The conductivity of the channel layer of the steep-slope transistor device is positively correlated with the absolute value of the channel voltage.

9. The steep-slope transistor device according to claim 1, characterized in that, The channel layer is a semiconductor tellurium electrode layer.

10. The steep-slope transistor device according to claim 1, characterized in that, The dielectric layer is a metal oxide layer.

11. A method for fabricating a steep-slope transistor device, characterized in that, include: A substrate layer is provided, and a silicon dioxide layer is formed on the substrate layer; A channel layer is formed on the silicon dioxide layer; A dielectric layer is formed on a portion of the silicon dioxide layer and a portion of the channel layer; An electrode layer is formed, the electrode layer including a source, a gate and a drain disposed at intervals; wherein the source and the gate are formed on the upper surface layer of the dielectric layer, and the orthogonal projection of the source and the gate toward the silicon dioxide layer falls on the channel layer, and the drain is formed on the upper surface layer of the channel layer.

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