An FC-based SRIO high-bandwidth information exchange system and information exchange method

Abstract

This invention provides a high-bandwidth SRIO information exchange system and method based on FC (Functional Communication Center). The system includes a switching module and a conversion module. The conversion module includes a transceiver unit, an interconnection unit, a parsing unit, and a frame processing unit. The transceiver unit receives SRIO frames transmitted by SRIO access nodes, converts them into first information, and then sends them to the frame processing unit via the interconnection unit. The frame processing unit parses the content of the first information, assembles the first information destined for different SRIO access port numbers corresponding to a specific FC core port number into information groups, and sends these groups along with the corresponding destination FC core port numbers to the parsing unit. The parsing unit then merges these information groups into FC frames, which are then transmitted via the switching module to the conversion module at the destination FC core port for layer-by-layer information restoration to SRIO frames before being distributed to the corresponding different receiving SRIO access nodes. This improves bandwidth utilization during information exchange.

Description

Technical Field

[0001] This invention relates to optical fiber communication technology, and more particularly to a system and method for high-bandwidth information exchange based on FC networks for large-scale interconnection between SRIO nodes. Background Technology

[0002] Currently in the field of optical fiber communication technology, information exchange between SRIO (Serial Rapid I / O) nodes is basically achieved through SRIO switching chips. However, the number of SRIO interfaces that can be connected by this traditional SRIO switching chip is limited, which cannot meet the needs of large-scale SRIO node interconnection.

[0003] Therefore, to achieve large-scale interconnection between SRIO nodes, the field typically employs SRIO chip cascading. However, in practical applications, this approach may result in significant information delays, and the cascading scheme also increases the complexity of the interaction relationships.

[0004] On the other hand, since the maximum frame length supported by the SRIO protocol is 256B, the frame header and other parts of a single frame of data occupy a large amount of bandwidth, meaning that the overhead of sending short frames is high, which also limits the realization of large-scale exchanges between SRIO nodes.

[0005] To address the aforementioned issues, the inventors previously proposed "A Large-Scale SRIO High-Speed ​​Information Exchange System and Information Exchange Method Thereof" (Patent Application No. 2022105981605) to achieve efficient and rapid information exchange between large-scale SRIO nodes. This system breaks the limitation of traditional SRIO switching chips on the number of SRIO nodes that can be connected. Furthermore, during data exchange, this system can splice the same payload information content between the source and destination nodes of the SRIO system, thereby maximizing the use of available bandwidth. Therefore, compared to the short frames emitted by the traditional SRIO nodes themselves, this system can improve bandwidth utilization.

[0006] This case is a further improvement on the previous case, which supports the splicing of messages from multiple SRIO source nodes to different SRIO access nodes corresponding to a certain destination FC core port, so as to more effectively improve bandwidth utilization. Summary of the Invention

[0007] Therefore, the main objective of this invention is to provide a high-bandwidth SRIO information exchange system and method based on FC, which, while breaking through the limitation of the number of SRIO node connections in traditional SRIO switching chips, supports the splicing of messages from multiple SRIO source nodes to different SRIO access nodes corresponding to a certain destination FC core port, thereby improving bandwidth utilization during information exchange.

[0008] To achieve the above objectives, according to one aspect of the present invention, a high-bandwidth SRIO information exchange system based on FC is provided, comprising: a switching module and a conversion module, wherein the conversion module includes: a transceiver unit, an interconnection unit, a parsing unit, and a frame processing unit. The transceiver unit receives SRIO frames transmitted by SRIO access nodes, converts them into first information, and then sends them to the frame processing unit via the interconnection unit. The frame processing unit parses the content of the first information, assembles each piece of first information destined for a certain FC core port number into an information group, and sends it along with the corresponding destination FC core port number to the parsing unit, so that the parsing unit can fuse it into an FC frame. After that, the information is transmitted through the switching module to the conversion module of the destination FC core port for layer-by-layer information restoration to the SRIO frame, and then distributed to the corresponding different receiving SRIO access nodes.

[0009] In a possible preferred embodiment, the first information content obtained after the SRIO frame is converted by the transceiver unit includes: information content, source SRIO access port number, destination SRIO access port number, SRIO address information, information length, and keep value, wherein the information length and keep value identify the length of the information content in different ways, and each bit of the keep value is used to mark the validity of the 32B information content.

[0010] In a possible preferred embodiment, the step of the frame processing unit assembling the first information into an information group includes: the frame processing unit receives each first information from different SRIO access ports and sent to different SRIO access port numbers corresponding to a certain destination FC core port number, and synchronously accumulates the information length and keep value carried by each information. When the accumulated information reaches the budget length of the information group, the frame processing unit no longer receives new first information from different SRIO access port numbers corresponding to the destination FC core port number, and simultaneously assembles the first information that has been received into an information group.

[0011] In a possible preferred embodiment, the step of the frame processing unit assembling the first information into an information group includes: the frame processing unit starts a timing mechanism, receives the first information of different SRIO access port numbers corresponding to a certain destination FC core port number, and simultaneously accumulates and judges that the information length and keep value carried by it have not accumulated to the budget length of the information group, but have reached the timing threshold. When this happens, the unit no longer receives the first information of different SRIO access port numbers corresponding to the destination FC core port number, and at the same time assembles the first information that has been received into an information group.

[0012] In a possible preferred embodiment, the source SRIO access port number and the destination SRIO access port number are marked with (M+N) bits of data, wherein the M bits of data in (M+N) bits are used to mark the corresponding FC core port number of the switching module, and the N bits of data are used to mark the SRIO access port number connected to a certain FC core port.

[0013] In a possible preferred embodiment, the step of fusing the information group and the destination FC core port number into the FC frame includes: the parsing unit fills the M-bit data of the source FC core port number and the destination FC core port number of the information group into the SID and DID fields of the FC frame header, and at the same time fills the information group into the payload of the FC frame.

[0014] In a possible preferred embodiment, the step of the receiving end conversion module restoring the information group to an SRIO frame includes: S1 The receiving end parsing unit decomposes the information group from the FC frame and sends it to the receiving end frame processing unit; S2 The receiving end frame processing unit parses the information group, decomposes each first piece of information according to the information length and keep value, and sends it to the receiving end interconnection unit; S3 The receiving end interconnection unit forwards the destination SRIO access port number information carried in the first piece of information to the corresponding receiving end transceiver unit; S4 The receiving end transceiver unit restores the first piece of information to an SRIO frame and transmits it to its corresponding receiving end SRIO access node.

[0015] In a possible preferred embodiment, step S2 further includes: the receiving end frame processing unit verifies the information length based on the keep value, and when the verification fails, the first information is discarded.

[0016] In a possible preferred embodiment, the frame processing unit, parsing unit, and switching module operate in the FC clock domain, while the transceiver unit and SRIO access node operate in the SRIO clock domain, wherein the clock frequency of the FC clock domain is set to several times that of the SRIO clock domain.

[0017] To achieve the above objectives, according to another aspect of the present invention, a FC-based SRIO high-bandwidth information exchange method is also provided, comprising the following steps: S1 establishes an information exchange system as described in any one of claims 1 to 9, provides a plurality of SRIO access ports to aggregate SRIO node access, sets the source SRIO access port number and the destination SRIO access port number to be marked with (M+N) bits of data respectively, and marks the corresponding switching module FC core port number and SRIO access port number according to the M / N bits of data in (M+N) bits. In the transmission mode, each transceiver unit receives and parses the SRIO frame sent by the corresponding SRIO access node to extract the information content, source SRIO access port number, destination SRIO access port number and SRIO address information, and then merges them into the first information after assigning the information length and keep value according to the length of the information content. The S3 frame processing unit assembles the first information of each SRIO access port number corresponding to a certain destination FC core port number into an information group. The S4 parsing unit merges the information group and the destination FC core port number into the FC frame. The steps include: the parsing unit fills the M bits of the source FC core port number and the destination FC core port number of the information group into the SID and DID fields of the FC frame header, and fills the information group into the payload of the FC frame; the switching module receives the FC frame and forwards it to the parsing unit connected to the destination FC core port. In receive mode, the parsing unit receives the FC frame and extracts the information group after parsing; after parsing the information group, the frame processing unit decomposes each first information according to the information length and keep value; after the transceiver unit restores the first information into an SRIO frame, it transmits it to its corresponding receiving end SRIO access node.

[0018] The FC-based SRIO high-bandwidth information exchange system and method provided by this invention can realize efficient and fast information exchange between large-scale SRIO nodes, breaking the limitation of traditional SRIO switching chips on the number of SRIO node connections. At the same time, during the data exchange process, this invention can also merge and encapsulate the information of multiple different SRIO access nodes connected to the same FC core port to maximize bandwidth utilization and achieve efficient transmission. Attached Figure Description

[0019] The accompanying drawings, which form part of this application, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an undue limitation of the invention. In the drawings: Figure 1 This is a schematic diagram of the SRIO high-bandwidth information exchange system based on FC according to the present invention; Figure 2 This is a schematic diagram of the first information structure of the FC-based SRIO high-bandwidth information exchange system of the present invention; Figure 3 This is a schematic diagram of the information group structure of the FC-based SRIO high-bandwidth information exchange system of the present invention; Figure 4 This is a schematic diagram of the FC frame fusion structure of the FC-based SRIO high-bandwidth information exchange system of the present invention; Figure 5This is a schematic diagram of the data tagging structure of the source SRIO access port number and the destination SRIO access port number in the FC-based SRIO high-bandwidth information exchange system of the present invention. Figure 6 This is a schematic diagram of the structure of the receiving end of the FC-based SRIO high-bandwidth information exchange system of the present invention, which restores the first information. Figure 7 This is a schematic diagram of the dual-clock domain structure of the FC-based SRIO high-bandwidth information exchange system of the present invention; Figure 8 This is a schematic diagram illustrating the steps of the SRIO high-bandwidth information exchange method based on FC according to the present invention. Detailed Implementation

[0020] To enable those skilled in the art to better understand the technical solutions of the present invention, the specific technical solutions of the present invention will be clearly and completely described below in conjunction with embodiments, so as to help those skilled in the art further understand the present invention. Obviously, the embodiments described in this application are merely some embodiments of the present invention, and not all embodiments. It should be noted that, for those skilled in the art, the embodiments and features in the embodiments of this application can be combined with each other without departing from the concept of the present invention and without conflict. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the disclosure and protection scope of the present invention.

[0021] Furthermore, the terms "first," "second," "S1," "S2," etc., used in the specification, claims, and drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented in orders other than those described herein. At the same time, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. Unless otherwise expressly specified and limited, the terms "set," "arranged," "installed," "connected," and "linked" should be interpreted broadly, for example, as a fixed connection, a detachable connection, or an integral connection; a mechanical connection or an electrical connection; a direct connection or an indirect connection through an intermediate medium; or a connection within two elements. Those skilled in the art can understand the specific meaning of the above terms in this case based on the specific circumstances and in conjunction with existing technology. (one) Please see Figures 1 to 7As shown, the FC-based SRIO high-bandwidth information exchange system provided by the present invention includes: a switching module and a conversion module, wherein the conversion module is connected to each FC core port of the switching module for communication. Therefore, the present invention adopts the conversion module to provide multiple SRIO ports supporting the transmission and reception of SRIO protocol frames, so as to aggregate the access of SRIO nodes and provide a basic link framework for the access of a large number of SRIO nodes.

[0023] In this example, the internal routing frames of the switching module are FC protocol frames, while the SRIO access nodes send SRIO protocol frames. Thus, in this example, the conversion module can receive SRIO frame information sent by SRIO nodes on a large scale, parse and convert it into FC frames supported by the switching module, and then forward it to the conversion module at the corresponding FC core port address. After parsing and conversion, it is sent to the SRIO access node at the corresponding destination address's SRIO port, thereby enabling large-scale high-speed information exchange among the SRIO nodes.

[0024] Specifically, this conversion module is actually responsible for parsing and fusing SRIO frame data sent by the SRIO access node, as well as splitting / reassembling information frames. Figure 1 As shown, the conversion module in this example includes: a transceiver unit, an interconnection unit, a parsing unit, and a frame processing unit. The transceiver unit receives SRIO frames transmitted by the SRIO access node, converts them into first information, and then sends them to the frame processing unit via the interconnection unit.

[0025] For example, the SRIO serial optical signal or electrical signal input from the SRIO access port is converted into an AXI-STREAM signal, i.e., the first information, by the transceiver module. The content of the first information includes: information payload, source SRIO access port number, destination SRIO access port number, SRIO address information (SRIO address), information length, and keep value.

[0026] Specifically, taking a 256-byte message sent from SRIO port #12 to SRIO port #2N as an example, the transceiver unit #2 in the conversion module #1-1 receives the serial optical signal or electrical signal information input from the SRIO access node, and outputs the following after conversion: information length 256 bytes, source SRIO access port number 12, destination SRIO access port number 23, SRIO address flag, and specific information payload content signal. At the same time, a keep value is calculated and assigned based on the information length value.

[0027] Its output format is as follows Figure 2As shown, the information length marker occupies 1B, the keep information marker occupies 1B, the source SRIO access port number occupies 1B, the destination SRIO access port number occupies 1B, the SRIO address information occupies 1B, and the data content occupies 0-256B, for a total of 5-261B.

[0028] It is worth mentioning that in the existing SRIO network framework, since the frame length marker generally occupies 8 bits, it can only mark the information length from 0 to 255B. However, the longest SRIO frame can be 256B, which will cause an overflow problem. For example, when the length of the information content is 0, the information length value is 0 and the keep value is 0; when the length of the information content is 256B, the information length value is 0 ('b1_0000_0000, the highest bit overflows) and the keep value is 8'hFF.

[0029] Therefore, relying solely on the information length value cannot accurately determine the true length of the information content, nor can it provide a basis for subsequent reconstruction of the information content. To address this issue and verify the validity of the information length value, this case cleverly proposes the concept of a keep value. Each bit of the 8 bits of the keep value is used to mark the validity of each 32 bytes of information content in the information memory. For example, if the information length is 1-32, the keep value is 8'b0000_0001; if the information length is 33-64, the keep value is 8'b0000_0011.

[0030] This approach solves the problem of marking message content length by using a message length marker and a keep value together to identify the length of the message content. Each bit of keep is used to mark the validity of the 32-byte message content. This helps to fill the message length overflow vulnerability and verify the validity of the message length data. Other advantages will be explained further below.

[0031] Furthermore, after the multiple Srio access ports of the conversion module receive the information content sent by the Srio access node, the Srio frame is converted into first information according to the above example transceiver unit, and then the first information is sent to the frame processing unit for processing through the interconnection unit.

[0032] The frame processing unit identifies and parses the first information content from different SRIO access ports, and then groups the first information from different SRIO access port numbers corresponding to the same destination FC core port number into an information group, and sends it to the parsing unit along with the corresponding destination FC core port number.

[0033] For example, when Srio access port #11 sends information to Srio access port #21, Srio access port #12 sends information to Srio access port #2N, and Srio access port #1N sends information to Srio access port #22, the concatenation condition is met because the receiving end is a conversion module of the same destination FC core port.

[0034] Furthermore, in order to maintain the stability of the entire network information transmission mechanism, in this example, the step of the frame processing unit assembling the first information into an information group includes: the frame processing unit receives each first information from different SRIO access ports and sent to different SRIO access port numbers corresponding to a certain destination FC core port number, and synchronously accumulates the information length and keep value carried by each information. When the accumulated information reaches the budget length of the information group, the unit no longer receives new first information from different SRIO access port numbers corresponding to the destination FC core port number, and simultaneously assembles the first information that has been received into an information group.

[0035] For example, according to the FC-AE-ASM protocol, the maximum length of an FC frame is 2096 bytes. Therefore, in this example, when the preset estimated length of the spliced ​​content is 1835 bytes (2096 bytes - (256 bytes + 5 bytes)), the almost full signal is triggered. At this time, the almost full signal will be pulled high to suppress the upper level from receiving new first information with different destination SRIO access port numbers corresponding to the destination FC core port number as the destination address, but the data being transmitted can be transmitted normally. When the almost full signal is pulled high and the first information being transmitted is completed, the triggering mechanism for sending the spliced ​​content when it reaches a certain length is triggered, and the received first information is spliced ​​into the following format: Figure 3 The set of various payloads shown, i.e., the information group, along with the destination FC core port number to which the information group needs to be sent, is sent to the parsing unit for use in the FC frame assembly procedure.

[0036] On the other hand, in order to maintain the stability of the entire network information transmission mechanism, in another preferred embodiment, the step of the frame processing unit assembling the first information into an information group includes: the frame processing unit starts a timing mechanism, receives the first information of different SRIO access port numbers corresponding to a certain destination FC core port number, and simultaneously accumulates and judges that the information length and keep value carried by it have not accumulated to the information group budget length, but have reached the timing threshold. When this happens, the unit no longer receives the first information of different SRIO access port numbers corresponding to the new destination FC core port number, and at the same time assembles the first information that has been received into an information group.

[0037] For example, when valid information is input into the frame processing unit, the timing mechanism is started. When a certain set time is reached but the full signal has not been triggered, the waiting time exceeds a certain set value and the sending mechanism is triggered. At this time, the spliced ​​content, i.e. the information group, can be sent as the payload information, along with the destination FC core port number to which the information group needs to be sent, to the parsing unit for use in the FC frame assembly procedure.

[0038] Furthermore, the parsing unit merges the received information group and the destination FC core port number into the FC frame. For example... Figure 4 As shown, the parsing unit uses the information group as the payload content of the FC frame. The source address of the FC frame is the FC core port number corresponding to this conversion module, and the destination address is the FC core port number corresponding to the different Srio access ports of the spliced ​​content.

[0039] For example, consider a message group composed of messages sent from Srio access port #11 to Srio access port #2N and messages sent from Srio access port #12 to Srio access port #21. Figure 1 The FC frame shown has a source address of 1, a destination address of 2, and a payload consisting of a message group with the following format: Figure 4 As shown.

[0040] Furthermore, it is worth mentioning that the entire switching system can achieve information exchange between M*N Srio access ports, where M is the number of FC core ports of the switching module and N is the number of Srio access ports connected to each conversion module.

[0041] Therefore, in order to facilitate the fusion of subsequent FC frames, this example defines the source SRIO access port number and the destination SRIO access port number as (M+N) bits of data, where M bits of data in (M+N) bits are used to mark the corresponding FC core port number of the switching module, and N bits of data are used to mark the SRIO access port number connected to a certain FC core port.

[0042] like Figure 5 As shown, taking an 8-bit configuration as an example, the high 4 bits are used to mark the corresponding FC core port number of the switching module, ranging from 1 to M; the low 4 bits are used to mark the position number of the Srio access port connected to this conversion module, ranging from 1 to N. Figure 5 As shown, this represents the Srio access port numbered 2, which is connected to the FC core port of switching module 1. Figure 1 In Srio #12, the address length can be further expanded as the number of ports increases.

[0043] This marking method, compared to the existing method of using a lookup mapping table to determine the translation relationship between source and destination addresses of different protocols, avoids the need to allocate dedicated storage space for the mapping table and also avoids the increased overall system complexity caused by the lookup mapping table design logic, thereby reducing the risk of increased latency and timing. Therefore, this case directly adopts the port number interception method, which is simple and direct, and simplifies the complexity of the logical design.

[0044] Therefore, the parsing unit can fill the M-bit data of the source FC core port number and the destination FC core port number of the information group into the SID and DID fields of the FC frame header, and at the same time fill the information group into the payload of the FC frame, thereby forming an FC frame that conforms to the FC communication protocol.

[0045] Afterwards, the FC frame is transmitted by the switching module to the conversion module of the destination FC core port, where the information is restored layer by layer to the SRIO frame, and then distributed to the corresponding different receiving end SRIO access nodes.

[0046] Specifically, the steps of the receiving end conversion module to restore the information group to the SRIO frame include: the receiving end parsing unit decomposes the information group from the FC frame and sends it to the receiving end frame processing unit; the receiving end frame processing unit parses the information group, decomposes each first piece of information according to the information length and keep value, and sends it to the receiving end interconnection unit.

[0047] For example, in the receiving direction, the frame processing unit decomposes the payload information in the FC frame sent by the parsing unit according to the information length and keep value to obtain the first information, and extracts its information length, source SRI access port number, destination SRI access port number information, and SRI address tag, and sends it together with the information content to the interconnection unit. Figure 6 As shown, the message length occupies 1 byte. When the message content is 0 bytes or 256 bytes, the message length value is all zero. In this case, the only way to verify is by judging the keep value. If the keep value is 0, it means the message length is 0; if the keep value is FF, it means the message length is 256 bytes. Therefore, the keep value can be used to supplement the judgment of the actual message length.

[0048] In another preferred embodiment, the receiving frame processing unit may also verify the information length based on the keep value. If the keep value does not match the information length value, the verification is considered to have failed. At this time, the first information may have been damaged, so the transmission of the first information can be abandoned.

[0049] Then, the receiving end interconnection unit forwards the destination SRIO access port number information carried in the first information to the corresponding transceiver unit with different destination SRIO access port numbers. At this time, the transceiver unit connected to the destination SRIO access port will assemble the received message content into an SRIO frame according to the SRIO message format, and convert it into a serial optical signal or an electrical signal and send it to the corresponding SRIO access port to complete the transmission to its corresponding receiving end SRIO access node.

[0050] On the other hand, in order to reduce the risk of information congestion in the information exchange system of the present invention, such as Figure 7 As shown, in a preferred embodiment, with the interconnection unit as the boundary, the frame processing unit, parsing unit and switching module are preferably set to operate in the FC clock domain, while the transceiver unit and SRIO access node are preferably set to operate in the SRIO clock domain, wherein the clock frequency of the FC clock domain is set to several times that of the SRIO clock domain.

[0051] Since this system has a large number of Srio interfaces at the conversion module and a small number of FC core ports at the switching module, a faster FC clock can improve transmission efficiency and meet the data transmission needs of multiple Srio interfaces. However, a slower FC clock may lead to information congestion. Therefore, to maintain a balance in data transmission, it is preferable to set the information processing rate of the FC clock domain to 1 to M times that of the Srio clock domain, where M can be the number of FC core ports.

[0052] Therefore, through the aforementioned information exchange system, information from different Srio access ports and sent to the same core FC port can be integrated, and there are no restrictions on the order of the information. This can greatly improve the efficiency and flexibility of information integration, increase bandwidth utilization, and improve information transmission efficiency. (two) On the other hand, please see Figure 8 As shown, the present invention also provides a FC-based SRIO high-bandwidth information exchange method, the steps of which include: S1 establishes an information exchange system as described in the above embodiment to provide multiple SRIO access ports to aggregate SRIO node access. The source SRIO access port number and the destination SRIO access port number are set to be marked with (M+N) bit data respectively, so as to mark the corresponding switching module FC core port number and SRIO access port number according to the M / N bits of data in (M+N) bits. In the transmission mode, each transceiver unit receives and parses the SRIO frame sent by the corresponding SRIO access node to extract the information content, source SRIO access port number, destination SRIO access port number and SRIO address information, and then merges them into the first information after assigning the information length and keep value according to the length of the information content. The S3 frame processing unit assembles the first information of each SRIO access port number corresponding to a certain destination FC core port number into an information group. The S4 parsing unit merges the information group and the destination FC core port number into the FC frame. The steps include: the parsing unit fills the M bits of the source FC core port number and the destination FC core port number of the information group into the SID and DID fields of the FC frame header, and fills the information group into the payload of the FC frame; the switching module receives the FC frame and forwards it to the parsing unit connected to the destination FC core port. In receive mode, the parsing unit receives the FC frame and extracts the information group after parsing; after parsing the information group, the frame processing unit decomposes each first information according to the information length and keep value; after the transceiver unit restores the first information into an SRIO frame, it transmits it to its corresponding receiving end SRIO access node.

[0054] The step S3 in which the frame processing unit assembles the first information into an information group includes: the frame processing unit receives each first information from different SRIO access ports and sent to different SRIO access port numbers corresponding to a certain destination FC core port number, and synchronously accumulates the information length and keep value carried by each information. When the accumulated information reaches the budget length of the information group, the unit no longer receives new first information from different SRIO access port numbers corresponding to the destination FC core port number, and simultaneously assembles the first information that has been received into an information group.

[0055] The step S3 in which the frame processing unit assembles the first information into an information group includes: the frame processing unit starts a timing mechanism, receives the first information of different SRIO access port numbers corresponding to a certain destination FC core port number, and simultaneously accumulates and judges that the information length and keep value carried by it have not accumulated to the budget length of the information group, but have reached the timing threshold. When this happens, the unit no longer receives the first information of different SRIO access port numbers corresponding to the new destination FC core port number, and at the same time assembles the first information that has been received into an information group.

[0056] Step S5 further includes: the receiving end frame processing unit checks the information length based on the keep value, and discards the first information when the check fails.

[0057] Furthermore, it also includes step S6: taking the interconnection unit as the boundary, the frame processing unit, parsing unit and switching module are preferably set to run in the FC clock domain, while the transceiver unit and SRIO access node are preferably set to run in the SRIO clock domain, wherein the clock frequency of the FC clock domain is set to 1 to M times that of the SRIO clock domain, where M is the number of FC core ports.

[0058] In summary, the FC-based SRIO high-bandwidth information exchange system and method provided by this invention can achieve efficient and fast information exchange between large-scale SRIO nodes, breaking the limitation of traditional SRIO switching chips on the number of SRIO node connections. At the same time, during the data exchange process, this invention can also merge and encapsulate the information of multiple different SRIO access nodes connected to the same FC core port to maximize bandwidth utilization and achieve efficient transmission.

[0059] The preferred embodiments of the present invention disclosed above are merely illustrative of the invention. These preferred embodiments do not exhaustively describe all details, nor do they limit the invention to the specific implementations described. Clearly, many modifications and variations can be made based on the content of this specification. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to better understand and utilize the invention. The present invention is limited only by the claims and their full scope and equivalents. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the invention should be included within the protection scope of the invention.

[0060] Those skilled in the art will understand that, besides implementing the system, apparatus, and their modules provided by this invention in purely computer-readable program code, the same program can be implemented in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers by logically programming the method steps. Therefore, the system, apparatus, and their modules provided by this invention can be considered a hardware component, and the modules included therein for implementing various programs can also be considered structures within the hardware component; alternatively, modules for implementing various functions can be considered both software programs implementing the method and structures within the hardware component.

[0061] Furthermore, all or part of the steps in the methods of the above embodiments can be implemented by a program instructing related hardware. This program is stored in a storage medium and includes several instructions to cause a microcontroller, chip, or processor to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as a USB flash drive, a portable hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0062] Furthermore, various different implementations of the present invention can be combined arbitrarily, as long as they do not violate the spirit of the present invention, they should also be regarded as the content disclosed in the present invention.

Claims

1. A high-bandwidth SRIO information exchange system based on FC fiber channel, comprising: A switching module and a conversion module are characterized in that the conversion module includes: a transceiver unit, an interconnection unit, a parsing unit, and a frame processing unit, wherein the source SRIO access port number and the destination SRIO access port number are marked with M+N bit data, where M bits of data in M+N bits are used to mark the corresponding FC core port number of the switching module, and N bits of data are used to mark the SRIO access port number connected to a certain FC core port, thereby providing multiple SRIO access ports to aggregate SRIO node access; In the sending mode, the transceiver unit receives the SRIO frame transmitted by the SRIO access node, converts it into first information, and then sends it to the frame processing unit through the interconnection unit. The first information includes: information content, source SRIO access port number, destination SRIO access port number, SRIO address information, information length, and keep value. The information length and keep value identify the length of the information content in different ways. Each bit of the keep value is used to mark the validity of the 32-byte information content. The frame processing unit parses the content of the first information, and assembles each first information sent to a certain destination FC core port number corresponding to different SRIO access port numbers into an information group, and sends it to the parsing unit along with the corresponding destination FC core port number. The parsing unit then merges it into the FC frame, and after passing through the switching module, it is transmitted to the conversion module of the destination FC core port for layer-by-layer information restoration to the SRIO frame, and then distributed to the corresponding different receiving end SRIO access nodes. In receive mode, the conversion module restores the information group to an SRIO frame by the following steps: the parsing unit extracts the information group from the FC frame and sends it to the frame processing unit; the frame processing unit parses the information group, extracts each piece of first information according to the information length and keep value, and sends it to the interconnection unit; the interconnection unit forwards the first information to the corresponding transceiver unit according to the destination SRIO access port number information carried in the first information; the transceiver unit restores the first information to an SRIO frame and transmits it to its corresponding receiving SRIO access node; The step of fusing the information group and the destination FC core port number into the FC frame includes: the parsing unit fills the M-bit data of the source FC core port number and the destination FC core port number of the information group into the SID and DID fields of the FC frame header, and at the same time fills the information group into the payload of the FC frame.

2. The SRIO high-bandwidth information exchange system based on FC fiber channel according to claim 1, characterized in that, The step of the frame processing unit assembling the first information into an information group includes: the frame processing unit receives each first information from different SRIO access ports and sent to different SRIO access port numbers corresponding to a certain destination FC core port number, and synchronously accumulates the information length and keep value carried by each information. When the accumulated information reaches the budget length of the information group, the unit no longer receives new first information from different SRIO access port numbers corresponding to the destination FC core port number, and simultaneously assembles the first information that has been received into an information group.

3. The SRIO high-bandwidth information exchange system based on FC fiber channel according to claim 1, characterized in that, The step of the frame processing unit assembling the first information into an information group includes: the frame processing unit starts a timing mechanism, receives the first information of different SRIO access port numbers corresponding to a certain destination FC core port number, and simultaneously accumulates and judges that the information length and keep value carried by it have not accumulated to the budget length of the information group, but have reached the timing threshold. When this happens, the unit no longer receives the first information of different SRIO access port numbers corresponding to the destination FC core port number, and at the same time assembles the first information that has been received into an information group.

4. The SRIO high-bandwidth information exchange system based on FC fiber channel according to claim 1, characterized in that, The step of the frame processing unit parsing the information group, decomposing each first piece of information according to the information length and keep value, and sending it to the interconnection unit also includes: the frame processing unit verifying the information length according to the keep value, and discarding the first piece of information when the verification fails.

5. The SRIO high-bandwidth information exchange system based on FC fiber channel according to claim 1, characterized in that, The frame processing unit, parsing unit, and switching module operate in the FC clock domain, while the transceiver unit and SRIO access node operate in the SRIO clock domain. The clock frequency of the FC clock domain is set to several times that of the SRIO clock domain.

6. A high-bandwidth SRIO information exchange method based on FC fiber channel, characterized in that... The steps include: S1 establishes an information exchange system as described in any one of claims 1 to 5, provides a plurality of SRIO access ports to aggregate SRIO node access, sets the source SRIO access port number and the destination SRIO access port number to be marked with M+N bit data respectively, and marks the SRIO access port number connected to a certain FC core port according to the M bit data in the M+N bit and the N bit data to mark the corresponding switching module FC core port number. In the transmission mode, each transceiver unit receives and parses the SRIO frame sent by the corresponding SRIO access node to extract the information content, source SRIO access port number, destination SRIO access port number and SRIO address information, and then merges them into the first information after assigning the information length and keep value according to the length of the information content. The S3 frame processing unit assembles the first information of each SRIO access port number corresponding to a certain destination FC core port number into an information group. The S4 parsing unit merges the information group and the destination FC core port number into the FC frame. The steps include: the parsing unit fills the M bits of the source FC core port number and the destination FC core port number of the information group into the SID and DID fields of the FC frame header, and at the same time fills the information group into the payload of the FC frame. The switching module receives FC frames and forwards them to the parsing unit connected to the destination FC core port; In receive mode, the parsing unit receives the FC frame and extracts the information group after parsing; after parsing the information group, the frame processing unit decomposes each first information according to the information length and keep value; after the transceiver unit restores the first information into an SRIO frame, it transmits it to its corresponding receiving end SRIO access node.

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