A driving control circuit, a lighting control circuit, and a lighting circuit of a power tube

Abstract

The application discloses a driving control circuit of a power tube, a lighting control circuit and a lighting circuit. The driving control circuit is applied to a circuit such as a lighting circuit, and is used for adjusting the driving current or driving voltage of a power tube in the circuit. The driving control circuit comprises a protocol conversion circuit, which is used for storing a received data input signal as a plurality of digital signals, and converting the plurality of digital signals into a plurality of adjustment parameters. A driving adjustment circuit is connected to the control end of the power tube and the protocol conversion circuit, and is used for adjusting the driving current and driving voltage of the power tube according to the driving current adjustment parameter and the driving voltage adjustment parameter in the plurality of adjustment parameters, so as to match different types of power tubes. The driving control circuit disclosed by the application converts the data input signal into the plurality of adjustment parameters, adjusts the driving current and driving voltage of the power tube to match different types of power tubes, and improves the driving capability, compatibility and adaptability of the circuit.

Description

Technical Field

[0001] This disclosure relates to the field of power electronics technology, and more specifically, to a power transistor drive control circuit, a lighting control circuit, and a lighting circuit. Background Technology

[0002] Currently, many LED lighting products based on LED dimming technology have appeared on the market, mainly used for landscape and architectural decorative lighting. LED lighting products can be used as loads, powered by switching power supplies.

[0003] Switching power supplies typically sample inductor current and output voltage to power loads, and use the sampled signals as feedback to regulate the output current or voltage. With the increasing integration of electronic devices, many switching power supplies are now used via integrated circuits. To achieve a specific function, a chip integrating a switching power supply often requires specific pin configurations. Currently, most commercially available chips use PWM signals to control the switching power supply for dimming, which limits dimming capabilities. Furthermore, due to fixed drive voltages and fixed pull-up and pull-down capabilities, the driving capability is poor, and it cannot simultaneously accommodate multiple types of transistors, resulting in poor adaptability. Therefore, it is necessary to provide improved technical solutions to overcome the above-mentioned technical problems in existing technologies. Summary of the Invention

[0004] In view of this, the purpose of this disclosure is to provide a power transistor drive control circuit, a lighting control circuit, and a lighting circuit to solve the problems in the prior art.

[0005] According to a first aspect of this disclosure, a drive control circuit for a power transistor is provided, comprising:

[0006] The protocol conversion circuit stores the received data input signal as multiple digital signals and converts the multiple digital signals into multiple adjustment parameters;

[0007] A drive adjustment circuit is connected to the protocol conversion circuit and the control terminal of the power transistor. It adjusts the drive current according to the drive current adjustment parameter among the plurality of adjustment parameters, and / or adjusts the drive voltage of the power transistor according to the drive voltage adjustment parameter among the plurality of adjustment parameters, so as to match different types of power transistors.

[0008] Optionally, the different types of power transistors include Si transistors, SiC transistors, and GaN transistors.

[0009] Optionally, the drive regulation circuit adjusts the drive current of the power transistor to control the turn-on and turn-off rates of the power transistor.

[0010] Optionally, the drive adjustment circuit includes:

[0011] A voltage regulator connects the protocol conversion circuit, the power supply terminal, and the control terminal of the power transistor. It converts the input voltage of the power supply terminal into a power supply voltage to provide to the subsequent stage, and provides a drive voltage to the power transistor via the output terminal.

[0012] A pull-up current source is connected between the output terminal of the voltage regulator and the control terminal of the power transistor; and

[0013] A pull-down current source is connected between the control terminal and the ground terminal of the power transistor. The pull-up current source and the pull-down current source together provide drive current for the power transistor.

[0014] Optionally, the voltage regulator adjusts the driving voltage according to the driving voltage adjustment parameters; the pull-up current source and the pull-down current source adjust the driving current according to the driving current adjustment parameters.

[0015] Optionally, the driving current and driving voltage of the GaN transistor are both smaller than those of the Si transistor.

[0016] Optionally, the plurality of adjustment parameters are analog signals, and the plurality of adjustment parameters also include standby adjustment parameters, which are used to configure a sleep mode for the drive control circuit of the power transistor.

[0017] Optionally, the protocol conversion circuit uses a single-wire communication protocol or a serial communication protocol to convert the data input signal into the drive voltage adjustment parameters and the drive current adjustment parameters.

[0018] Optionally, the digital signal corresponding to the driving voltage adjustment parameter consists of a 1-bit binary number, the digital signal corresponding to the driving current adjustment parameter consists of a 2-bit binary number, and the digital signal corresponding to the standby adjustment parameter consists of a 1-bit binary number.

[0019] According to a second aspect of the present invention, a lighting control circuit is provided, comprising:

[0020] Power transistor;

[0021] The aforementioned power transistor drive control circuit; and

[0022] The dimming selection circuit selects the dimming mode according to the digital signal, and generates a PWM dimming signal in the chopper dimming mode and an analog dimming signal in the analog dimming mode to control the switching state of the power transistor.

[0023] Optionally, the lighting control circuit further includes:

[0024] The protection circuit obtains the physical quantity threshold based on the adjustment parameters generated by the digital signal, and protects the circuit when the sampled physical quantity reaches the physical quantity threshold.

[0025] According to a third aspect of the present invention, a lighting circuit is provided, comprising:

[0026] Multi-channel LED light strings; and

[0027] The aforementioned lighting control circuit is used to control the dimming mode of the multi-channel LED light string.

[0028] According to embodiments of the present disclosure, the power transistor drive control circuit, lighting control circuit, and lighting circuit employ a configured protocol to provide data input signals to a protocol conversion circuit, which stores them as multiple digital signals and then converts them into multiple adjustment parameters. The drive voltage and drive current of the power transistor are adjusted based on the drive voltage adjustment parameter and drive current adjustment parameter among these parameters. This allows the lighting control circuit to match different types of power transistors, enabling adjustment of the corresponding drive voltage and drive current based solely on the protocol, without requiring replacement of the control circuit. The overall lighting control circuit exhibits strong drive capability, good adaptability, and high compatibility. Furthermore, the data input signal is configured using a single-wire communication protocol or a serial communication protocol, allowing adjustment of different circuits through a single-wire input signal to achieve various control functions. This provides diversified control of the switching circuit, simplifying operation, and offering fast and efficient control, perfectly replacing PWM modulation. Attached Figure Description

[0029] Figure 1 A schematic circuit diagram of a conventional switching power supply is shown.

[0030] Figure 2 A schematic circuit block diagram of a lighting control circuit according to an embodiment of the present disclosure is shown;

[0031] Figure 3 Show Figure 2 The schematic circuit diagram of each circuit in the lighting control circuit shown;

[0032] Figures 4a-4d The diagram illustrates waveforms of different types of single-wire protocols according to embodiments of the present disclosure.

[0033] Figure 5 An exemplary waveform diagram of a data input signal received by a drive control circuit according to an embodiment of the present disclosure is shown.

[0034] Figure 6 A schematic diagram of a lighting control chip according to an embodiment of the present disclosure is shown;

[0035] Figure 7 A schematic circuit diagram of a switching power supply according to an embodiment of the present disclosure is shown. Detailed Implementation

[0036] The preferred embodiments of this disclosure are described in detail below with reference to the accompanying drawings, but this disclosure is not limited to these embodiments. This disclosure covers any alternatives, modifications, equivalent methods, and solutions made within the spirit and scope of this disclosure.

[0037] In order to provide the public with a thorough understanding of this disclosure, specific details are described in detail in the following preferred embodiments of this disclosure, but those skilled in the art can fully understand this disclosure without these details.

[0038] The present disclosure is described in more detail below by way of example with reference to the accompanying drawings. It should be noted that the drawings are in a simplified form and use non-precise scales, and are only used to facilitate and clarify the illustration of the embodiments of the present disclosure.

[0039] Figure 1 A schematic circuit diagram of a conventional switching power supply is shown.

[0040] like Figure 1 As shown, this switching power supply is based on a BUCK topology. In addition to the switching circuit, a rectifier bridge B1 is installed at the front end, with the LED light serving as the downstream load. The rectifier bridge B1 rectifies the AC power supply to generate a DC input voltage. The input voltage is then filtered by capacitors C1 and C2. The filtered input voltage Vin is supplied to the power supply control chip U0 of the switching circuit, and the switching circuit converts it to DC output voltage Vo, which is supplied to the load. The AC voltage is, for example, 90-260V, and the DC voltage is 80V. The power supply control chip uses a control circuit to control the switching state of its internal power transistors to regulate the output voltage. Figure 1 In this circuit, both the control circuit and the power transistor are located within the control chip U0.

[0041] The control chip U0 includes multiple pins, for example, eight. Pin 1, OVP, is grounded through resistor R3 and used to set the OVP level for overvoltage protection. Pin 2, GND, is grounded. Pin 3, NC, is left empty. Pin 4, VIN, receives the input voltage Vin. Pin 5, DRAIN, is the drain terminal of the transistor, connected to diode D1 and inductor L2, forming a BUCK topology. Capacitor C3 is the output filter capacitor. Pin 6, NC, is left empty. Pin 7, PWM, receives the input signal, i.e., the PWM control signal, to control the internal circuitry of the chip. Pin 8, CS, is the sampling pin, grounded through resistors R4 and R5, sampling the source voltage of the transistor and adjusting the internal circuitry accordingly. Pin 3 can also be the COMP pin, grounded through an external compensation resistor. Pin 6 can also be the FB pin, receiving feedback signals to adjust the output voltage. When pins 3 and 6 are configured as above, all eight pins of the control chip U0 are used, and there are multiple external resistors.

[0042] This switching power supply controls the operating state of the switching circuit through a power supply control chip. It uses a single-line input PWM signal for dimming, which only supports a single dimming mode. The line voltage compensation is fixed, and it is not compatible with low-frequency and high-frequency applications. Furthermore, the setting of the OVP level or OTP point and OTP slope requires external pins and resistors for configuration, resulting in a large number of external components. In addition, the drive voltage and drive current of the power transistor control terminal are fixed, resulting in poor drive capability. It cannot be simultaneously compatible with Si transistors or GaN transistors, and it is not easy to simultaneously be compatible with various switching circuits. The conduction time is fixed, and the current curve performance is poor.

[0043] This invention improves the internal circuitry of the power supply control chip in the aforementioned switching power supply, enabling it to flexibly adjust the drive current and / or drive voltage to match various types of power transistors and enhance drive capability. Furthermore, it eliminates the need for external compensation resistors to flexibly implement multiple and multi-level over-threshold protection, and is adaptable to various switching circuits and dimming modes. A detailed description follows with reference to the accompanying drawings.

[0044] Figure 2 A schematic circuit block diagram of a power transistor according to an embodiment of the present disclosure is shown.

[0045] like Figure 2 As shown, the drive control circuit 100 of this embodiment includes a protocol conversion circuit 110 and a power regulation circuit 120. The drive control circuit 100 is used to regulate the drive current and drive voltage of the power transistor M0. Since power transistors can be applied to various circuits, the drive control circuit 100 of this embodiment can be applied to control circuits for various power transistors, for example... Figure 2The provided lighting control circuit 200 includes a power transistor M0, a drive signal generation circuit 230, and a drive control circuit 100. Specifically, the drive signal generation circuit 230 is connected to the control terminal of the power transistor M0 and is used to generate a drive signal Vg based on multiple input signals to control the on and off states of the power transistor M0. The protocol conversion circuit 110 stores the received data input signal Datain as multiple digital signals (B0, B1, B2-B3…B11-B18) and converts these multiple digital signals into multiple adjustment parameters, which may include drive current adjustment parameters, drive voltage adjustment parameters, overvoltage protection adjustment parameters, and overtemperature protection adjustment parameters. The drive adjustment circuit 120 is used to adjust the drive current and drive voltage of the power transistor according to the drive current adjustment parameters and drive voltage adjustment parameters to adapt to different types of power transistors, or to match different drive currents or drive voltages to the power transistor to improve its drive capability.

[0046] When the drive control circuit 100 is applied to the lighting control circuit 200, the lighting control circuit 200 also includes a dimming selection circuit 210, a feedback compensation circuit 220, and a protection circuit 240. The protocol conversion circuit 110 converts the data input signal into multiple digital signals, adjusting different circuit parameters respectively. For example, in this embodiment, it is divided into 8 digital signals, namely B8, B9-B10, B11-B18, B6-B7, B4-B5, B0, B1, and B2-B3, which are referred to as the first digital signal, the second digital signal, etc. Here, the first, second, etc. are only used for differentiation and are not used to limit the output order of each data signal. The dimming selection circuit 210 is connected to the protocol conversion circuit 110. Based on the value of the first digital signal (B8), it selects to output the second digital signal (B9-B10) and the third digital signal (B11-B18) as the first dimming signal, or selects to output the third digital signal as the second dimming signal. The feedback compensation circuit 220 is connected to the dimming selection circuit 210. Based on the second dimming signal and the output feedback signal Vcs, it generates a reference signal Vref. The drive signal generation circuit 230 is connected to the dimming selection circuit 210, the feedback compensation circuit 220, and the control terminal of the power transistor M0. Based on the first dimming signal, it generates a drive signal Vg to control the turn-off time of the power transistor M0 to realize the first dimming mode. Based on the reference signal Vref and the output feedback signal Vcs, it generates a drive signal Vg to control the turn-off time of the power transistor M0 to realize the second dimming mode.

[0047] Furthermore, the protocol conversion circuit 110 converts the fourth digital signal (B6-B7) into overvoltage protection adjustment parameters, the fifth digital signal (B4-B5) into overtemperature protection adjustment parameters, the sixth digital signal (B0) into standby adjustment parameters, the seventh digital signal (B1) into drive voltage adjustment parameters, and the eighth digital signal (B2-B3) into drive current adjustment parameters. The protection circuit 240 connects the protocol conversion circuit 110 and the drive signal generation circuit 230, converting the overtemperature and overvoltage protection adjustment parameters output by the protocol conversion circuit 110 into at least one physical quantity threshold corresponding to the sampled physical quantity. When the sampled physical quantity reaches the corresponding physical quantity threshold, the lighting control circuit 200 is protected. The drive adjustment circuit 120 connects the protocol conversion circuit 110 and the control terminal of the power transistor M0. It receives the input voltage Vin, converts it into a supply voltage, and provides it to the drive signal generation circuit 230 and other circuits. It also adjusts the drive current and drive current of the power transistor according to the drive voltage adjustment parameters and drive current adjustment parameters, so that the lighting control circuit can match different types of power transistors.

[0048] exist Figure 2 In this circuit, the lighting control circuit 200 can be packaged within a chip and communicates with the outside world through multiple pins. For example, the protocol conversion circuit 110 receives the data input signal Data in through the DIN pin; the GND pin is grounded; the drive signal generation circuit 230 is connected to the control terminal of the power transistor M0, the source of the power transistor M0 is connected to an external resistor R6 through the CS pin and then grounded, and the drain of the power transistor M0 is connected to an external voltage conversion circuit 250 through the DRAIN pin. This voltage conversion circuit 250 can be a switching circuit that converts the input voltage Vin into an output voltage Vo and provides it to the subsequent load. The feedback compensation circuit 220 samples the current on the power transistor M0 through the CS pin to generate an output feedback signal Vcs; the drive adjustment circuit 120 samples the input voltage Vin through the VIN pin.

[0049] The lighting control circuit 200 of this embodiment receives data input signals and stores them as multiple digital signals according to a configured protocol. These multiple digital signals are then converted into multiple adjustment parameters, such as drive voltage adjustment parameters and drive current adjustment parameters, to regulate the drive current and drive voltage of the power transistors. This allows the circuit to match different types of power transistors, improving drive capability and enhancing compatibility and adaptability. When the load is a lighting device such as an LED lamp, different dimming modes are selected and different dimming signals are output based on the multiple digital signals to adjust the drive signal and control dimming brightness and dimming depth. Furthermore, multiple adjustment parameters can be generated based on the multiple digital signals, and different threshold values ​​for different physical quantities can be obtained through different protection adjustment parameters. For example, multiple protection thresholds for multiple levels can be set according to the protocol, eliminating the need for various compensation resistors on the circuit periphery, reducing external components and lowering costs. Thus, different parameters of different circuits can be adjusted according to different digital signals, improving the function of each circuit and making the lighting control circuit applicable to different circuit structures, powering different loads, and enhancing its applicability.

[0050] Figure 3 Show Figure 2 The diagram shows a schematic of each circuit in the lighting control circuit.

[0051] like Figure 3 As shown, the protocol conversion circuit 110 includes a decoder 111, a register group 112, and a DAC module 113. The decoder 111 receives the data input signal Data in and decodes it, transmitting it as multiple binary numbers. The register group 112 includes multiple registers, which sequentially store multiple binary numbers according to a pre-configured single-wire communication protocol or serial communication protocol and output them as multiple digital signals. When the data input signal is configured using a serial communication protocol, the drive control circuit 100, the lighting control circuit 200, and even the chip encapsulating the lighting control circuit can all be regarded as slave devices, and the MCU as the master device. The master device sends data to the slave device, realizing simplex data transmission. The number of registers matches the number of bits of the transmitted data. Taking 19 bits of transmitted data as an example, the register group 112 includes, for example, 19 registers, each storing one binary number. The data output from different numbers of registers is combined into one digital signal.

[0052] In the protocol conversion circuit 110, taking the configuration of the data input signal using a single-wire communication protocol as an example, the register group 112 outputs, for example, 8 digital signals. The first digital signal is B8, containing one binary digit, occupying 1 bit of space, and output by one register; the second digital signal is B9-B10, containing two binary digits, occupying 2 bits of space, and output by two registers; similarly, the third digital signal is B11-B18, containing 8 binary digits, occupying 8 bits of space; the fourth digital signal is B6-B7, containing two binary digits; the fifth digital signal is B4-B5, containing two binary digits; and so on. The sixth digital signal is designated B0, the seventh digital signal is designated B1, and the eighth digital signal is designated B2-B3. The decoded data input signal corresponding to the eight digital signals contains 19 bits of binary data. The number of bits can be configured according to the protocol and the desired function. When only dimming configuration is needed, only the first three digital signals can be retained, requiring a 10-bit binary data input signal. When only circuit protection is needed, only the fourth and fifth digital signals can be retained, requiring a 4-bit binary data input signal. When only drive capability adjustment is needed, only the protocol information corresponding to the binary data of B0-B3 can be retained. The DAC module 113 connects to the output of register group 112 and is used to convert multiple digital signals into multiple adjustment parameters. These adjustment parameters are analog quantities converted from digital signals. For example, the fifth to eighth digital signals need to be converted into five different analog adjustment parameters to adjust different parameters of different circuits and achieve different functions.

[0053] The dimming selection circuit 210 may include, for example, a dimming mode selection module, a PWM generator, and a DAC module. The dimming mode selection module outputs a first selection signal S1 or a second selection signal S2 based on the value of the received first digital signal to configure the dimming mode; the PWM generator, under the control of the first selection signal, outputs a first dimming signal based on the second and third digital signals, the first dimming signal being a PWM dimming signal; the DAC module, under the control of the second selection signal S2, converts the third digital signal into a second dimming signal, the second dimming signal being a grayscale signal.

[0054] The feedback compensation circuit 220 adjusts the magnitude of the reference signal Vref according to the second dimming signal to adjust the turn-off time of the power transistor M0, thereby adjusting the peak value of the current flowing through the power transistor M0; the drive signal generation circuit 230 adjusts the duty cycle of the drive signal Vg according to the first dimming signal PWMn to adjust the magnitude of the current flowing through the power transistor M0. In this embodiment, the feedback compensation circuit 220 outputs the reference signal Vref and the first time signal Vt1 to the drive signal generation circuit 230.

[0055] Protection circuit 240 connects protocol conversion circuit 110 and drive signal generation circuit 230, and includes an overvoltage protection module and an overtemperature protection module. The protocol conversion circuit converts the fourth digital signal into overvoltage protection adjustment parameters and the fifth digital signal into overtemperature protection adjustment parameters. The overvoltage protection module converts the overvoltage protection adjustment parameter OVP Threshold into at least one overvoltage protection threshold (2 bits can correspond to 4 values: 00, 01, 10, and 11, i.e., 4 thresholds can be set). When the output voltage exceeds the overvoltage protection threshold, it outputs an overvoltage protection signal OVP to drive signal generation circuit 230 to control the turn-off time of power transistor M0. The overtemperature protection module converts the overtemperature protection adjustment parameter OTP Threshold into at least one overtemperature protection threshold. When the circuit temperature exceeds the overtemperature protection threshold, it outputs an overtemperature protection signal OTP to the delay-on module 232 of drive signal generation circuit 230 to control the turn-on time of power transistor M0. In some embodiments, protection circuit 240 may also include an undervoltage protection module, an overcurrent protection module, etc. Therefore, by converting multiple digital signals into different adjustment parameters as protection thresholds for each physical quantity, there is no need to set compensation resistors outside the circuit. The threshold setting is flexible and can be applied to different needs.

[0056] The drive signal generation circuit 230 includes a comparator 231, a delayed turn-on module 232, a zero-crossing detection module 233, an AND gate U5, and a logic drive module 234. The comparator 231 is connected to the control logic module 221, compares the reference signal Vref and the output feedback signal Vcs, and outputs a comparison signal Vcp. The turn-on delay module 232 is connected to the control logic module 221 and obtains a second time signal Vt2 based on the first time signal Vt1. The zero-crossing detection module 233 receives the voltage signal Vi representing the inductor current and outputs a zero-crossing detection signal ZCD when the voltage signal Vi represents the inductor current crossing zero. After receiving the zero-crossing detection signal ZCD, the AND gate U5 waits for the signal from the delayed turn-on module 232, and outputs a third time signal Vt3 after receiving the second time signal Vt2. The logic drive module 234 includes a first OR gate U3, a second OR gate U4, and an RS flip-flop, and generates a comparison signal Vcp, a PWM dimming signal PWMn, an overvoltage protection signal OVP, and a maximum turn-on time signal Ton. The first control signal Vctr1 is generated based on the third time signal Vt3 and the maximum off-time signal Toffmax. The second control signal Vctr2 is generated based on the third time signal Vt3 and the maximum on-time signal Toffmax. Both the maximum off-time signal Toffmax and the maximum on-time signal Tonmax can be generated via timers, and are effective when the power transistor reaches its maximum off-time and maximum on-time, respectively, to control the power transistor's on and off states. Then, a drive signal Vg is generated based on the first control signal Vctr1 and the second control signal Vctr2 to control the power transistor M0's off and on states. In one embodiment, this power supply control module is the power transistor control module for a flyback converter or an active clamp converter, employing a peak current control mode. The delay-on module 232 is used to set the oscillation time in DCM mode, and the comparator 231 is used to control the peak value of the inductor current. Therefore, the logic drive module 234 mainly controls the off-time of the power transistor M0 based on the drive signal Vg generated from the first control signal Vctr1, and controls the on-time of the power transistor M0 based on the drive signal Vg generated from the second control signal Vctr2.

[0057] Therefore, in this embodiment, the output current of the power transistor can be controlled by the dimming selection circuit 210, and line compensation can also be achieved, expanding the high-frequency and low-frequency applications of the circuit. Furthermore, the dimming mode can be switched flexibly, and it is compatible with analog dimming and chopper dimming, thus improving the reliability of the circuit.

[0058] See also Figure 3The drive regulation circuit 120 includes a transistor M1 and a voltage regulator 121. One end of transistor M1 is connected to the power supply terminal VIN, and the other end is connected to the voltage regulator 121. The control terminal is grounded. The voltage regulator 121 is used to regulate the input voltage and provide power supply voltage to various circuits. For example, the voltage regulator 121 provides a drive voltage to the power transistor M0 through its output terminal. It can also adjust the voltage at its output terminal according to the drive voltage adjustment parameter Drive Voltage converted from the digital signal of the protocol conversion circuit 110 to adjust the value of the drive voltage of the power transistor.

[0059] Furthermore, the power supply regulation circuit 160 also includes a pull-up current source U6 and a pull-down current source U7 to provide drive current for the power transistor M0. The pull-up current source U6 is connected between the output terminal of the voltage regulator and the control terminal of the power transistor M0, and the pull-down current source U7 is connected between the control terminal of the power transistor M0 and the ground terminal. The two together form a push-pull circuit structure or can be regarded as a totem pole circuit structure. The pull-up current source U6 and the pull-down current source U7 adjust the current at the output terminal according to the drive current adjustment parameter Drive Current to adjust the drive current of the power transistor. By adjusting the drive current of the power transistor, the turn-on and turn-off rates of the power transistor M0 can be controlled to achieve a stepped turn-on effect.

[0060] Specifically, the sixth digital signal, B0, can be converted into a standby adjustment parameter by the DAC module 113. For example, when its value is 0, it indicates that sleep mode is needed, and a Sleep Mode signal is issued to control the regulator 121 or other circuit modules to shut down or enter sleep mode, reducing power consumption. The seventh digital signal, B1, is converted into a drive voltage adjustment parameter, DriveVoltage. The drive voltage can be adjusted according to the value of B1 to match different types of power transistors. Each type of power transistor with fixed specifications corresponds to a set of drive current values ​​and a set of drive voltage values. Different types of power transistors include, for example, Si transistors, SiC transistors, and GaN transistors, and the drive current and drive voltage values ​​of GaN transistors are both lower than those of Si transistors. For example, when B1 is 0, the regulator 121 selects to turn on the GaN voltage branch to match the GaN power transistor, and the maximum drive voltage of the GaN transistor is 6.5V. When it is 1, the regulator 121 selects to turn on the Si MOS voltage branch to match the Si power transistor, and the maximum drive voltage of the Si transistor is 10V. The eighth digital signal, B2-B3, represents the drive current adjustment parameters. The analog signals converted by the DAC module 113 control the magnitude of the drive current. Similarly, since the drive current signal and drive voltage signal have a one-to-one correspondence, when B1 is 0 or 1, B2-B3 output corresponding values. After being converted to analog signals, these values ​​are adjusted to regulate the outputs of the pull-up and pull-down current sources, thereby regulating the drive current. Using a single-wire communication protocol or serial communication protocol to configure the data input signal allows for matching the corresponding drive current and drive voltage to different types of transistors using only a single input pin, and enabling the adjustment of the drive current or drive voltage for different types of transistors. It is even possible to adjust the drive current and drive voltage of transistors of the same type but with different parameters within a circuit. Of course, the drive current or drive voltage can also be adjusted individually. For example, in a Si transistor circuit structure, only the drive current can be adjusted to control the transistor's conduction rate, and EMI can be adjusted to improve drive capability. Therefore, the drive control circuit in this embodiment can change the adaptability of different circuits to transistors simply by configuring a single-wire communication protocol or a serial communication protocol, without replacing transistors or other circuit structures, thereby improving the applicability and flexibility of the circuit, saving circuit testing time, and reducing costs.

[0061] The following provides comparative data on various parasitic parameters for some power transistors, specifically GaN and Si transistors. These parasitic parameters can be selected from the following: Rdson (parasitic body resistance), Qg (gate charge), Ciss (input capacitance), Coss (output capacitance), Crss (output transfer capacitance), Co(tr) (effective output capacitance), and Trr (reverse recovery time). For example, the internal resistance of both GaN and Si transistors is between 100-200 mΩ. The Qg of GaN transistors is below 10 nC, while the Qg of Si transistors can reach tens or even hundreds of nC. The Ciss of GaN transistors is between 50-100 pF, while that of Si transistors is between 1000-2000 pF. The Crss of GaN transistors is between 0-1 pF, while that of Si transistors is between 0-20 pF. Comparison revealed that, under the same Rdson condition, the Ciss of GaN transistors is approximately 1 / 15 that of Si transistors, while the Qg of GaN transistors is approximately 1 / 11 that of Si transistors.

[0062] According to the formula: Qg = Ciss * Vgs = (Cgs + Cgd)Vgs = Ig / Fsw, a smaller Ciss or a smaller gate drive voltage determines a smaller Qg. Furthermore, different Ciss results in different totem pole drive currents, thus the pull-up source current and pull-down sink current also differ. Referring to the above parameter comparison, the drive current Ig = Qg * Fsw. When designing the same switching frequency for different types of power transistors, the Ig of a GaN transistor is approximately 1 / 11 that of a Si transistor. Taking a Si transistor with a pull-up current of 5mA and a pull-down current of 10mA as an example, the GaN transistor's pull-up current is approximately 0.45mA and the pull-down current is approximately 0.9mA. The performance parameters of GaN transistors are superior to those of Si transistors. In this embodiment, the drive control circuit adjusts the drive current and drive voltage of the power transistor according to the protocol to match different types of transistors. For example, the control circuit originally used for Si transistors can be directly applied to GaN transistors. Only the protocol configuration needs to be changed; no change to the circuit structure is required to obtain higher performance and benefits.

[0063] The data input signal described in this embodiment is configured using a single-wire communication protocol. This single-wire communication protocol includes unipolar return-to-zero (RZ) code, non-unipolar RZ code, bipolar RZ code, and non-bipolar RZ code. Alternatively, the data input signal can also be configured using a serial communication protocol. Serial communication protocols generally use full-duplex communication. In this embodiment, simplex communication is used. The MCU issues commands to configure the protocol, which are then transmitted to the lighting control circuit. The protocol configuration method can refer to the single-wire communication protocol configuration method described above, achieving the same operation and beneficial effects as the RZ code.

[0064] The lighting control circuit in this embodiment uses a pre-configured protocol to provide data input signals to a protocol conversion circuit, which stores them as multiple digital signals and then converts them into multiple adjustment parameters. Based on the drive voltage adjustment parameter and drive current adjustment parameter among the multiple adjustment parameters, the drive voltage and drive current of the power transistor are adjusted so that the lighting control circuit can match different types of power transistors. Thus, based on the data input from a single line, the corresponding drive voltage and drive current can be adjusted according to the type of power transistor without replacing the control circuit. The overall driving capability of the lighting control circuit is strong, the adaptability is good, and the compatibility is high.

[0065] In lighting control circuits, data input signals are input according to a pre-configured single-wire or serial communication protocol and stored as multiple digital signals. Dimming modes and specific dimming signals within these digital signals are configured to generate different drive signals. This allows the lighting control circuit to flexibly select analog or chopper dimming methods and performs line compensation to meet the application requirements of both high and low frequencies, thus expanding the applicability of power transistors. Furthermore, multiple adjustment parameters are generated from these digital signals to set different physical quantity thresholds, enabling flexible adjustment of protection thresholds for each protection module. This provides a wide range of adjustment levels, eliminating the need for multiple external resistors, reducing the number of various compensation resistors around the circuit or chip, reducing external components, minimizing pin usage, reducing circuit size, increasing chip integration, and lowering costs.

[0066] Figures 4a-4d The diagram illustrates waveforms of different types of single-wire protocols according to embodiments of the present disclosure.

[0067] See Figure 4a The figure shows the waveform of unipolar return-to-zero code. The figure shows the waveform of 4 bits of data. For a bit, it can be divided into two parts, T1 and T2. T1 occupies a longer time than T2. ​​When the absolute value of T1 is greater than T2, the bit is high and the corresponding output is 1. When the absolute value of T1 is less than T2, the bit is low and the corresponding output is 0.

[0068] like Figure 4b As shown, this is a unipolar non-return-to-zero code, which also contains 4 bits. The method for determining the binary number corresponding to each bit is as follows: Figure 4a .

[0069] Similarly, Figure 4c and Figure 4d The waveforms of bipolar return-to-zero (RZ) code and non-bipolar RZ code are shown respectively, each containing 4 bits. The method for determining the binary number corresponding to each bit is as follows: Figure 4aThe same applies to the data input signal in this embodiment. Regardless of whether a serial communication protocol or a single-wire communication protocol is used, the method for determining the value of each bit during data transmission (or the encoding and decoding method) is the same. Figure 4a same.

[0070] Figure 5 An exemplary waveform diagram of the data input signal received by the drive control circuit according to an embodiment of the present disclosure is shown.

[0071] like Figure 5 The diagram shows the waveform of the valid data bits of the data input signal. When the data input signal is configured using a serial communication protocol, simplex data transmission is used, supporting unidirectional data transmission from the MCU to the lighting control circuit in this embodiment. The data packet of the serial communication protocol includes a start bit, body data, parity bit, and stop bit. Figure 5 The waveform is considered the main data. When the data input signal is configured using a single-wire communication protocol... Figure 5 The transmission waveform is considered as valid data bits.

[0072] Specifically, Figure 5 In this process, the number of registers matches the number of bits of data to be transmitted. The data input signal transmission process is as follows: The external MCU (microcontroller) sends the data input signal, with each bit having a period of approximately 1.25µs. When the chip receives a high-level signal for more than 1.25µs, it is considered a Start signal, indicating that data transmission is about to begin. The first falling edge after receiving the start signal is considered the start of the first bit transmission. If the low-level time in a bit is less than the high-level time, it is considered a 1; if the low-level time is greater than the high-level time, it is considered a 0. Each bit of data is sequentially placed into multiple registers. When the chip receives a high-level signal again for more than 1.25µs, it indicates that the chip has received a Stop signal, meaning the data transmission has ended. During data transmission, the chip latches all the data in the registers into a latch. Upon receiving the Stop signal, a rising edge Data latch signal is generated, at which point the register outputs the data to the DAC module. The DAC module then converts the digital signal into an analog signal and sends it to the various functional modules of the control circuit. The register performs serial data transmission through shifting.

[0073] If the drive control circuit 100 of this embodiment is applied to a circuit that does not require dimming mode configuration, the single-wire protocol can be configured with only 8 bits of binary data, namely B0-B7. Different binary data can form different digital signals, and the meaning of each digital signal can be found in the above embodiment. For example, B0 is the standby adjustment parameter, B1 is the drive voltage adjustment parameter, B2-B3 are the drive current adjustment parameters, and B4-B5 and B5-B6 are the over-temperature protection adjustment parameters and over-voltage protection adjustment parameters, respectively. In this case, the data after B7 can all be high level, so data transmission is considered to start at time T0 and end at time T1. However, if dimming mode needs to be configured, the protocol needs to add several more bits of binary data. For example, B8-B18 are dimming configuration information. Then, a continuous high level is generated only after B18. In this case, data transmission is considered to start at time T0 and end at time T2. Similarly, if only dimming configuration is required, only the data of B8-B18 can be retained, with the time period T1-T2 as the data transmission stage.

[0074] Of course, the configuration of the single-wire communication protocol or serial communication protocol in this invention is not limited to this. The protocol can be configured according to the needs of the circuit, the corresponding number of binary bits can be increased or decreased, and it can be connected to different circuit modules.

[0075] Figure 6 A schematic diagram of a lighting control chip according to an embodiment of the present disclosure is shown.

[0076] like Figure 6 The present invention discloses a lighting control chip 600, which includes the lighting control circuit 200 of the above embodiment. In fact, the chip 600 is a packaged structure of the circuit 200. Figures 2-3 As can be seen, the control chip 600 may include 8 pins: pin 1 is the VIN pin, receiving the input voltage Vin; pin 2 is the DATA pin, receiving the data input signal; pin 3 is the NC pin, left empty; pin 4 is the GND pin, connected to reference ground; pin 5 is the CS pin, sampling the source voltage of transistor M0; pin 6 is the NC pin, left empty, but when the data input signal is a two-wire communication protocol, this pin can be used as the SCL pin to receive the clock signal; pin 7 is the NC pin; and pin 8 is the DRAIN pin, connected to the drain of power transistor M0. The power supply control chip in this embodiment does not require an external compensation resistor, and... Figure 1 Compared to other chips, this reduces the number of pins used, reduces the number of peripheral devices, and improves integration. It also allows for flexible setting of OTP points and OTP slopes, as well as more circuit adjustments and parameter configurations.

[0077] Figure 7A schematic circuit diagram of a switching power supply according to an embodiment of the present disclosure is shown.

[0078] like Figure 7 As shown, a switching power supply 700 is provided, including... Figure 6 The diagram shows a power supply control chip 600, a rectifier bridge B1, and a BUCK topology. The rectifier bridge rectifies the AC power into an input voltage Vin, which is supplied to the lighting control chip 600. The lighting control chip 600 controls the operating state of the power transistor M0 in the switching circuit. The BUCK topology of the switching circuit includes the power transistor M0, diode D1, and inductor L2. This embodiment uses a BUCK topology as an example; the switching circuit can also be a BOOST topology or other types of topologies. The switching circuit converts the input voltage Vin into an output voltage Vo, supplying power to the downstream load.

[0079] Furthermore, the present invention also provides a lighting circuit, including a multi-channel LED light string and the aforementioned switching power supply 700, wherein the lighting control circuit 200 provides power to the multi-channel LED light string and is used to control the dimming mode of the multi-channel LED light string.

[0080] In summary, the power transistor drive control circuit, lighting control circuit method, and lighting circuit according to the embodiments of this disclosure provide data input signals to the protocol conversion circuit according to a configured protocol, store them as multiple digital signals, and then convert them into multiple adjustment parameters. The drive voltage and drive current of the power transistor are adjusted according to the drive voltage adjustment parameter and drive current adjustment parameter among the multiple adjustment parameters, so that the lighting control circuit can match different types of power transistors. Therefore, the corresponding drive voltage and drive current can be adjusted according to the type of power transistor based on only a single-wire input signal, without replacing the control circuit. The overall driving capability of the lighting control circuit is strong, with good adaptability and high compatibility. Moreover, different circuits can be adjusted using a single-wire communication protocol or serial communication protocol through a single input data pin to achieve multiple control functions, thereby enabling diversified control of the switching circuit. The operation is simple, the control is fast and efficient, and it perfectly replaces PWM modulation.

[0081] The embodiments described above do not constitute a limitation on the scope of protection of this technical solution. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the above embodiments should be included within the scope of protection of this technical solution.

Claims

1. A drive control circuit for a power transistor, comprising: The protocol conversion circuit stores the received data input signal as multiple digital signals and converts the multiple digital signals into multiple adjustment parameters; A drive adjustment circuit, connected to the protocol conversion circuit and the control terminal of the power transistor, adjusts the drive current according to the drive current adjustment parameter among the plurality of adjustment parameters, and adjusts the drive voltage of the power transistor according to the drive voltage adjustment parameter among the plurality of adjustment parameters, in order to match different types of power transistors. The drive regulation circuit includes a voltage regulator, a pull-up current source, and a pull-down current source. The voltage regulator connects the protocol conversion circuit and the power supply terminal, converts the input voltage of the power supply terminal into the power supply voltage to provide to the subsequent stage, and provides the drive voltage through the output terminal; The pull-up current source is connected between the output terminal of the voltage regulator and the control terminal of the power transistor, and the pull-down current source is connected between the control terminal of the power transistor and the ground terminal. The pull-up current source and the pull-down current source together provide drive current for the power transistor. The voltage regulator adjusts the driving voltage according to the driving voltage adjustment parameters; the pull-up current source and the pull-down current source adjust the driving current according to the driving current adjustment parameters.

2. The drive control circuit according to claim 1, wherein, The different types of power transistors include Si transistors, SiC transistors, and GaN transistors.

3. The drive control circuit according to claim 1, wherein, The drive regulation circuit adjusts the drive current of the power transistor to control the turn-on and turn-off rates of the power transistor.

4. The drive control circuit according to claim 2, wherein, The driving current and driving voltage of the GaN transistor are both lower than those of the Si transistor.

5. The drive control circuit according to claim 1, wherein, The plurality of adjustment parameters are analog signals, and the plurality of adjustment parameters also include standby adjustment parameters, which are used to configure a sleep mode for the drive control circuit of the power transistor.

6. The drive control circuit according to claim 1, wherein, The protocol conversion circuit uses a single-wire communication protocol or a serial communication protocol to convert the data input signal into the drive voltage adjustment parameters and the drive current adjustment parameters.

7. The drive control circuit according to claim 5, wherein, The digital signal corresponding to the driving voltage adjustment parameter consists of a 1-bit binary number, the digital signal corresponding to the driving current adjustment parameter consists of a 2-bit binary number, and the digital signal corresponding to the standby adjustment parameter consists of a 1-bit binary number.

8. A lighting control circuit, comprising: Power transistor; The power transistor drive control circuit according to any one of claims 1-7; as well as The dimming selection circuit selects the dimming mode according to the digital signal, and generates a PWM dimming signal in the chopper dimming mode and an analog dimming signal in the analog dimming mode to control the switching state of the power transistor.

9. The lighting control circuit according to claim 8, further comprising: The protection circuit obtains the physical quantity threshold based on the adjustment parameters generated by the digital signal, and protects the circuit when the sampled physical quantity reaches the physical quantity threshold.

10. A lighting circuit, comprising: Multi-channel LED light strings; as well as The lighting control circuit according to claim 8 is used to control the dimming mode of the multi-channel LED string.

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