Printed circuit board and printed circuit board press test method
By setting an impedance wave module on the printed circuit board and performing impedance testing, the problem of lamination layer errors in the lamination process was solved, enabling early detection and avoidance of printed circuit board defects and improving the yield rate.
Patent Information
- Application Number
- CN202210196954.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-03-01
- Publication Date
- 2026-11-06
- Estimated Expiration
- 2042-03-01
Smart Images

Figure CN116744533B_ABST
Abstract
Description
Technical Field
[0001] This application relates to testing techniques for printed circuit boards, and more particularly to a printed circuit board and a method for testing the bonding of printed circuit boards. Background Technology
[0002] The manufacturing process of printed circuit boards includes a variety of processes, such as the lamination process between multiple circuit boards and the etching process of the laminated circuit boards.
[0003] In the manufacturing of printed circuit boards (PCBs), any abnormality in any process can lead to defects or even scrap in the finished PCB, resulting in significant cost waste. This is especially true in the lamination process between multiple PCBs, where errors in the lamination layers can easily occur.
[0004] Therefore, in the lamination process between multiple circuit boards, it is still worth considering how to detect lamination layer errors between circuit boards as early as possible to avoid defects or even scrap in the finished printed circuit boards, thereby improving the yield of printed circuit boards. Summary of the Invention
[0005] This application provides a printed circuit board and a printed circuit board bonding test method to detect early whether there are bonding layer errors between the circuit boards, so as to avoid defects or even scrap of the finished printed circuit boards, thereby improving the yield of printed circuit boards.
[0006] On one hand, this application provides a printed circuit board, comprising:
[0007] A circuit board module comprising multiple circuit boards, wherein the circuit boards are laminated together to form the circuit board module.
[0008] Impedance wave modules are installed on each layer of the circuit board. Each impedance wave module contains an impedance wave circuit pattern. Impedance wave modules installed on different layers of the circuit board have the same or different impedance wave circuit patterns. Different impedance wave circuit patterns have different impedance values. Impedance wave modules installed on adjacent layers of the circuit board are in contact.
[0009] The impedance wave module is grounded on the top circuit board of the multilayer circuit board.
[0010] Optionally, the impedance wave module includes multiple signal lines and multiple signal holes; the two ends of a signal line are respectively connected to the walls of two signal holes;
[0011] One signal line is connected to another signal line via a signal aperture, and the plurality of signal lines are connected sequentially through the plurality of signal apertures to form the impedance wave circuit pattern.
[0012] Optionally, the impedance wave module located on the top circuit board of the multilayer circuit board is also provided with a grounding hole.
[0013] Optionally, each circuit board includes a circuit area and a tool edge area surrounding the circuit area, with the impedance wave module disposed in the tool edge area of each circuit board.
[0014] Optionally, the impedance wave module is further provided with a fixing hole for fixing the impedance wave module to the circuit board.
[0015] On the other hand, this application provides a printed circuit board testing system, including the printed circuit board as described in the first aspect, and further including:
[0016] An impedance testing device is used to perform impedance testing on each layer of the printed circuit board and to identify abnormal layer circuit boards when the impedance test results differ from preset test results; wherein, the preset test results are the impedance test results obtained by testing the printed circuit board when each layer of the circuit board is accurately laminated.
[0017] Optionally, the impedance test result is an impedance waveform, and the preset test result is a preset impedance waveform.
[0018] On the other hand, this application provides a printed circuit board lamination test method, including:
[0019] Multiple single-layer circuit boards are manufactured, wherein during the manufacturing of each single-layer circuit board, an impedance wave circuit pattern is created on the single-layer circuit board to form an impedance wave module on each circuit board; the impedance wave circuit patterns on each circuit board may be the same or different; different impedance wave circuit patterns have different impedance values.
[0020] Multiple single-layer circuit boards are laminated to obtain a printed circuit board, wherein impedance wave modules are set on adjacent circuit boards after lamination;
[0021] According to the lamination sequence of the single-layer circuit boards in the printed circuit board, the impedance of the circuit board module is tested to obtain the impedance test results;
[0022] When the impedance test result differs from the preset test result, the printed circuit board is determined to be in poor bonding condition.
[0023] Optionally, the process of fabricating impedance wave circuit patterns on a single-layer circuit board to form impedance wave modules on each circuit board layer includes:
[0024] Multiple signal lines and multiple signal holes are manufactured on a single-layer circuit board, with the two ends of a signal line connected to the walls of two signal holes respectively;
[0025] One signal line is connected to another signal line via a signal aperture, and the plurality of signal lines are connected sequentially through the plurality of signal apertures to form the impedance wave circuit pattern.
[0026] Optionally, the manufacturing of multiple single-layer circuit boards includes:
[0027] The circuit area for manufacturing a single-layer circuit board and the tool edge area surrounding the circuit area;
[0028] The process of fabricating impedance wave circuit patterns on a single-layer circuit board is as follows:
[0029] The impedance wave pattern is fabricated in the tool edge region of a single-layer circuit board.
[0030] This application provides a printed circuit board (PCB) including an impedance wave module. The impedance wave module is disposed on each layer of the PCB, and each impedance wave module contains an impedance wave circuit pattern. Different impedance wave circuit patterns have different impedance values, and the impedance wave modules disposed on adjacent PCBs are in contact. Therefore, after the multilayer PCBs are laminated, the impedance value of the impedance wave module will change due to the change in the lamination position. After testing the impedance change of the multilayer PCBs, the impedance change when the lamination is correct can be used to determine whether the measured impedance change is abnormal. Especially during the lamination process of the PCB, it is possible to promptly determine whether the lamination of the multilayer PCBs is abnormal. Therefore, during or after the lamination process between multiple PCBs, by detecting the impedance change of the multilayer PCBs of the PCB, it is possible to detect early on whether there are lamination layer errors between the PCBs, avoiding defects or even scrap in the finished PCB, thereby improving the yield of the PCB.
[0031] In addition, embodiments of this application provide a printed circuit board (PCB) lamination testing method. During PCB manufacturing, impedance wave modules are fabricated on a single-layer PCB, and each impedance wave module contains an impedance wave circuit pattern. Different impedance wave circuit patterns have different impedance values, and the impedance wave modules on adjacent PCBs are in contact. Therefore, after lamination of multiple PCBs, the impedance value of the impedance wave module changes due to variations in the lamination position. After testing the impedance change of the multiple PCBs, the impedance change when the lamination is correct can be used to determine whether the measured impedance change is abnormal. This is particularly useful in the lamination process of PCBs, allowing for timely detection of lamination abnormalities. Therefore, the PCB lamination testing method provided in this embodiment can detect lamination layer errors between PCBs early in the lamination process between multiple PCBs, preventing defects or even scrapping of the finished PCBs, thereby improving the yield rate of PCBs. Attached Figure Description
[0032] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure.
[0033] Figure 1 A schematic diagram of the structure of a printed circuit board provided in one embodiment of this application;
[0034] Figure 2 A schematic diagram of an impedance wave module on a circuit board provided for one embodiment of this application;
[0035] Figure 3 A schematic diagram of the impedance wave module provided in one embodiment of this application;
[0036] Figure 4 A schematic diagram of the impedance wave module provided in another embodiment of this application;
[0037] Figure 5 A schematic diagram of a printed circuit board testing system provided in one embodiment of this application;
[0038] Figure 6 This is a schematic diagram of a printed circuit board lamination test method provided in one embodiment of this application.
[0039] Explanation of icon numbers:
[0040] Printed Circuit Board 10
[0041] Circuit board module 100
[0042] Circuit board 110
[0043] Impedance wave module 200
[0044] Signal line 210
[0045] Signal hole 220
[0046] Grounding hole 230
[0047] Fixing hole 240
[0048] Printed Circuit Board Testing System 20
[0049] Impedance testing equipment 21
[0050] The accompanying drawings have illustrated specific embodiments of this disclosure, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concepts of this disclosure to those skilled in the art through reference to particular embodiments. Detailed Implementation
[0051] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this disclosure. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this disclosure as detailed in the appended claims.
[0052] The manufacturing process of printed circuit boards (PCBs) involves various processes, such as lamination between multiple PCBs and etching after lamination. In PCB manufacturing, any abnormality in any process can lead to defects or even scrap in the finished PCB, resulting in significant cost waste. In particular, the lamination process between multiple PCBs is prone to errors in the bonding layers. Therefore, we need to find ways to prevent and control process abnormalities in advance to avoid cost waste.
[0053] Therefore, in the lamination process between multiple circuit boards, it is still worth considering how to detect lamination layer errors between circuit boards as early as possible to avoid defects or even scrap in the finished printed circuit boards, thereby improving the yield of printed circuit boards.
[0054] Based on this, this application provides a printed circuit board and a method for testing the lamination of printed circuit boards. The printed circuit board includes an impedance wave module, which is disposed on each layer of the circuit board. The impedance values of each impedance wave module may be the same or different, and the impedance wave modules disposed on adjacent circuit boards are in contact. Therefore, after the multi-layer circuit boards are laminated, the impedance value of the impedance wave module will change due to the change in the lamination position. After testing the impedance change of the multi-layer circuit boards, it is possible to determine whether the measured impedance change is abnormal based on the impedance change when the lamination is correct. Especially in the lamination process of printed circuit boards, it is possible to promptly determine whether the lamination of multi-layer circuit boards is abnormal. Therefore, this application can detect early on whether there is a lamination layer error between circuit boards in the lamination process between multiple circuit boards, avoiding defects or even scrap of the finished printed circuit boards, thereby improving the yield of printed circuit boards.
[0055] Please see Figure 1 One embodiment of this application provides a printed circuit board 10, including a circuit board module 100 and an impedance wave module 200.
[0056] The circuit board module 100 includes multiple circuit boards 110, which are laminated to form the circuit board module 100. An impedance wave module 200 is disposed on each layer of the circuit board 110. After the multiple circuit boards 110 are laminated, the impedance wave modules 200 disposed on adjacent layers of the circuit board 110 are in contact. Optionally, the impedance wave modules 200 disposed on adjacent layers of the circuit board 110 can be indirectly or directly in contact; this application does not limit this. The impedance wave module 200 disposed on the top circuit board 110 of the multiple circuit board 110 is grounded.
[0057] The location of the impedance wave module 200 on the circuit board 110 can be selected according to actual needs, and this application does not limit it. Optional, such as Figure 2 As shown, each circuit board 110 includes a circuit area (or product area) and a tool edge area surrounding the circuit area. The impedance wave module 200 is disposed in the tool edge area of each circuit board 110. The impedance wave module 200 on each circuit board 110 can be disposed at the same position on the tool edge area or at different positions on the tool edge area.
[0058] When the impedance wave module 200 on adjacent circuit boards 110 is located at the same position in the tool edge region, if the multilayer circuit boards 110 are correctly laminated, the impedance wave module 200 on the adjacent circuit boards 110 will be in direct contact. When the impedance wave module 200 on adjacent circuit boards 110 is not located at the same position in the tool edge region, the impedance wave module 200 on the adjacent circuit boards 110 will be in indirect contact regardless of whether the multilayer circuit boards 110 are correctly laminated. Optionally, the tool edge region has conductive properties; for example, the tool edge region is a metal edge region, and the tool edge region has conductive properties when the printed circuit board 10 is tested.
[0059] The impedance values of the impedance wave module 200 on each layer of circuit board 110 may be the same or different, and the impedance values of the impedance wave module 200 on each layer of circuit board 110 can be preset according to actual needs. Specifically, the impedance wave module 200 includes an impedance wave circuit pattern, and the impedance value of the impedance wave module 200 can be designed by designing the impedance wave circuit pattern. Different impedance wave circuit patterns have different impedance values, and the impedance wave circuit patterns of the impedance wave modules 200 set on different layers of circuit board 110 may be the same or different.
[0060] Optional, such as Figure 3As shown, the impedance wave module 200 includes multiple signal lines 210 and multiple signal holes 220. The two ends of one signal hole 220 are respectively connected to the walls of two other signal holes 220. One signal line 210 is connected to another signal line 210 via a signal hole 220. The multiple signal lines 210 are sequentially connected through the multiple signal holes 220 to form the impedance wave circuit pattern. The signal line 210 can also be understood as an impedance strip, a line with an impedance value.
[0061] The signal line 210 and the signal hole 220 are manufactured together when the single-layer circuit board 110 is manufactured. The length and width of the signal line 210, as well as the position and size of the signal hole 220, can be set by the program and then manufactured by the machine that manufactures the printed circuit board 10 according to the program.
[0062] like Figure 3 As shown, the signal holes 220 can be arranged in a row with equal spacing, or as shown in the diagram. Figure 4 As shown, the signal holes 220 are arranged in two rows with equal spacing. The number and arrangement of the signal holes 220, as well as the length of the signal lines 210, can be designed in the program according to actual needs, and this application does not limit them.
[0063] The longer the signal line 210, the greater its impedance. Optionally, the impedance of the impedance wave module 200 increases or decreases from the bottom circuit board 110 to the top circuit board 110 of the multilayer circuit; correspondingly, the length of the signal line 210 increases or decreases from the bottom circuit board 110 to the top circuit board 110 of the multilayer circuit. Optionally, the impedance of the impedance wave module 200 can also exhibit a concave-convex state from the bottom circuit board 110 to the top circuit board 110 of the multilayer circuit, that is, the impedance values of the impedance wave module 200 on adjacent circuit boards 110 are different sizes.
[0064] Optionally, the impedance wave module 200 disposed on the top circuit board 110 of the multilayer circuit board 110 is also provided with a grounding hole 230, which is used for grounding. The size and location of the grounding hole 230 can be designed according to actual needs, and this application does not limit it.
[0065] Optionally, the impedance wave module 200 is further provided with a mounting hole 240, which is used to fix the impedance wave module 200 to the circuit board 110. The size and position of the mounting hole 240 can be designed according to actual needs, and this application does not limit it.
[0066] When testing the printed circuit board 10, impedance testing can be performed in real-time during the lamination process or immediately after lamination. During impedance testing, the tests are conducted according to the lamination sequence of the circuit boards 110 within the printed circuit board 10, i.e., from the bottom circuit board 110 to the top circuit board 110, to obtain the impedance test results. Correspondingly, if the circuit board 110 is pre-set to be accurately laminated, impedance testing is performed from the bottom circuit board 110 to the top circuit board 110 to obtain the pre-set impedance test results. If the impedance test results do not match the pre-set impedance test results, it is determined that there is an abnormality in the lamination of the circuit board 110.
[0067] The impedance test result is, for example, an impedance waveform, and the preset impedance result is, for example, a preset impedance waveform. By comparing the impedance waveform and the preset impedance waveform, it is also possible to determine which circuit boards 110 have abnormal pressing.
[0068] In summary, this embodiment provides a printed circuit board 10, including an impedance wave module 200. The impedance wave module 200 is disposed on each layer of the circuit board 110, and each impedance wave module 200 includes an impedance wave circuit pattern. Different impedance wave circuit patterns have different impedance values, and the impedance wave modules 200 disposed on adjacent circuit boards 110 are in contact. Therefore, after the multilayer circuit boards 110 are laminated, the impedance value of the impedance wave module 200 will change due to the change in the lamination position. After testing the impedance change of the multilayer circuit boards 110, it is possible to determine whether the measured impedance change is abnormal based on the impedance change when the lamination is correct. Especially during the lamination process of the printed circuit board 10, it is possible to promptly determine whether the lamination of the multilayer circuit boards 110 is abnormal. Therefore, during or after the lamination process between multiple circuit boards 110, by detecting the impedance change of the multilayer circuit boards 110 of the printed circuit board 10, it is possible to know early whether there is a lamination layer error between the circuit boards 110, thus avoiding defects or even scrap of the finished printed circuit board 10, thereby improving the yield of the printed circuit board 10.
[0069] Please see Figure 5 One embodiment of this application also provides a printed circuit board testing system 20, including a printed circuit board 10 as described in any of the preceding embodiments, and an impedance testing device 21. The impedance testing device 21 is used to perform impedance testing on each layer of the printed circuit board 10, and to identify abnormal layer circuit boards 110 when the impedance test results differ from preset test results.
[0070] Since the impedance values of the impedance wave modules 200 on each layer of the printed circuit board 10 are known, an impedance test result can be calculated when each layer of the printed circuit board 110 is pre-pressed accurately. This calculated impedance test result is used as the pre-set test result. That is, the pre-set test result is the impedance test result obtained by testing the printed circuit board 10 when each layer of the printed circuit board 110 is pre-pressed accurately.
[0071] The impedance testing device 21 performs impedance testing on each layer of the printed circuit board 10 110. If the impedance test result is different from the preset test result, the circuit board 110 with different test results is identified as an abnormal layer circuit board 110.
[0072] Optionally, the impedance test result is an impedance waveform, and the preset test result is a preset impedance waveform. When the impedance waveform differs from the preset impedance waveform, an abnormality is determined during the lamination of the printed circuit board 10. Based on the difference between the impedance waveform and the preset impedance waveform, an abnormal layer circuit board 110 in the printed circuit board 10 can also be identified.
[0073] Please see Figure 6 One embodiment of this application also provides a printed circuit board lamination testing method, applied to a printed circuit board lamination testing system. The lamination testing system includes a printed circuit board manufacturing lamination apparatus and an impedance testing apparatus. The manufacturing lamination apparatus completes the manufacturing of single-layer circuit boards and the lamination of multi-layer circuit boards, and the impedance testing apparatus confirms whether lamination abnormalities have occurred based on impedance test results.
[0074] The printed circuit board lamination test method includes:
[0075] S610 manufactures multiple single-layer circuit boards, wherein during the manufacture of each single-layer circuit board, an impedance wave circuit pattern is manufactured on the single-layer circuit board to form an impedance wave module 200 on each circuit board; the impedance wave circuit patterns on each circuit board may be the same or different; different impedance wave circuit patterns have different impedance values.
[0076] The impedance wave circuit pattern can be designed according to actual needs, and different impedance wave circuit patterns have different impedance values.
[0077] When manufacturing the impedance wave line pattern on the single-layer circuit board 110, the position of the impedance wave line pattern can be designed according to actual needs, and this application does not limit it. Optionally, when manufacturing multiple single-layer circuit boards 110, the circuit area of the single-layer circuit board 110 and the tool edge area surrounding the circuit area are manufactured, and then the impedance wave line pattern is manufactured in the tool edge area of the single-layer circuit board 110.
[0078] Optionally, when manufacturing the impedance wave circuit pattern, multiple signal lines 210 and multiple signal holes 220 are manufactured on a single-layer circuit board 110. The two ends of one signal line 210 are respectively connected to the hole walls of two signal holes 220. One signal line 210 is connected to another signal line 210 through a signal hole 220, and the multiple signal lines 210 are sequentially connected through the multiple signal holes 220 to form the impedance wave circuit pattern.
[0079] The length of a signal line 210, the number and arrangement of signal lines 210 on a single-layer circuit board 110, the number and arrangement of signal holes 220, and the size of signal holes 220 can all be designed and manufactured according to actual needs, and this application does not impose any limitations.
[0080] S620, multiple single-layer circuit boards are laminated to obtain a printed circuit board, wherein impedance wave modules 200 are set on adjacent circuit boards after lamination.
[0081] The impedance wave modules 200 disposed on adjacent circuit boards 110 are in direct or indirect contact. When the impedance wave modules 200 on each circuit board 110 are all disposed in the same position, after multiple single-layer circuit boards 110 are laminated, the impedance wave modules 200 disposed on adjacent circuit boards 110 are in direct contact. When the impedance wave modules 200 on each circuit board 110 are disposed in different positions, after multiple single-layer circuit boards 110 are laminated, the impedance wave modules 200 disposed on adjacent circuit boards 110 are indirect contact.
[0082] S630, according to the lamination sequence of the single-layer circuit boards in the printed circuit board, the impedance of the circuit board module is tested to obtain the impedance test results.
[0083] Impedance testing is performed on the circuit board module 100 according to the lamination sequence of the single-layer circuit board 110 in the printed circuit board, that is, according to the sequence from the bottom circuit board 110 to the top circuit board 110.
[0084] Impedance testing of the circuit board module 100 can be performed in real time during the lamination process of the circuit board 110, or it can be performed immediately after the circuit board 110 is laminated.
[0085] The impedance test result is, for example, the impedance waveform.
[0086] S640, when the impedance test result is different from the preset test result, it is determined that the printed circuit board is not properly bonded.
[0087] The preset test result is that when the preset circuit board 110 is properly pressed, the impedance test is performed on the circuit board module 100 according to the pressing sequence of the single-layer circuit board 110 in the printed circuit board, that is, according to the sequence from the bottom circuit board 110 to the top circuit board 110.
[0088] The preset test result is, for example, a preset impedance waveform. When the impedance waveform differs from the preset impedance waveform, it indicates an abnormality in the lamination of the printed circuit board. By comparing the impedance waveform with the preset impedance waveform, it is also possible to determine which circuit boards 110 exhibit abnormalities during lamination.
[0089] In summary, this embodiment provides a printed circuit board (PCB) lamination testing method. During PCB manufacturing, impedance wave modules 200 are fabricated on a single-layer PCB, and each impedance wave module 200 contains an impedance wave circuit pattern. Different impedance wave circuit patterns have different impedance values, and the impedance wave modules 200 on adjacent PCBs are in contact. Therefore, after lamination of multiple PCBs, the impedance value of the impedance wave module 200 changes due to variations in the lamination position. After testing the impedance change of the multiple PCBs, the method can determine whether the measured impedance change is abnormal based on the impedance change when the lamination is correct. This is particularly useful during the lamination process of PCBs, allowing for timely detection of lamination abnormalities. Therefore, the PCB lamination testing method provided in this embodiment can detect lamination layer errors between PCBs early in the lamination process between multiple PCBs, preventing defects or even scrapping of the finished PCBs, thereby improving the yield rate of PCBs.
[0090] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.
[0091] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the application disclosed herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the following claims.
[0092] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.
[0093] The above are merely preferred embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.
Claims
1. A printed circuit board, characterized in that, include: A circuit board module comprising multiple circuit boards stacked and laminated in a predetermined lamination sequence; each circuit board comprises a circuit area and a tool edge area surrounding the circuit area; An impedance wave module is disposed in the tool edge area of each layer of the circuit board. The impedance wave module includes multiple signal lines and multiple signal holes. The two ends of a signal line are respectively connected to the hole walls of two signal holes. A signal line is connected to another signal line through a signal hole. The multiple signal lines are connected sequentially through the multiple signal holes to form the impedance wave circuit pattern. At least some of the impedance wave modules on different layers of the circuit board have different impedance wave circuit patterns; different impedance wave circuit patterns have different impedance values; after lamination, the impedance wave modules set on the tool edge area of adjacent layers of the circuit board make contact to form a continuous, series impedance test path in the direction from the bottom circuit board to the top circuit board. The impedance wave module is grounded on the top circuit board of the multilayer circuit board.
2. The printed circuit board according to claim 1, characterized in that, The impedance wave module, which is located on the top circuit board of the multilayer circuit board, is also provided with a grounding hole.
3. The printed circuit board according to claim 1, characterized in that, The impedance wave module is also provided with fixing holes for fixing the impedance wave module to the circuit board.
4. The printed circuit board according to any one of claims 1 to 3, characterized in that, From the bottom circuit board to the top circuit board of the multilayer circuit board, the impedance value of the impedance wave module increases or decreases.
5. The printed circuit board according to any one of claims 1 to 3, characterized in that, From the bottom circuit board to the top circuit board of the multilayer circuit board, the impedance values of the impedance wave modules in adjacent layers are arranged alternately, one large and one small.
6. A printed circuit board testing system, characterized in that, The circuit board includes the printed circuit board as described in any one of claims 1-5, and further includes: An impedance testing device is used to perform impedance testing on each layer of the printed circuit board and to identify abnormal layer circuit boards when the impedance test results differ from preset test results; wherein, the preset test results are the impedance test results obtained by testing the printed circuit board when each layer of the circuit board is accurately laminated.
7. The printed circuit board testing system according to claim 6, characterized in that, The impedance test result is an impedance waveform, and the preset test result is a preset impedance waveform.
8. A method for testing the lamination of printed circuit boards, characterized in that, include: Multiple single-layer circuit boards are manufactured. During the manufacturing of each single-layer circuit board, a circuit area and a tool edge area surrounding the circuit area are formed. An impedance wave circuit pattern is manufactured in the tool edge area of the single-layer circuit board to form an impedance wave module on each circuit board. The impedance wave module includes multiple signal lines and multiple signal holes. The two ends of a signal line are respectively connected to the walls of two signal holes. One signal line is connected to another signal line through a signal hole. The multiple signal lines are sequentially connected through the multiple signal holes to form the impedance wave circuit pattern. At least some of the impedance wave circuit patterns on different circuit boards are different. Different impedance wave circuit patterns have different impedance values. Multiple single-layer circuit boards are stacked and pressed in a predetermined pressing sequence to obtain a printed circuit board. Impedance wave module contacts are set on the tool edge area of adjacent circuit boards after pressing to form a continuous, series impedance test path in the direction from the bottom circuit board to the top circuit board. According to the lamination sequence of the single-layer circuit boards in the printed circuit board, the impedance of the circuit board module is tested to obtain the impedance test results; When the impedance test result differs from the preset test result, the printed circuit board is determined to be in poor bonding condition.
9. The method according to claim 8, characterized in that, The preset test result is a preset impedance waveform obtained by performing impedance testing on the circuit board module in the order from the bottom circuit board to the top circuit board when each layer of the circuit board is accurately laminated; the impedance test result is an impedance waveform.
Citation Information
Patent Citations
Circuit board impedance measuring method and circuit board
CN105338728A
Inspection method for multilayer printed wiring board
JP1994061652A
