A millimeter wave SAR signal acquisition system based on FPGA

Abstract

The application discloses a kind of millimeter wave SAR signal acquisition systems based on FPGA, including mobile sliding table, stepper motor, motor control module, FPGA module, millimeter wave radar module and peripheral power supply module;The mobile sliding table includes an X-axis sliding table and a Y-axis sliding table, and the X-axis sliding table is slidably connected with the Y-axis sliding table, forming a cross structure;The FPGA module is a heterogeneous FPGA module, including PS kernel end and PL end driving end, respectively for parameter configuration and pulse control signal transmission;Millimeter wave radar module is fixed on the slider on the sliding table, for the target echo signal collected is returned to FPGA module.The present application greatly reduces the acquisition transmission time, and the resolution of the image after imaging the data obtained by acquisition reaches the theoretical minimum value of 1mm, which is of great significance to improve the efficiency and performance of millimeter wave SAR imaging.

Description

Technical Field

[0001] This invention belongs to the field of millimeter-wave imaging front-end radar signal acquisition, and in particular, it is a method for millimeter-wave radar signal acquisition, preprocessing, and orbit control for SAR algorithms based on ZYNQ heterogeneous FPGA (a heterogeneous FPGA system with onboard dual-core Cortex-A9MPCore). Background Technology

[0002] Millimeter waves fall between microwaves and visible light in wavelength range, thus combining the advantages of both. Compared to microwaves, millimeter waves offer better directivity, a wider usable spectrum, greater information capacity, stronger anti-interference capabilities, and better detection performance. Compared to visible light, millimeter waves have better penetrating power, enabling the acquisition of information such as the geometric features, dielectric properties, and temperature distribution of the target's surface and interior.

[0003] Synthetic Aperture Radar (SAR) is currently the most widely used active millimeter-wave imaging technology, operating across the millimeter-wave band. Existing millimeter-wave imaging methods involve data acquisition and storage via PCs, embedded systems, or other host computers. Commonly used onboard radar signal acquisition methods suffer from low efficiency, and SAR imaging algorithms on the market are mostly broken down into three separate parts: a mobile control unit, a data acquisition unit, and a PC or industrial control computer for processing and imaging; there is no integrated design. Summary of the Invention

[0004] This invention aims to solve the problems of the prior art by proposing an FPGA-based millimeter-wave SAR signal acquisition system and method. In the front-end data acquisition stage of millimeter-wave SAR imaging algorithms, it can efficiently acquire millimeter-wave signals, ensuring accurate and stable data acquisition while effectively reducing system processing time.

[0005] A millimeter-wave SAR signal acquisition system based on FPGA includes a moving slide, a stepper motor, a motor control module, an FPGA module, a millimeter-wave radar module, and a peripheral power supply module.

[0006] The movable slide includes an X-axis slide and a Y-axis slide, which are slidably connected to form a cross-shaped structure.

[0007] The stepper motor includes stepper motor I disposed at the end of the X-axis slide and stepper motor II disposed at the end of the Y-axis slide;

[0008] The motor control module includes a motor control module I connected to stepper motor I and a motor control module II connected to stepper motor II. Based on the pulse control signals received from the FPGA module, the motor control module controls stepper motor I and stepper motor II to rotate and stop.

[0009] The FPGA module is connected to the motor control module I, the motor control module II, and the millimeter-wave radar module, respectively. It sends pulse control signals to the motor control module I and the motor control module II, and receives the target echo signals collected by the millimeter-wave radar module. The FPGA module is a heterogeneous FPGA module, including a PS core end and a PL end driver end, which are used for parameter configuration and pulse control signal transmission, respectively.

[0010] The millimeter-wave radar module is fixed on the slider of the slide table and is used to transmit the collected target echo signal back to the FPGA module.

[0011] The peripheral power supply module is used to connect to the stepper motor, motor control module and FPGA module, and provide them with power.

[0012] The advantages and beneficial effects of this invention are as follows:

[0013] To address the algorithmic requirements and high-speed transmission demands of synthetic aperture radar (SAR), this invention designs and constructs an FPGA-based platform for acquiring and imaging millimeter-wave SAR signals, based on millimeter-wave SAR imaging algorithms. First, a two-dimensional, motor-controlled sliding rail platform is built, upon which a radar transceiver module is installed. The motor is controlled via the FPGA and connected to the radar board via a serial port. According to the algorithm requirements, radar start / stop signals are sent, which then enter the self-designed FPGA acquisition module via the SPI interface. After digital signal parsing and other processing, the data is cached in DDR3 memory, then stored on an SD card, or transmitted at high speed to a PC. Finally, the imaging results are displayed on the PC. Through this method, the platform's acquisition and transmission time is significantly reduced, and the image resolution after imaging reaches the theoretical minimum of 1mm, which is of great significance for improving the efficiency and performance of millimeter-wave SAR imaging.

[0014] The use of heterogeneous FPGAs allows for dynamic configuration of the slider's trajectory to meet SAR imaging needs. Compared to pure logic FPGAs, this adds a step of configuring movement parameters. This step is achieved by executing an embedded program and utilizing the BKS module within our FPGA, enabling dynamic configuration of the FPGA's internal digital circuitry. This significantly reduces the steps required to modify the slider's trajectory. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the system structure of the present invention;

[0016] Figure 2 The route trajectory was collected by stopping, walking, and stopping;

[0017] Figure 3 It is a sparse array of MIMO cells;

[0018] Figure 4 This is a diagram of the equivalent antenna array;

[0019] Figure 5 FPGA-based data acquisition circuit path;

[0020] Figure 6 This is the schematic diagram of the data parsing circuit;

[0021] Figure 7 This is an image of a folding knife obtained by the system of the present invention;

[0022] Figure 8 This is the radar timing sequence for the SPI interface of the radar board. Detailed Implementation

[0023] like Figure 1 As shown, a millimeter-wave SAR signal acquisition system based on FPGA includes a moving slide, a stepper motor, a motor control module, an FPGA module, a millimeter-wave radar module, and a peripheral power supply module.

[0024] The movable slide includes an X-axis slide and a Y-axis slide, which are slidably connected to form a cross-shaped structure. The slidable connection between the X-axis slide and the Y-axis slide can be achieved through a metal connecting module, or through some existing slidable connection technologies, such as the X-axis and Y-axis connection method disclosed in patent application number 202210402747.4.

[0025] The stepper motor includes stepper motor I disposed at the end of the X-axis slide and stepper motor II disposed at the end of the Y-axis slide;

[0026] The motor control module includes a motor control module I connected to and controlling stepper motor I, and a motor control module II connected to and controlling stepper motor II; based on the pulse control signals received from the FPGA module, it controls stepper motor I and stepper motor II to rotate and stop.

[0027] The FPGA module is connected to motor control module I, motor control module II, and millimeter-wave radar module respectively; and sends pulse control signals to motor control module I and motor control module II.

[0028] The millimeter-wave radar module is fixed on the slider of the slide table and is used to transmit the collected target echo signal back to the FPGA module.

[0029] The peripheral power supply module is used to connect to the stepper motor, motor control module and FPGA module, and provide them with power.

[0030] In this invention, the motor control module uses two DM542 motor controllers to control the X-axis and Y-axis stepper motors to drive the millimeter-wave radar module to slide with millimeter-level precision. The collected target echo signals are then transmitted back to the FPGA module via a high-speed SPI interface. Existing systems often use microcontrollers or PLCs to generate drive signals, with the FPGA serving as the acquisition unit, ultimately transmitting the data to a PC for image processing. This invention integrates control and acquisition, connecting to the next-level imaging module, combining the main control, operation, and data processing into a single unit. It can control the sliding module via the FPGA, store data via the FPGA, or directly transmit data to the next-level module for imaging via the FPGA.

[0031] The control system of this invention uses a Zynq7000 FPGA as the main controller, constructing a heterogeneous FPGA module equipped with a dual-core Cortex-A9MP Core. This heterogeneous FPGA module allows for easier parameter configuration and convenient connection to upper and lower level computers. Compared to directly controlling the entire system via FPGA program, introducing a heterogeneous embedded platform allows for much faster development. For parameter configuration alone, embedded code requires only a few dozen lines, while FPGA code requires tens of times more. Furthermore, embedded code is ready to use immediately, while writing FPGA programs using Verilog code requires hours of code-to-hardware conversion.

[0032] The FPGA module has a PS core and a PL driver, which are used for parameter configuration and pulse control signal transmission, respectively. The heterogeneous FPGA constructed by this invention has the following advantages: With PS control, it is not necessary to rewrite the bitstream file every time the movement acquisition trajectory is changed (this step is very lengthy). Only the parameters need to be changed at the PS end. Each time the power is turned on, the register values ​​written to the PL hardware by the PS can be directly read during each movement at the PL end, thus achieving the predetermined movement trajectory effect.

[0033] The PS core configures parameters for modules in the FPGA that communicate with the AXI bus. This includes parameter configuration for millimeter-wave radar signal preprocessing, parameter configuration for the number of movements and trajectory control of the two-dimensional moving slide, and configuration for radar antenna correction parameters.

[0034] The signal acquisition route of this invention is as follows: Figure 2As shown, the slide table moves and collects data along an S-shaped trajectory. The S-shaped trajectory is controlled by configuring the register values ​​in the `radar_slip2d_cell` FPGA module on the embedded end. The number of horizontal movement rows is represented by the value of `horizontal_slip_times`. Similarly, to control the number of vertical movements, the value of `vertical_slip_times` is adjusted accordingly. Simultaneously, the module adjusts the motor speed by writing different values ​​to `h_pwm_freq` and `v_pwm_freq`, ensuring the PWM frequency of the input pulses reaches the input value, thus controlling the slide table's movement speed. The step distance for each movement is determined by writing different values ​​to `h_mini_step_nums` and `v_mini_step_nums`. This value determines the number of pulses input from the FPGA driver board for each step, thus achieving the corresponding movement distance.

[0035] Based on the algorithm principle of SAR imaging, if imaging is to be performed at a certain distance, it is necessary to adjust the corresponding step size and the number of horizontal and vertical movements. By setting the parameters of radar_slip2d_cell in the FPGA module and the embedded firmware at the front end of the radar module, we can control the data acquisition of millimeter-wave radar for different imaging distances.

[0036] The key scanning component of this program is the 2D slide table hardware, and its corresponding control module. This component can be matched with different MIMO radar systems for scanning. The design of this invention is to match the 2-transmit 4-receive mechanism of a single-chip IWR6843 radar. It also requires a hardware slide table system. The slide table used in this invention is a cross-shaped slide table, which uses two stepper motor drivers to control the horizontal and vertical directions of the slide table scanning, respectively. The interface parameter register table for controlling the slide rail is as follows:

[0037]

[0038] During the initialization process, the aforementioned registers are configured to determine the trajectory and specific points to be sampled. Each time the two-dimensional slide stops, the FPGA module sends a signal acquisition command to the radar board to acquire the signal and store it in the FPGA module's DDR memory.

[0039] The IWR6843 radar chip uses MIMO to form a 12-virtual antenna array. By transmitting and receiving low-power frequency-modulated continuous (FMCW) millimeter waves, it actively acquires information such as the target's spatial position, velocity, and reflection intensity. The chip's pressure frame has an inner diameter equal to the chip's outer diameter minus 2mm, and the positioning holes around it are aligned with the chip's positioning frame. Figure 3 As shown.

[0040] Each unit has an equivalent antenna aperture of 6 wavelengths. It consists of 12 SISO monostation transceiver antenna arrays formed by time division of a single SIMO chip. Multiple MIMO antennas are cascaded through a sliding stage to form a large observation aperture in order to achieve high-resolution imaging.

[0041] The transmitting antenna has a unit spacing of 4 wavelengths, the receiving antenna has a unit spacing of 1 wavelength, and the distance between the transmitting and receiving antennas is 4 wavelengths. The virtual equivalent antenna spacing is half a wavelength, and one unit is equivalent to 12 SISOs. Using a slide table, a 300mm*300mm aperture is obtained. Calculated based on the maximum antenna spacing, the final equivalent antenna array formed by the FPGA program driven by the slide table is as follows. Figure 4 As shown.

[0042] In this invention, signal acquisition is completed by the spi_collect module. This system uses a single-chip radar, and the template reserves an acquisition interface for subsequent cascading of multiple radars. Only the module configuration needs to be changed to complete the acquisition. After the data acquisition event is started, the slide scanning program, i.e., slip2d_cell, must be started first. During the scanning process, data will enter spi_collect_cell in groups.

[0043] This module converts the data into a BKS bus format, then enters the data preprocessing module for data phase correction. The corrected data then flows out as BKS and enters the protocol executor. This module mainly operates on the arrangement of the linear scan data, and finally stores the arranged data into the RAM core, and then into DDR.

[0044] At the PS end, a general-purpose processor processes the data. The data in RAM needs to be stored according to a standard two-dimensional SAR matrix to ensure consistency with matched filtering. While each group of BKS signals in this S-shaped data is not sequentially arranged in the address segment, it still follows a certain pattern. Furthermore, to ensure the data is centered in the entire two-dimensional space, the standard two-dimensional matrix needs to be padded with zeros. Based on this analysis, the implementation principle of the protocol executor is as follows: First, the data at the corresponding address is initialized according to the zero-padding. Then, each BKS signal entering this module is guided to the corresponding address segment for storage via an address pointer. One BKS contains eight 32-bit data segments, which is the current functional format of the program. This is because the data transmitted from the radar system diagram is in its current form. Assuming a 3-transmit, 4-receive linear array, the BKS would then become twelve 32-bit data segments. If a longer linear array is used, the length of the BKS group will also increase. This design aims to meet the needs of different linear array scanning methods.

[0045] FPGA-based data acquisition circuits, such as Figure 5As shown, radar data is decoded by the protocol executor. The decoded data is then parsed and buffered by a general data parser to analyze the radar's TLV / HSI or other data packet structures. This operation can isolate the data protocol and data transmission from any data packet structure. By connecting the protocol executor with certain timing rules, the data can be transmitted to the parser for parsing to obtain streaming data, which is then extracted by the radar data extractor (raw_data_excuter) to obtain the raw ADC data.

[0046] The above timing rules are as follows Figure 8 As shown:

[0047] Initially, SCK is low and CS is high. When the radar chip transmits data, the data on MOSI becomes valid on the first SCK clock transition after the falling edge of CS. The data is set on the falling edge of the SCK clock and valid on the rising edge of the SCK clock, and is output in big-endian format as 16 bits.

[0048] The received data is converted into a unified AXIS bus for Xilinx devices via a protocol conversion code and then accessed by the DMA controller. The data is stored in memory through the built-in ARM A9 for unified management and scheduling.

[0049] The circuit principle of data parsing is shown in Figure 6. The parser mainly consists of 7 functional blocks, including a displacement control register module, a header detection module, a display driver module, a phase calibration module, a write memory module, a read memory module, and a Bks connection module. The displacement control register module can shift and buffer the input radar data through configured parameters. When the header detection module detects a valid identifier for the input signal, it can enter the display driver module to perform data rate conversion. The radar data after rate conversion is phase-calibrated in the phase calibration module according to the various calibration parameters of the acquisition antenna. The calibrated data is stored through the write memory module and flows out of the parsing module as a Bks stream through the read memory module and the Bks connection module for use by the next stage or for uploading.

[0050] Based on the transmission characteristics of RMA, it is feasible to accelerate the implementation efficiency of RMA algorithm by utilizing the advantages of FPGA parallel processing for algorithm porting. The steps are as follows:

[0051] The raw data acquired by the radar module can be obtained via SD card and Ethernet. The data is given in BIN file format, with each chrip corresponding to one BIN file. Assuming the radar sampling position is (x, y, 0), the spatial coordinates of the scanned object are (x′, y′, Z0), and the target reflectivity is p(x′, y′), then the backscattered data received by the radar is:

[0052]

[0053] R represents the distance from the center of the transmitting and receiving antennas to the target, and the average distance from the target to the radar is z0. s(x, y, k) represents the scattering value, where k is simply an algebraic expression representing any Z-axis value. This acquisition method only moves in the (x, y) dimensions, and the fixed Z-axis value is k, determined based on the position of the scanned object relative to the radar. In the above formula, R... -2 (z0R) can be used. -1 Alternatively, for a stationary target, z0 is a constant and can be ignored. The final received data can be approximated as:

[0054]

[0055] Spherical waves can be considered as a superposition of plane waves, then

[0056]

[0057] in

[0058]

[0059] so

[0060]

[0061] k x k y k z These represent the components of the scanned object in three dimensions, where j is the imaginary unit.

[0062] Changing the order of integration reveals The two-dimensional Fourier transform of the corresponding reflectivity function, i.e., FT 2D [p(x, y)] = p(kx, ky), and It also represents the inverse two-dimensional Fourier transform. Therefore

[0063]

[0064] p(k x k y ) represents the reflectivity of a target when it moves on a two-dimensional scale.

[0065] The reflectivity of a two-dimensional target can then be reconstructed:

[0066]

[0067] S(k x k y ,k) represents the differential function of the scattering data in each direction when the Z-axis distance is fixed at k, and is an intermediate expression.

[0068] Reconstructing images in Matlab, such as Figure 7 As shown.

Claims

1. A millimeter-wave SAR signal acquisition system based on FPGA, characterized in that: It includes a moving slide, a stepper motor, a motor control module, an FPGA module, a millimeter-wave radar module, and a peripheral power supply module; The movable slide includes an X-axis slide and a Y-axis slide, which are slidably connected to form a cross-shaped structure. The stepper motor includes stepper motor I disposed at the end of the X-axis slide and stepper motor II disposed at the end of the Y-axis slide; The motor control module includes a motor control module I connected to stepper motor I and a motor control module II connected to stepper motor II. Based on the pulse control signals received from the FPGA module, the motor control module controls stepper motor I and stepper motor II to rotate and stop. The FPGA module is connected to motor control module I, motor control module II, and millimeter-wave radar module, respectively. It sends pulse control signals to motor control module I and motor control module II and receives target echo signals collected by the millimeter-wave radar module. The FPGA module is a heterogeneous FPGA module, including a PS core end and a PL driver end, which are used for parameter configuration and pulse control signal transmission, respectively. The PS core configures the parameters of the modules in the FPGA that communicate with the AXI bus, including the parameter configuration of millimeter-wave radar signal preprocessing, the movement number and trajectory control parameters of the two-dimensional moving slide, and the radar antenna correction parameters. The FPGA module also includes a data acquisition circuit, comprising a protocol executor, a data parser, and a radar data extraction module. Radar data is decoded by the protocol executor and transmitted to the data parser via a protocol executor with specific timing rules. The data is then processed by the data parser to obtain streaming data, which is then extracted into the radar data extraction module to obtain native ADC data. The timing rules are as follows: under initial conditions, SCK is low and CS is high. When the radar chip transmits data, the data on MOSI is valid on the first SCK clock transition after the falling edge of CS. The data is set on the falling edge of the SCK clock and valid on the rising edge of the SCK clock, outputting 16 bits of data sequentially in big-endian format. The radar data processing procedure is as follows: Let the radar sampling position be (x, y, 0), and the spatial coordinates of the scanned object be (x, y, 0). The target reflectivity is p( If the radar receives the backscattered data, then the backscattered data received is: R represents the distance from the center of the transmitting and receiving antennas to the target. The average distance from the target to the radar is, The above formula represents the scattering value, where k represents any Z-axis value. use For a stationary target, substitution Since the constant can be ignored, the final received data can be approximated as follows: If spherical waves are considered to be a superposition of plane waves, then... in so , , Let represent the components of the scanned object in three dimensions, and j be the imaginary unit. Changing the order of integration reveals... The two-dimensional Fourier transform of the corresponding reflectivity function, i.e. ,and It also represents the inverse two-dimensional Fourier transform, so The reflectivity of a two-dimensional target can then be reconstructed: The millimeter-wave radar module is fixed on the slider of the slide table and is used to transmit the collected target echo signal back to the FPGA module. The peripheral power supply module is used to connect to the stepper motor, motor control module and FPGA module, and provide them with power.

2. The FPGA-based millimeter-wave SAR signal acquisition system according to claim 1, characterized in that: By setting the value of the radar_slip2d_cell register in the FPGA module, the slide can be made to move and collect data along an S-shaped trajectory.

3. The FPGA-based millimeter-wave SAR signal acquisition system according to claim 2, characterized in that: The setting of the radar_slip2d_cell register value includes: the value of horizontal_slip_times determines the number of horizontal movement rows, the value of vertical_slip_times determines the number of vertical movement times, the values ​​of h_pwm_freq and v_pwm_freq are written to make the PWM wave frequency of the input pulse reach the input value to adjust the motor speed, and the values ​​of h_mini_step_nums and v_mini_step_nums are written to determine the step size for each movement.

4. The FPGA-based millimeter-wave SAR signal acquisition system according to claim 1, characterized in that: The protocol executor includes a displacement control register module, a header detection module, a display driver module, a phase calibration module, a write memory module, a read memory module, and a Bks connection module. The displacement control register module shifts and buffers the input radar data according to configured parameters. When the header detection module detects a valid input signal identifier, it enters the display driver module to perform data rate conversion. After the rate conversion, the radar data undergoes phase calibration in the phase calibration module according to the calibration parameters of the acquisition antenna. The calibrated data is stored through the write memory module and output as a Bks stream through the read memory module and the Bks connection module.

5. The FPGA-based millimeter-wave SAR signal acquisition system according to claim 4, characterized in that: The protocol executor first initializes the data at the corresponding address based on the padding with zeros. Then, each bks entering the protocol executor is guided to the corresponding address segment for storage via an address pointer.

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