Light emitting diode epitaxial wafer and preparation method thereof, LED
Patent Information
- Application Number
- CN202310728451.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-06-19
- Publication Date
- 2026-10-23
- Estimated Expiration
- 2043-06-19
AI Technical Summary
[0004]在蓝宝石衬底上直接沉GaN外延层,蓝宝石与GaN之间存在约25.5%的热膨胀系数失配,而较大的热失配在降温过程中使得外延层中存在巨大的压应力,造成GaN外延层晶体质量下降,严重时甚至会在外延片中产生大量裂纹
[0025]本发明提供的发光二极管外延片,其在衬底上设有热失配调控层,所述热失配调控层包括依次层叠在所述衬底上的AlON层、Al1-bCrbN层、AlN层、SiC层。本发明设置AlON层,能够使得蓝宝石衬底的热膨胀系数逐渐降低至AlN热膨胀系数,减少衬底与外延层的热失配,提高外延层的晶体质量。沉积Al1-bCrbN层可以促进外延层的位错扭转,避免位错向外延层延伸,降低外延层位错密度,减少发光二极管的非辐射复合效率。沉积的AlN层提供了与衬底取向相同的成核中心,释放了外延层与衬底之间的晶格失配产生的应力以及热膨胀系数失配所产生的热应力。沉积SiC层,因SiC与GaN有较小的热失配,因此沉积在SiC层的GaN晶体质量较优,避免GaN外延层发生龟裂,另外其缺陷密度较低,提高发光二极管的发光效率。
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Abstract
Description
Technical Field
[0001] This invention relates to the field of optoelectronic technology, and in particular to a light-emitting diode epitaxial wafer and its preparation method, and LEDs. Background Technology
[0002] Semiconductor lighting not only enhances the traditional lighting industry but also drives the development of related industries such as information, display, automotive electronics, and consumer electronics. More importantly, the core of semiconductor lighting is wide-bandgap semiconductor materials, which are considered a breakthrough in third-generation semiconductor technology. This has extremely important strategic significance for the development of optoelectronic technologies such as optical storage, optical transmission, optical sensing, lasers and other power devices, as well as the development of next-generation information technology.
[0003] Although many research groups worldwide are dedicated to the growth of bulk GaN, the fabrication of large-size GaN bulk materials remains extremely challenging, and GaN's primary applications are achieved through heteroepitaxial growth. The choice of substrate significantly impacts the quality of the epitaxially grown GaN material, and different substrate materials also have a crucial influence on the post-processing of GaN devices. Currently, sapphire is commonly used as the substrate for GaN heteroepitaxial growth. Sapphire possesses the same hexagonal wurtzite structure as GaN, while also offering advantages such as good thermal and chemical stability, high mechanical strength, mature technology, and relatively low cost.
[0004] When GaN epitaxial layers are deposited directly on sapphire substrates, there is a thermal expansion coefficient mismatch of about 25.5% between sapphire and GaN. This large thermal mismatch causes huge compressive stress in the epitaxial layer during the cooling process, resulting in a decrease in the crystal quality of the GaN epitaxial layer. In severe cases, it can even cause a large number of cracks in the epitaxial wafer. Summary of the Invention
[0005] The technical problem to be solved by the present invention is to provide a light-emitting diode epitaxial wafer that can reduce the thermal mismatch between the substrate and the GaN epitaxial layer, avoid cracking of the GaN epitaxial layer, improve the crystal quality of the GaN epitaxial layer, and improve the luminous efficiency of the light-emitting diode.
[0006] The technical problem to be solved by the present invention is to provide a method for preparing an epitaxial wafer of a light-emitting diode, which has a simple process and can stably produce an epitaxial wafer of a light-emitting diode with good luminous efficiency.
[0007] To solve the above-mentioned technical problems, the present invention provides a light-emitting diode epitaxial wafer, including a substrate, wherein a thermal mismatch control layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially disposed on the substrate.
[0008] The thermal mismatch control layer includes an AlON layer and an Al layer sequentially stacked on the substrate. 1-b Cr b N-layer, AlN-layer, SiC-layer, where 0.01 <b<0.5。
[0009] In one embodiment, the O component in the AlON layer is 0.01 to 0.09;
[0010] The O composition in the AlON layer gradually decreases along the deposition direction of the epitaxial layer.
[0011] In one embodiment, the O composition in the AlON layer gradually decreases from (0.4–0.85) to (0.02–0.2) along the epitaxial deposition direction.
[0012] In one embodiment, the thickness of the AlON layer is 1 nm to 100 nm;
[0013] The Al 1-b Cr b The thickness of the N layer ranges from 1 nm to 50 nm.
[0014] In one embodiment, the thickness of the AlN layer is 1 nm to 100 nm;
[0015] The thickness of the SiC layer is 1 nm to 50 nm.
[0016] To address the above problems, the present invention also provides a method for fabricating a light-emitting diode epitaxial wafer, comprising the following steps:
[0017] S1. Prepare the substrate;
[0018] S2. Sequentially deposit a thermal mismatch control layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer on the substrate.
[0019] The thermal mismatch control layer includes an AlON layer and an Al layer sequentially stacked on the substrate. 1-b Cr b N-layer, AlN-layer, SiC-layer, where 0.01 <b<0.5。
[0020] In one embodiment, the growth atmosphere of the thermal mismatch control layer is a mixture of N2 and NH3 gas, wherein the gas ratio of N2 to NH3 is (0.1~10):1.
[0021] In one embodiment, the growth temperature of the thermal mismatch control layer is 500℃~1000℃.
[0022] In one embodiment, the growth pressure of the thermal mismatch control layer is 50 torr to 500 torr.
[0023] Accordingly, the present invention also provides an LED, which includes the above-described light-emitting diode epitaxial wafer.
[0024] Implementing this invention has the following beneficial effects:
[0025] The light-emitting diode epitaxial wafer provided by the present invention has a thermal mismatch control layer on a substrate, the thermal mismatch control layer comprising an AlON layer and an Al layer sequentially stacked on the substrate. 1-b Cr b The invention incorporates an AlN layer, an AlN layer, and a SiC layer. The AlON layer allows the thermal expansion coefficient of the sapphire substrate to gradually decrease to that of AlN, reducing thermal mismatch between the substrate and the epitaxial layer and improving the crystal quality of the epitaxial layer. Al deposition... 1-b Cr b The N-layer promotes dislocation torsion in the epitaxial layer, preventing dislocations from extending into the epitaxial layer, reducing the dislocation density in the epitaxial layer, and decreasing the non-radiative recombination efficiency of the LED. The deposited AlN layer provides nucleation centers aligned with the substrate, relieving stress caused by lattice mismatch between the epitaxial layer and the substrate, as well as thermal stress caused by thermal expansion coefficient mismatch. The deposited SiC layer, due to its smaller thermal mismatch with GaN, results in higher GaN crystal quality, preventing cracking in the GaN epitaxial layer. Furthermore, its lower defect density improves the luminous efficiency of the LED. Attached Figure Description
[0026] Figure 1 This is a schematic diagram of the structure of the light-emitting diode epitaxial wafer provided by the present invention;
[0027] Figure 2 A flowchart illustrating the method for fabricating a light-emitting diode epitaxial wafer provided by the present invention;
[0028] Figure 3 The flowchart shows step S2 of the method for preparing a light-emitting diode epitaxial wafer provided by the present invention. Detailed Implementation
[0029] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be described in further detail below.
[0030] Unless otherwise stated or in case of contradiction, the terms or phrases used herein shall have the following meanings:
[0031] In this invention, "preferred" is merely a description of a more effective implementation method or embodiment, and should be understood as not constituting a limitation on the scope of protection of this invention.
[0032] In this invention, the technical features described in an open-ended manner include both closed-ended technical solutions composed of the listed features and open-ended technical solutions that include the listed features.
[0033] In this invention, numerical ranges are involved, and unless otherwise specified, they include the two endpoints of the numerical range.
[0034] To address the above problems, the present invention provides a light-emitting diode epitaxial wafer, such as... Figure 1 As shown, the substrate includes a substrate 1, on which a thermal mismatch control layer 2, an undoped GaN layer 3, an N-type GaN layer 4, a multiple quantum well layer 5, an electron blocking layer 6, and a P-type GaN layer 7 are sequentially disposed.
[0035] The thermal mismatch control layer 2 includes an AlON layer 21 and an Al layer 22 sequentially stacked on the substrate 1. 1-b Cr b N layer 22, AlN layer 23, SiC layer 24, where 0.01 <b<0.5。
[0036] This invention inserts a thermal mismatch control layer 2 with a specific structure between the substrate 1 and the undoped GaN layer 3 to reduce the thermal mismatch between the substrate and the GaN epitaxial layer, prevent cracking of the GaN epitaxial layer, improve the crystal quality of the GaN epitaxial layer, and enhance the luminous efficiency of the light-emitting diode. The specific structure of the thermal mismatch control layer is as follows.
[0037] In one embodiment, the O component in the AlON layer 21 is 0.01–0.09; the O (oxygen) component in the AlON layer 21 gradually decreases along the epitaxial layer deposition direction. Preferably, the O component in the AlON layer 21 gradually decreases from (0.4–0.85) to (0.02–0.2) along the epitaxial layer deposition direction. More preferably, the O component in the AlON layer 21 gradually decreases from (0.45–0.65) to (0.05–0.15) along the epitaxial layer deposition direction. In one embodiment, the thickness of the AlON layer 21 is 1 nm–100 nm. Exemplary thicknesses of the AlON layer 21 are 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, and 90 nm, but are not limited thereto. Preferably, the thickness of the AlON layer 21 is 40 nm–60 nm, within which the luminous efficacy improvement rate is relatively high. The present invention provides an AlON layer 21, and the O composition gradually decreases along the epitaxial layer deposition direction, which can gradually reduce the thermal expansion coefficient of the sapphire substrate to that of AlN, reduce the thermal mismatch between the substrate and the epitaxial layer, and improve the crystal quality of the epitaxial layer.
[0038] In one implementation, the Al 1-b Cr bThe thickness of layer N22 is 1nm to 50nm; the Al 1-b Cr b Exemplary thicknesses of layer N22 are 10nm, 20nm, 30nm, and 40nm, but are not limited thereto. Preferably, the Al... 1-b Cr b The thickness of the N-layer 22 is 25nm–35nm, within which the luminous efficacy improvement rate is relatively high. Al deposition 1-b Cr b The N-layer 22 can promote dislocation torsion in the epitaxial layer, prevent dislocations from extending into the epitaxial layer, reduce the dislocation density in the epitaxial layer, and reduce the non-radiative recombination efficiency of the light-emitting diode.
[0039] In one embodiment, the thickness of the AlN layer 23 is 1 nm to 100 nm; exemplary thicknesses of the AlN layer 23 are 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, and 90 nm, but are not limited thereto. Preferably, the thickness of the AlN layer 23 is 40 nm to 50 nm, within which the luminous efficacy improvement rate is relatively high. The deposited AlN layer 23 provides nucleation centers with the same orientation as the substrate, releasing the stress caused by lattice mismatch between the epitaxial layer and the substrate, as well as the thermal stress caused by thermal expansion coefficient mismatch.
[0040] In one embodiment, the thickness of the SiC layer 24 is 1 nm to 50 nm; exemplary thicknesses of the SiC layer 24 are 10 nm, 20 nm, 30 nm, and 40 nm, but are not limited thereto. Preferably, the thickness of the SiC layer 24 is 18 nm to 22 nm, within which the luminous efficacy improvement rate is relatively high. Depositing the SiC layer 24 results in better GaN crystal quality due to the smaller thermal mismatch between SiC and GaN, avoiding cracking in the GaN epitaxial layer. Furthermore, its lower defect density improves the luminous efficiency of the light-emitting diode.
[0041] Through the combined effect of the above four sub-layers, the thermal mismatch between the substrate and the GaN epitaxial layer is reduced, cracking of the GaN epitaxial layer is avoided, the crystal quality of the GaN epitaxial layer is improved, and the luminous efficiency of the light-emitting diode is enhanced.
[0042] Accordingly, the present invention provides a method for fabricating a light-emitting diode epitaxial wafer, such as... Figure 2 As shown, it includes the following steps:
[0043] S1. Prepare substrate 1;
[0044] In one embodiment, the substrate is a sapphire substrate. Sapphire is currently the most commonly used GaN-based LED substrate material. Sapphire substrates have mature manufacturing processes, low prices, are easy to clean and process, and have good stability at high temperatures.
[0045] S2. A thermal mismatch control layer 2, an undoped GaN layer 3, an N-type GaN layer 4, a multiple quantum well layer 5, an electron blocking layer 6, and a P-type GaN layer 7 are sequentially deposited on the substrate 1.
[0046] like Figure 3 As shown, step S2 includes the following steps:
[0047] S21. Deposit a thermal mismatch control layer 2 on substrate 2.
[0048] In one embodiment, the growth atmosphere of the thermal mismatch control layer is a mixture of N2 and NH3 gases, wherein the gas ratio of N2 to NH3 is (0.1~10):1; the growth temperature of the thermal mismatch control layer is 500℃~1000℃; and the growth pressure of the thermal mismatch control layer is 50 torr~500 torr.
[0049] S22. Deposit an undoped GaN layer 3 on the thermal mismatch control layer 2.
[0050] In one embodiment, an undoped GaN layer is deposited using metal-organic vapor deposition at a growth temperature of 1050°C to 1200°C, a growth pressure of 100 torr to 600 torr, and a thickness of 1 μm to 5 μm.
[0051] S23. Deposit an N-type GaN layer 4 on the undoped GaN layer 3.
[0052] In one embodiment, the growth temperature is 1050℃~1200℃, the growth pressure is 100 torr~600 torr, and the doping concentration is 1×10⁻⁶. 19 atoms / cm 3 ~1×10 20 atoms / cm 3 The thickness is 2μm to 3μm.
[0053] S24. Deposit a multi-quantum-well layer 5 on the N-type GaN layer 4.
[0054] In one embodiment, the multiple quantum well layer comprises alternating layers of Al x Ga 1-x N quantum well layer and Al y Ga 1- y N quantum barrier layers, stacked with 6 to 12 periods. Among them, Al x Ga1-x The N quantum well layer was grown at a temperature of 780℃–810℃, with a thickness of 2nm–5nm, a growth pressure of 50 torr–300 torr, and an Al composition of 0.2–0.6%. y Ga 1-y The growth temperature of the N quantum barrier layer is 800℃~900℃, the thickness is 5nm~15nm, the growth pressure is 50torr~300torr, and the Al composition is 0.01~0.1.
[0055] S25. Deposit an electron blocking layer 6 on the multi-quantum well layer 5.
[0056] In one embodiment, the electron blocking layer is an AlInGaN electron blocking layer with a thickness of 10 nm to 40 nm, a growth temperature of 900 °C to 1000 °C, and a growth pressure of 100 torr to 300 torr, wherein the Al composition is 0.005 to 0.1 and the In composition is 0.01 to 0.2.
[0057] S26. Deposit a P-type GaN layer 7 on the electron blocking layer 6.
[0058] In one embodiment, the growth temperature of the p-type GaN layer is 900℃~1050℃, the thickness is 10nm~50nm, the growth pressure is 100torr~600torr, and the Mg doping concentration is 1×10⁻⁶. 19 atoms / cm 3 ~1×10 21 atoms / cm 3 .
[0059] Accordingly, the present invention also provides an LED comprising the aforementioned light-emitting diode epitaxial wafer. The photoelectric efficiency of the LED is effectively improved, and other electrical properties are also excellent.
[0060] The present invention is further illustrated below with specific embodiments:
[0061] Example 1
[0062] This embodiment provides a light-emitting diode epitaxial wafer, wherein a thermal mismatch control layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially disposed on the substrate;
[0063] The thermal mismatch control layer includes an AlON layer and an Al layer sequentially stacked on the substrate. 1-b Cr b The epitaxial layers consist of an N layer, an AlN layer, and a SiC layer, with the O composition gradually decreasing from 0.6 to 0.06 along the deposition direction of the epitaxial layers, and b being 0.1.
[0064] The AlON layer has a thickness of 50 nm; the Al 1-b Cr b The thickness of the N layer is 30 nm; the thickness of the AlN layer is 45 nm; and the thickness of the SiC layer is 20 nm.
[0065] Example 2
[0066] This embodiment provides a light-emitting diode epitaxial wafer, which differs from Embodiment 1 in that: the thickness of the AlON layer is 65nm; the Al... 1-b Cr b The thickness of the N layer is 40 nm. Everything else is the same as in Example 1.
[0067] Example 3
[0068] This embodiment provides a light-emitting diode epitaxial wafer, which differs from Embodiment 1 in that: the thickness of the AlON layer is 35nm; the Al... 1-b Cr b The thickness of the N layer is 20 nm. Everything else is the same as in Example 1.
[0069] Example 4
[0070] This embodiment provides a light-emitting diode epitaxial wafer, which differs from Embodiment 1 in that: the thickness of the AlN layer is 60 nm; and the thickness of the SiC layer is 25 nm. All other aspects are the same as in Embodiment 1.
[0071] Example 5
[0072] This embodiment provides a light-emitting diode epitaxial wafer, which differs from Embodiment 1 in that: the thickness of the AlN layer is 30 nm; and the thickness of the SiC layer is 15 nm. All other aspects are the same as in Embodiment 1.
[0073] Example 6
[0074] This embodiment provides a light-emitting diode epitaxial wafer, which differs from Embodiment 1 in that the O composition gradually decreases from 0.6 to 0.12 along the epitaxial layer deposition direction. All other aspects are the same as in Embodiment 1.
[0075] Example 7
[0076] This embodiment provides a light-emitting diode epitaxial wafer, which differs from Embodiment 1 in that the O composition gradually decreases from 0.81 to 0.06 along the epitaxial layer deposition direction. All other aspects are the same as in Embodiment 1.
[0077] Example 8
[0078] This embodiment provides a light-emitting diode epitaxial wafer, which differs from Embodiment 1 in that b is 0.2. Everything else is the same as in Embodiment 1.
[0079] Example 9
[0080] This embodiment provides a light-emitting diode epitaxial wafer, which differs from Embodiment 1 in that b is 0.05. Everything else is the same as in Embodiment 1.
[0081] Comparative Example 1
[0082] The difference between this comparative example and Example 1 is that the thermal stress control layer is a 100nm GaN layer. Everything else is the same as in Example 1.
[0083] Comparative Example 2
[0084] The difference between this comparative example and Example 1 is that it does not have an AlON layer. Everything else is the same as Example 1.
[0085] Comparative Example 3
[0086] The difference between this comparative example and Example 1 is that it does not have Al. 1-b Cr b N layers. The rest are the same as in Example 1.
[0087] Comparative Example 4
[0088] The difference between this comparative example and Example 1 is that it does not have an AlN layer. Everything else is the same as Example 1.
[0089] Comparative Example 5
[0090] The difference between this comparative example and Example 1 is that it does not have a SiC layer. Everything else is the same as Example 1.
[0091] The light-emitting diode epitaxial wafers prepared in Examples 1 to 9 and Comparative Examples 1 to 5 were fabricated into 10×24mil chips using the same chip process conditions. 300 LED chips were randomly selected from each group and tested at 120mA / 60mA current. Based on Comparative Example 1, the photoelectric efficiency improvement rate of each group of chips was tested. The specific test results are shown in Table 1.
[0092] Table 1. Performance test results of LEDs prepared in Examples 1-9 and Comparative Examples 1-5
[0093]
[0094]
[0095] As can be seen from the above results, the light-emitting diode epitaxial wafer provided by the present invention has a thermal mismatch control layer on the substrate, the thermal mismatch control layer comprising an AlON layer and an Al layer sequentially stacked on the substrate. 1-b Crb The invention incorporates an AlN layer, an AlN layer, and a SiC layer. The AlON layer allows the thermal expansion coefficient of the sapphire substrate to gradually decrease to that of AlN, reducing thermal mismatch between the substrate and the epitaxial layer and improving the crystal quality of the epitaxial layer. Al deposition... 1-b Cr b The N-layer promotes dislocation torsion in the epitaxial layer, preventing dislocations from extending into the epitaxial layer, reducing the dislocation density in the epitaxial layer, and decreasing the non-radiative recombination efficiency of the LED. The deposited AlN layer provides nucleation centers aligned with the substrate, relieving stress caused by lattice mismatch between the epitaxial layer and the substrate, as well as thermal stress caused by thermal expansion coefficient mismatch. The deposited SiC layer, due to its smaller thermal mismatch with GaN, results in higher GaN crystal quality, preventing cracking in the GaN epitaxial layer. Furthermore, its lower defect density improves the luminous efficiency of the LED.
[0096] The above description is a preferred embodiment of the invention. It should be noted that, for those skilled in the art, several improvements and modifications can be made without departing from the principle of the invention, and these improvements and modifications are also considered to be within the scope of protection of the invention.
Claims
1. A light-emitting diode epitaxial wafer, characterized in that, The substrate includes a thermal mismatch control layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer, which are sequentially disposed on the substrate. The thermal mismatch control layer includes an AlON layer and an Al layer sequentially stacked on the substrate. 1-b Cr b N-layer, AlN-layer, SiC-layer, where 0.01 <b<0.5; The thickness of the AlON layer is 1 nm to 100 nm. The Al 1-b Cr b The thickness of the N layer ranges from 1 nm to 50 nm.
2. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The O component in the AlON layer is 0.01~0.09; The O composition in the AlON layer gradually decreases along the deposition direction of the epitaxial layer.
3. The light-emitting diode epitaxial wafer as described in claim 2, characterized in that, The O component in the AlON layer gradually decreases from (0.4~0.85) to (0.02~0.2) along the epitaxial deposition direction.
4. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The thickness of the AlN layer is 1 nm to 100 nm; The thickness of the SiC layer is 1 nm to 50 nm.
5. A method for fabricating a light-emitting diode epitaxial wafer as described in any one of claims 1 to 4, characterized in that, Includes the following steps: S1. Prepare the substrate; S2. Sequentially deposit a thermal mismatch control layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer on the substrate. The thermal mismatch control layer includes an AlON layer and an Al layer sequentially stacked on the substrate. 1-b Cr b N-layer, AlN-layer, SiC-layer, where 0.01 <b<0.5。 6. The method for fabricating a light-emitting diode epitaxial wafer as described in claim 5, characterized in that, The growth atmosphere of the thermal mismatch control layer is a mixture of N2 and NH3 gases, wherein the ratio of N2 to NH3 is (0.1~10):
1.
7. The method for fabricating a light-emitting diode epitaxial wafer as described in claim 5, characterized in that, The growth temperature of the thermal mismatch control layer is 500℃~1000℃.
8. The method for fabricating a light-emitting diode epitaxial wafer as described in claim 5, characterized in that, The growth pressure of the thermal mismatch control layer is 50 torr to 500 torr.
9. An LED, characterized in that, The LED includes a light-emitting diode epitaxial wafer as described in any one of claims 1 to 4.
Citation Information
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