Non-uniform memory access node binding method, apparatus, device, and storage medium
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-05-25
- Publication Date
- 2026-08-11
AI Technical Summary
现有的非统一内存访问节点分配或选取方式准确度较低;并且,在分配节点资源不足的情况下,可能存在上述处理器访问非本地存储器的情况,导致对用户应用处理效率较低
[0037] Based on the application running status of each associated application, determine the second application that can be scheduled for resources in the corresponding intermediate non-unified memory access node;
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Figure CN116775280B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of computer technology, and in particular to a method, apparatus, device, and storage medium for binding non-uniform memory access nodes. Background Technology
[0002] In a non-uniform memory access framework, processors access their own local memory faster than non-local memory. Therefore, when allocating nodes for user applications, it is necessary to avoid processors accessing non-local memory as much as possible, or to minimize the use of multiple processors to process the same user application process.
[0003] Existing technologies typically employ a random allocation method, binding acquired user applications to corresponding non-uniform memory access nodes. This allows the CPU (Central Processing Unit) and memory of the bound node to process the user application. However, existing non-uniform memory access node allocation or selection methods have low accuracy; furthermore, when node resources are insufficient, the processor may access non-local memory, leading to low processing efficiency for user applications. Summary of the Invention
[0004] This invention provides a method, apparatus, device, and medium for binding non-uniform memory access nodes to improve the accuracy of non-uniform memory access node selection, thereby improving the processing efficiency of applications.
[0005] According to one aspect of the present invention, a non-uniform memory access node binding method is provided, the method comprising:
[0006] Get the applications to be processed;
[0007] Based on the application information of the application to be processed, determine the target hardware device associated with the application to be processed;
[0008] From each candidate non-uniform memory access node, obtain at least one intermediate non-uniform memory access node that is allocated the target hardware device;
[0009] Based on the resource usage data of the corresponding intermediate non-uniform memory access nodes, determine whether there are any available non-uniform memory access nodes among the intermediate non-uniform memory access nodes;
[0010] If so, a target non-uniform memory access node is selected from the available non-uniform memory access nodes, and the application to be processed is bound to the target non-uniform memory access node.
[0011] Optionally, determining whether there are available non-uniform memory access nodes among the intermediate non-uniform memory access nodes based on the resource usage data of the corresponding intermediate non-uniform memory access nodes includes:
[0012] Based on the resource usage data of the corresponding intermediate non-uniform memory access nodes, determine the resource occupancy rate of each of the intermediate non-uniform memory access nodes;
[0013] Obtain the resource requirements of the application to be processed;
[0014] Based on the resource demand and the resource occupancy rate of the corresponding intermediate non-uniform memory access nodes, determine whether there are any available non-uniform memory access nodes among the intermediate non-uniform memory access nodes.
[0015] The above technical solution achieves accurate selection of available non-uniform memory access nodes by comprehensively considering the resource requirements of the application to be processed and the resource occupancy rate of the corresponding intermediate non-uniform memory access nodes when selecting non-uniform memory access nodes. This improves the accuracy of determining subsequent target non-uniform memory access nodes, thereby achieving accurate selection, allocation and binding of non-uniform memory access nodes and improving the application processing efficiency of the application to be processed.
[0016] Optionally, the resource requirements include the central processing unit (CPU) resource requirements and the memory resource requirements; the resource utilization rate includes the CPU utilization rate and the memory utilization rate.
[0017] Accordingly, determining whether there are available non-uniform memory access nodes among the intermediate non-uniform memory access nodes based on the resource demand and the resource occupancy rate of the corresponding intermediate non-uniform memory access nodes includes:
[0018] Based on the CPU resource requirements and the CPU utilization rate of the corresponding intermediate non-unified memory access nodes, determine the CPU available resource judgment result of each intermediate non-unified memory access node;
[0019] Based on the memory resource requirements and the memory occupancy rate of the corresponding intermediate non-unified memory access nodes, determine the memory available resource judgment result of each intermediate non-unified memory access node;
[0020] Based on the CPU available resource judgment results and memory available resource judgment results of the corresponding intermediate non-unified memory access nodes, the target available resource judgment results of each intermediate non-unified memory access node are determined.
[0021] Based on the target available resources judgment results of each intermediate non-uniform memory access node, determine whether there are available non-uniform memory access nodes among each intermediate non-uniform memory access node.
[0022] The above technical solution combines CPU resources and memory resources, and compares CPU demand and CPU utilization separately, as well as memory resource demand and memory utilization, to make a more comprehensive judgment on whether intermediate non-uniform memory access nodes are available non-uniform memory access nodes. This improves the accuracy of identifying available non-uniform memory access nodes, thereby improving the accuracy of selecting target non-uniform memory access nodes in the future.
[0023] Optionally, after determining whether there is an available non-uniform memory access node among the intermediate non-uniform memory access nodes, the method further includes:
[0024] If there are no available non-unified memory access nodes among the intermediate non-unified memory access nodes, then the resource utilization rate corresponding to the remaining non-unified memory access nodes is determined; wherein, the remaining non-unified memory access nodes are the other non-unified memory access nodes among the candidate non-unified memory access nodes other than the intermediate non-unified memory access nodes.
[0025] Based on the resource utilization rate corresponding to the remaining non-uniform memory access nodes, determine whether there is a target non-uniform memory access node among the remaining non-uniform memory access nodes;
[0026] If so, the application to be processed will be bound to the target non-uniform memory access node.
[0027] The above technical solution enables the selection and binding of target non-uniform memory access nodes when no available non-uniform memory access nodes exist among the intermediate non-uniform memory access nodes. This further improves the selection and binding method of target non-uniform memory access nodes and enhances the flexibility of selecting target non-uniform memory access nodes.
[0028] Optionally, after determining whether there is an available non-uniform memory access node among the intermediate non-uniform memory access nodes, the method further includes:
[0029] If there is no available non-uniform memory access node among the intermediate non-uniform memory access nodes, then determine whether there is a first application among the intermediate non-uniform memory access nodes that can release resources;
[0030] If so, the intermediate non-uniform memory access node corresponding to the first application will be identified as the first non-uniform memory access node.
[0031] The first application in the first non-unified memory access node is released to obtain the first non-unified memory access node after resource release.
[0032] Based on the resource utilization rate of the first non-uniform memory access node after resource release, determine whether there is a target non-uniform memory access node;
[0033] If so, the application to be processed will be bound to the target non-uniform memory access node.
[0034] The above technical solution enables the determination of non-unified memory access nodes that can release resources when there are no available non-unified memory access nodes among the intermediate non-unified memory access nodes, as well as the release of non-unified memory access resources. This improves the flexibility of the target non-unified memory access node selection process and perfects the selection method for target non-unified memory access nodes when there are no available non-unified memory access nodes.
[0035] Optionally, after determining whether there is a first application capable of resource release among the intermediate non-uniform memory access nodes, the method further includes:
[0036] If there is no first application that can release resources in each of the intermediate non-unified memory access nodes, then obtain the application running status of at least one associated application associated with the corresponding intermediate non-unified memory access node.
[0037] Based on the application running status of each associated application, determine the second application that can be scheduled for resources in the corresponding intermediate non-unified memory access node;
[0038] Select a second non-uniform memory access node from the other non-uniform memory access nodes besides its own intermediate non-uniform memory access node;
[0039] Bind the second application to the second non-uniform memory access node.
[0040] The above technical solution enables load balancing of resources on intermediate non-unified memory access nodes when no primary application has resources available for release. This allows for partial resource release on the corresponding intermediate non-unified memory access nodes, improving overall system utilization, preventing hotspots caused by concentrated resources within non-unified memory access nodes, and making it possible to bind subsequent applications to relevant non-unified memory access nodes. Furthermore, reasonable resource allocation reduces the risk of memory overflow.
[0041] Optionally, determining the second application that can be scheduled for resources in the corresponding intermediate non-unified memory access node based on the application running status of each of the associated applications includes:
[0042] Based on the application running status of each associated application, determine whether each associated application occupies the target hardware device of the corresponding intermediate non-unified memory access node.
[0043] The application associated with the target hardware device that does not occupy the corresponding intermediate non-unified memory access node is identified as the second application that can be scheduled for resources in the corresponding intermediate non-unified memory access node.
[0044] The above technical solution determines whether each associated application occupies the target hardware device of the corresponding intermediate non-unified memory access node based on the application running status of each associated application. The associated applications that do not occupy the target hardware device of the corresponding intermediate non-unified memory access node are identified as the second applications that can be scheduled for resources in the corresponding intermediate non-unified memory access node, thereby improving the accuracy of the selection of the second application and realizing effective load balancing among the non-unified memory access nodes.
[0045] According to another aspect of the present invention, an apparatus is provided, comprising:
[0046] The application acquisition module is used to acquire applications to be processed.
[0047] The hardware device determination module is used to determine the target hardware device associated with the application to be processed based on the application information of the application to be processed.
[0048] The intermediate non-uniform memory access node determination module is used to obtain at least one intermediate non-uniform memory access node that is allocated with the target hardware device from each candidate non-uniform memory access node.
[0049] The available non-uniform memory access node determination module is used to determine whether there are available non-uniform memory access nodes among the intermediate non-uniform memory access nodes based on the resource usage data of the corresponding intermediate non-uniform memory access nodes.
[0050] The first non-uniform memory access node binding module is used to select a target non-uniform memory access node from the available non-uniform memory access nodes and bind the application to be processed to the target non-uniform memory access node if it is determined that there is an available non-uniform memory access node among the intermediate non-uniform memory access nodes.
[0051] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising:
[0052] At least one processor; and
[0053] A memory communicatively connected to the at least one processor; wherein,
[0054] The memory stores a computer program that can be executed by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform the non-uniform memory access node binding method according to any embodiment of the present invention.
[0055] According to another aspect of the present invention, a computer-readable storage medium is provided, the computer-readable storage medium storing computer instructions for causing a processor to execute and implement the non-uniform memory access node binding method according to any embodiment of the present invention.
[0056] The technical solution of this invention obtains the application to be processed; determines the target hardware device associated with the application based on the application information of the application; obtains at least one intermediate non-uniform memory access node allocated with the target hardware device from among the candidate non-uniform memory access nodes; determines whether there is an available non-uniform memory access node among the intermediate non-uniform memory access nodes based on the resource usage data of the corresponding intermediate non-uniform memory access nodes; if so, selects the target non-uniform memory access node from the available non-uniform memory access nodes and binds the application to be processed to the target non-uniform memory access node. This technical solution, by combining the target hardware device associated with the application to be processed and the resource usage of each non-uniform memory access node, allocates the non-uniform memory access node with optimal performance and resources to the application to be processed, achieving accurate selection, allocation, and binding of non-uniform memory access nodes, reducing the possibility of processor accessing non-local memory, and thus improving the processing efficiency of the application to be processed.
[0057] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description
[0058] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0059] Figure 1 This is a flowchart of a non-uniform memory access node binding method provided in Embodiment 1 of the present invention;
[0060] Figure 2 This is a flowchart of a non-uniform memory access node binding method provided in Embodiment 2 of the present invention;
[0061] Figure 3 This is a flowchart of a non-uniform memory access node binding method provided in Embodiment 3 of the present invention;
[0062] Figure 4 This is a flowchart of a non-uniform memory access node binding method provided in Embodiment 4 of the present invention;
[0063] Figure 5 This is a schematic diagram of a non-uniform memory access node binding device according to Embodiment 5 of the present invention;
[0064] Figure 6 This is a schematic diagram of the structure of an electronic device that implements the non-uniform memory access node binding method of the present invention. Detailed Implementation
[0065] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.
[0066] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0067] Example 1
[0068] Figure 1 This is a flowchart of a non-uniform memory access node binding method provided in Embodiment 1 of the present invention. This embodiment is applicable to situations where non-uniform memory access nodes are automatically identified and application processes are intelligently bound to the identified non-uniform memory access nodes. This method can be executed by a non-uniform memory access node binding device, which can be implemented in hardware and / or software and can be configured in an electronic device. Figure 1 As shown, the method includes:
[0069] S110, Obtain the application to be processed.
[0070] The application to be processed can be a user application awaiting allocation of a non-uniform memory access node; the application to be processed can be obtained by monitoring the system server where the application is deployed. The non-uniform memory access node is a NUMA (Non-Uniform Memory Access) node (hereinafter referred to as "NUMA node" in the example).
[0071] S120. Based on the application information of the application to be processed, determine the target hardware device associated with the application to be processed.
[0072] The application information may include the application name and application address. Hardware devices may include memory, disks, and PCIe (Peripheral Component Interconnect express, a high-speed serial computer expansion bus standard) devices. PCIe devices may include wireless network cards, wired network cards, solid-state drives, and sound cards. The target hardware device may be a hardware device associated with the application being processed.
[0073] For example, the application names of each user application can be pre-associated with the corresponding hardware devices to obtain a pre-built association table between user applications and hardware devices. For instance, if a user application named fio is associated with a wireless network card during its execution, then the user application fio is associated with the wireless network card hardware device and stored in the association table; similarly, if a user application mysql is associated with memory during its execution, then the user application mysql is associated with memory hardware device and stored in the association table.
[0074] Optionally, the application address of the user application can be associated with the corresponding hardware device; or, to further strengthen the association between the user application and the hardware device, both the application name and the application address of the user application can be associated with the corresponding hardware device. This embodiment does not impose any restrictions on this.
[0075] For example, after obtaining the application to be processed, the application to be processed can be parsed to obtain the application information of the application to be processed; based on the application information of the application to be processed, the target hardware device associated with the application to be processed can be determined based on the pre-built association table between user applications and hardware devices.
[0076] S130. Obtain at least one intermediate non-uniform memory access node with the target hardware device allocated from among the candidate non-uniform memory access nodes.
[0077] Candidate NUMA nodes can be at least one NUMA node deployed within the socket associated with the application to be processed. The number of NUMA nodes deployed in different sockets can be the same or different. The number of CPUs, memory, memory capacity, and other hardware devices within different NUMA nodes can be the same or different. The resource utilization rate within different NUMA nodes can also be different.
[0078] For example, among the candidate NUMA nodes, there may be NUMA nodes allocated with the target hardware device, and there may be NUMA nodes not allocated with the target hardware device. Therefore, the NUMA nodes allocated with the target hardware device among the candidate NUMA nodes are designated as intermediate NUMA nodes. It should be noted that there can be one or more intermediate NUMA nodes.
[0079] S140. Based on the resource usage data of the corresponding intermediate non-uniform memory access nodes, determine whether there are any available non-uniform memory access nodes among the intermediate non-uniform memory access nodes.
[0080] It is understandable that a certain number of CPUs, memory, or other hardware devices can be allocated within a NUMA node. The number of CPUs, memory, and hardware devices can vary between different NUMA nodes. Furthermore, the resource utilization of different NUMA nodes can differ, specifically depending on the number of applications running on the corresponding NUMA node and the resources consumed by those applications.
[0081] The resource usage data may include the CPU resource utilization rate and memory resource utilization rate of the corresponding intermediate NUMA node.
[0082] For example, the CPU and memory resource utilization rates of a corresponding intermediate NUMA node can be determined. For instance, if a corresponding intermediate NUMA node has 4 CPUs and 4 memory slots, and 3 CPUs have a resource utilization rate of 100% and 1 CPU has a resource utilization rate of 50%, then the CPU resource utilization rate of this intermediate NUMA node can be considered 87.5%. If 2 out of the 4 memory slots are full and the remaining 2 are empty, then the memory utilization rate of this intermediate NUMA node can be considered 50%. Specifically, CPU and memory resource utilization thresholds can be preset. If the CPU utilization rate and memory utilization rate of the intermediate NUMA node are both lower than the preset CPU and memory resource utilization thresholds, then the intermediate NUMA node can be determined as a usable NUMA node. If the CPU utilization rate or memory utilization rate of the intermediate NUMA node is not lower than the preset CPU and memory resource utilization thresholds, then the intermediate NUMA node has insufficient resources and cannot be considered a usable NUMA node.
[0083] It is understandable that if there are available NUMA nodes among the intermediate NUMA nodes, the number of available NUMA nodes can be one or more.
[0084] S150. If so, select the target non-uniform memory access node from the available non-uniform memory access nodes and bind the application to be processed to the target non-uniform memory access node.
[0085] The target NUMA node can be the available NUMA node with the best performance conditions, such as the available NUMA node with the lowest resource utilization, which can provide the most sufficient resources for the application to be processed, thereby making the application to be processed run more efficiently.
[0086] For example, if there is exactly one available NUMA node, then that available NUMA node is determined as the target NUMA node; if there are at least two available NUMA nodes, then the one with the lowest resource utilization rate among all available NUMA nodes can be selected as the target NUMA node, and the application to be processed can be bound to the target NUMA node. The available NUMA node with the lowest resource utilization rate can be the one with the lowest CPU resource utilization rate, the one with the lowest memory resource utilization rate, or the one with the lowest average CPU and memory resource utilization rate. The specific value can be set according to actual needs, and this embodiment does not impose any restrictions on this.
[0087] The technical solution of this invention obtains the application to be processed; determines the target hardware device associated with the application based on the application information of the application; obtains at least one intermediate non-uniform memory access node allocated with the target hardware device from among the candidate non-uniform memory access nodes; determines whether there is an available non-uniform memory access node among the intermediate non-uniform memory access nodes based on the resource usage data of the corresponding intermediate non-uniform memory access nodes; if so, selects the target non-uniform memory access node from the available non-uniform memory access nodes and binds the application to be processed to the target non-uniform memory access node. This technical solution, by combining the target hardware device associated with the application to be processed and the resource usage of each non-uniform memory access node, allocates the non-uniform memory access node with optimal performance and resources to the application to be processed, achieving accurate selection, allocation, and binding of non-uniform memory access nodes, reducing the possibility of processor accessing non-local memory, and thus improving the processing efficiency of the application to be processed.
[0088] It should be noted that among the determined intermediate NUMA nodes, there may be cases where no NUMA node is available, meaning that none of the intermediate NUMA nodes have any resources to be allocated. Therefore, in the case where no NUMA node is available, the NUMA node with better performance can be selected from the candidate NUMA nodes as the target NUMA node.
[0089] In an optional embodiment, after determining whether there are available non-uniform memory access nodes among the intermediate non-uniform memory access nodes, the method further includes: if there are no available non-uniform memory access nodes among the intermediate non-uniform memory access nodes, then determining the resource utilization rate corresponding to the remaining non-uniform memory access nodes; wherein, the remaining non-uniform memory access nodes are the other non-uniform memory access nodes among the candidate non-uniform memory access nodes besides the intermediate non-uniform memory access nodes; based on the resource utilization rate corresponding to the remaining non-uniform memory access nodes, determining whether there is a target non-uniform memory access node among the remaining non-uniform memory access nodes; if so, binding the application to be processed to the target non-uniform memory access node.
[0090] The resource utilization rate of the remaining NUMA nodes can include CPU utilization rate and memory utilization rate.
[0091] For example, it can be determined whether the resource utilization rate of the remaining NUMA nodes meets the preset resource utilization rate judgment condition. If so, it can be determined that there is a target NUMA node in the remaining NUMA node resources; if not, it can be determined that there is no target NUMA node in the remaining NUMA node resources.
[0092] The criteria for determining resource utilization can be preset by relevant technical personnel. For example, the criteria could be that CPU resource utilization is not greater than a preset CPU resource usage threshold, and memory resource utilization is not greater than a preset memory resource usage threshold.
[0093] For example, if it is determined that a target NUMA node exists among the remaining NUMA node resources, then the number of architectures of the remaining NUMA nodes that meet the resource utilization rate judgment condition is determined. If there is exactly one architecture of the remaining NUMA nodes that meets the resource utilization rate judgment condition, then that remaining NUMA node is determined as the target NUMA node; if there are at least two remaining NUMA nodes that meet the resource utilization rate judgment condition, then the one with the smallest resource utilization rate among the at least two remaining NUMA nodes that meet the condition is selected as the target NUMA node.
[0094] Optionally, when it is determined that no available NUMA nodes exist among the intermediate NUMA nodes, a user prompt message can be generated. For example, the prompt message could be "No available NUMA nodes" or "Insufficient resources under the more affinity NUMA nodes." This prompt message is sent to the client of the application to be processed, allowing the user to determine whether to select a target NUMA node from the remaining NUMA nodes. If a confirmation request is received from the user, the target NUMA node is selected from the remaining NUMA nodes; if a cancellation request is received, the selection of the target NUMA node is terminated. By generating user prompt messages, it is ensured that all processes or threads invoked by user applications are within the scope of resources operated or allocated by the user, thereby improving the flexibility of NUMA node allocation.
[0095] This optional embodiment of the technical solution determines the resource utilization rate corresponding to the remaining non-unified memory access nodes, and determines whether there is a target non-unified memory access node among the remaining non-unified memory access nodes based on the resource utilization rate corresponding to the remaining non-unified memory access nodes. If so, the application to be processed is bound to the target non-unified memory access node. This realizes the selection and binding of the target non-unified memory access node when there is no available non-unified memory access node among the intermediate non-unified memory access nodes, further improving the selection and binding method of the target non-unified memory access node and increasing the flexibility of the selection of the target non-unified memory access node.
[0096] Example 2
[0097] Figure 2 This is a flowchart of a non-uniform memory access node binding method provided in Embodiment 2 of the present invention. This embodiment is an optimization and improvement based on the above technical solutions.
[0098] Furthermore, the step "determining whether there are available non-uniform memory access nodes among the intermediate non-uniform memory access nodes based on the resource usage data of the corresponding intermediate non-uniform memory access nodes" is refined to "determining the resource occupancy rate corresponding to each intermediate non-uniform memory access node based on the resource usage data of the corresponding intermediate non-uniform memory access nodes; obtaining the resource requirements of the application to be processed; and determining whether there are available non-uniform memory access nodes among the intermediate non-uniform memory access nodes based on the resource requirements and the resource occupancy rate of the corresponding intermediate non-uniform memory access nodes." This improves the method for determining whether available non-uniform memory access nodes exist. It should be noted that parts not described in detail in this embodiment of the invention can be referred to in the descriptions of other embodiments.
[0099] like Figure 2 As shown, the method includes the following specific steps:
[0100] S210, Obtain the application to be processed.
[0101] S220. Based on the application information of the application to be processed, determine the target hardware device associated with the application to be processed.
[0102] S230. Obtain at least one intermediate non-uniform memory access node with the target hardware device allocated from among the candidate non-uniform memory access nodes.
[0103] S240. Based on the resource usage data of the corresponding intermediate non-uniform memory access nodes, determine the resource utilization rate of each intermediate non-uniform memory access node.
[0104] The resource usage data can include CPU resource usage data and memory resource usage data under NUMA nodes, and the resource utilization rate can include CPU utilization rate and memory utilization rate under NUMA nodes.
[0105] For example, the CPU utilization rate of a corresponding intermediate NUMA node can be determined based on its CPU resource usage data; similarly, the memory usage rate of a corresponding intermediate NUMA node can be determined based on its memory usage data. Therefore, the resource utilization rate of a corresponding intermediate NUMA node can be determined based on its CPU and memory resource utilization rates.
[0106] Specifically, if an intermediate NUMA node has four CPUs and four memory modules (CPU 1, CPU 2, CPU 3, CPU 4, memory 1, memory 2, memory 3, and memory 4), and the first and second CPUs are fully utilized (100% CPU utilization), while the third and fourth CPUs are each partially utilized (50% CPU utilization), then the CPU utilization for the first CPU is 100%, the second CPU is 100%, the third CPU is 50%, and the fourth CPU is 50%. Therefore, the CPU utilization for this intermediate NUMA node is 75%. Similarly, if the first and second memory modules are fully utilized (100% memory utilization), while the third and fourth memory modules are idle (0% memory utilization), then the memory utilization for these modules is 50%.
[0107] For example, the average CPU utilization and memory utilization of the corresponding intermediate NUMA node can be used as the resource utilization of that intermediate NUMA node. For instance, if the CPU utilization of the corresponding intermediate NUMA node is 75% and the memory utilization is 50%, then the resource utilization of that intermediate NUMA node is 62.5%. Optionally, different weight parameters can be assigned to the CPU utilization and memory utilization, and the resource utilization of the intermediate NUMA node can be determined based on these weight parameters. For example, if the preset CPU weight parameter is 0.6 and the preset memory weight parameter is 0.4, then a weighted average of the CPU utilization and memory utilization based on these preset weight parameters can yield a resource utilization of 65% for that intermediate NUMA node.
[0108] S250: Obtain the resource requirements of the application to be processed.
[0109] The resource requirement can be the CPU and memory resources consumed during the processing of the application to be processed, which can be obtained by parsing the application to be processed.
[0110] For example, the CPU resource requirement can be used as the resource requirement of the application to be processed, or the memory resource requirement can be used as the resource requirement of the application to be processed; or the average or weighted average of the CPU resource requirement and the memory resource requirement can be used as the resource requirement of the application to be processed. The specific requirement can be determined according to the actual needs, and this embodiment does not impose any restrictions on this.
[0111] S260. Based on the resource demand and the resource occupancy rate of the corresponding intermediate non-uniform memory access nodes, determine whether there are any available non-uniform memory access nodes among the intermediate non-uniform memory access nodes.
[0112] For example, if the resource requirements of the application to be processed and the resource utilization rate of the corresponding intermediate NUMA node meet the preset resource judgment conditions, the corresponding intermediate NUMA node can be determined as a usable NUMA node, indicating that there are usable NUMA nodes among the intermediate NUMA nodes. If the resource requirements of the application to be processed and the resource utilization rate of the corresponding intermediate NUMA node do not meet the preset resource judgment conditions, the corresponding intermediate NUMA node cannot be used as a usable NUMA node. If none of the intermediate NUMA nodes can be used as usable NUMA nodes, it indicates that there are no usable NUMA nodes among the intermediate NUMA nodes.
[0113] The resource assessment criteria can be preset by relevant technical personnel. For example, a resource assessment criterion could be that the resource requirement of the application to be processed is no greater than the available resources of the corresponding intermediate NUMA node. For instance, if the resource utilization rate of the corresponding intermediate NUMA node is 80%, then the available resources of that intermediate NUMA node are 20%.
[0114] It should be noted that, in order to further improve the accuracy of determining whether an intermediate NUMA node is a usable NUMA node, and thus improve the accuracy of selecting usable NUMA nodes, it is also possible to compare the CPU resource requirements and CPU utilization rate, as well as the memory resource requirements and memory utilization rate, separately to accurately determine whether an intermediate NUMA node is a usable NUMA node.
[0115] In one optional embodiment, the resource requirement includes CPU resource requirement and memory resource requirement; the resource utilization rate includes CPU utilization rate and memory utilization rate; determining whether there are available non-uniform memory access nodes among the intermediate non-uniform memory access nodes based on the resource requirement and the resource utilization rate of the corresponding intermediate non-uniform memory access nodes includes: determining the CPU available resource judgment result of each intermediate non-uniform memory access node based on the CPU resource requirement and the CPU utilization rate of the corresponding intermediate non-uniform memory access node; determining the memory available resource judgment result of each intermediate non-uniform memory access node based on the memory resource requirement and the memory utilization rate of the corresponding intermediate non-uniform memory access node; determining the target available resource judgment result of each intermediate non-uniform memory access node based on the CPU available resource judgment result and the memory available resource judgment result of the corresponding intermediate non-uniform memory access node; and determining whether there are available non-uniform memory access nodes among the intermediate non-uniform memory access nodes based on the target available resource judgment result of each intermediate non-uniform memory access node.
[0116] For example, the available CPU resources of an intermediate NUMA node can be determined based on its CPU utilization rate. For instance, if the CPU utilization rate of an intermediate NUMA node is 80%, then its available CPU resources are 20%. Specifically, if the CPU resource demand is no greater than the available CPU resources, the CPU resource availability of the intermediate NUMA node is considered sufficient; if the CPU resource demand is greater than the available CPU resources, then the CPU resource availability of the intermediate NUMA node is considered insufficient.
[0117] For example, the available memory resources of an intermediate NUMA node can be determined based on its memory utilization rate. For instance, if the memory utilization rate of an intermediate NUMA node is 50%, then the available memory resources of that intermediate NUMA node are 50%. Specifically, if the memory resource demand is no greater than the available memory resources, the memory resource availability of the intermediate NUMA node is considered sufficient; if the memory resource demand is greater than the available memory resources, the memory resource availability of the intermediate NUMA node is considered insufficient.
[0118] For example, if the CPU available resource assessment result of the intermediate NUMA node is sufficient, and the memory available resource assessment result is sufficient, then the target resource assessment result of the intermediate NUMA node is determined to be sufficient architectural resources. If the CPU available resource assessment result of the intermediate NUMA node is insufficient, or the memory available resource assessment result is insufficient, then the target resource assessment result of the intermediate NUMA node is determined to be insufficient architectural resources.
[0119] If the target available resource assessment result for any intermediate NUMA node among the intermediate NUMA nodes indicates sufficient architectural resources, then it can be determined that there are usable NUMA nodes among the intermediate NUMA nodes, and the intermediate NUMA node with sufficient architectural resources can be considered a usable NUMA node. If the target available resource assessment result for no intermediate NUMA node among the intermediate NUMA nodes indicates sufficient architectural resources, then it can be determined that there are no usable NUMA nodes among the intermediate NUMA nodes.
[0120] This optional embodiment of the technical solution determines the available CPU resources of each intermediate non-uniform memory access node based on CPU resource requirements and the CPU utilization rate of the corresponding intermediate non-uniform memory access node; it then determines the available memory resources of each intermediate non-uniform memory access node based on memory resource requirements and the memory utilization rate of the corresponding intermediate non-uniform memory access node; finally, it determines the target available resources of each intermediate non-uniform memory access node based on both the CPU and memory available resource determination results; and finally, it determines whether any intermediate non-uniform memory access node is available based on the target available resources determination results. This technical solution, by combining CPU and memory resources and comparing CPU requirements and CPU utilization rates separately, as well as memory requirements and memory utilization rates, provides a more comprehensive assessment of whether an intermediate non-uniform memory access node is available, improving the accuracy of identifying available non-uniform memory access nodes and thus improving the accuracy of subsequently selecting target non-uniform memory access nodes.
[0121] S270. If so, select the target non-uniform memory access node from the available non-uniform memory access nodes and bind the application to be processed to the target non-uniform memory access node.
[0122] This embodiment's technical solution determines the resource occupancy rate of each intermediate non-uniform memory access node based on its resource usage data. Then, based on the obtained resource requirements of the application to be processed and the resource occupancy rates of the corresponding intermediate non-uniform memory access nodes, it determines whether any available non-uniform memory access nodes exist among the intermediate non-uniform memory access nodes. By comprehensively considering both the resource requirements of the application to be processed and the resource occupancy rates of the corresponding intermediate non-uniform memory access nodes when selecting non-uniform memory access nodes, this solution achieves accurate selection of available non-uniform memory access nodes. This improves the accuracy of determining subsequent target non-uniform memory access nodes, thereby achieving accurate selection, allocation, and binding of non-uniform memory access nodes and improving the application processing efficiency of the application to be processed.
[0123] Example 3
[0124] Figure 3 This is a flowchart of a non-uniform memory access node binding method provided in Embodiment 3 of the present invention. This embodiment is an optimization and improvement based on the above technical solutions.
[0125] Furthermore, after the step "determining whether there are available non-uniform memory access nodes among the intermediate non-uniform memory access nodes", the following step is added: "If there are no available non-uniform memory access nodes among the intermediate non-uniform memory access nodes, then determine whether there is a first application among the intermediate non-uniform memory access nodes that can release resources; if so, then determine the intermediate non-uniform memory access node corresponding to the first application as the first non-uniform memory access node; release resources for the first application in the first non-uniform memory access node to obtain the first non-uniform memory access node after resource release; determine whether there is a target non-uniform memory access node based on the resource occupancy rate of the first non-uniform memory access node after resource release; if so, bind the application to be processed to the target non-uniform memory access node." This improves the method for selecting the target non-uniform memory access node when there are no available non-uniform memory access nodes among the intermediate non-uniform memory access nodes. It should be noted that parts not described in detail in this embodiment of the invention can be referred to in the descriptions of other embodiments.
[0126] like Figure 3 As shown, the method includes the following specific steps:
[0127] S310, Obtain the application to be processed.
[0128] S320. Based on the application information of the application to be processed, determine the target hardware device associated with the application to be processed.
[0129] S330. Obtain at least one intermediate non-uniform memory access node with the target hardware device allocated from among the candidate non-uniform memory access nodes.
[0130] S340. Based on the resource usage data of the corresponding intermediate non-uniform memory access nodes, determine whether there are any available non-uniform memory access nodes among the intermediate non-uniform memory access nodes; if yes, then execute S350A; if no, then execute S350B-S390.
[0131] S350A selects a target non-uniform memory access node from the available non-uniform memory access nodes and binds the application to be processed to the target non-uniform memory access node.
[0132] S350B determines whether there is a first application that can release resources in each intermediate non-uniform memory access node.
[0133] The first application can be a user application whose process has ended but is still consuming CPU and memory resources. Alternatively, the first application can also be a user application whose process has not ended but whose execution is abnormal and is consuming CPU and memory resources.
[0134] For example, the user applications bound to each intermediate NUMA node can be identified. For any intermediate NUMA node, process scanning and process analysis are performed on each user application in that intermediate NUMA node to determine whether the corresponding user application process has finished executing but is still occupying CPU resources and / or memory resources, or whether the user application process is in an abnormal state and is occupying CPU resources and / or memory resources. If so, the user application process can be identified as the first application that can be released.
[0135] S360. If so, then the intermediate non-uniform memory access node corresponding to the first application will be identified as the first non-uniform memory access node.
[0136] For example, if there is a first application that can release resources in each intermediate NUMA node, then the intermediate NUMA node corresponding to the first application will be identified as the first NUMA node; if there is no first application that can release resources in each intermediate NUMA node, then it can be determined that there is no usable NUMA node in each intermediate NUMA node.
[0137] S370. Release resources for the first application in the first non-uniform memory access node to obtain the first non-uniform memory access node after resource release.
[0138] For example, the first application in the first NUMA node can be unbound from the first NUMA node, thereby releasing the resources of the first application in the first NUMA node and obtaining the first NUMA node after resource release.
[0139] S380. Based on the resource occupancy rate of the first non-uniform memory access node after resource release, determine whether there is a target non-uniform memory access node.
[0140] Resource utilization can include CPU resource utilization and memory resource utilization.
[0141] For example, the available CPU and memory resources of the first NUMA node after resource release can be determined based on the CPU and memory resource utilization rates of the first NUMA node after resource release; the CPU and memory resource requirements of the application to be processed can be obtained; if the available CPU resources of the first NUMA node are not less than the CPU resource requirements of the application to be processed, and the available memory resources of the first NUMA node are not less than the memory requirements of the application to be processed, then the first NUMA node can be determined as the target NUMA node.
[0142] Optionally, if there is exactly one first NUMA node, and this first NUMA node meets the criteria for a target NUMA node, then this first NUMA node is determined as the target NUMA node. If there are multiple first NUMA nodes, and multiple first NUMA nodes meet the criteria for a target NUMA node, then from among the multiple first NUMA nodes that meet the criteria, the one with lower available CPU resources and lower available memory resources is selected as the target NUMA node.
[0143] S390. If so, bind the application to be processed to the target non-uniform memory access node.
[0144] This embodiment's technical solution, when no available non-unified memory access nodes exist among the intermediate non-unified memory access nodes, determines whether a first application exists among the intermediate non-unified memory access nodes that can have its resources released. If so, the intermediate non-unified memory access node corresponding to the first application is identified as the first non-unified memory access node. Resources are released for the first application within the first non-unified memory access node, resulting in the first non-unified memory access node after resource release. Based on the resource occupancy rate of the first non-unified memory access node after resource release, it is determined whether a target non-unified memory access node exists. If so, the application to be processed is bound to the target non-unified memory access node. This technical solution achieves the determination of non-unified memory access nodes that can have their resources released, and the release of non-unified memory access resources, when no available non-unified memory access nodes exist among the intermediate non-unified memory access nodes. This improves the flexibility of the target non-unified memory access node selection process and perfects the selection method for target non-unified memory access nodes when no available non-unified memory access nodes exist.
[0145] It should be noted that some applications may be unable to release resources within intermediate NUMA nodes. Therefore, in cases where no resources can be released, load balancing can be performed on the NUMA nodes to schedule resources across the corresponding intermediate NUMA nodes, thereby improving overall system utilization and preventing resource concentration and hotspot issues within NUMA nodes.
[0146] In an optional embodiment, if there is no first application that can release resources in each intermediate non-unified memory access node, then the application running status of at least one associated application associated with the corresponding intermediate non-unified memory access node is obtained; based on the application running status of each associated application, a second application that can be scheduled for resources in the corresponding intermediate non-unified memory access node is determined; a second non-unified memory access node is selected from other non-unified memory access nodes other than its own intermediate non-unified memory access node; and the second application is bound to the second non-unified memory access node.
[0147] The associated application can be a user application bound to the corresponding NUMA node. The application's running status can include whether the user application is running, idle, or in an abnormal state.
[0148] For example, if there are user applications running under the corresponding intermediate NUMA node, it is determined whether each user application occupies hardware devices during its operation, and the user applications that do not occupy hardware devices are designated as the second applications under the corresponding intermediate NUMA node.
[0149] Select a second NUMA node from among the NUMA nodes other than the intermediate NUMA node itself. The second NUMA node can be the one with the lowest resource utilization. Unbind the second application from its own intermediate NUMA node, migrate the second application to the second NUMA node, and bind it to the second NUMA node. This releases some resources of the intermediate NUMA node, making them available for the application to be processed to bind to its own architecture.
[0150] Understandably, when there are no resources available to release in the intermediate NUMA nodes, the migrationable user applications can be scheduled by balancing the load of the NUMA nodes, thereby releasing some resources in the more friendly intermediate NUMA nodes to provide sufficient resources for the applications to be processed.
[0151] This optional embodiment obtains the application running status of at least one associated application linked to a corresponding intermediate non-unified memory access node. Based on the application running status of each associated application, it determines a second application within the corresponding intermediate non-unified memory access node that can be resource-scheduled. Then, it selects a second non-unified memory access node from other non-unified memory access nodes besides its own, and binds the second application to the second non-unified memory access node. This achieves load balancing of non-unified memory access node resources when there is no first application available for resource release within any intermediate non-unified memory access node. This allows for partial release of resources on the corresponding intermediate non-unified memory access node, thereby improving overall system utilization, preventing hotspots caused by concentrated resources within non-unified memory access nodes, and providing the possibility of binding subsequent applications to related non-unified memory access nodes. Furthermore, reasonable resource allocation reduces the risk of memory overflow.
[0152] Understandably, to further improve the accuracy of selecting the second application, the second application can be selected in a targeted manner based on the relationship between the user application and the target hardware device.
[0153] In one optional embodiment, determining the second application that can be scheduled for resources in the corresponding intermediate non-unified memory access node based on the application running status of each associated application includes: determining whether each associated application occupies the target hardware device of the corresponding intermediate non-unified memory access node based on the application running status of each associated application; and determining the associated application that does not occupy the target hardware device of the corresponding intermediate non-unified memory access node as the second application that can be scheduled for resources in the corresponding intermediate non-unified memory access node.
[0154] For example, if the application of the associated application is in the running state, it is determined whether each associated application occupies the hardware device; if the user application occupies the hardware device during the running process, it is determined whether the hardware device occupied by the user application during the running process is the target hardware device. If not, the corresponding user application is used as the second application under the corresponding intermediate non-uniform memory access node.
[0155] This optional embodiment of the technical solution determines whether each associated application occupies the target hardware device of the corresponding intermediate non-unified memory access node based on the application running status of each associated application. The associated applications that do not occupy the target hardware device of the corresponding intermediate non-unified memory access node are identified as the second applications that can be scheduled for resources in the corresponding intermediate non-unified memory access node, thereby improving the accuracy of the selection of the second application and realizing effective load balancing among the non-unified memory access nodes.
[0156] Example 4
[0157] Figure 4 This is a flowchart of a non-uniform memory access node binding method provided in Embodiment 4 of the present invention. Based on the above embodiments, this embodiment provides a preferred example.
[0158] like Figure 4 As shown, the method includes the following specific steps:
[0159] S401, Obtain the application to be processed.
[0160] S402. Based on the application information of the application to be processed, determine the target hardware device associated with the application to be processed.
[0161] S403. Obtain at least one intermediate NUMA node with the target hardware device allocated from each candidate NUMA node.
[0162] S404. Based on the resource usage data of the corresponding intermediate NUMA nodes, determine the resource utilization rate of each intermediate NUMA node.
[0163] S405. Obtain the resource requirements of the application to be processed.
[0164] S406. Based on the resource demand and the resource utilization rate of the corresponding intermediate NUMA nodes, determine whether there are any available NUMA nodes among the intermediate NUMA nodes; if yes, execute S407A; if no, execute S407B.
[0165] Optionally, resource requirements include CPU resource requirements and memory resource requirements; resource utilization includes CPU utilization and memory utilization; based on CPU resource requirements and the CPU utilization of the corresponding intermediate NUMA nodes, the available CPU resources of each intermediate NUMA node are determined; based on memory resource requirements and the memory utilization of the corresponding intermediate NUMA nodes, the available memory resources of each intermediate NUMA node are determined; based on the available CPU resources and available memory resources of the corresponding intermediate NUMA nodes, the target available resources of each intermediate NUMA node are determined; based on the target available resources of each intermediate NUMA node, it is determined whether there are any available NUMA nodes among the intermediate NUMA nodes.
[0166] S407A: Select the target NUMA node from the available NUMA nodes and bind the application to be processed to the target NUMA node.
[0167] S407B: Determine if there is a first application in each intermediate NUMA node that can release resources; if yes, execute S408-S411; if no, execute S412-S414.
[0168] S408. The intermediate NUMA node corresponding to the first application is identified as the first NUMA node.
[0169] S409. Release the resources of the first application in the first NUMA node to obtain the first NUMA node after resource release.
[0170] S410. Based on the resource utilization rate of the first NUMA node after resource release, determine whether a target NUMA node exists.
[0171] S411. If so, bind the application to be processed to the target NUMA node.
[0172] S412. Determine the resource utilization rate of the remaining NUMA nodes.
[0173] The remaining NUMA nodes are the other NUMA nodes among the candidate NUMA nodes, excluding the intermediate NUMA node.
[0174] S413. Based on the resource utilization rate of the remaining NUMA nodes, determine whether there is a target NUMA node among the remaining NUMA nodes.
[0175] S414. If so, bind the application to be processed to the target NUMA node.
[0176] Optionally, if there is no first application that can release resources in each intermediate NUMA node, then obtain the application running status of at least one associated application associated with the corresponding intermediate NUMA node; determine whether each associated application occupies the target hardware device of the corresponding intermediate NUMA node based on the application running status of each associated application; identify the associated application that does not occupy the target hardware device of the corresponding intermediate NUMA node as the second application that can be scheduled for resources in the corresponding intermediate NUMA node; select a second NUMA node from other NUMA nodes besides its own intermediate NUMA node; and bind the second application to the second NUMA node.
[0177] Example 5
[0178] Figure 5 This is a schematic diagram of a non-uniform memory access node binding device provided in Embodiment 4 of the present invention. The non-uniform memory access node binding device provided in this embodiment of the present invention is applicable to situations where non-uniform memory access nodes are automatically identified and application processes are intelligently bound to the identified non-uniform memory access nodes. This non-uniform memory access node binding device can be implemented in hardware and / or software, such as... Figure 5 As shown, the device specifically includes: an application acquisition module 501, a hardware device determination module 502, a reference access node determination module 503, an available access node determination module 504, and a first access node binding module 505. Among them,
[0179] The application acquisition module 501 is used to acquire applications to be processed.
[0180] The hardware device determination module 502 is used to determine the target hardware device associated with the application to be processed based on the application information of the application to be processed.
[0181] The reference access node determination module 503 is used to obtain at least one intermediate non-uniform memory access node that is allocated with the target hardware device from each candidate non-uniform memory access node.
[0182] Available access node determination module 504 is used to determine whether there are available non-uniform memory access nodes among the intermediate non-uniform memory access nodes based on the resource usage data of the corresponding intermediate non-uniform memory access nodes.
[0183] The first access node binding module 505 is used to select a target non-uniform memory access node from the available non-uniform memory access nodes and bind the application to be processed to the target non-uniform memory access node if it is determined that there is an available non-uniform memory access node among the intermediate non-uniform memory access nodes.
[0184] The technical solution of this invention obtains the application to be processed; determines the target hardware device associated with the application based on the application information of the application; obtains at least one intermediate non-uniform memory access node allocated with the target hardware device from among the candidate non-uniform memory access nodes; determines whether there is an available non-uniform memory access node among the intermediate non-uniform memory access nodes based on the resource usage data of the corresponding intermediate non-uniform memory access nodes; if so, selects the target non-uniform memory access node from the available non-uniform memory access nodes and binds the application to be processed to the target non-uniform memory access node. This technical solution, by combining the target hardware device associated with the application to be processed and the resource usage of each non-uniform memory access node, allocates the non-uniform memory access node with optimal performance and resources to the application to be processed, achieving accurate selection, allocation, and binding of non-uniform memory access nodes, reducing the possibility of processor accessing non-local memory, and thus improving the processing efficiency of the application to be processed.
[0185] Optionally, the available access node determination module includes:
[0186] The resource utilization rate determination unit is used to determine the resource utilization rate corresponding to each intermediate non-unified memory access node based on the resource usage data of the corresponding intermediate non-unified memory access node.
[0187] Resource requirement acquisition unit, used to acquire the resource requirement of the application to be processed;
[0188] The available non-uniform memory access node determination unit is used to determine whether there are available non-uniform memory access nodes among the intermediate non-uniform memory access nodes based on the resource demand and the resource occupancy rate of the corresponding intermediate non-uniform memory access nodes.
[0189] Optionally, the resource requirements include the central processing unit (CPU) resource requirements and the memory resource requirements; the resource utilization rate includes the CPU utilization rate and the memory utilization rate.
[0190] Accordingly, the available access node determination unit includes:
[0191] The CPU determination result subunit is used to determine the CPU available resource determination result of each intermediate non-unified memory access node based on the CPU resource demand and the CPU occupancy rate of the corresponding intermediate non-unified memory access node.
[0192] The memory judgment result determination subunit is used to determine the memory available resource judgment result of each intermediate non-uniform memory access node based on the memory resource demand and the memory occupancy rate of the corresponding intermediate non-uniform memory access node.
[0193] The target judgment result determination subunit is used to determine the target available resource judgment result of each intermediate non-unified memory access node based on the CPU available resource judgment result and memory available resource judgment result of the corresponding intermediate non-unified memory access node.
[0194] The available access node determination subunit is used to determine whether there are available non-uniform memory access nodes among the intermediate non-uniform memory access nodes based on the target available resource judgment results of each intermediate non-uniform memory access node.
[0195] Optionally, the device further includes:
[0196] The resource utilization rate determination module is used to determine the resource utilization rate of the remaining non-unified memory access nodes after determining whether there are available non-unified memory access nodes among the intermediate non-unified memory access nodes. If there are no available non-unified memory access nodes among the intermediate non-unified memory access nodes, the remaining non-unified memory access nodes are the other non-unified memory access nodes among the candidate non-unified memory access nodes besides the intermediate non-unified memory access nodes.
[0197] The first target access node determination module is used to determine whether there is a target non-uniform memory access node among the remaining non-uniform memory access nodes based on the resource occupancy rate corresponding to the remaining non-uniform memory access nodes.
[0198] The second access node binding module is used to bind the application to be processed to the target non-uniform memory access node if there is a target non-uniform memory access node among the remaining non-uniform memory access nodes.
[0199] Optionally, the device further includes:
[0200] The first application judgment module is used to determine whether there is a first application that can release resources in each of the intermediate non-unified memory access nodes after determining whether there is an available non-unified memory access node in each of the intermediate non-unified memory access nodes.
[0201] The first access node determination module is used to determine the intermediate non-unified memory access node corresponding to the first application as the first non-unified memory access node if there is a first application that can release resources among the intermediate non-unified memory access nodes.
[0202] The first access node release module is used to release resources of the first application in the first non-unified memory access node to obtain the first non-unified memory access node after resource release.
[0203] The second target access node determination module is used to determine whether there is a target non-unified memory access node based on the resource occupancy rate of the first non-unified memory access node after resource release.
[0204] The third access node binding module is used to bind the application to be processed to the target non-uniform memory access node if it is determined that there is a target non-uniform memory access node.
[0205] Optionally, the device further includes:
[0206] The running status acquisition module is used to acquire the running status of at least one associated application associated with the corresponding intermediate non-unified memory access node after determining whether there is a first application that can release resources in each of the intermediate non-unified memory access nodes. If there is no first application that can release resources in each of the intermediate non-unified memory access nodes, the module acquires the running status of at least one associated application associated with the corresponding intermediate non-unified memory access node.
[0207] The second application determination module is used to determine the second application that can be scheduled for resources in the corresponding intermediate non-unified memory access node based on the application running status of each of the associated applications.
[0208] The second access node selection module is used to select a second non-unified memory access node from other non-unified memory access nodes besides its own intermediate non-unified memory access node.
[0209] The second access node binding module is used to bind the second application to the second non-uniform memory access node.
[0210] Optionally, the second application determining module includes:
[0211] The device occupancy determination unit is used to determine whether each of the associated applications occupies the target hardware device of the corresponding intermediate non-unified memory access node based on the application running status of each of the associated applications.
[0212] The second application determination unit is used to determine the associated application of the target hardware device that does not occupy the corresponding intermediate non-uniform memory access node as the second application that can be scheduled for resources in the corresponding intermediate non-uniform memory access node.
[0213] The non-uniform memory access node binding device provided in the embodiments of the present invention can execute the non-uniform memory access node binding method provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the method execution.
[0214] Example 6
[0215] Figure 6 A schematic diagram of an electronic device 60 that can be used to implement embodiments of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the invention described and / or claimed herein.
[0216] like Figure 6 As shown, the electronic device 60 includes at least one processor 61 and a memory, such as a read-only memory (ROM) 62 and a random access memory (RAM) 63, communicatively connected to the at least one processor 61. The memory stores computer programs executable by the at least one processor. The processor 61 can perform various appropriate actions and processes based on the computer program stored in the ROM 62 or loaded into the RAM 63 from storage unit 68. The RAM 63 may also store various programs and data required for the operation of the electronic device 60. The processor 61, ROM 62, and RAM 63 are interconnected via a bus 64. An input / output (I / O) interface 65 is also connected to the bus 64.
[0217] Multiple components in electronic device 60 are connected to I / O interface 65, including: input unit 66, such as keyboard, mouse, etc.; output unit 67, such as various types of monitors, speakers, etc.; storage unit 68, such as disk, optical disk, etc.; and communication unit 69, such as network card, modem, wireless transceiver, etc. Communication unit 69 allows electronic device 60 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.
[0218] Processor 61 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processor 61 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. Processor 61 performs the various methods and processes described above, such as the non-uniform memory access node binding method.
[0219] In some embodiments, the non-uniform memory access node binding method may be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 68. In some embodiments, part or all of the computer program may be loaded and / or mounted on electronic device 60 via ROM 62 and / or communication unit 69. When the computer program is loaded into RAM 63 and executed by processor 61, one or more steps of the non-uniform memory access node binding method described above may be performed. Alternatively, in other embodiments, processor 61 may be configured to perform the non-uniform memory access node binding method by any other suitable means (e.g., by means of firmware).
[0220] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.
[0221] Computer programs used to implement the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be performed. The computer programs may be executed entirely on a machine, partially on a machine, or as a standalone software package, partially on a machine and partially on a remote machine, or entirely on a remote machine or server.
[0222] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.
[0223] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).
[0224] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or computing systems that include middleware components (e.g., application servers), or computing systems that include frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.
[0225] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.
[0226] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.
[0227] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.
Claims
1. A non-uniform access memory node binding method, characterized in that, include: Get the applications to be processed; Based on the application information of the application to be processed, determine the target hardware device associated with the application to be processed; From each candidate non-uniform memory access node, obtain at least one intermediate non-uniform memory access node that is allocated the target hardware device; Based on the resource usage data of the corresponding intermediate non-uniform memory access nodes, determine whether there are any available non-uniform memory access nodes among the intermediate non-uniform memory access nodes; If so, then select a target non-uniform memory access node from the available non-uniform memory access nodes, and bind the application to be processed to the target non-uniform memory access node; After determining whether any of the intermediate non-uniform memory access nodes are available, the method further includes: If there is no available non-uniform memory access node among the intermediate non-uniform memory access nodes, then determine whether there is a first application among the intermediate non-uniform memory access nodes that can release resources; If so, the intermediate non-unified memory access node corresponding to the first application is identified as the first non-unified memory access node; the resources of the first application in the first non-unified memory access node are released to obtain the first non-unified memory access node after resource release; based on the resource occupancy rate of the first non-unified memory access node after resource release, it is determined whether there is a target non-unified memory access node; if so, the application to be processed is bound to the target non-unified memory access node. If there is no first application that can release resources in any of the intermediate non-unified memory access nodes, then obtain the application running status of at least one associated application associated with the corresponding intermediate non-unified memory access node; based on the application running status of each associated application, determine whether each associated application occupies the target hardware device of the corresponding intermediate non-unified memory access node; identify the associated application that does not occupy the target hardware device of the corresponding intermediate non-unified memory access node as the second application that can be scheduled for resources in the corresponding intermediate non-unified memory access node; select a second non-unified memory access node from other non-unified memory access nodes besides its own intermediate non-unified memory access node; bind the second application to the second non-unified memory access node.
2. The method according to claim 1, characterized in that, The step of determining whether there are available non-uniform memory access nodes among the intermediate non-uniform memory access nodes based on the resource usage data of the corresponding intermediate non-uniform memory access nodes includes: Based on the resource usage data of the corresponding intermediate non-uniform memory access nodes, determine the resource occupancy rate of each of the intermediate non-uniform memory access nodes; Obtain the resource requirements of the application to be processed; Based on the resource demand and the resource occupancy rate of the corresponding intermediate non-uniform memory access nodes, determine whether there are any available non-uniform memory access nodes among the intermediate non-uniform memory access nodes.
3. The method according to claim 2, characterized in that, The resource requirements include the central processing unit (CPU) resource requirements and the memory resource requirements; the resource utilization rate includes the CPU utilization rate and the memory utilization rate. Accordingly, determining whether there are available non-uniform memory access nodes among the intermediate non-uniform memory access nodes based on the resource demand and the resource occupancy rate of the corresponding intermediate non-uniform memory access nodes includes: Based on the CPU resource requirements and the CPU utilization rate of the corresponding intermediate non-unified memory access nodes, determine the CPU available resource judgment result of each intermediate non-unified memory access node; Based on the memory resource requirements and the memory occupancy rate of the corresponding intermediate non-unified memory access nodes, determine the memory available resource judgment result of each intermediate non-unified memory access node; Based on the CPU available resource judgment results and memory available resource judgment results of the corresponding intermediate non-unified memory access nodes, the target available resource judgment results of each intermediate non-unified memory access node are determined. Based on the target available resources judgment results of each intermediate non-uniform memory access node, determine whether there are available non-uniform memory access nodes among each intermediate non-uniform memory access node.
4. The method according to any one of claims 1-3, characterized in that, After determining whether any of the intermediate non-uniform memory access nodes are available, the method further includes: If there are no available non-unified memory access nodes among the intermediate non-unified memory access nodes, then the resource utilization rate corresponding to the remaining non-unified memory access nodes is determined; wherein, the remaining non-unified memory access nodes are the other non-unified memory access nodes among the candidate non-unified memory access nodes other than the intermediate non-unified memory access nodes. Based on the resource utilization rate corresponding to the remaining non-uniform memory access nodes, determine whether there is a target non-uniform memory access node among the remaining non-uniform memory access nodes; If so, the application to be processed will be bound to the target non-uniform memory access node.
5. A non-uniform memory access node binding device, characterized in that, include: The application acquisition module is used to acquire applications to be processed. The hardware device determination module is used to determine the target hardware device associated with the application to be processed based on the application information of the application to be processed. The reference access node determination module is used to obtain at least one intermediate non-uniform memory access node that is allocated the target hardware device from each candidate non-uniform memory access node. The available access node determination module is used to determine whether there are available non-uniform memory access nodes among the intermediate non-uniform memory access nodes based on the resource usage data of the corresponding intermediate non-uniform memory access nodes. The first access node binding module is used to select a target non-uniform memory access node from the available non-uniform memory access nodes and bind the application to be processed to the target non-uniform memory access node if it is determined that there is an available non-uniform memory access node among the intermediate non-uniform memory access nodes. The device further includes: The first application judgment module is used to determine whether there is a first application that can release resources in each of the intermediate non-unified memory access nodes after determining whether there is an available non-unified memory access node in each of the intermediate non-unified memory access nodes. The first access node determination module is used to determine the intermediate non-unified memory access node corresponding to the first application as the first non-unified memory access node if there is a first application that can release resources among the intermediate non-unified memory access nodes. The first access node release module is used to release resources of the first application in the first non-unified memory access node to obtain the first non-unified memory access node after resource release. The second target access node determination module is used to determine whether there is a target non-unified memory access node based on the resource occupancy rate of the first non-unified memory access node after resource release. The third access node binding module is used to bind the application to be processed to the target non-uniform memory access node if it is determined that there is a target non-uniform memory access node. The device further includes: The running status acquisition module is used to acquire the running status of at least one associated application associated with the corresponding intermediate non-unified memory access node after determining whether there is a first application that can release resources in each of the intermediate non-unified memory access nodes. If there is no first application that can release resources in each of the intermediate non-unified memory access nodes, the module acquires the running status of at least one associated application associated with the corresponding intermediate non-unified memory access node. The second application determination module is used to determine the second application that can be scheduled for resources in the corresponding intermediate non-unified memory access node based on the application running status of each of the associated applications. The second access node selection module is used to select a second non-unified memory access node from other non-unified memory access nodes besides its own intermediate non-unified memory access node. The second access node binding module is used to bind the second application to the second non-unified memory access node; The second application determination module includes: The device occupancy determination unit is used to determine whether each of the associated applications occupies the target hardware device of the corresponding intermediate non-unified memory access node based on the application running status of each of the associated applications. The second application determination unit is used to determine the associated application of the target hardware device that does not occupy the corresponding intermediate non-uniform memory access node as the second application that can be scheduled for resources in the corresponding intermediate non-uniform memory access node.
6. An electronic device, characterized in that, The electronic device includes: At least one processor; and A memory communicatively connected to the at least one processor; wherein, The memory stores a computer program that can be executed by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform the non-uniform memory access node binding method according to any one of claims 1-4.
7. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that cause a processor to execute the non-uniform memory access node binding method according to any one of claims 1-4.
Citation Information
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