Electronic device

CN116778858BActive Publication Date: 2026-08-21INNOLUX CORP
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Patent Information

Application Number
CN202210216188.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-03-07
Publication Date
2026-08-21
Estimated Expiration
2042-03-07

AI Technical Summary

Technical Problem

[0002]电子装置通常由一侧将多种信号提供到面板,然而,于大尺寸或分辨率高的电子装置时,可能会因电阻电容延迟(RC delay)问题而影响质量

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Abstract

An electronic device includes a panel, a chip on film, and a flexible circuit board. The panel includes a first gate driving circuit, a switching transistor, and a driving transistor. An output terminal of the switching transistor is coupled to a control terminal of the driving transistor. The first gate driving circuit is configured to receive an alternating current (AC) signal and a direct current (DC) signal, and output a control signal to the control terminal of the switching transistor according to the AC signal and the DC signal. The chip on film is electrically connected to the panel, and is configured to transmit a data signal to an input terminal of the switching transistor, and transmit the AC signal to the first gate driving circuit. The flexible circuit board is electrically connected to the panel, and is configured to transmit a power signal to an input terminal of the driving transistor, and transmit the DC signal to the first gate driving circuit.
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Description

Technical Field

[0001] This invention relates to an electronic device, and more particularly to an electronic device that transmits signals via a flip-chip film or a flexible circuit board. Background Technology

[0002] Electronic devices typically provide multiple signals to the panel from one side; however, in large-size or high-resolution electronic devices, quality may be affected by resistive-capacitive delay (RC delay) issues. Summary of the Invention

[0003] An embodiment of the present invention provides an electronic device, which includes a panel, a die-casting film, and a flexible circuit board. The panel includes a first gate drive circuit, a switching transistor, and a driving transistor. The output terminal of the switching transistor is coupled to the control terminal of the driving transistor. The first gate drive circuit receives AC signals and DC signals, and outputs control signals to the control terminal of the switching transistor according to the AC and DC signals. The die-casting film is electrically connected to the panel and is used to transmit data signals to the input terminal of the switching transistor and AC signals to the first gate drive circuit. The flexible circuit board is electrically connected to the panel and is used to transmit power signals to the input terminal of the driving transistor and DC signals to the first gate drive circuit. Attached Figure Description

[0004] Figure 1 This is a schematic diagram of the architecture of an electronic device according to the first embodiment of the present invention.

[0005] Figure 2 for Figure 1 A schematic diagram of the local amplifier circuit in region A.

[0006] Figure 3 This is a partial circuit architecture diagram of the first gate drive circuit of an electronic device according to an embodiment of the present invention.

[0007] Figure 4 This is a partial circuit architecture diagram of the second gate drive circuit of an electronic device according to an embodiment of the present invention.

[0008] Figure 5 This is a schematic diagram of the architecture of an electronic device according to a second embodiment of the present invention.

[0009] Figure 6 This is a schematic diagram of the architecture of an electronic device according to a third embodiment of the present invention.

[0010] Figure 7 This is a schematic diagram of the architecture of an electronic device according to the fourth embodiment of the present invention.

[0011] Figure reference numerals: 100 - Panel; 110 - First gate drive circuit; 112, 152 - Clock signal lines; 114, 154 - Start signal lines; 116, 156 - Reset signal lines; 118, 158 - High voltage signal lines; 119, 159 - Low voltage signal lines; 120 - Switching transistor; 130 - Drive transistor; 140 - Light-emitting element; 150 - Second gate drive circuit; 160 - Light-emitting transistor; 170 - Test circuit; 200 - Chip-on-chip; 210 - Driver chip; 300 - Flexible circuit board; 400 - First circuit board; 500 - Second circuit board; BUF - Buffer; CKV1, CKV2, CKV3, CKV4, CKE1, CKE2 - Clock signals; D1 - First direction; D2 - Second direction; DATA, DATA1, DATA2, DATA3 - Data signal; DL - data line; ED - electronic device; EL - light emission signal line; EM(1)~EM(N) - light emission signal; INV - rectifier; PVDD - high voltage source; PVSS - low voltage source; PX - pixel; PX1, PX2, PX3 - sub-pixel; QR, QG, QB - turn-on signal; QVG - switch control signal; R1 - working area; R2 - peripheral area; RST, ERST - reset signal; SCAN(1)~SCAN(N) - scan signal; SL - scan line; SPO(1)~SPO(N), SRO(1)~SRO(N) - output signal; SR, ESR - shift register; STV, STE - start signal; TFT1, TFT2, TFT3 - switch element; VGH1, VGH2 - gate high voltage; VGL1, VGL2 - gate low voltage. Detailed Implementation

[0012] The present invention will be described in detail below with reference to specific embodiments and accompanying drawings. It should be noted that, for ease of understanding and to keep the drawings concise, many of the drawings in this invention only depict a portion of the device, and specific elements in the drawings are not drawn to scale. Furthermore, the number and dimensions of each element in the drawings are for illustrative purposes only and are not intended to limit the scope of the present invention.

[0013] Throughout this specification and claims, certain terms are used to refer to specific elements. Those skilled in the art will understand that electronic device manufacturers may use different names to refer to the same element. This document is not intended to distinguish between elements that have the same function but different names. In the following specification and claims, words such as "comprising" and "including" are open-ended terms and should therefore be interpreted as "containing but not limited to...". When the terms "comprising," "including," and / or "having" are used in this specification, they specify the presence of the stated feature, area, step, operation, and / or element, but do not exclude the presence or addition of one or more other features, areas, steps, operations, elements, and / or combinations thereof.

[0014] When an element or membrane is referred to as being "on" or "connected" to another element or membrane, it can be directly on or directly connected to the other element or membrane, or there can be an inserted element or membrane between the two. Conversely, when an element is referred to as being "directly" on or "directly connected" to another element or membrane, there can be no inserted element or membrane between the two.

[0015] The directional terms used in this document, such as "up," "down," "front," "back," "left," and "right," are only for reference to the accompanying drawings. Therefore, the directional terms used are for illustrative purposes and not for limiting the invention.

[0016] The terms “approximately,” “equal to,” “same,” “substantially,” or “roughly” are generally interpreted as being within 20% of a given value or range, or as being within 10%, 5%, 3%, 2%, 1%, or 0.5% of a given value or range.

[0017] The ordinal numbers used in the specification and claims, such as "first," "second," etc., to modify elements, do not in themselves imply or represent any prior ordinal number for that element (or those elements), nor do they represent the order of one element with another, or the order of manufacturing processes. The use of these ordinal numbers is solely to clearly distinguish one named element from another element with the same name. The claims and specification may not use the same terminology; therefore, a first element in the specification may be a second element in the claims.

[0018] The electronic device described in this invention may include a display device, a backlight device, an antenna device, a sensing device, or a splicing device, but is not limited thereto. The electronic device may be a bendable or flexible electronic device. The display device may be a non-self-emissive display device or a self-emissive display device. The antenna device may be a liquid crystal type antenna device or a non-liquid crystal type antenna device. The sensing device may be a sensing device that senses capacitance, light, heat, or ultrasound, but is not limited thereto. The electronic device may include, for example, passive and active electronic components, such as capacitors, resistors, inductors, diodes, and transistors. Diodes may include light-emitting diodes (LEDs) or photodiodes. Light-emitting diodes may include, for example, organic light-emitting diodes (OLEDs), mini LEDs, micro LEDs, or quantum dot LEDs, but are not limited thereto. The splicing device may be, for example, a display splicing device or an antenna splicing device, but is not limited thereto. It should be noted that the electronic device may be any arrangement and combination of the foregoing, but is not limited thereto.

[0019] It should be understood that, without departing from the spirit of the present invention, features in several different embodiments can be replaced, recombined, or mixed to complete other embodiments.

[0020] Please refer to Figure 1 , Figure 2 and Figure 3 . Figure 1 This is a schematic diagram of the architecture of an electronic device according to an embodiment of the present invention. Figure 2 for Figure 1 A schematic diagram of the local amplifier circuit in region A. Figure 3 This is a partial circuit architecture diagram of the first gate drive circuit of an electronic device according to an embodiment of the present invention. Figure 1 , Figure 2 and Figure 3As shown, an electronic device ED according to an embodiment of the present invention includes a panel 100, a chip-on-film (COP) 200, and a flexible circuit board 300. The panel 100 may include, for example, a light-emitting diode (LED) panel or an organic light-emitting diode (OLED) panel, but is not limited thereto. The substrate of the panel 100 (not shown) may include rigid and / or flexible materials, such as glass, quartz, sapphire, polyimide (PI), polyethylene terephthalate (PET), other suitable materials, or combinations thereof, but is not limited thereto. The COP 200 is electrically connected to the panel 100, and the flexible circuit board 300 is electrically connected to the panel 100. In some embodiments, the COP 200 and the flexible circuit board 300 may be respectively disposed on opposite sides of the panel 100. For example, the flip-chip film 200 can be disposed on the lower side of the panel 100, and the flexible circuit board 300 can be disposed on the upper side of the panel 100, and the flip-chip film 200 and the flexible circuit board 300 are respectively connected to the panel 100, but not limited thereto.

[0021] Panel 100 has a working area R1 and a peripheral area R2, with the peripheral area R2 adjacent to the working area R1. For example, the peripheral area R2 may be located around or at least to one side of the working area R1, but is not limited thereto. The working area R1 may vary depending on the application of the electronic device, and may include, for example, a display area, a detection area, a touch area, a light-emitting area, other applications, or combinations thereof. Panel 100 may include, but is not limited to, a first gate drive circuit 110, a switching transistor 120, and a driving transistor 130. The first gate drive circuit 110 may be disposed in the peripheral area R2 and electrically connected to the flip-chip thin film 200 and the flexible circuit board 300. The first gate drive circuit 110 may be disposed within the peripheral area R2 located to one side (e.g., the left or right side) of the working area R1, but is not limited thereto. In some embodiments, the panel 100 may include two first gate driving circuits 110, respectively disposed in peripheral regions R2 located on opposite sides (e.g., left and right sides) of the working area R1, and each first gate driving circuit 110 may be electrically connected to different flip-chip films 200 and flexible circuit boards 300, but is not limited thereto. Switching transistors 120 and driving transistors 130 may be disposed within the working area R1. Specifically, the panel 100 may include multiple pixels PX, for example, disposed in an array of multiple columns and multiple rows within the working area R1, but is not limited thereto. Pixels PX may, for example, include multiple sub-pixels (e.g., sub-pixels PX1, PX2, and / or PX3). In some embodiments, sub-pixels PX1, PX2, and / or PX3 may be red sub-pixels, green sub-pixels, and / or blue sub-pixels, respectively, but are not limited thereto, and may include sub-pixels of other different colors according to other requirements. The multiple sub-pixels in each pixel PX may each include a switching transistor 120 and a driving transistor 130. The switching transistor 120 and the driving transistor 130 each have a control terminal, an input terminal, and an output terminal. The control terminal of the switching transistor 120 or the driving transistor 130 may be, for example, a gate; the input terminal may be one of the source and drain; and the output terminal may be the other of the source and drain, but is not limited thereto. The output terminal of the switching transistor 120 is coupled to the control terminal of the driving transistor 130. In some embodiments, the switching transistor 120 and / or the driving transistor 130 may be, for example, a thin-film transistor (TFT), but is not limited thereto.

[0022] The first gate drive circuit 110 is used to receive AC signals (e.g., clock signals (e.g., CKV1, CKV2, CKV3, or CKV4), start signal STV, and / or reset signal RST) and DC signals (e.g., gate high voltage VGH1 and gate low voltage VGL1), and outputs control signals (e.g., scan signals) to the control terminal of the switching transistor 120 according to the AC and DC signals. Specifically, with Figure 3 Taking the first gate drive circuit 110 shown as an example, the first gate drive circuit 110 may include multiple clock signal lines 112, a start signal line 114, a reset signal line 116, a high voltage signal line 118, a low voltage signal line 119, and / or multiple shift registers SR. The first gate drive circuit 110 may be, for example, a scan driver circuit to provide scan signals. The multiple clock signal lines 112 may, for example, transmit the received clock signals CKV1, CKV2, CKV3, and CKV4 to the multiple shift registers SR respectively. For example, two of the multiple clock signal lines 112 may transmit two of the received clock signals CKV1, CKV2, CKV3, and CKV4 to one of the multiple shift registers SR respectively, but this is not limited to this. One of the multiple shift registers SR can receive a start signal STV via start signal line 114, a reset signal line 116 transmits the received reset signal RST to the multiple shift registers SR, a high voltage signal line 118 transmits the received gate high voltage VGH1 to the multiple shift registers SR, and a low voltage signal line 119 transmits the received gate low voltage VGL1 to the multiple shift registers SR, but is not limited thereto. It should be particularly noted that the clock signals CKV1, CKV2, CKV3, CKV4, start signal STV, and / or reset signal RST referred to in this invention are, for example, AC signals, and the gate high voltage VGH1 and / or gate low voltage VGL1 are, for example, DC signals.

[0023] Multiple shift registers SR can generate output signals SPO(1), SPO(2), SPO(3)... to output signal SPO(N) according to the aforementioned clock signals (e.g., clock signals CKV1, CKV2, CKV3 and / or CKV4), start signal STV, reset signal RST, gate high voltage VGH1 and gate low voltage VGL1, respectively. They can also output scan signals SCAN(1), SCAN(2), SCAN(3),... to scan signal SCAN(N) to the control terminal of the connected switching transistor 120, for example (but not limited to) via rectifier INV and / or buffer BUF. For example, the panel 100 of the electronic device ED may include multiple scan lines SL, and the first gate drive circuit 110 may, for example, transmit the output scan signals SCAN(1), SCAN(2), SCAN(3), ... to SCAN(N) through the corresponding scan lines SL to the control terminals of the switching transistors 120 of the sub-pixels (e.g., sub-pixels PX1, PX2, and / or PX3) of each pixel PX. Figure 2(As shown). N can be a positive integer, for example, N can be 1080 and the number of shift registers SR can be 1080, but is not limited thereto. In addition, the output signals SPO(1), SPO(2), SPO(3), ... to SPO(N-1) generated by the shift register SR can be used, for example, as the start pulse output of the next stage shift register SR, but is not limited thereto. In some embodiments, each shift register SR may also include a buffer (not shown), the aforementioned buffer BUF and / or the buffer in the shift register SR can be used to amplify and drive the signal, but is not limited thereto. Figure 3 The first gate drive circuit 110 shown is merely an example, but is not limited thereto.

[0024] In some embodiments, the flip-chip thin film 200 can be used to transmit data signals DATA to the input of the switching transistor 120, and to transmit AC signals (e.g., clock signals, start signals, and / or reset signals) to the first gate drive circuit 110, but is not limited thereto. Specifically, the panel 100 of the electronic device ED may include multiple data lines DL, such as... Figure 2 As shown, the scan line SL may extend, for example, along a first direction D1, and the data line DL may extend, for example, along a second direction D2. The first direction D1 and the second direction D2 may, for example, be approximately perpendicular to each other, but are not limited thereto. The flip-chip film 200 may, for example, transmit the data signal DATA through the corresponding data line DL to the input terminal of the switching transistor 120 in the sub-pixel of each pixel PX. Figure 1 As shown, in some embodiments, the flip-chip film 200 can transmit clock signals CKV1, CKV2, CKV3, CKV4, start signal STV, and / or reset signal RST to the first gate drive circuit 110 via traces, but is not limited thereto. In some embodiments, the data signal DATA may include data signal DATA1, data signal DATA2, and / or data signal DATA3. The flip-chip film 200 may, for example, transmit data signal DATA1 to the red sub-pixel PX1 via the corresponding data line DL, transmit data signal DATA2 to the green sub-pixel PX2 via the corresponding data line DL, and / or transmit data signal DATA3 to the blue sub-pixel PX3 via the corresponding data line DL, but is not limited thereto. In some embodiments, such as Figure 1 As shown, the flip-chip thin film 200 may include a driver chip 210, which can be used to provide a data signal DATA, but is not limited thereto. In some embodiments, such as Figure 1As shown, the electronic device ED may also include a first circuit board 400, which may be electrically connected to the flip-chip film 200. The first circuit board 400 may be used to provide some AC signals (such as clock signals CKV1, CKV2, CKV3, CKV4, start signal STV and / or reset signal RST) and transmit these AC signals through the flip-chip film 200 to the first gate drive circuit 110, but is not limited thereto.

[0025] In some embodiments, the flexible circuit board 300 can be used to transmit power signals (e.g., high voltage source PVDD and / or low voltage source signal PVSS) to the input terminal of the driving transistor 130, and / or transmit DC signals (e.g., gate high voltage VGH1 and gate low voltage VGL1) to the first gate driving circuit 110, but is not limited thereto. Specifically, the flexible circuit board 300 can transmit the high voltage source PVDD and the low voltage source PVSS to the sub-pixels of each pixel PX. For example, the high voltage source PVDD can be transmitted through traces (not shown) to the input terminal of the driving transistor 130 of the sub-pixels (e.g., sub-pixels PX1, PX2, or PX3) of pixel PX, and the low voltage source PVSS can be provided through traces (not shown) to the output terminal of the driving transistor 130 of the sub-pixels (e.g., sub-pixels PX1, PX2, or PX3) of pixel PX. In some embodiments, the flexible circuit board 300 can transmit the gate high voltage VGH1 and the gate low voltage VGL1 to the first gate drive circuit 110 via traces (not shown), but is not limited thereto. In some embodiments, such as Figure 1 As shown, the electronic device ED may further include a second circuit board 500, which is electrically connected to the flexible circuit board 300. The second circuit board 500 can be used to provide a power signal (such as a high voltage source PVDD or a low voltage source PVSS) and transmit the power signal to the input terminal of the driving transistor 130 through the flexible circuit board 300. In some embodiments, the second circuit board 500 can be used to provide a DC signal (such as a gate high voltage VGH1 and / or a gate low voltage VGL1) and transmit the DC signal (such as a gate high voltage VGH1 and / or a gate low voltage VGL1) to the first gate drive circuit 110 through the flexible circuit board 300, but is not limited thereto.

[0026] The power signal or DC signal described in this invention may be, for example, a high-current signal, while the AC signal and data signal may be, for example, a low-current signal, but are not limited thereto. According to the above-described electronic device ED architecture design, by transmitting a power signal and / or DC signal with a large current via a flexible circuit board 300 disposed on, for example, the upper side of panel 100, and transmitting an AC signal and / or data signal with a small current via a flip-chip film 200 disposed on, for example, the lower side of panel 100, the flexibility of signal transmission can be increased, which is beneficial for the design flexibility of signal transmission, but is not limited thereto.

[0027] Please refer to Figure 1 , Figure 2 and Figure 4 . Figure 4 This is a partial schematic diagram of the circuit architecture of the second gate drive circuit of an electronic device according to an embodiment of the present invention. Figure 1 , Figure 2 and Figure 4 As shown, in some embodiments, sub-pixels (e.g., sub-pixel PX1, sub-pixel PX2, or sub-pixel PX3) of each pixel PX of the panel 100 of the electronic device ED may include light-emitting elements 140 (shown in...). Figure 2Furthermore, the output of the driving transistor 130 can be coupled to the light-emitting element 140 so that the light-emitting element 140 can receive power signals transmitted from the flexible circuit board 300. For example, a high-voltage source PVDD transmitted from the flexible circuit board 300 to the driving transistor 130 can be transmitted to one end of the light-emitting element 140, and a low-voltage source PVSS transmitted from the flexible circuit board 300 can be transmitted to the other end of the light-emitting element 140, but this is not a limitation. Moreover, the panel 100 of the electronic device ED may include a second gate driving circuit 150 and / or a light-emitting transistor 160. In some embodiments, the second gate drive circuit 150 may be disposed in the peripheral region R2 and electrically connected to the flip-chip film 200 and / or the flexible circuit board 300. For example, the second gate drive circuit 150 may be disposed in the peripheral region R2 located on one side (e.g., the left or right side) of the working region R1, and may be disposed on one side of the first gate drive circuit 110. For example, the first gate drive circuit 110 may be located between the second gate drive circuit 150 and the working region R1, but this is not a limitation. In some embodiments (not shown), the second gate drive circuit 150 may be located, for example, between the first gate drive circuit 110 and the working region R1. In some embodiments, the panel 100 may include a plurality of second gate drive circuits 150, for example, including two second gate drive circuits 150, respectively disposed in the peripheral regions R2 located on both sides (e.g., the left and right sides) of the working region R1, and the two second gate drive circuits 150 may be electrically connected to different flip-chip films 200 and / or flexible circuit boards 300, but this is not a limitation. In some embodiments, the light-emitting transistor 160 may be disposed within the working region R1. Specifically, each sub-pixel of pixel PX (e.g., sub-pixel PX1, sub-pixel PX2, or sub-pixel PX3) may include the light-emitting transistor 160, which has a control terminal, an input terminal, and an output terminal. In some embodiments, the control terminal of the light-emitting transistor 160 may be, for example, a gate, and the input terminal may be one of the source and drain, while the output terminal may be the other of the source and drain, but is not limited thereto. In some embodiments, the output terminal of the driving transistor 130 may be coupled to the input terminal of the light-emitting transistor 160, and the output terminal of the light-emitting transistor 160 may be coupled to the light-emitting element 140, but is not limited thereto. In some embodiments, the light-emitting transistor 160 may be, for example, a thin-film transistor (TFT), but is not limited thereto.

[0028] like Figure 1 and Figure 4In some embodiments, the second gate drive circuit 150 can be used to receive another AC signal (e.g., a clock signal (e.g., CKE1 or CKE2), a start signal STE, and / or a reset signal ERST) and another DC signal (e.g., a gate high voltage VGH2 and / or a gate low voltage VGL2), and output another control signal (e.g., a light emission signal) to the control terminal of the light-emitting transistor 160 according to this other AC signal and this other DC signal, but is not limited thereto. Specifically, with Figure 4 Taking the second gate drive circuit 150 as an example, the second gate drive circuit 150 may include multiple clock signal lines 152, a start signal line 154, a reset signal line 156, a high voltage signal line 158, a low voltage signal line 159, and / or multiple shift registers ESR. The second gate drive circuit 150 may be, for example, an emission driver circuit used to drive the light-emitting element 140 to operate. In some embodiments, the multiple clock signal lines 152 can transmit the received clock signals CKE1 and CKE2 to the multiple shift registers ESR respectively. In some embodiments, one of the multiple shift registers ESR can receive a start signal STE through the start signal line 154, the reset signal line 156 can transmit the received reset signal ERST to the multiple shift registers ESR, the high voltage signal line 158 can transmit the received gate high voltage VGH2 to the multiple shift registers ESR, and the low voltage signal line 159 can transmit the received gate low voltage VGL2 to the multiple shift registers ESR. The clock signal CKE1, clock signal CKE2, start signal STE and / or reset signal ERST referred to in this invention may be, for example, AC signals, while the gate high voltage VGH2 and / or gate low voltage VGL2 may be, for example, DC signals.

[0029] In some embodiments, multiple shift registers ESR can generate output signals SRO(1), SRO(2), SRO(3), ... to SRO(N) according to the clock signal CKE1, clock signal CKE2, start signal STE, reset signal ERST, gate high voltage VGH2 and / or gate low voltage VGL2, and can output light emission signals EM(1), EM(2), EM(3), ... to EM(N) respectively to the control terminal of the connected light emission transistor 160 via a buffer BUF, for example (but not limited to), so that the light emission element 140 can be turned on or off through the light emission transistor 160, but not limited to this. For example, the electronic device ED may include multiple light-emitting signal lines EL, and the second gate drive circuit 150 can transmit the output light-emitting signals EM(1), EM(2), EM(3), ... to EM(N) through the corresponding light-emitting signal lines EL to the control terminal of the light-emitting transistor 160 of the sub-pixel (e.g., sub-pixel PX1, sub-pixel PX2, or sub-pixel PX3) of each pixel PX (e.g., ...). Figure 2 (As shown). Wherein, N can be a positive integer, for example, N can be 1080 and the number of shift registers ESR can be 1080, but is not limited thereto. In some embodiments, the output signals SRO(1), SRO(2), SRO(3), ... to SRO(N-1) generated by the shift register ESR can be used, for example, as the start pulse output of the next stage shift register ESR, but is not limited thereto.

[0030] In some embodiments, the flip-chip thin film 200 may, for example, transmit AC signals such as clock signal CKE1, clock signal CKE2, start signal STE, and / or reset signal ERST to the second gate drive circuit 150 through corresponding traces (not shown), but is not limited thereto. In some embodiments, the flexible circuit board 300 may transmit DC signals such as gate high voltage VGH2 and / or gate low voltage VGL2 to the second gate drive circuit 150 through corresponding traces (not shown), but is not limited thereto. In some embodiments, such as Figure 1 As shown, the first circuit board 400 of the electronic device ED can be used to provide AC signals (such as clock signals CKE1, CKE2, start signal STE, and reset signal ERST) and transmit these AC signals to the second gate drive circuit 150 through the flip-chip film 200, but is not limited thereto. In some embodiments, the second circuit board 500 of the electronic device ED can be used to provide DC signals (such as gate high voltage VGH2 and gate low voltage VGL2) and transmit the DC signals to the second gate drive circuit 150 through the flexible circuit board 300, but is not limited thereto.

[0031] like Figure 1 and Figure 2 As shown, in some embodiments, the panel 100 of the electronic device ED may further include a test circuit 170. The test circuit 170 may be coupled, for example, to the light-emitting element 140 of the sub-pixels (e.g., sub-pixels PX1, PX2, or PX3) of each pixel PX, for testing the sub-pixels (e.g., sub-pixels PX1, PX2, or PX3) of each pixel PX. Specifically, the test circuit 170 may include multiple switching elements, such as switching elements TFT1, TFT2, and / or TFT3, which are electrically connected to the sub-pixels (e.g., sub-pixels PX1, PX2, or PX3) corresponding to each column of pixel PX. The switching elements TFT1, TFT2, and / or TFT3 may be, for example, thin-film transistors, but are not limited thereto. In some embodiments, the test circuit 170 may, for example, receive a switch control signal QVG, an on signal QR, an on signal QG, and / or an on signal QB transmitted from the flip-chip film 200. The switch control signal QVG can be transmitted, for example, to the control terminal of the switching element TFT1, the switching element TFT2, and / or the switching element TFT3 to control their on or off states. The on signal QR can be transmitted, for example, to the input terminal of the switching element TFT1, the on signal QG can be transmitted, for example, to the input terminal of the switching element TFT2, and the on signal QB can be transmitted, for example, to the input terminal of the switching element TFT3, but is not limited thereto. When the switching element TFT1 is turned on, an on signal QR can be transmitted to the red sub-pixel (e.g., sub-pixel PX1) via the corresponding or connected data line DL to control the light-emitting element 140 in the red sub-pixel (e.g., sub-pixel PX1) of the corresponding column of sub-pixels to turn on. When the switching element TFT2 is turned on, an on signal QG can be transmitted to the green sub-pixel (e.g., sub-pixel PX2) via the corresponding or connected data line DL to control the light-emitting element 140 in the green sub-pixel (e.g., sub-pixel PX2) of the corresponding column of sub-pixels to turn on. When the switching element TFT3 is turned on, an on signal QB can be transmitted to the blue sub-pixel (e.g., sub-pixel PX3) via the corresponding data line DL to control the light-emitting element 140 in the blue sub-pixel (e.g., sub-pixel PX3) of the corresponding column of sub-pixels to turn on. With the above design, the test circuit 170 can be used to test the sub-pixels in the panel 100, and after the test is completed, the test circuit 170 can be selectively turned off or removed, but is not limited thereto.

[0032] Please refer to Figure 5 and cooperate Figure 3 and Figure 4 . Figure 5 This is a schematic diagram of the architecture of an electronic device according to a second embodiment of the present invention. In some embodiments, such as... Figure 5 , Figure 3 and Figure 4 As shown, the flip-chip thin film 200 can be used to transmit the start signal STV (AC signal) to the first gate drive circuit 110. One of the multiple shift registers SR in the first gate drive circuit 110 receives the start signal STV through the start signal line 114, and this shift register SR can be closer to the flip-chip thin film 200 than the other shift registers SR. Therefore, the scan signal SCAN(1) output by the first-stage shift register SR that receives the start signal STV and its corresponding scan line SL can be closest to the flip-chip thin film 200, while the scan signal SCAN(N) output by the last-stage shift register SR and its corresponding scan line SL can be furthest from the flip-chip thin film 200, but this is not limited to the above. Alternatively, the scan signal SCAN(N) output by the last-stage shift register SR and its corresponding scan line SL can be, for example, closest to the flexible circuit board 300, but this is not limited to the above. In some embodiments, the flip-chip film 200 can be used to transmit a start signal STE to the second gate drive circuit 150, and one of the multiple shift registers ESR in the second gate drive circuit 150 receives the start signal STE via a start signal line 154, and this shift register ESR can be closer to the flip-chip film 200 than the other shift registers ESR. Therefore, the light emission signal EM(1) output by the first-stage shift register ESR that receives the start signal STE and its corresponding light emission signal line EL can be, for example, closest to the flip-chip film 200, while the light emission signal EM(N) output by the last-stage shift register ESR and its corresponding light emission signal line EL can be, for example, furthest from the flip-chip film 200, but is not limited thereto. Alternatively, the light emission signal EM(N) output by the last-stage shift register ESR and its corresponding light emission signal line EL can be closest to the flexible circuit board 300, but is not limited thereto. With the above design, the scanning method of the panel 100 of the electronic device ED in this embodiment can be performed from the closest point to the flip-chip film 200 (e.g., the lower side) to the closest point to the flexible circuit board 300 (e.g., the upper side). This bottom-to-top scanning method can be referred to as reverse scanning, for example. By making the starting end of the scan signal SCAN (1) output by the first gate drive circuit 110 close to the flip-chip film 200 used to transmit the start signal STV, the signal transmission path can be reduced, thereby improving the signal transmission efficiency or quality. In addition, by making the starting end of the light emission signal EM (1) output by the second gate drive circuit 150 close to the flip-chip film 200 used to transmit the start signal STE, the signal transmission path can be reduced, thereby improving the signal transmission efficiency or quality.

[0033] Please refer to Figure 6 and cooperate Figure 3 and Figure 4 . Figure 6 This is a schematic diagram of the architecture of an electronic device according to a third embodiment of the present invention. In some embodiments, such as... Figure 6 , Figure 3 and Figure 4 As shown, the flexible circuit board 300 can, for example, transmit the start signal STV to the first gate drive circuit 110, and one of the multiple shift registers SR in the first gate drive circuit 110 receives the start signal STV via the start signal line 114. This shift register SR can, for example, be closer to the flexible circuit board 300 than the other shift registers SR, but is not limited thereto. Therefore, the scan signal SCAN(1) output by the first-stage shift register SR that receives the start signal STV and its corresponding scan line SL can, for example, be closest to the flexible circuit board 300, while the scan signal SCAN(N) output by the last-stage shift register SR and its corresponding scan line SL can, for example, be furthest from the flexible circuit board 300, but is not limited thereto. Alternatively, the scan signal SCAN(N) output by the last-stage shift register SR and its corresponding scan line SL can be closest to the flip-chip thin film 200. In some embodiments, the flexible circuit board 300 can be used to transmit a start signal STE to the second gate drive circuit 150, and one of the multiple shift registers ESR in the second gate drive circuit 150 receives the start signal STE via a start signal line 154. This shift register ESR may be, for example, closer to the flexible circuit board 300 than the other shift registers ESR. Therefore, the light emission signal EM(1) output by the first-stage shift register ESR that receives the start signal STE and its corresponding light emission signal line EL may be, for example, closest to the flexible circuit board 300, while the light emission signal EM(N) output by the last-stage shift register ESR and its corresponding light emission signal line EL may be, for example, furthest from the flexible circuit board 300, but is not limited thereto. Alternatively, the light emission signal EM(N) output by the last-stage shift register ESR and its corresponding light emission signal line EL may be, for example, closest to the flip-chip film 200, but is not limited thereto. Through the above design, the scanning method of the panel 100 of the electronic device ED in this embodiment can be performed from the closest point to the flexible circuit board 300 (e.g., the upper side) to the closest point to the flip-chip film 200 (e.g., the lower side). This top-to-bottom scanning method can be called forward scanning. By making the starting end of the scan signal SCAN (1) output by the first gate drive circuit 110 close to the flexible circuit board 300 used to transmit the start signal STV, the signal transmission path can be reduced, thereby improving the signal transmission efficiency or quality. In addition, by making the starting end of the light emission signal EM (1) output by the second gate drive circuit 150 close to the flexible circuit board 300 used to transmit the start signal STE, the signal transmission path can be reduced, thereby improving the signal transmission efficiency or quality.

[0034] In some embodiments, such as Figure 5 or Figure 6 As shown, the two first gate drive circuits 110 located on both sides (e.g., the left and right sides) of the panel 100 can simultaneously drive the electrically connected scan lines to provide scan signals SCAN(1) to SCAN(N) line by line from both sides (e.g., the left and right sides) toward the center, but are not limited thereto. In some embodiments, the two second gate drive circuits 150 located on both sides (e.g., the left and right sides) of the panel 100 can be simultaneously driven to provide light emission signals EM(1) to EM(N) line by line from both sides (e.g., the left and right sides) toward the center, but are not limited thereto. With the above design, the scanning mode of the panel 100 of the electronic device ED can be configured as head-to-head line-by-line scanning, but is not limited thereto.

[0035] Please refer to Figure 7 . Figure 7 This is a schematic diagram of the architecture of an electronic device according to a fourth embodiment of the present invention. In some embodiments, such as... Figure 7 As shown, the two first gate drive circuits 110 located on both sides (e.g., the left and right sides) of the panel 100 can be driven independently, for example. For instance, the first gate drive circuit 110 located on the right side of the panel 100 can provide scan signals SCAN(1) to SCAN(N-1) for odd-numbered rows from right to left, while the first gate drive circuit 110 located on the left side of the panel 100 can provide scan signals SCAN(2) to SCAN(N) for even-numbered rows from left to right, but is not limited thereto. In other embodiments (not shown), for example, the first gate drive circuit 110 located on the right side of the panel 100 can provide scan signals SCAN(2) to SCAN(N) for even-numbered rows from right to left, while the first gate drive circuit 110 located on the left side of the panel 100 can provide scan signals SCAN(1) to SCAN(N-1) for odd-numbered rows from left to right, but is not limited thereto. In other embodiments (not shown), the number of scan lines connected to the first gate drive circuit 110 located on the right side of panel 100 may be the same as or different from the number of scan lines connected to the first gate drive circuit 110 located on the left side of panel 100, but is not limited thereto.

[0036] In some embodiments, the two second gate driving circuits 150 located on different sides (e.g., the left and right sides) of the panel 100 can be driven independently, for example, the second gate driving circuit 150 located on the right side of the panel 100 can provide light emission signals EM(1) to EM(N-1) from right to left, while the second gate driving circuit 150 located on the left side of the panel 100 can provide light emission signals EM(2) to EM(N) from left to right, but is not limited thereto. In other embodiments (not shown), for example, the second gate driving circuit 150 located on the right side of the panel 100 can provide light emission signals EM(2) to EM(N) from right to left, while the second gate driving circuit 150 located on the left side of the panel 100 can provide light emission signals EM(1) to EM(N-1) from left to right, but is not limited thereto. In other embodiments (not shown), the number of light-emitting signal lines connected to the second gate drive circuit 150 located on the right side of the panel 100 may be the same as or different from the number of light-emitting signal lines connected to the second gate drive circuit 150 located on the left side of the panel 100, but is not limited thereto.

[0037] Through the above design, the scanning method of the panel 100 of the electronic device ED can be configured as interlaced scanning, but is not limited to this. Furthermore, in Figure 7 In the illustrated electronic device ED, the flip-chip film 200 transmits the start signal STV to the first gate drive circuit 110 and / or transmits the start signal STE to the second gate drive circuit 150. The scanning method of the panel 100 can be, for example, from the position closest to the flip-chip film 200 (e.g., the lower side) to the position closest to the flexible circuit board 300 (e.g., the upper side), that is, the scanning method of the panel 100 is reverse scanning, but it is not limited to this. In other embodiments, the flexible circuit board 300 can also transmit the start signal STV to the first gate drive circuit 110 and / or transmit the start signal STE to the second gate drive circuit 150, and the scanning method of the panel 100 can be, for example, from the position closest to the flexible circuit board 300 (e.g., the upper side) to the position closest to the flip-chip film 200 (e.g., the lower side), that is, the scanning method of the panel 100 can be forward scanning, but it is not limited to this.

[0038] In summary, the electronic device according to the present invention provides signals through flip-chip films and / or flexible circuit boards, and the flip-chip films and / or flexible circuit boards are respectively disposed on different sides of the panel, which increases the flexibility of signal transmission and wiring configuration. Furthermore, the spatial arrangement and distribution of components in the electronic device can improve signal transmission efficiency or quality.

[0039] The above description is merely an embodiment of the present invention and is not intended to limit the invention. Those skilled in the art will recognize that the present invention can have various modifications and variations. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. An electronic device, characterized in that, include: A panel includes a first gate drive circuit, a switching transistor and a driving transistor. The output terminal of the switching transistor is coupled to the control terminal of the driving transistor. The first gate drive circuit is used to receive an AC signal and a DC signal and output a control signal to the control terminal of the switching transistor according to the AC signal and the DC signal. A flip-chip film is electrically connected to the panel. The flip-chip film is used to transmit a data signal to the input terminal of the switching transistor and to transmit the AC signal to the first gate drive circuit. as well as A flexible circuit board is electrically connected to the panel. The flexible circuit board is used to transmit a power signal to the input terminal of the driving transistor and to transmit the DC signal to the first gate drive circuit. The AC signal includes a start signal, and the first gate drive circuit includes a plurality of shift registers, one of which receives the start signal, and the one of the plurality of shift registers is closer to the flip-chip film than the other shift registers. The DC signal includes a gate high voltage and a gate low voltage, and the flexible circuit board transmits the gate high voltage and the gate low voltage to the plurality of shift registers of the first gate drive circuit.

2. The electronic device according to claim 1, characterized in that, It also includes a first circuit board electrically connected to the flip-chip film, the first circuit board being used to provide the AC signal and transmit the AC signal through the flip-chip film to the first gate drive circuit.

3. The electronic device according to claim 1, characterized in that, The flip-chip includes a driver chip for providing the data signal.

4. The electronic device according to claim 1, characterized in that, It also includes a second circuit board electrically connected to the flexible circuit board, the second circuit board being used to provide the power signal and transmit the power signal through the flexible circuit board to the input terminal of the driving transistor.

5. The electronic device according to claim 1, characterized in that, The flip-chip film and the flexible circuit board are respectively disposed on opposite sides of the panel.

6. The electronic device according to claim 1, characterized in that, The panel also includes a light-emitting element, the output of which is coupled to the light-emitting element so that the light-emitting element receives the power signal transmitted from the flexible circuit board.

7. The electronic device according to claim 6, characterized in that, The panel also includes a second gate drive circuit and a light-emitting transistor. The output terminal of the drive transistor is coupled to the input terminal of the light-emitting transistor, and the output terminal of the light-emitting transistor is coupled to the light-emitting element. The second gate drive circuit is used to receive another AC signal and another DC signal and output another control signal to the control terminal of the light-emitting transistor according to the other AC signal and the other DC signal.

8. The electronic device according to claim 7, characterized in that, The flip-chip film transmits another AC signal to the second gate drive circuit, and the flexible circuit board transmits another DC signal to the second gate drive circuit.

Citation Information

Patent Citations

  • Organic light emitting display device

    CN105742312A