A non-isolated soft-switching interleaved parallel bidirectional DC-DC converter and a modulation method thereof

Abstract

The application provides a non-isolated soft-switching interleaved parallel bidirectional DC-DC converter and a modulation method thereof, which comprises a direct-current voltage source V H , a direct-current voltage source V L , a main circuit, an auxiliary circuit and a resonance voltage spike elimination circuit, wherein: the main circuit is composed of two-way interleaved parallel bidirectional DC-DC circuits, and the two ends of the main circuit are connected with the direct-current voltage source V H and the direct-current voltage source V L , forming parallel connection in the topological structure; the auxiliary circuit is connected with the main circuit and is shared by the two-way interleaved parallel bidirectional DC-DC circuits, and is used for realizing soft-switching operation of the switch tubes in the main circuit and the switch tubes in the auxiliary circuit; the resonance voltage spike elimination circuit is connected with the auxiliary circuit, and is used for inhibiting parasitic resonance and reducing the additional voltage stress at the two ends of the switch tubes in the auxiliary circuit. The auxiliary circuit is shared by the two main circuits, the number of additional components introduced is small, the structure is simple, and the soft-switching of all the switch tubes can be realized in a wide gain range and a wide load range, so that the working efficiency of the converter is improved.

Description

Technical Field

[0001] This invention relates to the field of switching power supply technology, and in particular to a non-isolated soft-switching interleaved parallel bidirectional DC-DC converter and its modulation method. Background Technology

[0002] With the development of power electronics and power supply technology, higher efficiency power supplies have become an inevitable requirement. With the rapid development of systems with energy storage components, such as uninterruptible power supplies, hybrid and electric vehicles, renewable energy generation, supercapacitors or battery balancing systems, and DC microgrids, bidirectional DC-DC converters are widely researched and applied to manage power flow and matching voltage. To reduce input and output current ripple and improve power handling capacity, converters consisting of two identical bidirectional DC-DC converters connected in parallel and employing interleaved operating modes have been proposed.

[0003] Bidirectional DC-DC converters are generally classified into isolated and non-isolated topologies. In some applications, isolated topologies are unnecessary because they increase converter size, cost, and losses, and introduce slow dynamic response. Non-isolated topologies, due to their simpler structure and control, are widely used in energy storage systems. To reduce the size and cost of passive components and achieve higher power density, bidirectional DC-DC converters typically operate at high frequencies. However, as the switching frequency increases, switching losses and electromagnetic interference also increase, reducing converter efficiency. Furthermore, interleaved bidirectional DC-DC converters operate under hard-switching conditions, leading to severe electromagnetic noise and significant switching and reverse recovery losses. To address these issues, soft-switching techniques characterized by zero-voltage switching (ZVS) and zero-current switching (ZCS) have been proposed and widely adopted in interleaved bidirectional DC-DC converters. The delta current mode or critical conduction mode of a single converter is also suitable for interleaved converters, but current ripple is inevitably high, requiring precise current control.

[0004] To overcome the aforementioned drawbacks, interleaved converters with additional soft-switching circuitry can achieve ZVS or ZCS in continuous conduction mode (CCM) over a wide load range. While directly applying the auxiliary circuitry of a single converter to an interleaved converter is straightforward, it requires numerous auxiliary components. Therefore, a method using simple and shareable auxiliary circuitry for soft switching is more attractive. However, in existing technologies, auxiliary inductors or LC resonant networks are directly connected to the two switching nodes of the interleaved boost converter, making it difficult to strike a good balance between soft-switching range and current stress. Using auxiliary circuitry based on the active clamping concept can achieve sharing and a wide soft-switching range, but this comes at the cost of excessive voltage and current stress, leading to high conduction losses and requiring large-size auxiliary inductors. Summary of the Invention

[0005] In view of the above-mentioned shortcomings of the prior art, the present invention provides a non-isolated soft-switching interleaved parallel bidirectional DC-DC converter and its modulation method, which effectively solves the reverse recovery loss caused by the freewheeling of the body diode of the switching transistor in the converter circuit under bidirectional power flow conditions and the resulting excessive turn-on loss of the switching transistor, and realizes the soft-switching operation of the switching transistor in the main circuit and the switching transistor in the auxiliary circuit.

[0006] In a first aspect, the present invention provides a non-isolated soft-switching interleaved parallel bidirectional DC-DC converter, comprising: a DC voltage source V H DC voltage source V L The circuit consists of a main circuit, an auxiliary circuit, and a resonant voltage spike cancellation circuit, among which:

[0007] The main circuit consists of two interleaved parallel bidirectional DC-DC circuits, divided into an upper bidirectional DC-DC circuit and a lower bidirectional DC-DC circuit. The two ends of the main circuit are respectively connected to the DC voltage source V. H and DC voltage source V L This forms a parallel topological structure;

[0008] The auxiliary circuit is connected to the main circuit and is shared by the upper bidirectional DC-DC circuit and the lower bidirectional DC-DC circuit. It is used to realize the soft switching operation of the switching transistors in the main circuit and the switching transistors in the auxiliary circuit.

[0009] The resonant voltage spike elimination circuit is connected to the auxiliary circuit to suppress parasitic resonance and reduce the additional voltage stress across the switching transistor in the auxiliary circuit.

[0010] Preferably, the main circuit includes an upper bidirectional DC-DC circuit and a lower bidirectional DC-DC circuit. The upper bidirectional DC-DC circuit consists of switching transistors Q1 and Q2 and an inductor L1, and the lower bidirectional DC-DC circuit consists of switching transistors Q3 and Q4 and an inductor L2, wherein:

[0011] The source of the switching transistor Q1 is connected to the drain of the switching transistor Q2 and one end of the inductor L1, respectively. The drain of the switching transistor Q1 is connected to the drain of the switching transistor Q3, and together they are connected to the DC voltage source V. H The positive terminal of the switch Q3 is connected to the drain of the switch Q4 and one end of the inductor L2, respectively. The source of the switch Q4 is connected to the source of the switch Q2 and together they are connected to the DC voltage source V. H The negative terminal of inductor L2 is connected to the other end of inductor L1, and both are connected to the DC voltage source V. L The positive pole.

[0012] Preferably, the inductance of inductor L1 and inductor L2 are equal.

[0013] Preferably, the switching transistors Q1 and Q2 are driven by a set of complementary signals containing dead time, and the switching transistors Q3 and Q4 are driven by another set of complementary signals containing dead time. The waveforms of the switching transistors Q1 and Q3 are the same but 180° out of phase in time, and the waveforms of the switching transistors Q2 and Q4 are the same but 180° out of phase in time, forming an interleaved operating mode.

[0014] Preferably, the auxiliary circuit consists of a switching transistor Q. r1 Switching transistor Q r2 Inductor L r and capacitor C a Composition, in which:

[0015] The switching transistor Q r1 The drain of the inductor L is connected r One end of the inductor L r The other end is connected to the switching transistor Q. r2 The drain of the switching transistor Q r2 The source of the capacitor C is connected to the capacitor C. a One end of the capacitor is connected to the common connection point of the switching transistor Q3 and the inductor L2 in the main circuit. a The other end is connected to the switching transistor Q. r1 The sources of the transistors are connected together to the common connection point of the switching transistor Q1 and the inductor L1 in the main circuit.

[0016] Preferably, the resonant voltage spike cancellation circuit consists of diode D. r1 and diode D r2 Composition, in which:

[0017] The diode D r1 The anode of the switch Q in the auxiliary circuit is connected. r1 The source of the diode D r2 The anode of the switch Q in the auxiliary circuit is connected. r2 and inductor L r The common connection point of the diode D r2 The cathode is connected to the diode D r1 The cathodes are connected together to the DC voltage source V. H The positive pole.

[0018] Preferably, the DC voltage source V H The voltage is greater than that of the DC voltage source V. L The voltage.

[0019] Preferably, the switching transistors of the main circuit and the auxiliary circuit are MOSFET and / or IGBT devices.

[0020] Preferably, the ratio of the conduction time of the switching transistors Q1 and Q3 to the switching cycle is defined as the duty cycle D, where:

[0021] When D > 0.5, the switching transistor Q r1 The turn-on time of the switch Q1 is preceded by a time interval ΔT. r1 The turn-off time of the switch is delayed by the same time ΔT as the turn-off time of the switch Q1; at the same time, the turn-off time of the switch Q... r2 The turn-on time of the switch Q is earlier than the turn-on time of the switch Q3 by a period of time ΔT. r2 The turn-off time lags behind the turn-off time of the switch Q3 by the same time ΔT;

[0022] When D≤0.5, the switching transistor Q r1 The turn-on time of the switch Q3 precedes the turn-off time of the switch Q by a period of time ΔT. r1 The turn-off time lags behind the turn-on time of the switch Q3 by the same time ΔT; simultaneously, the switch Q... r2 The turn-on time of the switch Q1 precedes the turn-off time of the switch Q by a period of time ΔT. r2The turn-off time lags behind the turn-on time of the switch Q1 by the same time ΔT. Secondly, the present invention also provides a modulation method for a non-isolated soft-switching interleaved parallel bidirectional DC-DC converter according to the first aspect of the present invention, characterized in that when D>0.5, the operating mode includes:

[0023] During the t0~t1 stage: At time t0, the switching transistor Q1 is turned off, and the capacitor C... a With parallel inductor L r Resonance with inductor L1, the inductor L r The current difference between inductor L1 and inductor L2 is i Lr -i L1 The inductor L r The difference current between the inductor L1 and the capacitor C flows along the capacitor C. a The capacitor C flows in the opposite direction to the reference direction. a The capacitor C a The voltage across the capacitor C begins to slowly change from zero to negative during the turn-off transient of the switch Q1. a As the voltage changes, the switch Q1 achieves near-zero voltage switching turn-off, while the switch Q3 remains on during the t0 to t1 phase, making the voltage applied to the inductor L2 V. H -V L The current in the inductor L2 increases linearly;

[0024] During the t1 to t2 phase: At time t1, the body diode of the switching transistor Q2 is forward biased and naturally conducts, and the current flowing through the switching transistor Q2 is equal to the current flowing through the inductor L. r The difference current i between inductor L1 and inductor L1 Lr -i L1 During the t1 to t2 phase, the switching transistor Q2 can be turned on under zero voltage conditions, applied to the inductor L1 and the inductor L2. r The voltages on are -V L and V H The current in the inductor L1 decreases linearly, while the current in the inductor L... r The current tilts towards zero;

[0025] t2~t3 stage: At time t2, the current flowing through the inductor L r The current is exactly zero, in order to prevent the inductor L r The current continues to rise from zero, and the switching transistor Q... r1 The switch Q must be turned off before time t2, in which case the switch Q... r1 Zero-current turn-off was achieved, and then the inductor L r The current remains zero. During the t2 to t3 stage, the auxiliary circuit no longer participates in the operation of the main topology, and the converter is equivalent to the corresponding traditional interleaved bidirectional DC-DC converter.

[0026] t3~t4 stage: At time t3, the switching transistor Q r1 When the inductor L is turned on, r The current immediately flows at a constant slope V H / L r Starting from zero, during the conduction transient, the current flows through the switch Q. r1 The current of the switching transistor Q is slightly greater than zero. r1 Near-zero current conduction;

[0027] t4~t5 stage: At time t4, the switch Q2 is turned off, and the capacitor C a With the inductor L1 and the inductor L r Parallel resonance, the inductor L r The difference current i between inductor L1 and inductor L1 Lr -i L1 Along the capacitor C a The capacitor C flows in the opposite direction to the reference direction. a The capacitor C a Voltage from -V H The voltage increases slowly towards zero, and during the turn-off transient, the voltage change approaches zero due to the capacitance C. a The clamping function of the switch Q2 enables near-zero voltage turn-off;

[0028] t5~t6 stage: At time t5, the capacitor C a The voltage is equal to the forward voltage drop of the body diode of the switching transistor Q1, so the body diode of the switching transistor Q1 is naturally turned on, and the inductor L... r The difference current i between inductor L1 and inductor L1 Lr -i L1 The body diode of the switch Q1 flows through the switch Q1, enabling the switch Q1 to achieve zero-voltage conduction. During the t5 to t6 stage, the voltage applied to the inductor L... r The voltages across inductor L1 are 0 and V, respectively. H -V L The inductor L r The current in L1 remains constant, while the current in inductor L1 increases uniformly.

[0029] The t6~t0 phase: There are also 6 phases in the second half of the cycle, namely: t6~t7 phase, t7~t8 phase, t8~t9 phase, t9~t 10 stage, t 10 ~t 11 stage and t 11During the ~t0 stage, due to the symmetry between the upper and lower bidirectional DC-DC circuits of the interleaved topology, the six stages of the second half of the cycle operate on the same principle as the six stages of the first half of the cycle, and the modulation operation is symmetrical.

[0030] When D≤0.5, the operating modes include:

[0031] During the t0~t1 stage: at time t0, the body diode of the switching transistor Q2 is forward biased and turned on, and the inductor L... r The difference current i between inductor L1 and inductor L1 Lr -i L1 The body diode of the switch Q2 flows through it, enabling the switch Q2 to achieve zero-voltage conduction. This is due to the inductor L... r The voltage across the inductor L is always zero, thus preserving the stored energy. r The current remains unchanged, and the inductors L1 and L2 are demagnetized and release energy to the load;

[0032] During the t1 to t2 phase: At time t1, the switch Q4 is turned off, and the current i in the inductor L2... L2 Add the aforementioned inductor L r current i Lr Immediately flows through the capacitor C a The capacitor C a Inductor L2 and inductor L r Resonance begins due to the inductance L r current i Lr It is actually negative, and -i Lr Higher than i L2 The capacitor C a Residual current -i Lr -i L2 Reverse charging causes the capacitor C to... a The voltage slowly changes from zero to negative, and the rate of change of the drain-source voltage of the switch Q4 is significantly reduced, ensuring that the switch Q4 switches at near zero voltage during the turn-off transient.

[0033] t2~t3 stage: At time t2, when the capacitor C a The negative voltage is slightly less than -V H At that time, the body diode of the switching transistor Q3 is forward biased, and the current i of the inductor L2 is... L2 and the inductor L r current i Lr All current flows through the body diode of the switching transistor Q3, and then the switching transistor Q3 achieves zero-voltage conduction. During the t2 to t3 stage, the inductor L2 is subjected to a positive voltage V. H -V LExcitation, causing the current i in the inductor L2 to... L2 The inductance L increases linearly. r current i Lr It gradually approaches zero with a constant positive slope;

[0034] t3~t4 stage: At time t3, the inductor L r current i Lr The value drops to zero and the switching transistor Q r1 Disconnection achieves zero-current turn-off, and the converter in this stage is equivalent to the corresponding traditional interleaved bidirectional DC-DC converter.

[0035] t4~t5 stage: At time t4, the switching transistor Q r1 When activated, the inductor L r current i Lr and the current i of the inductor L2 L2 All flows through the switching transistor Q3, the switching transistor Q r1 Due to the inductance L r The connection achieves near-zero current conduction, and the inductor L r current i Lr With a constant slope V H / L r Incrementing from zero;

[0036] During the t5-t6 phase: At time t5, the gate drive signal of the switch Q3 goes low, and the current through the switch Q3 drops rapidly to zero. During the turn-off transient, the remaining current flows to the capacitor C. a The voltage across its terminals remains unchanged for a short period, and the switch Q3 achieves zero-voltage conduction. After the transient, the current i of the inductor L2... L2 Add the aforementioned inductor L r current i Lr Immediately flows through the capacitor C a The capacitor C a Inductor L2 and inductor L r Resonance occurs, and the capacitor C a The voltage continuously increases toward zero in a resonant manner;

[0037] The t6~t0 phase: There are also 6 phases in the second half of the cycle, namely: t6~t7 phase, t7~t8 phase, t8~t9 phase, t9~t 10 stage, t 10 ~t 11 stage and t 11During the ~t0 stage, due to the symmetry between the upper and lower bidirectional DC-DC circuits of the interleaved topology, the six stages of the second half of the cycle operate on the same principle as the six stages of the first half of the cycle, and the modulation operation is symmetrical.

[0038] This invention provides a non-isolated soft-switching interleaved parallel bidirectional DC-DC converter and its modulation method. Both main switches can achieve zero-voltage turn-on and eliminate reverse recovery losses caused by the freewheeling current of the main switch body diodes. Due to capacitor C... a The clamping effect enables near-zero voltage turn-off of the main switch. The auxiliary switch and auxiliary inductor L... r In a series connection, due to the continuity of the inductor current, the current flowing through the switch is approximately zero at the instant the auxiliary switch is turned on, which is called near-zero current turn-on. The auxiliary switch turns off when the current flowing through it naturally drops to zero, thus avoiding the crossing of the voltage and current waveforms of the auxiliary switch and achieving zero current turn-off.

[0039] Compared with passive soft-switching circuits, this invention offers flexible control and easy soft-switching implementation over a wide range. Compared with soft-switching auxiliary circuits based on coupled inductors, this invention does not require complex manufacturing processes. Compared with soft-switching auxiliary circuits based on active clamping, this invention does not suffer from the problem of shortened equivalent duty cycle. Furthermore, the auxiliary circuit of this invention is shared by two main circuits, requiring fewer additional components, resulting in a simple structure. It can also achieve soft switching of all switching transistors over a wide gain and load range. Attached Figure Description

[0040] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0041] Figure 1 This is a schematic diagram of a non-isolated soft-switching interleaved parallel bidirectional DC-DC converter circuit according to an embodiment of the present invention;

[0042] Figure 2 The theoretical waveforms of each operating mode of the non-isolated soft-switching interleaved parallel bidirectional DC-DC converter in this embodiment of the invention under the condition of D>0.5;

[0043] Figure 3 This is a schematic diagram of the circuit control for the t0~t1 and t4~t5 stages under the condition D>0.5 in the modulation method of this invention embodiment;

[0044] Figure 4This is a schematic diagram of the circuit control for stages t1-t2 and t3-t4 under the condition D>0.5 in the modulation method of this embodiment of the invention.

[0045] Figure 5 This is a schematic diagram of the circuit control during the t2 to t3 stage under the condition that D>0.5 in the modulation method of this invention embodiment;

[0046] Figure 6 This is a schematic diagram of the circuit control during the t5 to t6 stage under the condition that D>0.5 in the modulation method of this invention embodiment;

[0047] Figure 7 The theoretical waveforms of each operating mode of the non-isolated soft-switching interleaved parallel bidirectional DC-DC converter in this embodiment of the invention under the condition of D≤0.5.

[0048] Figure 8 This is a schematic diagram of the circuit control during the t0 to t1 stage under the condition that D≤0.5 in the modulation method of this embodiment of the invention;

[0049] Figure 9 This is a schematic diagram of the circuit control for stages t1 to t2 and t5 to t6 under the condition D≤0.5 in the modulation method of this embodiment of the invention.

[0050] Figure 10 This is a schematic diagram of the circuit control for stages t2 to t3 and t4 to t5 under the condition D≤0.5 in the modulation method of this embodiment of the invention.

[0051] Figure 11 A schematic diagram of circuit control for stage t3 to t4 under the condition D≤0.5 in the modulation method of this embodiment of the invention.

[0052] Figure 12 This is a schematic diagram illustrating the principle of parasitic resonance suppression in a non-isolated soft-switching interleaved parallel bidirectional DC-DC converter according to an embodiment of the present invention.

[0053] Figure 13 The experimental waveform of switch Q1 in the non-isolated soft-switching interleaved parallel bidirectional DC-DC converter of this embodiment of the invention;

[0054] Figure 14 The experimental waveform of switch Q2 in the non-isolated soft-switching interleaved parallel bidirectional DC-DC converter of this embodiment of the invention;

[0055] Figure 15 In the non-isolated soft-switching interleaved parallel bidirectional DC-DC converter of this embodiment of the invention, the switching transistor Q r1 The experimental waveform. Detailed Implementation

[0056] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be further described clearly and completely below with reference to the accompanying drawings of the embodiments of this invention. It should be noted that the described embodiments are merely some embodiments of this invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0057] The terms "first" and "second" used in the embodiments of this application are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a system, product, or device that includes a series of components or units is not limited to the listed components or units, but may optionally include unlisted components or units, or may optionally include other components or units inherent to such products or devices. In the description of this application, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0058] Figure 1 This is a schematic diagram of a non-isolated soft-switching interleaved parallel bidirectional DC-DC converter circuit according to an embodiment of the present invention, as shown below. Figure 1 As shown, the converter includes: a DC voltage source V H DC voltage source V L The circuit consists of a main circuit, an auxiliary circuit, and a resonant voltage spike cancellation circuit, among which:

[0059] DC voltage source V H The voltage is greater than that of the DC voltage source V. L The voltage;

[0060] The main circuit consists of two interleaved parallel bidirectional DC-DC circuits, divided into an upper bidirectional DC-DC circuit and a lower bidirectional DC-DC circuit. The two ends of the main circuit are respectively connected to the DC voltage source V. H and DC voltage source V L This forms a parallel topological structure;

[0061] The main circuit includes an upper bidirectional DC-DC circuit and a lower bidirectional DC-DC circuit. The upper bidirectional DC-DC circuit consists of switching transistors Q1 and Q2 and inductor L1, while the lower bidirectional DC-DC circuit consists of switching transistors Q3 and Q4 and inductor L2.

[0062] The source of the switching transistor Q1 is connected to the drain of the switching transistor Q2 and one end of the inductor L1, respectively. The drain of the switching transistor Q1 is connected to the drain of the switching transistor Q3, and together they are connected to the DC voltage source V. H The positive terminal of the switch Q3 is connected to the drain of the switch Q4 and one end of the inductor L2, respectively. The source of the switch Q4 is connected to the source of the switch Q2 and together they are connected to the DC voltage source V. H The negative terminal of inductor L2 is connected to the other end of inductor L1, and both are connected to the DC voltage source V. L The positive pole.

[0063] In the main circuit, the switching transistors Q1 to Q4 are MOSFETs or IGBTs made of the same type of silicon, silicon carbide, gallium nitride, etc. The inductors L1 and L2 have the same inductance and are equal to L. Switches Q1 and Q2 are driven by a set of complementary signals containing dead time, and switches Q3 and Q4 are driven by another set of complementary signals containing dead time. The waveforms of switches Q1 and Q3 are the same, but they are 180° out of phase by half a switching cycle. The waveforms of switches Q2 and Q4 are the same, but they are 180° out of phase by half a switching cycle, forming an interleaved operating mode.

[0064] The auxiliary circuit is connected to the main circuit and is shared by the upper bidirectional DC-DC circuit and the lower bidirectional DC-DC circuit. It is used to realize the soft switching operation of the switching transistors in the main circuit and the switching transistors in the auxiliary circuit.

[0065] The auxiliary circuit consists of the switching transistor Q. r1 Switching transistor Q r2 Inductor L r and capacitor C a Composition, in which:

[0066] The switching transistor Q r1 The drain of the inductor L is connected r One end of the inductor L r The other end is connected to the switching transistor Q. r2 The drain of the switching transistor Q r2 The source of the capacitor C is connected to the capacitor C. a One end of the capacitor is connected to the common connection point of the switching transistor Q3 and the inductor L2 in the main circuit. a The other end is connected to the switching transistor Q. r1 The sources of both transistors are connected to the common connection point of the switching transistor Q1 and inductor L1 in the main circuit. r1 With the common source of the switching transistor Q1, the switching transistor Q r2By sharing the same source with the switching transistor Q2, the high-end floating drive power supply is realized. At the same time, the auxiliary circuit and the resonant voltage spike elimination circuit are shared by the upper and lower halves of the DC-DC circuit of the main circuit.

[0067] Switch Q in the auxiliary circuit r1 Q r2 All can be MOSFETs or IGBTs made of materials such as silicon, silicon carbide, and gallium nitride.

[0068] The resonant voltage spike elimination circuit is connected to the auxiliary circuit to suppress parasitic resonance and reduce the additional voltage stress across the switching transistor in the auxiliary circuit.

[0069] The resonant voltage spike cancellation circuit consists of diode D r1 and diode D r2 Composition, diode D r1 D r2 Ordinary low-power diodes can be used, among which:

[0070] The diode D r1 The anode of the switch Q in the auxiliary circuit is connected. r1 The source of the diode D r2 The anode of the switch Q in the auxiliary circuit is connected. r2 and inductor L r The common connection point of the diode D r2 The cathode is connected to the diode D r1 The cathodes are connected together to the DC voltage source V. H The positive pole.

[0071] In this embodiment of the invention, the ratio of the conduction time of the switching transistors Q1 and Q3 to the switching period is defined as the duty cycle D, wherein:

[0072] When D > 0.5, the switching transistor Q r1 The turn-on time of the switch Q1 is preceded by a time interval ΔT. r1 The turn-off time of the switch is delayed by the same time ΔT as the turn-off time of the switch Q1; at the same time, the turn-off time of the switch Q... r2 The turn-on time of the switch Q is earlier than the turn-on time of the switch Q3 by a period of time ΔT. r2 The turn-off time lags behind the turn-off time of the switch Q3 by the same time ΔT;

[0073] When D≤0.5, the switching transistor Q r1 The turn-on time of the switch Q3 precedes the turn-off time of the switch Q by a period of time ΔT. r1The turn-off time lags behind the turn-on time of the switch Q3 by the same time ΔT; simultaneously, the switch Q... r2 The turn-on time of the switch Q1 precedes the turn-off time of the switch Q by a period of time ΔT. r2 The turn-off time lags behind the turn-on time of the switch Q1 by the same time ΔT.

[0074] Based on the above embodiments, this invention also provides a modulation method based on the non-isolated soft-switching interleaved parallel bidirectional DC-DC converter, which includes 12 operating modes under both D>0.5 and D≤0.5 conditions. Due to the symmetry of the topology, the first 6 operating modes are similar to the last 6 operating modes.

[0075] Figure 2 The theoretical waveforms of the non-isolated soft-switching interleaved parallel bidirectional DC-DC converter in this embodiment of the invention are shown for each operating mode under the condition of D>0.5. Figure 2 As shown, when D>0.5, the operating modes include:

[0076] During the t0~t1 stage: At time t0, the switching transistor Q1 is turned off, and the capacitor C... a With parallel inductor L r Resonance with inductor L1, the inductor L r The current difference between inductor L1 and inductor L2 is i Lr -i L1 The inductor L r The difference current between the inductor L1 and the capacitor C flows along the capacitor C. a The capacitor C flows in the opposite direction to the reference direction. a The capacitor C a The voltage across the capacitor C begins to slowly change from zero to negative during the turn-off transient of the switch Q1. a As the voltage changes, the switch Q1 achieves near-zero voltage switching turn-off, while the switch Q3 remains on during the t0 to t1 phase, making the voltage applied to the inductor L2 V. H -V L The current in the inductor L2 increases linearly, and the equivalent circuit for the t0 to t1 stage is as follows: Figure 3 As shown.

[0077]

[0078]

[0079]

[0080] i L2 (t)=i L2 (t0)+(V H -VL (t-t0) / L2 (4)

[0081]

[0082] During the t1 to t2 phase: At time t1, the body diode of the switching transistor Q2 is forward biased and naturally conducts, and the current flowing through the switching transistor Q2 is equal to the current flowing through the inductor L. r The difference current i between inductor L1 and inductor L1 Lr -i L1 During the t1 to t2 phase, the switching transistor Q2 can be turned on under zero voltage conditions, applied to the inductor L1 and the inductor L2. r The voltages on are -V L and V H The current in the inductor L1 decreases linearly, while the current in the inductor L... r The current tilts towards zero, and the equivalent circuit for the t1 to t2 stage is as follows: Figure 4 As shown.

[0083] i L1 (t)=i L1 (t1)-V L (t-t1) / L1 (6)

[0084] i Lr (t)=i Lr (t1)+V H (t-t1) / L r (7)

[0085] t2~t3 stage: At time t2, the current flowing through the inductor L r The current is exactly zero, in order to prevent the inductor L r The current continues to rise from zero, and the switching transistor Q... r1 The switch Q must be turned off before time t2, in which case the switch Q... r1 Zero current turn-off was achieved, and then the inductor L r The current remains zero. During the t2 to t3 phase, the auxiliary circuit no longer participates in the operation of the main topology. The converter is equivalent to the corresponding traditional interleaved bidirectional DC-DC converter. The equivalent circuit for the t2 to t3 phase is as follows: Figure 5 As shown.

[0086] t3~t4 stage: At time t3, the switching transistor Q r1 When the inductor L is turned on, r The current immediately flows at a constant slope V H / L r Starting from zero, during the conduction transient, the current flows through the switch Q. r1 The current of the switching transistor Q is slightly greater than zero. r1Near-zero current conduction, the equivalent circuit for the t3 to t4 stage is as follows: Figure 4 As shown.

[0087] t4~t5 stage: At time t4, the switch Q2 is turned off, and the capacitor C a With the inductor L1 and the inductor L r Parallel resonance, the inductor L r The difference current i between inductor L1 and inductor L1 Lr -i L1 Along the capacitor C a The capacitor C flows in the opposite direction to the reference direction. a The capacitor C a Voltage from -V H The voltage increases slowly towards zero, and during the turn-off transient, the voltage change approaches zero due to the capacitance C. a The clamping function of the switch Q2 achieves near-zero voltage turn-off, similar to the situation in the t0-t1 stage. The equivalent circuit in the t4-t5 stage is as follows: Figure 3 As shown.

[0088]

[0089]

[0090]

[0091] t5~t6 stage: At time t5, the capacitor C a The voltage is equal to the forward voltage drop of the body diode of the switching transistor Q1, so the body diode of the switching transistor Q1 is naturally turned on, and the inductor L... r The difference current i between inductor L1 and inductor L1 Lr -i L1 The body diode of the switch Q1 flows through the switch Q1, enabling the switch Q1 to achieve zero-voltage conduction. During the t5 to t6 stage, the voltage applied to the inductor L... r The voltages across inductor L1 are 0 and V, respectively. H -V L The inductor L r The current remains constant, while the current in inductor L1 increases uniformly. The equivalent circuit for the t5-t6 stage is as follows: Figure 6 As shown.

[0092] i L1 (t)=i L1 (t5)+(V H -V L (t-t5) / L1 (12)

[0093] The t6~t0 phase: There are also 6 phases in the second half of the cycle, namely: t6~t7 phase, t7~t8 phase, t8~t9 phase, t9~t 10 stage, t 10 ~t 11 stage and t 11 During the ~t0 stage, due to the symmetry between the upper and lower bidirectional DC-DC circuits of the interleaved topology, the six stages of the second half of the cycle operate on the same principle as the six stages of the first half of the cycle, and the modulation operation is symmetrical.

[0094] Figure 7 The theoretical waveforms of the non-isolated soft-switching interleaved parallel bidirectional DC-DC converter in this embodiment of the invention are shown for each operating mode under the condition of D≤0.5. Figure 7 As shown, when D≤0.5, the operating modes include:

[0095] During the t0~t1 stage: at time t0, the body diode of the switching transistor Q2 is forward biased and turned on, and the inductor L... r The difference current i between inductor L1 and inductor L1 Lr -i L1 The body diode of the switch Q2 flows through it, enabling the switch Q2 to achieve zero-voltage conduction. This is due to the inductor L... r The voltage across the inductor L is always zero, and the stored energy is retained. r The current remains constant. Inductors L1 and L2 are demagnetized and release energy to the load. The equivalent circuit for the t0 to t1 stage is as follows: Figure 8 As shown.

[0096] i L1 (t)=i L1 (t0)-(t-t0)V L / L1 (13)

[0097] i L2 (t)=i L2 (t0)-(t-t0)V L / L2 (14)

[0098] i Lr (t)=i Lr (t0) (15)

[0099] During the t1 to t2 phase: At time t1, the switch Q4 is turned off, and the current i in the inductor L2... L2 Add the aforementioned inductor L r current i Lr Immediately flows through the capacitor C a The capacitor C a Inductor L2 and inductor L rResonance begins due to the inductance L r current i Lr It is actually negative, and -i Lr Higher than i L2 The capacitor C a Residual current -i Lr -i L2 Reverse charging causes the capacitor C to... a The voltage gradually decreases from zero to negative, and the rate of change of the drain-source voltage of the switch Q4 is significantly reduced, ensuring near-zero voltage switching of the switch Q4 during the turn-off transient. The equivalent circuit for the t1-t2 stage is as follows: Figure 9 As shown.

[0100]

[0101]

[0102]

[0103]

[0104] t2~t3 stage: At time t2, when the capacitor C a The negative voltage is slightly less than -V H At that time, the body diode of the switching transistor Q3 is forward biased, and the current i of the inductor L2 is... L2 and the inductor L r current i Lr All current flows through the body diode of the switching transistor Q3, and then the switching transistor Q3 achieves zero-voltage conduction. During the t2 to t3 stage, the inductor L2 is subjected to a positive voltage V. H -V L Excitation, causing the current i in the inductor L2 to... L2 The inductance L increases linearly. r current i Lr The equivalent circuit in the t2-t3 stage gradually approaches zero with a constant positive slope, as shown below. Figure 10 As shown.

[0105] i L2 (t)=i L2 (t2)+(t-t2)(V H -V L ) / L2 (20)

[0106] i Lr (t)=i Lr (t2)+V H (t-t2) / L r (twenty one)

[0107] t3~t4 stage: At time t3, the inductor L r current i Lr The value drops to zero and the switching transistor Q r1 The circuit is disconnected, thus achieving zero-current turn-off. The converter in this stage is equivalent to a traditional interleaved bidirectional DC-DC converter. The equivalent circuit for stages t3 to t4 is as follows: Figure 11 As shown.

[0108] t4~t5 stage: At time t4, the switching transistor Q r1 When activated, the inductor L r current i Lr and the current i of the inductor L2 L2 All flows through the switching transistor Q3, the switching transistor Q r1 Due to the inductance L r The connection achieves near-zero current conduction, and the inductor L r current i Lr With a constant slope V H / L r Increasing from zero upwards, the equivalent circuit for the t4 to t5 stage is as follows: Figure 10 As shown.

[0109] i Lr (t)=V H (t-t4) / L r (twenty two)

[0110] During the t5-t6 phase: At time t5, the gate drive signal of the switch Q3 goes low, and the current through the switch Q3 drops rapidly to zero. During the turn-off transient, the remaining current flows to the capacitor C. a The voltage across its terminals remains unchanged for a short period, and the switch Q3 achieves zero-voltage conduction. After the transient, the current i of the inductor L2... L2 Add the aforementioned inductor L r current i Lr Immediately flows through the capacitor C a The capacitor C a Inductor L2 and inductor L r Resonance occurs, and the capacitor C a The voltage increases towards zero in a resonant manner. The equivalent circuit for the t4 to t5 stage is as follows: Figure 9 As shown.

[0111]

[0112]

[0113]

[0114] The t6~t0 phase: There are also 6 phases in the second half of the cycle, namely: t6~t7 phase, t7~t8 phase, t8~t9 phase, t9~t 10 stage, t 10 ~t 11 stage and t 11 During the ~t0 stage, due to the symmetry between the upper and lower bidirectional DC-DC circuits of the interleaved topology, the six stages of the second half of the cycle operate on the same principle as the six stages of the first half of the cycle, and the modulation operation is symmetrical.

[0115] As mentioned above, the output capacitor of the switching transistor in the auxiliary circuit is not considered because it has almost no effect on the soft-switching condition of the main switch (assuming Q). r1 Q r2 The output capacitors are C ossr1 C ossr2 However, these components can cause additional voltage stress on the switching transistors in the auxiliary circuit, and this voltage stress increases with the increase of capacitance. According to the device datasheet, the output capacitance is non-linear and very high at low drain-source voltages. Therefore, the resonance duration is long and the amplitude is high, making it necessary to take measures to suppress parasitic resonance.

[0116] Due to inductance L r It is a thousand times larger than the output capacitor of the switching transistor in the auxiliary circuit. The theoretical maximum voltage across the switching transistor in the auxiliary circuit is approximately 2V. H This excessively increases the stress. More seriously, since the output capacitance is inversely proportional to the square root of the drain-source voltage, its maximum value is far higher than 2V. H Stray resistance is the only damping that forces the resonance to decay; therefore, the resonance will last for a long time, and the switching transistors in the auxiliary circuit will experience severe voltage overshoot.

[0117] To avoid additional voltage stress across the switching transistor in the auxiliary circuit, two diodes D were added. r1 and D r2 To construct a resonant voltage spike cancellation circuit. Figure 12 This is a schematic diagram illustrating the parasitic resonance suppression principle of a non-isolated soft-switching interleaved parallel bidirectional DC-DC converter according to an embodiment of the present invention. Figure 12 As shown, with D r1 For example, once the voltage across the switching transistor in the auxiliary circuit reaches V... H It will be forward biased and turned on. Then, the resonant current flows through diode D. r1 Switch Q r1 The voltage is clamped when the inductor L r The energy in the diode D r1 When there is no waste, the auxiliary circuit reaches a stable state.

[0118] This embodiment underwent experimental verification. To facilitate comparison and demonstrate the effectiveness of the circuit and modulation method proposed in this invention, the parameters of the soft-switching interleaved bidirectional DC-DC converter were designed to be the same as the main topology parameters of a conventional interleaved bidirectional DC-DC circuit: DC voltage source V H The rated voltage is 60V, and the DC voltage source is V. L The rated voltage is 48V, the frequency is 50kHz, the inductors L1 and L2 in the main circuit are both 50μH, and the inductor L in the auxiliary circuit is... r The auxiliary circuit clamping capacitor C is 5μH. a The voltage is 22nF. In the main circuit, switching transistors Q1 through Q4 are all IRFP90N20DPBF. In the auxiliary circuit, switching transistor Q... r1 With Q r2 The diode D in the resonant voltage spike cancellation circuit is model IPP110N20N3. r1 and D r2 A common low-power diode, model VSSA310A, was used to conduct an experiment at a rated power of 1200W, and the experimental waveform was tested.

[0119] As shown in the above analysis of the waveforms, due to the symmetry of the upper and lower bidirectional DC-DC circuits and the auxiliary circuit, the waveforms of switching transistors Q1 and Q3 are the same. Figure 13 The experimental waveforms of switch Q1 in the non-isolated soft-switching interleaved parallel bidirectional DC-DC converter of this embodiment of the invention are shown; the waveforms of switch Q2 and switch Q4 are the same. Figure 14 The experimental waveform of switch Q2 in the non-isolated soft-switching interleaved parallel bidirectional DC-DC converter of this embodiment of the invention; switch Q r1 With the switching transistor Q r2 The waveforms are the same. Figure 15 In the non-isolated soft-switching interleaved parallel bidirectional DC-DC converter of this embodiment of the invention, the switching transistor Q r1 The experimental waveforms show that all switches in the main circuit can achieve zero-voltage turn-on and eliminate the reverse recovery loss caused by the freewheeling current of the body diode of the switches in the main circuit. This is due to the capacitance C. a The clamping effect enables near-zero voltage turn-off of the main circuit switch. The switching transistor in the auxiliary circuit and the inductor L of the auxiliary circuit... r In a series connection, due to the continuity of the inductor current, the current flowing through the switching transistor in the auxiliary circuit is approximately zero at the moment of turn-on, which is called near-zero current turn-on. The switching transistor in the auxiliary circuit turns off when its current naturally decreases to zero, thus avoiding the crossing of voltage and current waveforms and achieving zero current turn-off. The switching transistor in the auxiliary circuit is protected by a resonant voltage spike cancellation circuit, and the additional voltage stress it experiences is zero.

[0120] In summary, the present invention provides a non-isolated soft-switching interleaved parallel bidirectional DC-DC converter and its modulation method, which effectively solves the reverse recovery loss caused by the freewheeling current of the body diodes of the switching transistors in the converter circuit under bidirectional power flow conditions, as well as the resulting excessive turn-on loss of the switching transistors. It realizes soft-switching operation of the switching transistors in the main circuit and the auxiliary circuit, and improves the working efficiency of the interleaved parallel bidirectional DC-DC circuit.

[0121] Compared with passive soft-switching circuits, this invention offers flexible control and easy soft-switching implementation over a wide range. Compared with soft-switching auxiliary circuits based on coupled inductors, this invention does not require complex manufacturing processes. Compared with soft-switching auxiliary circuits based on active clamping, this invention does not suffer from the problem of shortened equivalent duty cycle. Furthermore, the auxiliary circuit of this invention is shared by two main circuits, resulting in fewer additional components, a simpler structure, and the ability to achieve soft switching of all switching transistors over a wide gain and load range.

[0122] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0123] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.

[0124] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A non-isolated soft-switching interleaved parallel bidirectional DC-DC converter, characterized in that, include: DC voltage source V H DC voltage source V L The circuit consists of a main circuit, an auxiliary circuit, and a resonant voltage spike cancellation circuit, among which: The main circuit consists of two interleaved parallel bidirectional DC-DC circuits, divided into an upper bidirectional DC-DC circuit and a lower bidirectional DC-DC circuit. The two ends of the main circuit are respectively connected to the DC voltage source V. H and DC voltage source V L This forms a parallel topology; the main circuit includes an upper bidirectional DC-DC circuit and a lower bidirectional DC-DC circuit. The upper bidirectional DC-DC circuit consists of switching transistors Q1 and Q2 and inductor L1, while the lower bidirectional DC-DC circuit consists of switching transistors Q3 and Q4 and inductor L2. The source of the switching transistor Q1 is connected to the drain of the switching transistor Q2 and one end of the inductor L1, respectively. The drain of the switching transistor Q1 is connected to the drain of the switching transistor Q3, and together they are connected to the DC voltage source V. H The positive terminal of the switch Q3 is connected to the drain of the switch Q4 and one end of the inductor L2, respectively. The source of the switch Q4 is connected to the source of the switch Q2 and together they are connected to the DC voltage source V. H The negative terminal of inductor L2 is connected to the other end of inductor L1, and both are connected to the DC voltage source V. L The positive electrode; The auxiliary circuit is connected to the main circuit and is shared by the upper bidirectional DC-DC circuit and the lower bidirectional DC-DC circuit. It is used to implement soft-switching operation of the switching transistors in the main circuit and the auxiliary circuit. The auxiliary circuit is controlled by the switching transistor Q. r1 Switching transistor Q r2 Inductor L r and capacitor C a Composition, wherein: the switching transistor Q r1 The drain of the inductor L is connected r One end of the inductor L r The other end is connected to the switching transistor Q. r2 The drain of the switching transistor Q r2 The source of the capacitor C is connected to the capacitor C. a One end of the capacitor is connected to the common connection point of the switching transistor Q3 and the inductor L2 in the main circuit. a The other end is connected to the switching transistor Q. r1 The sources of the transistors are connected together to the common connection point of the switching transistor Q1 and the inductor L1 in the main circuit. The resonant voltage spike elimination circuit is connected to the auxiliary circuit to suppress parasitic resonance and reduce the additional voltage stress across the switching transistor in the auxiliary circuit; the resonant voltage spike elimination circuit consists of diode D. r1 and diode D r2 Composition, in which: The diode D r1 The anode of the switch Q in the auxiliary circuit is connected. r1 The source of the diode D r2 The anode of the switch Q in the auxiliary circuit is connected. r2 and inductor L r The common connection point of the diode D r2 The cathode is connected to the diode D r1 The cathodes are connected together to the DC voltage source V. H The positive pole.

2. The non-isolated soft-switching interleaved parallel bidirectional DC-DC converter according to claim 1, characterized in that, The inductance of inductor L1 and inductor L2 are equal.

3. The non-isolated soft-switching interleaved parallel bidirectional DC-DC converter according to claim 1, characterized in that, Switch Q1 and switch Q2 are driven by a set of complementary signals containing dead time, and switch Q3 and switch Q4 are driven by another set of complementary signals containing dead time. The waveforms of switch Q1 and switch Q3 are the same but 180° out of phase in time, and the waveforms of switch Q2 and switch Q4 are the same but 180° out of phase in time, forming an interleaved operating mode.

4. The non-isolated soft-switching interleaved parallel bidirectional DC-DC converter according to claim 1, characterized in that, The DC voltage source V H The voltage is greater than that of the DC voltage source V. L The voltage.

5. The non-isolated soft-switching interleaved parallel bidirectional DC-DC converter according to claim 1, characterized in that, The switching transistors of the main circuit and the auxiliary circuit are MOSFET and / or IGBT devices.

6. The non-isolated soft-switching interleaved parallel bidirectional DC-DC converter according to any one of claims 1-5, characterized in that, The duty cycle D is defined as the ratio of the conduction time of the switching transistors Q1 and Q3 to the switching period, where: When D > 0.5, the switching transistor Q r1 The turn-on time of the switch Q is a certain time ∆T earlier than the turn-on time of the switch Q1. r1 The turn-off time lags behind the turn-off time of the switch Q1 by the same time ∆T; simultaneously, the turn-off time of the switch Q... r2 The turn-on time of the switch Q is earlier than the turn-on time of the switch Q3 by a period of time ∆T. r2 The turn-off time lags behind the turn-off time of the switch Q3 by the same time ∆T; When D≤0.5, the switching transistor Q r1 The turn-on time of the switch Q3 precedes the turn-off time of the switch Q by a period of time ∆T. r1 The turn-off time lags behind the turn-on time of the switch Q3 by the same time ∆T; simultaneously, the switch Q... r2 The turn-on time of the switch Q1 precedes the turn-off time of the switch Q by a period of time ∆T. r2 The turn-off time lags behind the turn-on time of the switch Q1 by the same time ∆T.

7. A modulation method for a non-isolated soft-switching interleaved parallel bidirectional DC-DC converter according to claim 6, characterized in that, When D > 0.5, the operating modes include: t0~t1 stage: At time t0, switch Q1 is off, capacitor C... a With parallel inductor L r Resonance with inductor L1, the inductor L r The current difference between inductor L1 and inductor L2 is i Lr -i L1 The inductor L r The difference current between the inductor L1 and the capacitor C flows along the capacitor C. a The capacitor C flows in the opposite direction to the reference direction. a The capacitor C a The voltage across the capacitor C begins to slowly change from zero to negative during the turn-off transient of the switch Q1. a As the voltage changes, the switch Q1 achieves near-zero voltage switching turn-off, while the switch Q3 remains on during the t0~t1 phase, making the voltage applied to the inductor L2 V. H -V L The current in the inductor L2 increases linearly; During the t1~t2 phase: At time t1, the body diode of the switching transistor Q2 is forward biased and naturally conducts. The current flowing through the switching transistor Q2 is equal to the current flowing through the inductor L. r The difference current i between inductor L1 and inductor L1 Lr -i L1 During the t1~t2 phase, the switch Q2 is turned on under zero voltage conditions, and the voltage applied to the inductor L1 and the inductor L2 is zero. r The voltages on are -V L and V H The current in the inductor L1 decreases linearly, while the current in the inductor L... r The current tilts towards zero; t2~t3 stage: At time t2, the current flowing through the inductor L r The current is exactly zero, in order to prevent the inductor L r The current continues to rise from zero, and the switching transistor Q... r1 The switch Q must be turned off before time t2, in which case the switch Q... r1 Zero current turn-off was achieved, and then the inductor L r The current remains zero. During the t2~t3 stage, the auxiliary circuit no longer participates in the operation of the main topology, and the converter is equivalent to the corresponding traditional interleaved bidirectional DC-DC converter. t3~t4 stage: At time t3, the switching transistor Q r1 When the inductor L is turned on, r The current immediately flows at a constant slope V H / L r Starting from zero, during the conduction transient, the current flows through the switch Q. r1 The current of the switching transistor Q is slightly greater than zero. r1 Near-zero current conduction; t4~t5 stage: At time t4, the switch Q2 is turned off, and the capacitor C... a With the inductor L1 and the inductor L r Parallel resonance, the inductor L r The difference current i between inductor L1 and inductor L1 Lr -i L1 Along the capacitor C a The capacitor C flows in the opposite direction to the reference direction. a The capacitor C a Voltage from -V H The voltage increases slowly towards zero, and during the turn-off transient, the voltage change approaches zero due to the capacitance C. a The clamping function of the switch Q2 enables near-zero voltage turn-off; t5~t6 stage: At time t5, the capacitor C a The voltage is equal to the forward voltage drop of the body diode of the switching transistor Q1, so the body diode of the switching transistor Q1 is naturally turned on, and the inductor L... r The difference current i between inductor L1 and inductor L1 Lr -i L1 The body diode of the switch Q1 flows through the switch Q1, enabling the switch Q1 to achieve zero-voltage conduction. During the t5~t6 stage, the voltage applied to the inductor L... r The voltages across inductor L1 are 0 and V, respectively. H -V L The inductor L r The current in L1 remains constant, while the current in inductor L1 increases uniformly. The t6~t0 phase: There are also 6 phases in the second half of the cycle, namely: t6~t7 phase, t7~t8 phase, t8~t9 phase, t9~t 10 stage, t 10 ~t 11 stage and t 11 During the ~t0 stage, due to the symmetry between the upper and lower bidirectional DC-DC circuits of the interleaved topology, the six stages of the second half of the cycle operate on the same principle as the six stages of the first half of the cycle, and the modulation operation is symmetrical. When D≤0.5, the operating modes include: During the t0~t1 stage: at time t0, the body diode of the switching transistor Q2 is forward biased and turned on, and the inductor L... r The difference current i between inductor L1 and inductor L1 Lr -i L1 The body diode of the switch Q2 flows through it, enabling the switch Q2 to achieve zero-voltage conduction. This is due to the inductor L... r The voltage across the inductor L is always zero, and the stored energy is retained. r The current remains unchanged, and the inductors L1 and L2 are demagnetized and release energy to the load; During the t1~t2 phase: At time t1, the switch Q4 is turned off, and the current i in the inductor L2... L2 Add the aforementioned inductor L r current i Lr Immediately flows through the capacitor C a The capacitor C a Inductor L2 and inductor L r Resonance begins due to the inductance L r current i Lr It is actually negative, and -i Lr Higher than i L2 The capacitor C a Residual current -i Lr -i L2 Reverse charging causes the capacitor C to... a The voltage slowly changes from zero to negative, and the rate of change of the drain-source voltage of the switch Q4 is significantly reduced, ensuring that the switch Q4 switches at near zero voltage during the turn-off transient. t2~t3 stage: At time t2, when the capacitor C a The negative voltage is slightly less than -V H At this time, the body diode of the switching transistor Q3 is forward biased, and the current i of the inductor L2 is... L2 and the inductor L r current i Lr All current flows through the body diode of the switching transistor Q3, and then the switching transistor Q3 achieves zero-voltage conduction. During the t2~t3 stage, the inductor L2 is subjected to a positive voltage V. H -V L Excitation, causing the current i in the inductor L2 to... L2 The inductance L increases linearly. r current i Lr It gradually approaches zero with a constant positive slope; t3~t4 stage: At time t3, the inductor L r current i Lr The value drops to zero and the switching transistor Q r1 Disconnection achieves zero-current turn-off, and the converter in this stage is equivalent to the corresponding traditional interleaved bidirectional DC-DC converter. t4~t5 stage: At time t4, the switching transistor Q r1 When activated, the inductor L r current i Lr and the current i of the inductor L2 L2 All flows through the switching transistor Q3, the switching transistor Q r1 Due to the inductance L r The connection achieves near-zero current conduction, and the inductor L r current i Lr With a constant slope V H / L r Incrementing from zero; During the t5~t6 phase: At time t5, the gate drive signal of the switch Q3 goes low, and the current through the switch Q3 drops rapidly to zero. During the turn-off transient, the remaining current flows to the capacitor C. a The voltage across its terminals remains unchanged for a short period, and the switch Q3 achieves zero-voltage conduction. After the transient, the current i of the inductor L2... L2 Add the aforementioned inductor L r current i Lr Immediately flows through the capacitor C a The capacitor C a Inductor L2 and inductor L r Resonance occurs, and the capacitor C a The voltage increases toward zero in a resonant manner; t6~t0 stage: There are also 6 stages in the second half of the cycle, namely: t6~t7 stage, t7~t8 stage, t8~t9 stage, t9~t10 stage, t10~t11 stage and t11~t0 stage. Due to the symmetry between the upper and lower bidirectional DC-DC circuits of the interleaved topology, the 6 stages in the second half of the cycle have the same working principle as the 6 stages in the first half of the cycle, and the modulation operation is symmetrical.

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