Resonator device and method of manufacturing the same

Abstract

A manufacturing method of the resonant device (1) of the present application includes: preparing a collection substrate (100) having a plurality of first power supply terminals (ST1) electrically connected to respective upper electrodes (125) of a plurality of resonators (10), and a first connection wiring (LL) electrically connecting at least two of the plurality of first power supply terminals (ST1); and dividing the collection substrate (100) into a plurality of resonant devices (1), the plurality of first power supply terminals (ST1) being composed of a first metal layer (ML1) and a second metal layer (ML2) covering the first metal layer (ML1), the first connection wiring (LL) being composed of a portion of the first metal layer (ML1) extending from a region covered by the second metal layer (ML2), the manufacturing method of the resonant device (1) further including: before dividing the collection substrate (100) into the plurality of resonant devices (1), removing the portion of the first metal layer (ML1) extending from the region covered by the second metal layer (ML2).

Description

Technical Field

[0001] This invention relates to a resonant device and a method for manufacturing the same. Background Technology

[0002] Previously, devices manufactured using technologies such as MEMS (Micro Electro Mechanical Systems) were becoming increasingly common. These devices, for example, are formed by stacking multiple devices on a substrate (wafer) and then dicing the wafer to create individual devices (chips).

[0003] For example, Patent Document 1 discloses a method for manufacturing a resonant device that performs a frequency adjustment process by applying a predetermined driving voltage to a resonator to adjust the resonant frequency in a monolithic state.

[0004] Patent Document 1: International Publication No. 2017 / 212677

[0005] In the resonant device manufactured by the method disclosed in Patent Document 1, for the frequency adjustment process, detectors need to be connected to the terminals of each resonant device and a driving voltage needs to be applied, which takes time to adjust the frequency of all resonant devices.

[0006] As a method to improve productivity by shortening frequency adjustment time, one consideration is to provide connecting wiring that electrically connects the terminals of each resonator on the wafer, and to perform frequency adjustment together before dividing the wafer into individual resonators. However, when the terminals and connecting wiring of each resonator are formed separately, productivity decreases due to the increased manufacturing steps. Furthermore, when the terminals and connecting wiring of each resonator are formed integrally, the connecting wiring on the dividing line deforms during the division process. In this case, there is a possibility that the deformed connecting wiring short-circuits with other terminals of the resonator, resulting in defective products and further reducing productivity. Summary of the Invention

[0007] The present invention was made in view of the following circumstances, and its object is to provide a resonant device with improved productivity and a method for manufacturing the same.

[0008] A method for manufacturing a resonant device according to one aspect of the present invention includes:

[0009] A composite substrate is prepared, comprising a first substrate and a second substrate. The first substrate has a plurality of resonators, and the second substrate is bonded to the plurality of resonators on the first substrate. Each of the plurality of resonators has an upper electrode and a lower electrode. The composite substrate has a plurality of first power terminals electrically connected to the upper electrodes of each of the plurality of resonators, and first connection wiring electrically connecting at least two of the plurality of first power terminals.

[0010] The substrate is divided into multiple resonant devices.

[0011] The plurality of first power terminals are composed of a first metal layer disposed on the side opposite to the first substrate of the second substrate, and a second metal layer covering the first metal layer.

[0012] The first connection wiring consists of a portion of the first metal layer that extends and protrudes from the area covered by the second metal layer.

[0013] The method for manufacturing a resonant device further includes removing a portion of the first metal layer that extends from the area covered by the second metal layer before dividing the assembly substrate into multiple resonant devices.

[0014] Another aspect of the present invention relates to a resonant device comprising:

[0015] A first substrate has a resonator having an upper electrode and a lower electrode; and

[0016] The second substrate is bonded to the resonator side of the first substrate.

[0017] The second substrate has:

[0018] Semiconductor substrate;

[0019] The first power terminal and the second power terminal are disposed on the side of the semiconductor substrate opposite to the first substrate, electrically connected to a portion of the upper electrode and insulated from each other;

[0020] A grounding terminal is disposed on the side of the semiconductor substrate opposite to the first substrate and is electrically connected to the lower electrode; and

[0021] An insulating layer is disposed between the semiconductor substrate and the first power terminal, and between the semiconductor substrate and the second power terminal.

[0022] When viewed from above on the side of the second substrate opposite to the first substrate, the insulating layer has a central region separated from the outer edge of the second substrate, and a connecting region extending from the central region and protruding to the outer edge of the second substrate.

[0023] According to the present invention, a resonant device with improved productivity and a method for manufacturing the same can be provided. Attached Figure Description

[0024] Figure 1 This is a perspective view that schematically shows the appearance of the resonant device in one embodiment.

[0025] Figure 2 It is a general representation Figure 1 An exploded perspective view of the structure of the resonant device shown.

[0026] Figure 3It is a general representation Figure 1 The diagram shows a top view of the construction of a harmonic oscillator.

[0027] Figure 4 It is a general representation Figure 1 A cross-sectional view of the structure of the resonant device shown along line IV-IV.

[0028] Figure 5 It is a general representation Figure 1 The diagram shows a top view of the harmonic oscillator and its surrounding wiring.

[0029] Figure 6 It is a general representation Figure 1 The top view of the structure of the top cover is shown.

[0030] Figure 7 This is an exploded perspective view that schematically shows the appearance of the assembly substrate in one embodiment.

[0031] Figure 8 It is Figure 7 The image shown is a magnified view of part of region A.

[0032] Figure 9 It is Figure 7 The image shown is a magnified view of part of region B.

[0033] Figure 10 This is a flowchart illustrating a method for manufacturing a resonant device in one embodiment.

[0034] Figure 11 It is a cross-sectional view that roughly shows the structure of the assembled substrate after the upper and lower substrates are joined together.

[0035] Figure 12 It is a cross-sectional view that roughly shows the structure of the assembled substrate before it was divided.

[0036] Figure 13 This is a cross-sectional view that schematically illustrates the structure of the assembly substrate in one embodiment.

[0037] Figure 14 This is a top view that schematically illustrates the structure of the assembly substrate in one embodiment. Detailed Implementation

[0038] The embodiments of the present invention will be described below. In the following drawings, the same or similar constituent elements are indicated by the same or similar reference numerals. The drawings are illustrative, and the dimensions and shapes of the parts are schematic; they should not be interpreted as limiting the scope of the present invention to these embodiments.

[0039] <Resonant Device>

[0040] First, refer to Figure 1 as well as Figure 2 The general structure of the resonant device 1 according to one embodiment of the present invention will be described. Figure 1 This is a perspective view that schematically shows the appearance of the resonant device in one embodiment of the present invention. Figure 2 It is a general representation Figure 1 An exploded perspective view of the structure of the resonant device shown.

[0041] like Figure 1 as well as Figure 2 As shown, the resonant device 1 includes a resonator 10, a lower cover 20 forming a vibration space for the resonator 10, and an upper cover 30. That is, the resonant device 1 is constructed by stacking the lower cover 20, the resonator 10, the joint 60 (described later), and the upper cover 30 in this order. Furthermore, the MEMS substrate 50 (lower cover 20 and resonator 10) of this embodiment corresponds to an example of the "first substrate" of the present invention, and the upper cover 30 of this embodiment corresponds to an example of the "second substrate" of the present invention.

[0042] The structure of the resonant device 1 will be described below. In the following description, the side of the resonant device 1 with the upper cover 30 will be referred to as the upper (or surface), and the side with the lower cover 20 will be referred to as the lower (or back).

[0043] The resonator 10 is a MEMS oscillator manufactured using MEMS technology. The resonator 10 and the upper cover 30 are joined via a bonding portion 60. Furthermore, the resonator 10 and the lower cover 20 are each formed using a silicon (Si) substrate (hereinafter referred to as "Si substrate"), and the Si substrates are bonded to each other. Alternatively, the resonator 10 and the lower cover 20 can also be formed using an SOI substrate.

[0044] The top cover 30 extends into a flat plate shape along the XY plane, and a flat, rectangular recess 31 is formed on its lower side, for example. The recess 31 is surrounded by sidewalls 33, forming part of the space for the resonator 10 to vibrate. Alternatively, the top cover 30 may not have the recess 31 and may be flat. Additionally, an air-absorbing layer for adsorbing exhaust gas may be formed on the resonator 10 side of the recess 31 of the top cover 30.

[0045] Two power terminals ST1 and ST2, a ground terminal GT, and a dummy terminal DT are provided on the upper surface of the cover 30. Each power terminal ST1 and ST2 provides a drive signal (drive voltage) to the resonator 10. Each power terminal ST1 and ST2 is electrically connected to the upper electrodes 125A, 125B, 125C, and 125D of the resonator 10 (described later). The ground terminal GT provides a reference potential to the resonator 10. The ground terminal GT is electrically connected to the lower electrode 129 of the resonator 10 (described later). In contrast, the dummy terminal DT is not electrically connected to the resonator 10. Furthermore, in this embodiment, the power terminal ST1 corresponds to an example of the "first power terminal" of the present invention, and the power terminal ST2 in this embodiment corresponds to an example of the "second power terminal" of the present invention.

[0046] Power terminals ST1, ST2, ground terminal GT, and dummy terminal DT are formed by stacking metal layers ML1 and ML2 in this order from the Si wafer L3 side. Metal layer ML1 is connected to through electrodes V1 and V2, and metal layer ML2 covers metal layer ML1. Metal layer ML1 is a seed film for plating, for example, formed by stacking Cu seed formed by sputtering and Ti barrier metal in this order from the Si wafer L3 side. Metal layer ML1 corresponds to an example of the "first metal layer" of the present invention, and metal layer ML2 corresponds to an example of the "second metal layer" of the present invention.

[0047] The lower cover 20 has a rectangular flat base plate 22 arranged along the XY plane, and a sidewall 23 extending from the periphery of the base plate 22 along the Z-axis direction, i.e., along the stacking direction of the cover 20 and the resonator 10. In the lower cover 20, a recess 21 is formed on the surface opposite to the resonator 10, formed by the upper surface of the base plate 22 and the inner surface of the sidewall 23. The recess 21 forms part of the vibration space of the resonator 10. Alternatively, the lower cover 20 may not have the recess 21 and may be flat. Furthermore, an air-absorbing layer for adsorbing exhaust gas may be formed on the resonator 10 side of the recess 21 of the lower cover 20.

[0048] Next, refer to Figure 3 The general structure of the resonator 10 in the resonant device 1 according to one embodiment of the present invention will be described. Figure 3 It is a general representation Figure 1 The diagram shows a top view of the construction of a harmonic oscillator.

[0049] like Figure 3 As shown, the resonator 10 is a MEMS oscillator manufactured using MEMS technology. The resonator 10 has the following characteristics: Figure 3The extended upper and lower surfaces on the XY plane in the orthogonal coordinate system undergo out-of-plane bending vibration relative to the XY plane. Furthermore, the resonator 10 is not limited to a resonator using an out-of-plane bending vibration mode. The resonator of the resonant device 1 can also be, for example, a resonator using an extended vibration mode, a thickness longitudinal vibration mode, a Lamb wave vibration mode, an in-plane bending vibration mode, or a surface wave vibration mode. These oscillators are used, for example, in timers, RF filters, duplexers, ultrasonic transducers, gyroscope sensors, accelerometers, etc. Additionally, they can be used in piezoelectric reflectors with actuator functions, piezoelectric gyroscopes, piezoelectric microphones with pressure sensor functions, ultrasonic vibration sensors, etc. Furthermore, they can also be used in electrostatic MEMS elements, electromagnetically driven MEMS elements, and piezoelectric resistive MEMS elements.

[0050] The resonator 10 includes a vibrating part 120, a holding part 140, and a holding arm 110. The resonator 10 is formed, for example, symmetrical with respect to a virtual plane P parallel to the YZ plane. That is, the shapes of the vibrating part 120, the holding part 140, and the holding arm 110 are approximately symmetrical with respect to the virtual plane P as the plane of symmetry.

[0051] The vibrating part 120 is disposed inside the holding part 140, and a space is formed between the vibrating part 120 and the holding part 140 at a predetermined interval. Figure 3 In the example shown, the vibrating part 120 has a base 130 and four vibrating arms 135A to 135D (hereinafter collectively referred to as "vibrating arms 135"). Furthermore, the number of vibrating arms is not limited to four; for example, it can be any number of three or more. In this embodiment, each vibrating arm 135A to 135D is integrally formed with the base 130.

[0052] When viewed from above the upper surface of the resonator 10 (hereinafter referred to as "top view"), the base 130 has long sides 131a and 131b extending along the X-axis and short sides 131c and 131d extending along the Y-axis. Long side 131a is an edge of the front end face of the base 130 (hereinafter also referred to as "front end face 131A"), and long side 131b is an edge of the rear end face of the base 130 (hereinafter also referred to as "rear end face 131B"). Short side 131c is an edge of one side end face of the base 130 (hereinafter also referred to as "left end face 131C"), and short side 131d is an edge of the other side end face of the base 130 (hereinafter also referred to as "right end face 131D"). In the base 130, the front end face 131A and the rear end face 131B are set to face each other, and the left end face 131C and the right end face 131D are set to face each other.

[0053] The base 130 is connected to the vibrating arm 135 at its front end face 131A and to the retaining arm 110 (described later) at its rear end face 131B. The midpoints of the long sides 131a and 131b are located on the virtual plane P. Furthermore, in... Figure 3 In the example shown, the base 130 has a generally rectangular shape when viewed from above, but is not limited to this. The base 130 can be formed to be approximately symmetrical with respect to the virtual plane P. For example, the base 130 can also be a trapezoid with the longer side 131b shorter than 131a, or it can be a semicircle with the longer side 131a as its diameter. In addition, the faces of the base 130 are not limited to planes, and can also be curved surfaces.

[0054] In the base 130, the longest distance between the front end face 131A and the rear end face 131B in the direction from the front end face 131A toward the rear end face 131B, which is also the base length, is about 35 μm. In addition, in the width direction orthogonal to the base length direction, the longest distance between the side ends of the base 130, which is also the base width, is about 265 μm.

[0055] Vibration arms 135 extend along the Y-axis and have the same dimensions. Each vibration arm 135 is arranged parallel to the Y-axis between the base 130 and the holding portion 140, with one end connected to the front end face 131A of the base 130 to become a fixed end, and the other end becoming an open end. Furthermore, the vibration arms 135 are arranged side-by-side at predetermined intervals along the X-axis. Additionally, the width (hereinafter referred to as "width") of the vibration arm 135 in the X-axis direction is approximately 50 μm, and its length (hereinafter referred to as "length") in the Y-axis direction is approximately 450 μm.

[0056] For example, the width of a portion of the vibrating arm 135 extending approximately 150 μm along the Y-axis from its open end is wider than the width of other portions of the vibrating arm 135. This wider portion is referred to as the hammer portion G. The hammer portion G protrudes approximately 10 μm to the left and right along the X-axis compared to other portions of the vibrating arm 135, for example, its width is approximately 70 μm. The hammer portion G and the vibrating arm 135 are integrally formed in the same process. By forming the hammer portion G, the weight per unit length of the vibrating arm 135 is heavier at the open end than at the fixed end. Therefore, by having a hammer portion G at the open end of each vibrating arm 135, the amplitude of vertical vibration in each vibrating arm can be increased.

[0057] A protective film 235, described later, is formed on the upper surface of the vibrating section 120 (the surface opposite the upper cover 30) to cover its entire surface. Furthermore, a frequency adjustment film 236 is formed on the upper surface of the protective film 235 at the open end front ends of the vibrating arms 135A to 135D. The frequency adjustment film 236 is, for example, provided on approximately the entire upper surface of the hammer section G. The resonant frequency of the vibrating section 120 can be adjusted by removing the protective film 235 and the frequency adjustment film 236 from the upper surface.

[0058] The retaining portion 140 is formed in a rectangular frame shape to surround the outer side of the vibrating portion 120 along the XY plane. The retaining portion 140 has a front frame 141a disposed on the +Y axis direction side of the vibrating portion 120, a rear frame 141b disposed on the -Y axis direction side of the vibrating portion 120, a left frame 141c disposed on the -X axis direction side of the vibrating portion 120, and a right frame 141d disposed on the +X axis direction side of the vibrating portion 120. Furthermore, the retaining portion 140 may be disposed at least partially around the vibrating portion 120, and is not limited to a frame shape.

[0059] A retaining arm 110 is disposed inside the retaining portion 140, connecting the vibrating portion 120 and the retaining portion 140. The retaining arm 110 retains the vibrating portion 120 so that the base 130 can perform out-of-plane bending vibration. The retaining arm 110 has a left retaining arm 110a and a right retaining arm 110b. For example, one end of the left retaining arm 110a is connected to the rear end face 131B of the base 130, and the other end of the left retaining arm 110a is connected to the left frame 141c of the retaining portion 140. One end of the right retaining arm 110b is connected to the rear end face 131B of the base 130, and the other end of the right retaining arm 110b is connected to the right frame 141d of the retaining portion 140. The width of the portion of the left retaining arm 110a and the right retaining arm 110b connected to the base 130 is smaller than the width of the base 130.

[0060] Next, refer to Figure 4 The stacked structure of the resonant device 1 according to one embodiment of the present invention will be described. Figure 4 It is a general representation Figure 1 A cross-sectional view of the structure of the resonant device 1 along line IV-IV.

[0061] like Figure 4 As shown, the resonant device 1 attaches the resonator 10 to the lower cover 20 and further attaches the resonator 10 to the upper cover 30. In this way, the resonator 10 is held between the lower cover 20 and the upper cover 30, and the lower cover 20, the upper cover 30, and the holding part 140 of the resonator 10 form a vibration space for the vibration of the resonator 120.

[0062] The lower cover 20 is integrally formed from a silicon (Si) wafer (hereinafter referred to as "Si wafer") L1. The thickness of the lower cover 20, specified along the Z-axis direction, is, for example, about 150 μm. Furthermore, the Si wafer L1 is formed using non-degenerate silicon, and its resistivity is, for example, 16 mΩ·cm or higher.

[0063] The holding portion 140, base 130, vibrating arm 135, and holding arm 110 of the resonator 10 are integrally formed in the same process. A lower electrode 129 is formed on a silicon (Si) substrate (hereinafter referred to as "Si substrate") F2, which is an example of a substrate, to cover the upper surface of the Si substrate F2. A piezoelectric thin film F3 is formed on the lower electrode 129 to cover the lower electrode 129. Four upper electrodes 125A, 125B, 125C, and 125D (hereinafter also collectively referred to as "upper electrodes 125") are stacked on the piezoelectric thin film F3. A protective film 235 is stacked on the upper electrodes 125 to cover the upper electrodes 125. A conductive layer CL and upper wiring UW1 and UW2 are provided on the protective film 235 and electrically isolated from each other.

[0064] The lower electrode 129 is formed on the upper surface of the Si substrate F2 in a substantially integral manner, extending to the outer edge of the resonator 10. Thus, in the state of the assembled substrate 100 described later before monolithic (chip-based) integration, by connecting the lower electrodes 129 of adjacent resonator 1 to each other, the lower electrodes 129 of multiple resonator 1 can be turned on.

[0065] The Si substrate F2 can also be formed, for example, from a degenerate n-type silicon (Si) semiconductor with a thickness of about 6 μm. The degenerate silicon (Si) can contain phosphorus (P), arsenic (As), antimony (Sb), etc., as n-type dopants. The resistivity of the degenerate silicon (Si) used in the Si substrate F2 is, for example, less than 16 mΩ·cm, more preferably less than 1.2 mΩ·cm. Furthermore, as an example of a temperature characteristic correction layer, a silicon oxide (e.g., SiO2) layer can be formed on at least one of the upper and lower surfaces of the Si substrate F2.

[0066] Thus, since the Si substrate F2 is degenerate silicon (Si), for example, by using a degenerate silicon substrate with low resistance, the Si substrate F2 itself can also function as a lower electrode, and the lower electrode 129 can be omitted. In this case, with the substrate 100 assembled, by sharing the Si substrate F2 among adjacent resonant devices 1, the Si substrate F2, i.e., the lower electrode, of multiple resonant devices 1 can be turned on.

[0067] Furthermore, the thickness of the lower electrode 129 and the upper electrode 125 is, for example, about 0.1 μm or more and about 0.2 μm or less, and they are etched into a desired shape by means of etching or the like. The lower electrode 129 and the upper electrode 125 are made of a metal with a body-centered cubic crystal structure. Specifically, the lower electrode 129 and the upper electrode 125 are formed using materials such as Mo (molybdenum) and tungsten (W).

[0068] Piezoelectric thin films F3 are thin films of piezoelectric materials that convert electrical energy and mechanical energy into each other. Piezoelectric thin films F3 are formed using materials with a wurtzite-type hexagonal crystal structure, such as aluminum nitride (AlN), scandium aluminum nitride (ScAlN), zinc oxide (ZnO), gallium nitride (GaN), and indium nitride (InN) as the main components. Furthermore, scandium aluminum nitride is formed by replacing a portion of the aluminum in aluminum nitride with scandium; alternatively, magnesium (Mg) and niobium (Nb), or magnesium (Mg) and zirconium (Zr) can be used instead of scandium. Additionally, piezoelectric thin films F3 can have a thickness of, for example, 1 μm, but can also have a thickness of approximately 0.2 μm or more but less than 2 μm.

[0069] The piezoelectric film F3 extends and contracts along the Y-axis in the in-plane direction of the XY plane according to the electric field applied to the piezoelectric film F3 through the lower electrode 129 and the upper electrode 125. Through the extension and contraction of the piezoelectric film F3, the vibrating arm 135 displaces its free end toward the inner surface of the lower cover 20 and the upper cover 30, vibrating in an out-of-plane bending vibration mode.

[0070] In this embodiment, the phases of the electric fields applied to the upper electrodes 125A and 125D of the outer vibrating arms 135A and 135D, and the phases of the electric fields applied to the upper electrodes 125B and 125C of the inner vibrating arms 135B and 135C, are set to be opposite phases. Therefore, the outer vibrating arms 135A and 135D and the inner vibrating arms 135B and 135C are displaced in opposite directions. For example, if the free ends of the outer vibrating arms 135A and 135D are displaced toward the inner surface of the upper cover 30, then the free ends of the inner vibrating arms 135B and 135C are displaced toward the inner surface of the lower cover 20. This generates a first rotational torque centered on a rotation axis extending along the Y-axis between the outer vibrating arms 135A and the inner vibrating arms 135B. Additionally, a second rotational torque is generated, centered on a rotation axis extending along the Y-axis between the outer vibrating arm 135D and the inner vibrating arm 135C, and opposite in direction to the first rotational torque. Both the first and second rotational torques also act on the base 130, causing its left end face 131C and right end face 131D to displace toward the inner surfaces of the lower cover 20 and the upper cover 30, vibrating in an out-of-plane bending vibration mode.

[0071] The protective film 235 prevents oxidation of the upper electrode 125. The protective film 235 is preferably formed of a material whose rate of mass reduction based on etching is slower than that of the frequency-adjusting film 236. The rate of mass reduction is expressed as the product of the etching rate, i.e., the thickness removed per unit time, and the density. The protective film 235 may be formed of insulating films such as silicon nitride (SiN), silicon oxide (SiO2), and aluminum oxide (Al2O3), in addition to piezoelectric films such as aluminum nitride (AlN), scandium aluminum nitride (ScAlN), zinc oxide (ZnO), gallium nitride (GaN), and indium nitride (InN). The thickness of the protective film 235 is, for example, about 0.2 μm.

[0072] After the frequency adjustment film 236 is formed on approximately the entire surface of the vibrating section 120, it is formed only in a specified area through processing such as etching. The frequency adjustment film 236 is formed from a material whose mass decreases faster due to etching than that of the protective film 235. Specifically, the frequency adjustment film 236 is formed using metals such as molybdenum (Mo), tungsten (W), gold (Au), platinum (Pt), nickel (Ni), and titanium (Ti).

[0073] Furthermore, as long as the relationship between the mass reduction rate of the protective film 235 and the frequency adjustment film 236 is as described above, the relationship between their etching rates can be arbitrary.

[0074] The conductive layer CL is formed to contact the lower electrode 129. Specifically, when connecting the conductive layer CL to the lower electrode 129, a portion of the piezoelectric film F3 and the protective film 235 stacked on the lower electrode 129 is removed to expose the lower electrode 129, forming a through hole. The interior of the through hole is filled with the same material as the lower electrode 129, connecting the lower electrode 129 and the conductive layer CL.

[0075] The upper wiring UW1 is electrically connected to the upper electrodes 125B and 125C of the inner vibrating arms 135B and 135C via a lower wiring (not shown, lower wiring LW1 described later). The upper wiring UW2 is electrically connected to the upper electrodes 125A and 125D of the outer vibrating arms 135A and 135D via a lower wiring (not shown, lower wiring LW21 and LW22 described later). The upper wiring UW1 and UW2 are formed, for example, using metals such as aluminum (Al), gold (Au), and tin (Sn).

[0076] Between the resonator 10 and the top cover 30, a junction 60 is formed in a generally rectangular ring shape along the XY plane. The junction 60 joins the MEMS substrate 50 and the top cover 30 to seal the vibration space of the resonator 10. Thus, the vibration space is hermetically sealed, maintaining a vacuum state.

[0077] The bonding portion 60 is conductive and may be formed of metals such as aluminum (Al), germanium (Ge), or an alloy formed by eutectic bonding of aluminum (Al) and germanium (Ge). Alternatively, the bonding portion 60 may be formed of a gold (Au) film or a tin (Sn) film, or a combination of gold (Au) and silicon (Si), gold (Au) and gold (Au), or copper (Cu) and tin (Sn). Furthermore, to improve adhesion, the bonding portion 60 may also have thin layers of titanium (Ti), titanium nitride (TiN), tantalum nitride (TaN), etc., sandwiched between the stacked layers.

[0078] On the upper surface of the MEMS substrate 50 (lower cover 20 and resonator 10), a joint portion 60 is disposed with a predetermined distance, for example, about 20 μm, from the outer edge. This can suppress product defects of the resonator 1, such as protrusions (burrs) and collapsed edges, that may occur when the joint portion 60 is not left with the predetermined distance.

[0079] The top cover 30 is formed from a Si wafer L3 of a specified thickness. The Si wafer L3 is an example of the "semiconductor substrate" of the present invention. The top cover 30 is bonded to the resonator 10 at its peripheral portion (sidewall 33) via a bonding portion 60. Preferably, the upper surface of the top cover 30, where power terminals ST1, ST2 and ground terminal GT are disposed, the lower surface opposite to the resonator 10, and the side surface through electrodes V1, V2 are covered by a silicon oxide film L31. The silicon oxide film L31 is formed on the surface of the Si wafer L3, for example, by oxidation of the surface of the Si wafer L3 or by chemical vapor deposition (CVD).

[0080] Furthermore, on the upper surface of the cover 30, the silicon oxide film L31 does not need to cover its entire surface; it is sufficient to be disposed at least between the Si wafer L3 and the power terminal ST1, between the Si wafer L3 and the power terminal ST2, and between the Si wafer L3 and the ground terminal GT. The silicon oxide film L31 on the upper surface of the cover 30 is equivalent to an example of the "insulating layer" of the present invention.

[0081] Through electrodes V1 and V2 are formed by filling the through holes formed in the upper cover 30 with conductive material. The conductive material used for filling is, for example, impurity-doped polycrystalline silicon (Poly-Si), copper (Cu), gold (Au), or impurity-doped monocrystalline silicon. Through electrode V1 serves as a wiring connecting power terminal ST1 and terminal T1', and through electrode V2 serves as a wiring connecting power terminal ST2 and terminal T2'.

[0082] Power terminals ST1 and ST2, and a ground terminal GT are formed on the upper surface of the upper cover 30 (the side opposite to the resonator 10). Terminals T1' and T2', and a ground wiring GW are formed on the lower surface of the upper cover 30 (the side opposite to the resonator 10). Power terminals ST1, the through electrode V1, and terminal T1' are electrically insulated from the Si wafer L3 by a silicon oxide film L31. On the other hand, when the upper cover 30 and the resonator 10 are joined, terminal T1' is connected to the upper wiring UW1, thereby electrically connecting power terminal ST1 to the upper wiring UW1. As described above, the upper wiring UW1 is electrically connected to the upper electrodes 125B and 125C, therefore power terminal ST1 is electrically connected to the upper electrodes 125B and 125C of the resonator 10.

[0083] Power terminal ST2 is electrically connected to the upper wiring UW2 via through electrode V2 and terminal T2'. Power terminal ST2, through electrode V2, and terminal T2' are electrically insulated from the Si wafer L3 by a silicon oxide film L31. On the other hand, when the upper cover 30 and the resonator 10 are joined, terminal T2' is connected to the upper wiring UW2, thereby power terminal ST2 is electrically connected to the upper wiring UW2. As described above, the upper wiring UW2 is electrically connected to the upper electrodes 125A and 125D, therefore power terminal ST2 is electrically connected to the upper electrodes 125A and 125D of the resonator 10.

[0084] The grounding terminal GT is formed to contact the Si wafer L3. Specifically, a portion of the silicon oxide film L31 is removed by etching or other processes, and the grounding terminal GT is formed on the exposed Si wafer L3. Similarly, the grounding wiring GW is formed to contact the Si wafer L3. Specifically, a portion of the silicon oxide film L31 is removed by etching or other processes, and the grounding wiring GW is formed on the exposed Si wafer L3.

[0085] The grounding terminal GT and grounding wiring GW are formed using metals such as gold (Au) and aluminum (Al). By annealing (heat treatment) the formed metal, the grounding terminal GT and grounding wiring GW achieve ohmic contact with the Si wafer L3. Thus, the grounding terminal GT and grounding wiring GW are electrically connected via the Si wafer L3.

[0086] When the upper cover 30 and the resonator 10 are joined, the grounding wiring GW and the conductive layer CL are connected, thereby the grounding terminal GT is electrically connected to the conductive layer CL. As described above, the conductive layer CL is electrically connected to the lower electrode 129, therefore the grounding terminal GT is electrically connected to the lower electrode 129 of the resonator 10.

[0087] In this way, the ground terminal GT is electrically connected to the lower electrode 129 via the ground wiring GW and the conductive layer CL, so that the ground terminal GT can easily provide (apply) a reference potential to the resonator 10.

[0088] Next, refer to Figure 5 The resonator 10 and its surrounding wiring in a resonant device 1 according to an embodiment of the present invention will be described. Figure 5 It is a general representation Figure 1 The diagram shows a top view of the harmonic oscillator and its surrounding wiring.

[0089] like Figure 5 As shown, upper electrode 125A is disposed on vibrating arm 135A, upper electrode 125B is disposed on vibrating arm 135B, upper electrode 125C is disposed on vibrating arm 135C, and upper electrode 125D is disposed on vibrating arm 135D. Terminal T1' electrically connects the through electrode V1 of the power terminal ST1 formed on the upper cover 30 and the upper wiring UW1 formed on the protective film 235 of the resonator 10. The upper wiring UW1 is electrically connected to the lower wiring LW1 covered by the protective film 235. The lower wiring LW1 is wound around and electrically connected to the upper electrode 125B of vibrating arm 135B and the upper electrode 125C of vibrating arm 135C.

[0090] Terminal T2' electrically connects the through electrode V2 of the power terminal ST2 formed on the upper cover 30 and the upper wiring UW2 formed on the protective film 235 of the resonator 10. The upper wiring UW2 is electrically connected to the lower wirings LW21 and LW22 covered by the protective film 235. The lower wiring LW21 is wound and electrically connected to the upper electrode 125D of the vibrating arm 135D. The lower wiring LW22 is wound and electrically connected to the upper electrode 125A of the vibrating arm 135A.

[0091] from Figure 5 It can be seen that the winding length (distance) of the upper wiring UW1 and the lower wiring LW1 that electrically connect the power terminal ST1 to the upper electrodes 125B and 125C is different from that of the upper wiring UW2 and the lower wiring LW21 and LW22 that electrically connect the power terminal ST2 to the upper electrodes 125A and 125D, and therefore the areas are different.

[0092] The lower wiring LW1 includes a dummy wiring DW. The dummy wiring DW is not an electrical connection, but rather a wiring that maintains the symmetry of the lower wiring LW1 and increases its area. This allows the symmetry of the vibration of the vibrating arm 135 to be maintained, and the area of ​​the dummy wiring DW can be used to adjust the capacitance imbalance caused by the areas of the upper wiring UW1, lower wiring LW1, upper wiring UW2, and lower wirings LW21 and LW22.

[0093] Like the through electrodes V1 and V2, the through electrode V3 is formed by filling a through hole formed in the upper cover 30 with a conductive material. The conductive material used for filling is, for example, impurity-doped polycrystalline silicon (Poly-Si), copper (Cu), gold (Au), or impurity-doped monocrystalline silicon. The through electrode V3 serves as a wiring to electrically connect the ground terminal GT formed on the upper surface of the upper cover 30 to the ring-shaped junction 60 formed on the resonator 10. Thus, the ground terminal GT is connected to the lower electrode 129 and electrically connected to the junction 60, thereby... Figure 4 In the stacked structure shown, the parasitic capacitance that may be generated between the junction 60 and the lower electrode 129 can be reduced.

[0094] Additionally, the joint 60 includes a connecting member 65. The connecting member 65 is formed, for example, at a corner of the joint 60 and extends to the outer edge of the resonator 10. Thus, in the state of the assembled substrate 100 described later, by connecting the connecting members 65 of the diagonally arranged resonator devices 1 to each other, the lower electrodes 129 can be made to conduct to each other via the connecting members 65.

[0095] Furthermore, the connecting member 65 is not limited to being formed at the corner of the joint 60. For example, it may protrude from the long or short side of a generally rectangular shape in top view and extend to the outer edge of the resonator 10. In addition, the connecting member 65 included in the joint 60 is not limited to one, but may be two or more.

[0096] Next, refer to Figure 6 The structure of the upper surface side of the cover 30 according to one embodiment of the present invention will be described. Figure 6 It is a general representation Figure 1 The top view of the structure of the top cover is shown.

[0097] like Figure 6 As shown, the power terminal ST1 includes a power pad PD1 and a power trace SL1. The power pad PD1 is disposed at a corner on the upper surface of the upper cover 30 on both the positive X-axis and positive Y-axis sides. Furthermore, when viewed from above (as is the same as when viewing the upper surface of the resonator from above, it will be referred to as "top view" below), the power pad PD1 has a shape including a cutout CO1. One end of the power trace SL1 ( Figure 6 The right end of the power trace SL1 is connected to the power pad PD1 and extends to the vicinity of the ground pad PD3, which will be described later. Additionally, at the other end of the power trace SL1 (in... Figure 6 The through electrode V1 is formed at the left end (the middle part).

[0098] The power terminal ST2 includes a power pad PD2. The power pad PD2 is disposed on the upper surface of the cover 30 at the corners on both the negative X-axis and negative Y-axis sides. Furthermore, in plan view, the power pad PD2 has a generally rectangular shape. The power pad PD2 also has a portion protruding in the positive X-axis direction. The aforementioned through electrode V2 is formed in this portion.

[0099] The grounding terminal GT includes a grounding pad PD3 and a grounding wiring GL3. On the upper surface of the upper cover 30, the grounding pad PD3 is positioned at the corner on the positive X-axis side and the negative Y-axis side. Furthermore, viewed from above, the grounding pad PD3 has a generally rectangular shape. One end of the grounding wiring GL3 ( Figure 6 The right end of the connector is connected to the power pad PD3, and the other end ( Figure 6 The aforementioned through electrode V3 is formed at the left end of the electrode.

[0100] The dummy terminal DT is a terminal that is not electrically connected to the resonator 10. The dummy terminal DT consists only of the dummy pad DD. On the upper surface of the cover 30, the dummy pad DD is located at the corner on the negative X-axis side and the positive Y-axis side. In top view, the dummy pad DD has a roughly rectangular shape.

[0101] from Figure 6 As can be seen, power terminal ST1 includes power pad PD1 and power trace SL1, while power terminal ST2 only includes power pad PD2. Therefore, power terminals ST1 and ST2 have different areas. More specifically, the areas of power terminals ST1 and ST2 are different to make the capacitance generated between power terminal ST1 and ground terminal GT and the capacitance generated between power terminal ST2 and ground terminal GT approximately the same. This reduces the absolute value of the difference between the capacitance generated between power terminal ST1 and ground terminal GT and the capacitance generated between power terminal ST2 and ground terminal GT. Therefore, the imbalance of capacitance generated between power terminal ST1 and ground terminal GT and the capacitance generated between power terminal ST2 and ground terminal GT can be suppressed.

[0102] Furthermore, viewed from above, the power pad PD2 of power terminal ST2 has a generally rectangular shape, while the power pad PD1 of power terminal ST1 has a shape including a cutout CO1. Thus, because the shapes of power terminals ST1 and ST2 are different, it is easy to implement power terminals ST1 and ST2 with different areas. Alternatively, at least one of the power pad PD2, ground pad PD3, and dummy pad DD can also have a shape including a cutout.

[0103] Viewed from above, the silicon oxide film L31, as an example of the "insulating layer" of the present invention, has a central region CR separated from the outer edge of the upper cover 30, and a connecting region LR extending from the central region CR and protruding to the outer edge of the upper cover 30. The central region CR overlaps the entire surface of the power terminals ST1, ST2, the ground terminal GT, and the dummy terminal DT. The connecting region LR is provided on the extension line of the region between the power pad PD1 of the power terminal ST1, the power pad PD2 of the power terminal ST2, the ground pad PD3 of the ground terminal GT, and the dummy pad DD of the dummy terminal DT. The area of ​​the connecting region LR is smaller than the area of ​​the central region CR. The width of the connecting region LR in the direction orthogonal to the protruding direction (hereinafter referred to as "width") is smaller than the width of each pad PD1, PD2, PD3, DD, and smaller than the width of the region between adjacent terminals. The width of the connecting region LR can be greater than or equal to the width of the connecting wiring LL1, LL2 described later, and smaller is preferred. Furthermore, in the state of the assembly substrate 100 described later, the connection regions LR of adjacent resonant devices 1 are continuous.

[0104] The "insulating layer" of the present invention can also be a multilayer film composed of multiple insulating films. In the case of such a multilayer film, at least one insulating film can be separated from the outer edge of the top cover 30, while the other insulating films can extend to the outer edge of the top cover 30.

[0105] <Collection substrate>

[0106] Next, refer to Figures 7 to 9 The general structure of the assembly substrate 100 according to one embodiment of the present invention will be described. Figure 7 This is an exploded perspective view that schematically shows the appearance of the assembly substrate 100 in one embodiment. Figure 8 It is Figure 7 The image shown is a magnified view of part of region A. Figure 9 It is Figure 7 The image shown is a magnified portion of region B. Furthermore, Figure 8 The dividing line LN1 shown corresponds to Figure 9 The dividing line LN1 shown is... Figure 8 The dividing line LN2 shown corresponds to Figure 9 The dividing line LN2 is shown.

[0107] The assembly substrate 100 in this embodiment is an assembly substrate used to manufacture the resonant device 1 described above. For example... Figure 7As shown, the substrate 100 includes an upper substrate 13 and a lower substrate 14. Both the upper substrate 13 and the lower substrate 14 have a circular shape when viewed from above. The lower substrate 14 includes a plurality of resonators 10. The upper substrate 13 is configured such that its lower surface faces the lower substrate 14 and the plurality of resonators 10 are sandwiched in between. Furthermore, the lower substrate 14 of this embodiment corresponds to an example of the "first substrate" of the present invention, and the upper substrate 13 of this embodiment corresponds to an example of the "second substrate" of the present invention.

[0108] like Figure 8 As shown, multiple power terminals ST1, ST2, multiple ground terminals GT, and multiple dummy terminals DT are formed on the upper surface of the upper substrate 13. The four terminals—power terminals ST1, ST2, ground terminals GT, and dummy terminals DT—are arranged in an array across the entire upper surface of the upper substrate 13. Specifically, in the row direction (… Figure 8 (along the Y-axis) and column direction ( Figure 8 Along the X-axis, multiple such groups are arranged at specified intervals.

[0109] Additionally, a plurality of connection wirings LL1 and LL2 (hereinafter collectively referred to as "connection wirings LL") are formed on the upper surface of the upper substrate 13. Each connection wiring LL1 is electrically connected to the power supply terminal ST1, along the column direction ( Figure 8 (Extending along the X-axis). Additionally, each connecting wire LL2 is electrically connected to the connecting wire LL1, along the row direction ( Figure 8 (Extending along the Y-axis). Multiple connection wirings LL are formed by portions of metal layer ML1 that extend from the area covered by the second metal layer ML2. That is, a continuous metal layer ML1 is formed covering multiple power terminals ST1, ST2, multiple ground terminals GT, multiple dummy terminals DT, and multiple connection wirings LL, and the areas of metal layer ML1 corresponding to the multiple power terminals ST1, ST2, multiple ground terminals GT, and multiple dummy terminals DT are covered by metal layer ML2.

[0110] Figure 8 The dividing lines LN1 and LN2 shown (hereinafter, also collectively referred to as "dividing lines LN") are dividing lines used to divide the assembly substrate 100, namely the upper substrate 13 and the lower substrate 14, into multiple resonant devices 1 by cutting or the like, and are also called scribing lines. The width of the dividing lines LN is, for example, 5 μm or more and 20 μm or less.

[0111] On the upper surface of the upper substrate 13, each connecting wire LL1 extends beyond the dividing line LN2 parallel to the Y-axis, and each connecting wire LL2 extends beyond the dividing line LN1 parallel to the X-axis. Thus, in the state of the assembled substrate 100 before monolithic (chip-based) assembly, since the connecting wires LL of adjacent resonant devices 1 are interconnected, the upper electrodes 125B and 125C of multiple resonant devices 1 can be turned on via the power supply terminal ST1 and the connecting wires LL. Therefore, multiple resonant devices 1 can be powered on simultaneously by contacting the two detectors with the power supply terminal ST1 and the ground terminal GT, enabling short-time and easy frequency adjustment, continuity checks, and other operations performed during power-on.

[0112] When viewed from above, an insulating layer is provided in the connection region LR of the slitting line LN where it overlaps with the connecting wiring LL, thereby suppressing short-circuit defects between the connecting wiring LL and the Si wafer L3. Furthermore, since the outer side of the Si wafer L3 is exposed in the portion of the slitting line LN where it overlaps with the connecting wiring LL, the assembly substrate 100 can be slitted away from the insulating layer, which is more difficult to cut than the Si wafer L3. Therefore, cutting defects can be suppressed.

[0113] In addition, Figure 8 The diagram shows examples of two types of connection wiring, LL1 and LL2, formed on the upper surface of the cover 30, but this is not a limitation. One or more types of connection wiring may also be provided. Additionally, connection wiring that electrically connects multiple power terminals ST2 to each other may be provided, as may connection wiring that electrically connects multiple ground terminals GT to each other. If connection wiring connecting multiple power terminals ST2 is provided, a short and easy power-on operation can be performed within the assembly substrate 100. Furthermore, if connection wiring connecting multiple ground terminals GT is provided, a short and easy power-on operation can be performed within the assembly substrate 100 even if the connection component 65 is omitted.

[0114] like Figure 9 As shown, a plurality of devices DE and a plurality of bonding portions 60 are formed on the upper surface of the lower substrate 14. Each device DE corresponds to a major part of the resonator 10, such as the vibrating part 120 and the holding arm 110. Each bonding portion 60 is disposed in the region of the holding portion 140 of the resonator 10. In addition, each bonding portion 60 includes a connecting member 65 at each corner of its rectangular shape. The group of devices DE and bonding portions 60 is arranged in an array on the entire upper surface of the lower substrate 14. Specifically, in the row direction ( Figure 9 (along the Y-axis) and column direction ( Figure 9 Along the X-axis, multiple such groups are arranged at specified intervals.

[0115] Each connecting member 65 extends beyond the dividing line LN. That is, the connecting member 65 of a certain joint is connected to the connecting members 65 of the corner joints 60 of a plurality of adjacent joints 60. As a result, the plurality of joints 60 are electrically connected to each other through the connecting members 65.

[0116] <Mechanism Manufacturing Methods>

[0117] Next, refer to Figures 10-12 The manufacturing method of the resonant device 1 according to one embodiment of the present invention will be described. Figure 10 This is a flowchart illustrating a manufacturing method S100 of the resonant device 1 in one embodiment. Figure 11 This is a cross-sectional view that roughly shows the structure of the assembled substrate after the upper substrate 13 and the lower substrate 14 are joined together. Figure 12 It is a cross-sectional view that roughly shows the structure of the assembled substrate before it was divided.

[0118] like Figure 10 As shown, first, an upper substrate 13 corresponding to the upper cover 30 of the resonant device 1 is prepared (S110).

[0119] The upper substrate 13 is formed using a Si substrate. Specifically, the upper substrate 13 is made of... Figure 4 A Si wafer L3 of the specified thickness is formed. The upper surface, lower surface (the surface opposite to the resonator 10), and side surfaces of the through electrodes V1, V2, and V3 of the Si wafer L3 are covered with a silicon oxide film L31. The silicon oxide film L31 is formed on the surface of the Si wafer L3, for example, by oxidation of the surface of the Si wafer L3 or by chemical vapor deposition (CVD).

[0120] Multiple power terminals ST1, ST2, multiple ground terminals GT, multiple dummy terminals DT, and multiple connection wirings LL are formed on the upper surface of the upper substrate 13. Specifically, multiple power terminals ST1, ST2, multiple ground terminals GT, and multiple dummy terminals DT are formed on the central region CR of the silicon oxide film L31, and multiple connection wirings LL are formed from the central region CR of the silicon oxide film L31 throughout the connection region LR.

[0121] In the process of forming multiple power terminals ST1, ST2, multiple ground terminals GT, and multiple dummy terminals DT, firstly, a metal layer ML1 serving as a seed film is formed by sputtering. Specifically, a Cu seed is formed on a silicon oxide film L31, and a Ti barrier metal is formed on the Cu seed. Next, the metal layer ML1 (seed film) is electroplated to form a metal layer ML2 composed of a Ni-Au plating film. The metal layer ML2 is formed in the area that serves as the multiple power terminals ST1, ST2, multiple ground terminals GT, and multiple dummy terminals DT. Next, the portion of the metal layer ML1 exposed from the metal layer ML2, except for the portion used as multiple connection wiring LL, is removed by etching. That is, multiple connection wiring LL is formed from the first metal layer (seed film) extending and protruding from the area covered by the second metal layer (plating film). In this way, by forming multiple connection wiring LL using the process of forming multiple power terminals ST1, ST2, multiple ground terminals GT, and multiple dummy terminals DT, manufacturing can be carried out quickly and easily.

[0122] like Figure 8 As shown, on the upper surface of the upper substrate 13, each connecting wire LL1 extends beyond the dividing line LN2 parallel to the Y-axis, and each connecting wire LL2 extends beyond the dividing line LN1 parallel to the X-axis. Therefore, in the state of the assembled substrate 100 before monolithic (chip-based) assembly, since the connecting wires LL of adjacent resonant devices 1 are interconnected, the upper electrodes 125B and 125C of multiple resonant devices 1 can be turned on via the power terminal ST1 and the connecting wires LL. The connecting region LR of the silicon oxide film L31 extends along each connecting wire LL beyond the dividing line LN, preventing short circuits between each connecting wire LL and the Si wafer L3. The width of the connecting region LR of the silicon oxide film L31 on the dividing line LN is approximately equal to the width of each connecting wire LL, and the central region CR is separated from the dividing line LN, thus suppressing cutting defects caused by the silicon oxide film L31, which is more difficult to cut than the Si wafer L3.

[0123] Figure 4 The through electrodes V1, V2 and shown Figure 5 The through-electrode V3 shown is formed by filling a through-hole formed on the upper substrate 13 with a conductive material. The conductive material used for filling is, for example, impurity-doped polycrystalline silicon (Poly-Si), copper (Cu), gold (Au), or impurity-doped monocrystalline silicon.

[0124] On the other hand, terminals T1', T2' and grounding wiring GW are formed on the lower surface of the upper substrate 13.

[0125] Next, prepare the lower substrate 14 (S120) corresponding to the MEMS substrate 50 (resonator 10 and lower cover 20) of the resonant device 1.

[0126] The lower substrate 14 bonds the Si substrates together. Alternatively, the lower substrate 14 can also be formed using an SOI substrate. Figure 4 As shown, the lower substrate 14 includes a Si wafer L1 and a Si substrate F2.

[0127] A lower electrode 129, a piezoelectric thin film F3, an upper electrode 125, a protective film 235, and a frequency adjustment film 236 are stacked on the upper surface of the Si substrate F2. Along the protective film 235... Figure 9 The dividing line LN is shown, and a joint 60 is formed at a predetermined distance from the dividing line LN.

[0128] In addition, lower wirings LW1, LW21, LW22 and dummy wirings DW are formed on the piezoelectric film F3, in addition to the upper electrode 125. The same type of metal as the upper electrode 125 is used for the lower wirings LW1, LW21, LW22 and dummy wirings DW, thereby simplifying the manufacturing process. On the protective film 235, a conductive layer CL and upper wirings UW1 and UW2 are formed, in addition to the bonding portion 60. The same type of metal as the bonding portion 60 is used for the upper wirings UW1 and UW2, thereby simplifying the manufacturing process.

[0129] In this embodiment, an example is shown where the bonding portion 60 and the upper wirings UW1 and UW2 are formed on the upper surface side of the lower substrate 14, but this is not a limitation. For example, at least one of the bonding portion 60 and the upper wirings UW1 and UW2 may be formed on the lower surface side of the upper substrate 13. Furthermore, when the bonding portion 60 is made of multiple materials, a portion of the material of the bonding portion 60, such as germanium (Ge), may be formed on the lower surface side of the upper substrate 13, while the remaining material of the bonding portion 60, such as aluminum (Al), may be formed on the upper surface side of the lower substrate 14. Similarly, when the upper wirings UW1 and UW2 are made of multiple materials, a portion of the material of the upper wirings UW1 and UW2 may be formed on the lower surface side of the upper substrate 13, while the remaining material of the upper wirings UW1 and UW2 may be formed on the upper surface side of the lower substrate 14.

[0130] Furthermore, in this embodiment, an example is shown where the upper substrate 13 is prepared in step S110 and the lower substrate 14 is prepared in step S120, but this is not a limitation. For example, the order may be changed, such as preparing the upper substrate 13 after preparing the lower substrate 14, or the preparation of the upper substrate 13 and the lower substrate 14 may be performed in parallel.

[0131] Next, the surface of the frequency adjustment film 236 is removed (S130).

[0132] Specifically, the frequency adjustment films 236 of the multiple resonators 10 disposed on the lower substrate 14 are trimmed by ion milling, and the frequency of the resonator 10 is adjusted by the mass change of the vibrating arm 135. At this time, the surface of the protective film 235 may also be trimmed. This process S130 is equivalent to an example of a "frequency adjustment process before sealing" or a "first frequency adjustment process".

[0133] Next, the upper substrate 13 prepared in process S110 and the lower substrate 14 prepared in process S120 will be bonded together (S140).

[0134] Specifically, such as Figure 11 As shown, the lower surface of the upper substrate 13 and the upper surface of the lower substrate 14 are eutectic bonded through the joint 60. Figure 4 As shown, the upper substrate 13 and the lower substrate 14 are aligned so that terminals T1', T2' and upper wirings UW1, UW2 come into contact. After alignment, the upper substrate 13 and the lower substrate 14 are clamped using a heater or the like, and a heat treatment for eutectic bonding is performed. The temperature in the heat treatment for eutectic bonding is above the temperature of the common focal point, for example, 424°C or higher, and the heating time is, for example, about 10 minutes to 20 minutes. During heating, the upper substrate 13 and the lower substrate 14 are pressed, for example, by a pressure of about 5 MPa to 25 MPa. In this way, the bonding portion 60 eutectic bonds the lower surface of the upper substrate 13 and the upper surface of the lower substrate 14. The series of steps from step S110 to step S140 corresponds to an example of the "preparation of the assembly substrate" of the present invention.

[0135] Next, the front end of the vibrating arm 135 is made to collide with the inner wall of the cavity (S150).

[0136] Specifically, an electric field is applied to multiple resonators 10 via connecting wiring LL, simultaneously exciting the multiple resonators 10. At this time, an electric field stronger than that applied during normal use of the resonant device 1 is applied, increasing the amplitude of the resonators 10 (hereinafter also referred to as "overexcitation"). After overexcitation, the vibrating arms 135 of each of the multiple resonators 10 collide with the inner wall of their respective lower cover 20 or upper cover 30, and their front ends are cut off. Thus, the frequency of the resonators 10 is adjusted by the change in the mass of the vibrating arms 135. This step S150 is an example of a "frequency adjustment step after sealing" or a "second frequency adjustment step".

[0137] Next, remove the connection wiring LL (S160).

[0138] Specifically, metal layer ML2 is used as a mask to etch metal layer ML1. Thus, as... Figure 12As shown, the exposed metal layer ML1 from the metal layer ML2 is removed, leaving only the metal layers ML1 and ML2 in the areas corresponding to power terminals ST1 and ST2, ground terminal GT, and dummy terminal DT. Therefore, when dividing the assembly substrate 100, the generation of short-circuit defects caused by deformation of the connecting wiring LL can be suppressed. Furthermore, since photoresist is not required in the process of removing the connecting wiring LL, the manufacturing process can be simplified.

[0139] Next, the assembly substrate 100 is divided (S170).

[0140] Specifically, the upper substrate 13 and the lower substrate 14 are divided along the dividing line LN. The upper substrate 13 and the lower substrate 14 can be divided by cutting the upper substrate 13 and the lower substrate 14 with a cutting saw, or by using a stealth cutting technology that uses laser light to focus light and form a modified layer inside the substrate.

[0141] In process S170, the upper substrate 13 and the lower substrate 14 are divided along the dividing line LN, thereby monolithizing (chipping) the upper substrate 13 and the lower substrate 14 into each resonant device 1 having an upper cover 30 and a MEMS substrate 50 (lower cover 20 and resonator 10).

[0142] Next, variations of the above-described embodiments will be described. Furthermore, regarding... Figures 1 to 12 Structures that are identical or similar to those shown in the figures are labeled with the same or similar reference numerals, and their descriptions are omitted where appropriate. Furthermore, the same effects resulting from identical structures are not mentioned repeatedly.

[0143] (First variation)

[0144] Reference Figure 13 The structure of the composite substrate 200 involved in the first modified example will be described. Figure 13 This is a cross-sectional view that schematically illustrates the structure of the assembly substrate in one embodiment.

[0145] like Figure 13 As shown, the upper substrate 13 also has an organic insulating film L32 between the silicon oxide film L31 and the metal layer ML1. The silicon oxide film L31 and the organic insulating film L32 together constitute an example of the "insulating layer" of the present invention. The silicon oxide film L31 extends beyond the dividing line and is formed on approximately the entire upper surface of the Si wafer L3. The organic insulating film L32 has a connecting region LR extending beyond the dividing line LN and a central region CR separated from the dividing line LN. By forming an insulating layer from two insulating films (silicon oxide film L31 and organic insulating film L32), power terminals ST1 and ST2 can be formed at locations away from the through electrodes V1 and V2. Therefore, the design freedom is increased.

[0146] (Second variation)

[0147] Reference Figure 14 The structure of the composite substrate 300 involved in the second modified example will be described. Figure 14 This is a top view that schematically illustrates the structure of the assembly substrate in one embodiment.

[0148] like Figure 14 As shown, on the upper substrate of the assembly substrate 300, in addition to the connection wiring LLa that electrically connects multiple power terminals ST1, a connection wiring LLb that electrically connects multiple power terminals ST2 is also formed. The connection wirings LLa and LLb are formed from portions of the first metal film ML1 that extend from the area covered by the second metal film ML2. Before dividing the assembly substrate 300, the connection wirings LLa and LLb are removed by etching using the second metal film ML2 as a mask. In the assembly substrate 300, the upper electrodes 125B and 125C of each of the multiple resonators can be simultaneously turned on via the power terminals ST1 and the connection wiring LLa, and the upper electrodes 125A and 125D of each of the multiple resonators can be simultaneously turned on via the power terminals ST2 and the connection wiring LLb. The connection wiring LLa corresponds to an example of the "first connection wiring" according to the present invention, and the connection wiring LLb corresponds to an example of the "second connection wiring" according to the present invention. Furthermore, the assembly substrate 300 may also include a third connection wiring that electrically connects multiple ground terminals GT. Such a third connection wiring is formed from the first metal film ML1 in the same way as the connection wiring LLa and LLb, and is removed by etching using the second metal film ML2 as a mask before dividing the assembly substrate 300.

[0149] The exemplary embodiments of the present invention have been described above. A method for manufacturing a resonant device according to an embodiment of the present invention includes: preparing a composite substrate, the composite substrate comprising a first substrate and a second substrate, the first substrate having a plurality of resonators, the second substrate being bonded to the plurality of resonators on the first substrate, the plurality of resonators each having an upper electrode and a lower electrode, the composite substrate having a plurality of first power terminals electrically connected to the upper electrodes of each of the plurality of resonators, and a first connection wiring electrically connecting at least two of the plurality of first power terminals; and dividing the composite substrate into a plurality of resonant devices, the plurality of first power terminals being constituted by a first metal layer disposed on the second substrate opposite to the first substrate and a second metal layer covering the first metal layer, the first connection wiring being constituted by a portion of the first metal layer extending and protruding from a region covered by the second metal layer, the method for manufacturing the resonant device further comprising: removing the portion of the first metal layer extending and protruding from a region covered by the second metal layer before dividing the composite substrate into a plurality of resonant devices.

[0150] Therefore, when dividing the assembly substrate, since the first connection wiring formed beyond the dividing line is removed, the generation of short-circuit defects caused by deformation of the first connection wiring due to the dividing can be suppressed. In addition, before removing the first connection wiring, multiple resonant devices can be powered on simultaneously through the first connection wiring, enabling short-time and easy frequency adjustment, continuity checks, and other power-on operations.

[0151] In the above-described method for manufacturing a resonant device, the method may further include adjusting the frequencies of multiple resonators. Adjusting the frequencies of multiple resonators includes: applying a voltage to the multiple resonators through a first connection wiring, or measuring the frequencies of the multiple resonators through the first connection wiring.

[0152] In the above-described method for manufacturing a resonant device, the first metal layer may have a seed film for depositing the second metal layer by plating.

[0153] In the above-described method for manufacturing a resonant device, removing the portion of the first metal layer that protrudes from the area covered by the second metal layer may also involve: using the second metal layer as a mask to etch the first metal layer.

[0154] Therefore, there is no need to apply photoresist or other materials to remove the etching of the first interconnect wiring, which simplifies the manufacturing process.

[0155] In the above-described method for manufacturing a resonant device, the second substrate may have a semiconductor substrate and at least one insulating layer disposed between the semiconductor substrate and the first metal layer. The at least one insulating layer has a plurality of central regions separated from the dividing lines of the assembly substrate and a plurality of connecting regions intersecting the dividing lines.

[0156] Therefore, the chances of cutting insulating layers, which are more difficult to cut than semiconductor substrates, are reduced, thus suppressing the occurrence of cutting defects.

[0157] In the above-described method for manufacturing a resonant device, the substrate may further include: a plurality of second power terminals electrically connected to the upper electrodes of each of the plurality of resonators and insulated from the plurality of first power terminals; and a second connecting wiring that electrically connects at least two of the plurality of second power terminals, wherein the plurality of second power terminals are composed of a first metal layer and a second metal layer, and the second connecting wiring is composed of a portion of the first metal layer that extends and protrudes from the area covered by the second metal layer.

[0158] This enables more efficient and convenient frequency adjustment, continuity checks, and other operations performed while the circuit is powered on.

[0159] In the above-described method for manufacturing a resonant device, the substrate may also include a plurality of grounding terminals electrically connected to the lower electrodes of each of the plurality of resonators, and a third connecting wiring electrically connecting at least two of the plurality of grounding terminals. The plurality of grounding terminals are composed of a first metal layer and a second metal layer, and the third connecting wiring is composed of a portion of the first metal layer that extends and protrudes from the area covered by the second metal layer.

[0160] This enables more efficient and convenient frequency adjustment, continuity checks, and other operations performed while the circuit is powered on.

[0161] Furthermore, according to an embodiment of the present invention, a resonant device includes: a first substrate having a resonator having an upper electrode and a lower electrode; and a second substrate bonded to the resonator side of the first substrate, the second substrate having: a semiconductor substrate; a first power supply terminal and a second power supply terminal disposed on the side of the semiconductor substrate opposite to the first substrate, electrically connected to a portion of the upper electrode and insulated from each other; a ground terminal disposed on the side of the semiconductor substrate opposite to the first substrate and electrically connected to the lower electrode; and an insulating layer disposed between the semiconductor substrate and the first power supply terminal and between the semiconductor substrate and the second power supply terminal, wherein, when viewed from above on the side of the second substrate opposite to the first substrate, the insulating layer has a central region separated from the outer edge of the second substrate and a connecting region extending from the central region and protruding to the outer edge of the second substrate.

[0162] As described above, according to one aspect of the present invention, it is possible to provide a resonant device with improved productivity and a method for manufacturing the same.

[0163] Furthermore, the embodiments described above are for the purpose of facilitating understanding of the present invention and are not intended to limit or interpret the scope of the present invention. The present invention can be modified / improved without departing from its spirit, and its equivalents are also included in the present invention. That is, any structure obtained by appropriately applying design changes to the embodiments and / or modifications by those skilled in the art, as long as it possesses the features of the present invention, is also included within the scope of the present invention. For example, the elements, their configurations, materials, conditions, shapes, dimensions, etc., of the embodiments and / or modifications are not limited to the illustrated content and can be appropriately modified. In addition, the embodiments and modifications are illustrative, and of course, partial substitutions or combinations of the structures shown in different embodiments and / or modifications are possible; such structures, as long as they contain the features of the present invention, are included within the scope of the present invention.

[0164] Explanation of reference numerals in the attached figures

[0165] 1…resonant device;

[0166] 10… harmonic oscillator;

[0167] 13...upper base plate;

[0168] 14…lower substrate;

[0169] 20… Bottom cover;

[0170] 30…top cover;

[0171] 50…MEMS substrate;

[0172] 60…joint;

[0173] 65…Connecting components;

[0174] 100...collection substrate;

[0175] 110… Keep your arm still;

[0176] 120…vibrating part;

[0177] 125, 125A, 125B, 125C, 125D… Upper electrode;

[0178] 129…lower electrode;

[0179] 130…base;

[0180] 135, 135A, 135B, 135C, 135D… vibrating arms;

[0181] 140… Maintaining section;

[0182] 235… protective film;

[0183] 236…frequency adjustment membrane;

[0184] F2…Si substrate;

[0185] F3…piezoelectric film;

[0186] L1, L3…Si wafers;

[0187] L31…silicon oxide film;

[0188] LL, LL1, LL2… connection wiring;

[0189] LN, LN1, LN2… dividing lines;

[0190] ST1, ST2... power terminals;

[0191] GT…grounding terminal;

[0192] DT…dummy terminal.

Claims

1. A method for manufacturing a resonant device, comprising: A composite substrate is prepared, comprising a first substrate and a second substrate. The first substrate has a plurality of resonators, and the second substrate is bonded to the plurality of resonators on the first substrate. Each of the plurality of resonators has an upper electrode and a lower electrode. The composite substrate has a plurality of first power terminals electrically connected to the upper electrodes of each of the plurality of resonators, and first connection wiring electrically connecting at least two of the plurality of first power terminals. The aforementioned substrate is divided into multiple resonant devices. The aforementioned plurality of first power terminals are composed of a first metal layer disposed on the side opposite to the first substrate of the second substrate, and a second metal layer covering the first metal layer. The first connection wiring described above is composed of a portion of the first metal layer that extends and protrudes from the area covered by the second metal layer. The method for manufacturing the resonant device further includes removing, before dividing the assembly substrate into a plurality of resonant devices, a portion of the first metal layer that extends protruding from the area covered by the second metal layer.

2. The method for manufacturing the resonant device according to claim 1, wherein, It also includes adjusting the frequencies of the aforementioned multiple harmonic oscillators. Adjusting the frequency of the plurality of resonators includes: applying a voltage to the plurality of resonators through the first connection wiring, or measuring the frequency of the plurality of resonators through the first connection wiring.

3. The method for manufacturing the resonant device according to claim 1 or 2, wherein, The first metal layer has a seed film for depositing the second metal layer by plating.

4. The method for manufacturing the resonant device according to claim 1 or 2, wherein, Removing the portion of the first metal layer that protrudes from the area covered by the second metal layer includes: using the second metal layer as a mask to etch the first metal layer.

5. The method for manufacturing the resonant device according to claim 1 or 2, wherein, The second substrate has a semiconductor substrate and at least one insulating layer disposed between the semiconductor substrate and the first metal layer. The aforementioned at least one insulating layer has a plurality of central regions separated from the dividing lines of the aforementioned composite substrate, and a plurality of connecting regions intersecting the aforementioned dividing lines.

6. The method for manufacturing the resonant device according to claim 1 or 2, wherein, The aforementioned substrate further includes: a plurality of second power terminals electrically connected to the upper electrodes of each of the plurality of resonators and insulated from the plurality of first power terminals; and second connection wiring for electrically connecting at least two of the plurality of second power terminals. The aforementioned plurality of second power terminals are composed of the aforementioned first metal layer and the aforementioned second metal layer. The second connection wiring described above is composed of a portion of the first metal layer that extends and protrudes from the area covered by the second metal layer.

7. The method for manufacturing the resonant device according to claim 1 or 2, wherein, The aforementioned substrate further includes: a plurality of ground terminals electrically connected to the lower electrodes of each of the plurality of resonators; and a third connection wiring that electrically connects at least two of the plurality of ground terminals. The aforementioned plurality of grounding terminals are composed of the aforementioned first metal layer and the aforementioned second metal layer. The aforementioned third connection wiring is composed of a portion of the aforementioned first metal layer that extends and protrudes from the area covered by the aforementioned second metal layer.

8. A resonant device comprising: A first substrate has a resonator, the resonator having an upper electrode and a lower electrode; and The second substrate is bonded to the resonator side of the first substrate. The second substrate described above has: Semiconductor substrate; The first power terminal and the second power terminal are disposed on the side of the semiconductor substrate opposite to the first substrate, electrically connected to a portion of the upper electrode and insulated from each other; A grounding terminal is disposed on the side of the semiconductor substrate opposite to the first substrate and is electrically connected to the lower electrode; and An insulating layer is disposed between the semiconductor substrate and the first power terminal, and between the semiconductor substrate and the second power terminal. When viewed from above on the side of the second substrate opposite to the first substrate, the insulating layer has a central region separated from the outer edge of the second substrate, and a connecting region extending from the central region and protruding to the outer edge of the second substrate.

Images