An operating system memory swapping mechanism to reduce ineffective I / O

Abstract

The application discloses a mechanism for reducing invalid I / O of an operating system memory page swap, comprising the following steps: 1, constructing a memory page logical reuse mode evaluation model; 2, locating frequently swapped-in and swapped-out pages through a page state monitor and a page error handler; 3, a page-level logical reuse mode sampling component obtains a page reuse mode through periodic sampling and a regression learning method; 4, through the page reuse mode, performing page swap-in and swap-out and list elimination and promotion between lists in a two-level queue. The method can monitor frequently swapped-in and swapped-out pages, learn the reuse mode of the pages, accurately predict future use of the pages, design a new page swap-out mechanism, greatly reduce invalid page exchange I / O, and thus improve the overall throughput of the system and the performance of specific programs.

Description

Technical fields:

[0001] This invention relates to the field of memory paging mechanism technology for operating systems (OS), and more particularly to an operating system memory paging mechanism that can reduce invalid I / O from memory to hard disk and significantly improve the overall system performance. Background technology:

[0002] With the rapid development of computer technology, modern large-scale computer systems typically feature large-capacity Dynamic Random Access Memory (DRAM) and high-performance storage devices (such as SSDs and NVMe). These hardware configurations allow for ever-increasing computing and storage capabilities. However, a significant performance gap exists between main memory and storage devices, severely limiting the performance of computer systems. To bridge this performance gap, adopting efficient mechanisms to store data in main memory and thus minimize disk I / O is a wise approach.

[0003] In modern computer systems, there is frequent interaction between main memory and storage devices. Although modern computers, especially cloud servers, are equipped with large-capacity main memory hardware, the capacity of main memory is not unlimited. When memory pressure occurs, pages in main memory will be swapped to storage devices; when swapped-out pages are used again, the system will swap these pages from storage devices back to main memory. These two processes are called swap-out and swap-in, respectively.

[0004] For swapping out, the operating system needs to call the page reclamation routine to free up pages until the required number of available pages is reached. For example, in Linux, kswapd scans processes and attempts to swap out some cold (inactive) pages from each process's address space. However, when swapped-out memory pages are accessed again, the operating system has to swap them back into main memory from storage devices. In many cases, frequent swapping in and out can lead to performance penalties. If frequently used pages (e.g., hot / active pages) are incorrectly swapped out too often, the overall system performance degradation will be even more severe.

[0005] We have observed that the existing memory swapping mechanisms in modern operating systems (such as Linux and FreeBSD) often blindly swap hot pages / active pages (i.e., frequently used memory pages) to the hard drive, resulting in a large number of unnecessary swaps occurring frequently between main memory and storage devices, which in turn affects the overall performance of the system.

[0006] The following section will first introduce the page swapping algorithms used in existing operating systems, and then analyze the problems existing in the current page swapping algorithms through experiments.

[0007] Modern operating systems typically use an LRU-based page swapping algorithm. Taking Linux as an example, the memory management module uses two linked lists based on the LRU algorithm to organize pages. These two lists are called the active list and the inactive list, which together constitute the hot / cold page classification mechanism in the Linux memory management module. The active list contains all active pages (i.e., hot pages) of all processes, while the inactive list contains inactive pages (i.e., cold pages) that may be reclaimed or swapped to storage devices. The operating system determines the hot / cold status of pages by monitoring the access bit in the Page Entrance Table (PTE) and performs page promotion and demotion operations accordingly. When the access bit in the PTE is 1 (1 indicates that the page has been accessed during the sampling period), the operating system considers the current page a hot page and keeps it in the active list or promotes it from the inactive list. When the access bit in the PTE is 0 (0 indicates that the page has not been accessed during the sampling period), the operating system considers the current page a cold page and demotes it to the inactive list or swaps it out of the inactive list. It can be observed that the page swapping algorithm in the kernel is a typical two-chance algorithm, which can identify page attributes (i.e., hot and cold pages) to a certain extent.

[0008] Specifically, the page swapping mechanism will be triggered when an application requests more memory than the system's remaining memory or when memory pressure reaches the operating system's preset threshold. First, the kernel will calculate the number of pages that need to be scanned based on the parameter `nr`, where `nr` is determined by the following formula:

[0009] `nr = len(list) >> p`, where `p` represents the list priority, and the `len()` function retrieves the list length. Then, the kernel scans the inactive list, using a reverse mapping to find the corresponding page table entry in the page table. When the access bit of the page table entry is 0, the page is swapped out; when the access bit is 1, the page is promoted to the active list. Next, because the ratio between the active and inactive lists is 1.5, the number of pages `m` that need to be demoted from the active list is calculated based on the current length of the inactive list. Finally, the active list is scanned based on the calculated value `m`, again using a reverse mapping to find the corresponding page table entry in the page table. When the access bit of the page table entry is 0, the page is demoted; when the access bit is 1, the page remains in the active list.

[0010] The above mechanism works well in some situations, but the two-level LRU strategy does not consider page reuse patterns, and therefore cannot handle random memory behavior or situations where application memory access patterns frequently change. For example, as long as the page access bit is 1 during kernel scanning, the page is considered an active page regardless of whether it has been accessed once or 1000 times within the sampling time. Therefore, some frequently reused pages may be placed in the latter half of the active list and then demoted to the inactive list, making these pages potential swappers. It is also worth noting that the page swapping thread only scans a portion of the address space specific to the application, not the global address space. Therefore, the existing method inevitably increases the likelihood of swapping hot pages.

[0011] On a cloud server with 120GB of DDR4 main memory, the following load was tested using YCSB: Redis (30GB), Memcached (30GB), and MySQL (30GB), with vmstat used to monitor page swapping in and out during runtime. Taking Redis as an example, the experiment found that Redis had a very high number of page swaps within 1500 seconds, including not only a large number of swap-out operations but also a large number of swap-in operations. This means that many swapped-out pages contained pages that would be accessed again soon, so the operating system had to move them back to main memory. Obviously, under these circumstances, the existing operating system's page swapping mechanism is no longer effective. MySQL and Memcached exhibited similar behavior.

[0012] By monitoring the access bits in the Page Entity Transfer (PTE) corresponding to a page in a cyclical manner, page-level logical reuse patterns can be obtained. For example, within a specific sampling period, a page with an access bit change sequence of 11011 is more active (hotter) than a page with an access bit change sequence of 10001. Our experiments show that reuse patterns change significantly even within very short timeframes. Therefore, making page swapping decisions based on the instantaneous state of access bits in existing operating systems is unreasonable.

[0013] From the above description, it's easy to see that hot pages with different reuse patterns that are about to be used are likely to be treated as cold pages and swapped out of memory. However, these pages will be accessed soon, leading to frequent swapping in and out. Furthermore, the operating system's inactive list contains memory pages from all applications. Therefore, the existing swapping mechanism blindly swaps hot pages belonging to different applications out of main memory, resulting in overall performance degradation for all running applications. Summary of the Invention:

[0014] To address the problems of the aforementioned methods, this invention provides a memory paging mechanism for Linux systems, aimed at reducing invalid I / O from memory to disk and significantly improving overall system performance. During operation, this method uses the present_bit in the Page Table Entry (PTE) to monitor and mark candidate pages to be swapped. Then, it monitors the logical page-level reuse distance captured by the access bit. Finally, it uses a regression learning-based approach to learn page reuse patterns and make swapping decisions. Compared to the two-level LRU mechanism in existing operating systems (such as Linux), this method is more sensitive to changes in memory patterns, accurately learns memory page reuse patterns, and avoids invalid memory swapping.

[0015] Specifically, an operating system memory paging method to reduce invalid I / O consists of three components that operate in a pipelined manner. First, this method employs a Page Presence Monitor (PPM) to capture page swapping information. Second, it incorporates a Page-level Logic Reuse Pattern Sampling (PHS) component to learn whether a specific page is being used. Finally, it introduces a novel page swapping component that manages pages based on reuse patterns, considering page-level logical reuse patterns when making swapping decisions to avoid swapping hotspots and pages that will be used out of main memory.

[0016] The working process of each component is as follows:

[0017] (a) Page Presence Monitor (PPM)

[0018] 1. The page state monitor monitors the existence of pages and locates memory regions where swapping occurs. The page state monitor is an online memory page state monitoring module in the operating system kernel;

[0019] 2. The Page State Monitor monitors the current bit in the Page Entrance Table (PTE). A current bit of 1 indicates that the page is in main memory, while 0 indicates that the page is not in main memory. When an application accesses a memory page, the operating system first looks up the corresponding PTE in the page table, then checks the value of the current bit in the PTE. If the current bit is 0 (i.e., not in main memory), the page fault handler in the operating system is triggered. The Page State Monitor is located within the page fault handler and begins working when the page fault handler is triggered. The page fault handler calls the `do_swap_page()` function to move the page into main memory. If the current page's PTE does not exist, a PTE is created for these pages, and the current bit of the corresponding PTE is set to 1. At this time, the Page State Monitor records that the page has been swapped in / out and increments the value of the reserved bit in the corresponding PTE by 1. Using this method, the Page State Monitor can accurately identify and mark pages that have been swapped during runtime, and the value of the reserved bit records the number of swaps for a specific page.

[0020] 3. As mentioned earlier, experimental results show that the swapped-out pages contain many hot pages that were incorrectly swapped out, and some of these pages have even been swapped in / out multiple times. Using a page state monitor, the operating system can locate memory regions in the application's address space that are being swapped out.

[0021] (ii) Page-level logic reuse pattern sampling component (PHS)

[0022] 1. After the page state monitor detects pages that frequently swap in and out, this method designs a page-level logical reuse pattern sampling component to learn the reuse patterns of these pages. This component is also implemented in the operating system kernel and works in conjunction with the page state monitor. After acquiring the pages frequently swapped in and out identified by the page state monitor, the component monitors the access bits of these pages in the Page Entrance Table (PTE) and calculates the page reuse pattern in a cyclical manner. For the access bit, 1 indicates that the page has been accessed during the sampling period, and 0 indicates that the page has not been accessed during the sampling period. After each scan, the component clears the access bits in the page PTE (i.e., it calls `pte_mkold()` to set the access bits to 0), and then continuously scans these PTEs to obtain the page reuse pattern over a period of time.

[0023] 2. By iteratively scanning the access bits in the corresponding Page Entity Templates (PTEs) of each page, the page-level logic reuse pattern sampling component can obtain the logical reuse patterns of these pages. The component uses the values ​​of the access bits as the page's logical reuse pattern and accumulates them into the reserved bits in the corresponding PTE. Accumulating the logical reuse pattern into the reserved bits of the PTE incurs no space overhead, making it a space-efficient approach. Specifically, if the page-level logic reuse pattern sampling component iterates 200 times within a certain period, a page with a cumulative access bit value of 150 has a higher reuse probability than a page with a cumulative access bit value of 15.

[0024] 3. The page-level logic reuse pattern sampling component uses a loop to check access bits, which inevitably incurs some time overhead. To achieve a more cost-effective result, the key is to find the optimal number of loop samplings. If the number of loop samplings is too small, the page-level logic reuse pattern sampling component cannot obtain enough information; if the number is too large, excessive loop scanning will cause frequent locking of the page table, resulting in non-negligible time overhead. This method first uses 200 as the upper limit of the number of loops for experimentation, and then gradually reduces the number of samplings without affecting the sampling accuracy, thereby reducing sampling overhead. Through the above method, this method found that when the number of loops is 16, using a regression-based learning method, the page-level logic reuse pattern sampling component can obtain similar results to when the number of loops is 200. Therefore, this method defines the regression function as follows:

[0025]

[0026] Where l is the number of iterations, and R0 is the number of times a specific page is reused after l iterations. The above formula can yield the reuse pattern R for any number of iterations. This method significantly reduces sampling time overhead by 79.6% after reducing the number of iterations to 16.

[0027] (III) Page Switching Component

[0028] 1. This method introduces a novel page swapping component to replace the existing page swapping component in the operating system. Similar to the original operating system's page swapping component, the new component also includes an active page list and an inactive page list. The active list contains active pages (i.e., pages that are likely to be accessed soon based on their reuse patterns), while the inactive list contains candidate pages for swapping. Unlike previous schemes, page organization, page promotion, page eviction, and page swapping all follow the page reuse patterns learned by the page state monitor and the page-level logical reuse pattern sampling component. The reason for maintaining two queues is to utilize a quadratic chance algorithm to mitigate potential identification errors during initialization.

[0029] 2. Compared to previous LRU-based swapping mechanisms, this method reorganizes memory pages according to reuse patterns and identifies candidate pages for swapping. Based on reuse patterns, this method can more accurately select pages that will not be used in the future and swap them out of memory. It is worth noting that although a page is swapped out, its Page Entity Timetable (PTE) is not destroyed. Therefore, the page reuse patterns learned by this method are still stored in the PTE. When a page is swapped back into memory, it can be restarted and further learned, fully utilizing all information throughout the page's entire lifecycle.

[0030] 3. The active and inactive lists are reorganized according to reuse patterns. When an application attempts to access a page not in main memory, the page fault handler is triggered, loading these pages into memory or swapping them out of storage devices. At this time, the page state monitor locates the swapped memory pages and passes the information to the page-level logical reuse pattern sampling component to learn the page's reuse pattern. The page swapping component then places the pages in the active list and organizes them according to the logical reuse pattern. The page swapping mechanism is triggered when the application requests more memory than the system's remaining memory or when memory pressure reaches the operating system's preset threshold. First, a new page swap will calculate the number of pages to be scanned based on the parameter nr, where nr is determined by the following formula:

[0031] `nr = len(list) >> p`, where `p` represents the list priority, and the `len()` function retrieves the list length. Then, the new page swapping component scans the inactive list and selects pages within a certain range to swap out based on the page's logical reuse pattern. It then reorganizes the inactive list according to the same pattern to ensure it remains ordered. Since the ratio between the active and inactive lists is 1.5, the length `m` of the active list is calculated based on the current length of the inactive list. Using `m`, the active and inactive lists are scanned, and pages in both lists are compared based on their reuse patterns. Pages with smaller reuse pattern values ​​in the active list are removed, while pages with larger reuse pattern values ​​in the inactive list are promoted. Attached image description:

[0032] Figure 1 This is a flowchart of the Linux system memory paging mechanism for reducing invalid I / O proposed in this invention.

[0033] Figure 2 This is a schematic diagram illustrating the large amount of page swapping detected by this invention in the existing two-level LRU mechanism of Linux.

[0034] Figure 3This is a schematic diagram illustrating the page reuse pattern and page swapping mismatch problem detected by the present invention.

[0035] Figure 4 This is a schematic diagram illustrating the changes in page reuse patterns detected by the present invention during the application lifecycle.

[0036] Figure 5 This is an architecture diagram of the Linux system memory paging mechanism for reducing invalid I / O proposed in this invention. Specific implementation methods

[0037] The invention will be further described in detail with reference to the accompanying drawings.

[0038] As shown in the figure, this method consists of three components that operate in a pipeline manner. First, this method designs a Page Presence Monitor (PPM) to capture page swapping information; second, this method designs a Page-level Logic Reuse Pattern Sampling (PHS) component to learn whether a specific page is being used; finally, this method designs a new page swapping component that manages pages based on reuse patterns, considering page-level logical reuse patterns when making swapping decisions to avoid swapping hotspots and pages that will be used out of main memory.

[0039] The page state monitor monitors the current bit in the Page Entrance Table (PTE). A current bit of 1 indicates that the page is in main memory, while 0 indicates that the page is not in main memory. When an application accesses a memory page, the operating system first looks up the corresponding PTE in the page table, then checks the value of the current bit in the PTE. If the current bit is 0 (i.e., not in main memory), the page fault handler in the operating system is triggered. The page state monitor resides within the page fault handler and begins operating when the page fault handler is triggered. The page fault handler calls the `do_swap_page()` function to move the page into main memory. If the PTE for the current page does not exist, a PTE is created for these pages, and the current bit of the corresponding PTE is set to 1. At this point, the page state monitor records that the page has been swapped in / out and increments the value of the reserved bit in the corresponding PTE by 1. Using this method, the page state monitor can accurately identify and mark pages that have been swapped during runtime, and the value of the reserved bit records the number of swaps for a specific page.

[0040] After the page state monitor detects pages that are frequently swapped in and out, this method designs a page-level logical reuse pattern sampling component to learn the reuse patterns of these pages. This component is also implemented in the operating system kernel and works in conjunction with the page state monitor. After acquiring the pages frequently swapped in and out identified by the page state monitor, the component monitors the access bits of these pages in the Page Entrance Table (PTE) and calculates the page reuse pattern in a cyclical manner. For the access bit, 1 indicates that the page has been accessed during the sampling period, and 0 indicates that the page has not been accessed during the sampling period. After each scan, the component clears the access bits in the page PTE (i.e., it calls `pte_mkold()` to set the access bits to 0), and then continuously scans these PTEs to obtain the page reuse pattern over a period of time.

[0041] This method introduces a novel page swapping component with two page lists: an active list and an inactive list. These lists are reorganized based on reuse patterns. When an application attempts to access a page not in main memory, a page fault handler is triggered, loading these pages into memory or swapping them out of storage. At this point, the page state monitor locates the swapped memory pages and passes this information to the page-level logical reuse pattern sampling component to learn the page's reuse pattern. The page swapping component then places the pages in the active list and organizes them according to the logical reuse pattern. The page swapping mechanism is triggered when the application requests more memory than the system's remaining memory or when memory pressure reaches the operating system's preset threshold. The new page swapping mechanism first calculates the number of pages to be scanned based on the parameter nr, which is determined by the following formula:

[0042] nr = len(list) >> p

[0043] Here, p represents the priority of the list, and the len() function can obtain the length of the list. Then, the new page swapping component will scan the inactive list and select pages within a certain range to swap out based on the page's logical reuse pattern. It will also reorganize the inactive list according to the page's logical reuse pattern to ensure that the inactive list is ordered. After that, since the ratio between the active list and the inactive list is 1.5, the length m of the active list will be calculated based on the length of the current inactive list. Based on the calculated value m, the active list and the inactive list will be scanned. The pages in the two lists will be compared according to the page reuse pattern. Pages with smaller reuse pattern values ​​in the active list will be eliminated, and pages with larger reuse pattern values ​​in the inactive list will be promoted.

[0044] The above method was implemented in an Ubuntu Linux distribution with kernel version 5.10. Of the three parts, the page state monitor resides in the kernel function `do_swap_page()`, and the `do_add_swap()` function is added to modify the reserved bit record reuse pattern in the PTE. The page state monitor and the page-level logical reuse pattern sampling component run in a pipeline. This method implements the `do_rl()` function for regression prediction, `shrink_iswap_active_list()` for degrading pages, and `shrink_iswap_inactive_list()` for promoting pages.

[0045] This invention discloses an operating system memory paging mechanism to reduce invalid I / O, comprising the following steps: 1. Constructing a memory page logical reuse pattern evaluation model; 2. Locating frequently swapped-in / out pages through a page fault handler using a page state monitor; 3. Obtaining page reuse patterns through a page-level logical reuse pattern sampling component using periodic sampling combined with regression learning; 4. Performing page swapping in / out and list eviction and promotion in a two-level queue based on page reuse patterns. This method monitors frequently swapped-in / out pages and learns page reuse patterns, accurately predicting future page usage behavior. Furthermore, it designs a novel page swapping mechanism, significantly reducing invalid page swapping I / O, thereby improving overall system throughput and the performance of specific programs.

Claims

1. An operating system memory paging method for reducing invalid I / O, characterized in that, This includes the Page State Monitor (PPM), which operates in a pipeline manner and is implemented by the operating system kernel; the Page-Level Logic Reuse Pattern Sampling Component (PHS); and the Page Switching Component. The Page State Monitor (PPM) is deployed inside the page error handler and is only activated when the page error handler is triggered. The Page State Monitor (PPM) monitors the current bit of the Page Table Entry (PTE), identifies and marks pages that have been swapped, and accumulates the number of page swaps in and out in the reserved bit of the PTE. The Page-Level Logical Reuse Pattern Sampling Component (PHS) works in conjunction with the Page State Monitor (PPM). After the Page State Monitor detects pages that frequently swap in and out, the Page-Level Logical Reuse Pattern Sampling Component learns the reuse patterns of these pages. The page state monitor (PPM) identifies pages that frequently switch in and out as sampling objects, and access bits are sampled cyclically only for these pages. During the sampling process, the access bits of the corresponding page table entry (PTE) are read and cleared cyclically to obtain the page logic reuse mode of the page. The page switching component maintains an active list and an inactive list, and uses the page logic reuse mode output by the page-level logic reuse mode sampling component (PHS) as the basis for list adjustment to adjust page organization, page promotion, page eviction, and page switching out. When an application requests more memory than the system's remaining memory or when memory pressure reaches the operating system's preset threshold, the page swapping mechanism will be triggered. Based on the page logic reuse pattern, the pages in the two lists are compared. The page with the smaller reuse pattern value in the active list is eliminated, and the page with the larger reuse pattern value in the inactive list is promoted.

2. The method according to claim 1, characterized in that, The Page State Monitor (PPM) performs the following process: When an application accesses a page that is not in main memory, it triggers a page fault handler, and the PPM starts up when the page fault handler is triggered; the page fault handler swaps the corresponding page into main memory, and the PPM monitors the existence of the page and locates the memory region where the swap occurred.

3. The method according to claim 1, characterized in that, The page-level logical reuse pattern sampling component performs the following process: by cyclically scanning the access bits in the corresponding PTE of the page, the page-level logical reuse pattern sampling component can obtain the logical reuse pattern of these pages; the page-level logical reuse pattern sampling component uses the value of the access bit as the page logical reuse pattern and adds it to the reserved bit in the corresponding PTE of the page.

4. The method according to claim 1, characterized in that, The page swapping component executes the following logic: the active list and inactive list are reorganized according to the reuse mode; the page swapping component will scan the inactive list, select a range of pages to swap out according to the page's logical reuse mode, and reorganize the inactive list according to the page's logical reuse mode to ensure that the inactive list is ordered. Calculate the target length of the active list based on the current length of the inactive list, and then scan the active and inactive lists.

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