A multi-thread concurrent key storage method, device and storage medium

CN116796347BActive Publication Date: 2026-08-21MATRICTIME DIGITAL TECH CO LTD
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Patent Information

Application Number
CN202310772967.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-06-28
Publication Date
2026-08-21
Estimated Expiration
2043-06-28

AI Technical Summary

Technical Problem

[0005]发明目的:本发明目的是提供一种多线程并发密钥存储方法、设备及存储介质,解决了现有的单线程传输过程会出现密钥数据传输拥堵的问题;以及解决了现有的多线程技术对线程与存储器之间进行调度比较单一,不能将密钥传输的速率达到最大化的问题

Benefits of technology

[0020]本发明的有益效果:本发明首先通过密钥的传输速率和线程的读取速率确定线程的数量,从而将最大化的发挥密钥产生的速率优势,然后根据存储器的存储速率配置对应的线程数量,将所有的线程同时工作,在线程的传输过程中,避免了密钥数据拥堵的情况;而且本发明通过对存储器的存储速率与线程的读取速率的比对,根据不同的比对结果进行不同数量的线程配置,从而使得时时刻刻都能将密钥传输的速率达到最大化,彻底解决密钥数据传输拥堵的问题。

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Abstract

The application discloses a kind of multithread concurrent key storage method, equipment and storage medium, wherein method includes: first receiving the request of generating key, the amount of key generation is obtained according to the information in request and the number of memory for storing key;Then generate key through random number generator according to request, the key transmission to cache pool is generated, and the transmission rate of key is obtained;Then establish thread in cache pool, and determine the number of thread according to the transmission rate of key and the maximum reading rate of single thread;Finally, the corresponding number of threads is configured according to the storage rate of memory, and finally the key is transmitted to each memory for storage by thread.The application compares the storage rate of memory and the reading rate of thread, and different number of threads is configured according to different comparison results, so that the transmission rate of key can be maximized at all times, and the problem of key data transmission congestion is completely solved.
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Description

Technical Field

[0001] This invention relates to the field of key storage, and more specifically to a multi-threaded concurrent key storage method, device, and storage medium. Background Technology

[0002] In cryptography, a key is a secret piece of information used to perform cryptographic applications such as encryption, decryption, and integrity verification. Keys are a crucial resource, playing a vital role in numerous fields, including scientific research and national defense. Specifically, keys are widely used in numerical computation and simulation, cryptography, network security, big data storage, and digital communications.

[0003] Currently, with the development of information technology, key transmission after generation typically uses a traditional single-threaded approach, meaning only one thread can run at a time. Generally, the key generation rate is higher than the thread's reading rate, leading to key data transmission congestion. Therefore, traditional single-threaded transmission cannot fully utilize the speed advantage of key generation. Furthermore, most memory storage speeds far exceed the thread's reading speed, so the main time consumed by traditional key storage execution is in thread transmission. Utilizing multi-threading technology for concurrent processing can significantly reduce key storage execution time.

[0004] However, existing multithreading technologies mainly focus on thread creation and management. They are relatively simple in terms of how to schedule threads and memory based on speed, and cannot maximize the key transmission rate. Therefore, even if existing multithreading technologies are used for key transmission, key data congestion will still occur. Summary of the Invention

[0005] Purpose of the invention: The purpose of this invention is to provide a multi-threaded concurrent key storage method, device, and storage medium, which solves the problem of key data transmission congestion in existing single-threaded transmission processes; and solves the problem that existing multi-threaded technologies have a relatively simple scheduling of threads and memory, and cannot maximize the key transmission rate.

[0006] Technical solution: This invention provides a multi-threaded concurrent key storage method, comprising the following steps:

[0007] (1) Receive a request to generate a key, obtain the number of keys to be generated and the number of memory units to store the keys according to the information in the request; then generate a key through a random number generator according to the request, transmit the generated key to the cache pool, and obtain the key transmission rate;

[0008] (2) Next, create threads in the cache pool and determine the number of threads based on the key transmission rate and the maximum read rate of a single thread;

[0009] (3) Configure the number of threads according to the storage rate of the memory, and finally transmit the key to each memory for storage through the threads.

[0010] Furthermore, the storage rate of a single memory is greater than or equal to the maximum read rate of a single thread.

[0011] Furthermore, the specific process of determining the number of threads based on the key transmission rate and the maximum read rate of a single thread is as follows:

[0012] First, obtain the key transmission rate and the maximum read rate of a single thread, denoted as a and b respectively. Then, divide the key transmission rate a by the maximum read rate b of the thread and round up to obtain the value c. The number of threads is c.

[0013] Furthermore, the key reading rate of the first to the (c-1)th threads in the c threads is b, and the key reading rate of the cth thread is a - b*(c-1).

[0014] Furthermore, the specific process of configuring the corresponding number of threads based on the storage rate of the memory is as follows:

[0015] 1) First, obtain the storage rate of the memory, denoted as d. Then, divide the storage rate of the memory d by the maximum read rate b of a single thread and round down to obtain the value e.

[0016] 2) Then, the values ​​e and c are compared. If e is greater than or equal to c, c threads are connected to the first memory in the storage, and the key is transmitted to the first memory for storage. After the first memory is full, c threads are connected to the second memory in the storage, and the key is transmitted to the second memory for storage. This process continues until all memory locations have stored the key. If e is less than c, the quotient of c divided by e is taken as f. The key is transmitted to f memory locations simultaneously, with e threads connected to each memory location. After f memory locations are full, the key transmission continues to the remaining f memory locations simultaneously, and so on, storing the key in memory locations in ascending order. The remaining ce*f threads store the key in the last memory location. After the last memory location is full, ce*f threads are connected to the second-to-last memory location in the storage, and the key is transmitted to the second-to-last memory for storage. This process continues, storing the key in memory locations in descending order, until all memory locations have stored the key.

[0017] Furthermore, the storage device is a hard disk or RAM.

[0018] The present invention also includes a computer device comprising at least a processor and a memory, wherein the processor is configured to implement the multi-threaded concurrent key storage method as described above when executing a computer program stored in the memory.

[0019] The present invention also includes a computer-readable storage medium storing a computer program that, when executed by a processor, implements the multi-threaded concurrent key storage method as described above.

[0020] The beneficial effects of this invention are as follows: First, this invention determines the number of threads by the key transmission rate and the thread reading rate, thereby maximizing the advantage of key generation rate. Then, it configures the corresponding number of threads according to the storage rate of the memory, allowing all threads to work simultaneously. During thread transmission, key data congestion is avoided. Furthermore, this invention compares the storage rate of the memory with the thread reading rate, and configures different numbers of threads based on different comparison results, thereby maximizing the key transmission rate at all times and completely solving the problem of key data transmission congestion. Attached Figure Description

[0021] Figure 1 This is a flowchart of the present invention;

[0022] Figure 2 The diagram is an example illustration of the present invention. Detailed Implementation

[0023] The present invention will be further described below with reference to the accompanying drawings and embodiments:

[0024] Currently, existing keys are transmitted using a single thread after generation. Because factors such as transmission and retrieval rates are not considered, key data transmission congestion can occur. Although multi-threading can reduce key storage execution time, it still cannot maximize the key transmission rate, and key data congestion will still exist.

[0025] like Figure 1 As shown, this invention first determines the number of threads based on the key transmission rate and the thread reading rate, thereby maximizing the key generation rate advantage. Then, it configures the corresponding number of threads according to the memory's storage rate, allowing all threads to work simultaneously. During the thread transmission process, the key transmission rate is maximized at all times. The specific steps are as follows:

[0026] (1) Receive a request to generate a key, and obtain the number of keys to be generated and the number of storage devices to store the keys according to the information in the request. The storage devices can be hard disks or memory. In this embodiment, the number of storage devices is 10, and all storage devices have the same storage rate. The storage devices are hard disks. Then, generate a key through a random number generator according to the request. The key generation can be done using an existing random number generator. Then, transmit the generated key to the cache pool and obtain the key transmission rate. It should be noted that the ratio of the key generation rate to the key transmission rate is the conventional 1:1. In order to avoid key data transmission congestion, the number of threads will be determined first, and then the corresponding number of threads will be configured for the storage device.

[0027] (2) Next, threads are created in the cache pool, and the number of threads is determined based on the key transmission rate and the maximum read rate of a single thread. The specific process is as follows:

[0028] First, let's define the key transmission rate and the maximum read rate of a single thread as 'a' and 'b', respectively. Then, divide the key transmission rate 'a' by the maximum read rate 'b' and round up to get 'c'. The number of threads is then 'c'. The key read rate of the first to (c-1)th threads is 'b', and the key read rate of the 'c'th thread is 'a - b * (c-1)'. For example, if the key transmission rate is 20 and the maximum read rate of a single thread is 3, then dividing the key transmission rate 20 by the maximum read rate 3 and rounding up to get '7', the number of threads is 7. The key read rate of the first to sixth threads is 3, and the key read rate of the seventh thread is 2.

[0029] (3) Next, configure the corresponding number of threads according to the storage rate of the memory, and finally transmit the key to each memory for storage through the threads. First, it needs to be determined that the storage rate of the existing single memory is greater than or equal to the maximum read rate of a single thread; then the specific process of configuring the corresponding number of threads according to the storage rate of the memory is as follows:

[0030] 1) First, obtain the storage rate of the memory, denoted as d. Then, divide the storage rate of the memory d by the maximum read rate b of a single thread and round down to obtain the value e.

[0031] 2) Then, compare the values ​​e and c. If e is greater than or equal to c, it means the storage rate of the memory is greater than the key transmission rate. In this case, all threads will be connected to the memory, meaning c threads will be connected to the first memory location to transmit the key to the first memory location for storage. After the first memory location is full, c threads will be connected to the second memory location to transmit the key to the second memory location for storage. This process continues until all memory locations have stored the key. For example, if the storage rate of the memory is 30, then the storage rate of 30 divided by the maximum read rate of a single thread (3) and rounded down gives a value of 10. If 10 is greater than or equal to c=7, it means the storage rate of the memory is greater than the key transmission rate. In this case, all threads will be connected to the memory, meaning 7 threads will be connected to the first memory location. After the first memory location is full, 7 threads will be connected to the second memory location, and so on, until all memory locations have stored the key.

[0032] If the value e is less than the value c, it means that the storage speed of the memory is lower than the key transmission speed, but higher than the thread reading speed. Therefore, the quotient of c divided by e is rounded down to obtain the value f. Keys are transmitted simultaneously to f memories, with each memory connected to e threads. Once f memories are full, key transmission continues simultaneously to the remaining f memories, and so on, storing keys in ascending order. The remaining ce*f threads store the key in the last memory. Once the last memory is full, ce*f threads are connected to the second-to-last memory, and the key is transmitted to that memory via ce*f threads, continuing this process in descending order until all memories have stored the key. Figure 2 As shown in the example, assuming the storage rate of the memory is 10, then the storage rate of the memory 10 divided by the maximum read rate of a single thread 3, rounded down, gives the value 3; the value e is 3, the value c is 7, and the value 7 divided by the value 3, rounded down, gives the value 2. Then, key transmission can be performed on two memories simultaneously, with each memory connected to 3 threads. After the two memories are full, key transmission will continue to be performed on the remaining two memories simultaneously, and so on, storing the memory keys in ascending order.

[0033] There are ce*f threads remaining, which is 7-3*2, or 1 thread. Since this thread's key reading rate is 2, it does not use the maximum reading rate of a single thread for transmission. Therefore, this thread will transmit and store the key in the last memory, i.e., the 10th memory. After the 10th memory is full, the thread will connect to the second to last memory, i.e., the 9th memory, and then the thread will transmit the key to the second to last memory, i.e., the 9th memory, for storage. This process continues in reverse order, storing the key in all 10 memory locations until all the keys are stored.

[0034] This invention also provides a computer device, which includes at least a processor and a memory. The memory stores a computer program, and the processor executes the computer program stored in the memory to implement the steps in the multi-threaded concurrent key storage method of this invention.

[0035] This invention also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in the multi-threaded concurrent key storage method of this invention.

Claims

1. A multi-threaded concurrent key storage method, characterized in that, Includes the following steps: (1) Receive a request to generate a key, obtain the number of keys to be generated and the number of memory units to store the keys according to the information in the request; then generate a key through a random number generator according to the request, transmit the generated key to the cache pool, and obtain the key transmission rate; (2) Next, create threads in the cache pool and determine the number of threads based on the key transmission rate and the maximum read rate of a single thread; (3) Configure the corresponding number of threads according to the storage rate of the memory, and finally transmit the key to each memory for storage through the threads; The specific process for determining the number of threads based on the key transmission rate and the maximum read rate of a single thread is as follows: First, obtain the key transmission rate and the maximum read rate of a single thread, and denote them as a and b respectively. Then, divide the key transmission rate a by the maximum read rate b of the thread and round up to obtain the value c. The number of threads is c. The key reading rate of the first to the (c-1)th threads in the c threads is b, and the key reading rate of the cth thread is ab*(c-1). The specific process for configuring the corresponding number of threads based on the storage rate of the memory is as follows: 1) First, obtain the storage rate of the memory, denoted as d. Then, divide the storage rate of the memory d by the maximum read rate b of a single thread and round down to obtain the value e. 2) Then, the values ​​e and c are compared. If e is greater than or equal to c, c threads are connected to the first memory in the storage, and the key is transmitted to the first memory for storage. After the first memory is full, c threads are connected to the second memory in the storage, and the key is transmitted to the second memory for storage. This process continues until all memory locations have stored the key. If e is less than c, the quotient of c divided by e is taken as f. The key is transmitted to f memory locations simultaneously, with e threads connected to each memory location. After f memory locations are full, the key transmission continues to the remaining f memory locations simultaneously, and so on, storing the key in memory locations in ascending order. The remaining ce*f threads store the key in the last memory location. After the last memory location is full, ce*f threads are connected to the second-to-last memory location in the storage, and the key is transmitted to the second-to-last memory for storage. This process continues, storing the key in memory locations in descending order, until all memory locations have stored the key.

2. The multi-threaded concurrent key storage method according to claim 1, characterized in that: The storage rate of a single memory is greater than or equal to the maximum read rate of a single thread.

3. The multi-threaded concurrent key storage method according to claim 1, characterized in that: The storage device is a hard disk or memory.

4. A computer device, characterized in that: The computer device includes at least a processor and a memory, wherein the processor is used to implement the multi-threaded concurrent key storage method as described in any one of claims 1-3 when executing a computer program stored in the memory.

5. A computer-readable storage medium, characterized in that: It stores a computer program that, when executed by a processor, implements the multi-threaded concurrent key storage method as described in any one of claims 1-3.

Citation Information

Patent Citations

  • Network architecture based on quantum secret communication and parallel key reading method

    CN114362942A

  • Secured Access Control In A Storage System

    US20190073318A1