Method for selecting non-simplification area of three-dimensional model and simplification mechanism of three-dimensional model

Abstract

The present application provides a method for selecting a non-simplified area of a three-dimensional model of a multi-layer metal circuit structure. The method includes selecting a first non-simplified area in a complete three-dimensional model of a layout design of the multi-layer metal circuit structure. The complete three-dimensional model includes a plurality of layout layers. The method for selecting the first non-simplified area includes at least one of a first selection mode to a fourth selection mode. The method for selecting the non-simplified area can effectively simplify the complete three-dimensional model in a programmed manner, and shorten the time of overall electrical simulation.

Description

Technical Field

[0001] This invention relates to the modeling and electrical simulation of a three-dimensional model in the layout design of a multilayer metal circuit structure, and particularly to a method for selecting non-simplified regions of the three-dimensional model in the layout design of a multilayer metal circuit structure and an automated simplification mechanism, which can effectively simplify the three-dimensional model of the multilayer metal circuit structure and accelerate the acquisition of electrical simulation results. Background Technology

[0002] When designing the layout of multilayer metal circuit structures (such as circuit boards), engineers must perform electrical simulations on the 3D model of the multilayer metal circuit structure to ensure the integrity of the high-speed signals transmitted within it. As the layout design of multilayer metal circuit structures becomes increasingly complex—current multilayer metal circuit structures may have as many as twelve layers or more—and as the speed of signals transmitted within the simulated multilayer metal circuit structure increases (e.g., transmission speeds exceeding 5GHz, radio frequency signals, or signals supporting PCIe4, USB 3.2, and Thunderbolt interfaces), and due to the increasing number of projects requiring electrical simulation, if engineers simply use a complete 3D model of the multilayer metal circuit structure for electrical simulation without simplification, the solution to the electrical simulation of the complete 3D model will be extremely time-consuming and may even affect the subsequent delivery schedule for component manufacturing.

[0003] To effectively address the time-consuming nature of solving the electrical simulation of the complete 3D model, experienced engineers typically simplify regions in the complete 3D model of the multilayer metal circuit structure that do not affect the accuracy of the solution, thereby accelerating the electrical simulation. However, this simplification method still relies on manual judgment to simplify the layout of the multilayer metal circuit structure, meaning it cannot automate and accelerate the electrical simulation of the multilayer metal circuit structure. Therefore, existing methods for simulating the electrical properties of multilayer metal circuit structures are not perfect and have room for improvement. Summary of the Invention

[0004] In view of this, one of the objectives of this invention is to improve upon the shortcomings of existing methods for electrical simulation of multilayer metal circuit structures, and to propose a novel method for selecting non-simplified regions in the three-dimensional model of multilayer metal circuit structures and an automated simplification mechanism for the three-dimensional model, which can efficiently and automatically build a simplified three-dimensional model and accelerate the solution of electrical simulation of the three-dimensional model.

[0005] According to the present invention, a method for selecting a non-simplified region in a three-dimensional model of a multilayer metal circuit structure involves selecting a first non-simplified region from a complete three-dimensional model of the layout design of the multilayer metal circuit structure. The complete three-dimensional model includes multiple layout layers, and the method for selecting the first non-simplified region includes at least one of the following selection modes:

[0006] First selection mode: In the layout layer of the complete 3D model, find a pad group on the surface, the pad group containing a plurality of ground pads and at least one signal input / output pad; with at least one signal input / output pad as the center, find a predetermined number of ground pads around the at least one signal input / output pad; select a block that encloses the predetermined number of ground pads and at least one signal input / output pad as the first block; in the layout layer of the complete 3D model, find a layout layer with a ground metal area located below the aforementioned pad group, wherein the ground pads in the pad group are electrically connected to the ground metal area through a plurality of ground vias, and one or more ground vias are also provided inside the ground metal area, the ground vias being located around the one or more ground vias; select a region that encloses the one or more ground vias and the predetermined number of ground vias as the first region; combine the first block and the first region to form the first non-simplified region.

[0007] The second selection mode is as follows: In the layout layer of the complete 3D model, a group of solder pads is found on the surface layer. This group of solder pads includes a plurality of ground solder pads and at least one signal input / output solder pad. A signal trace connecting at least one signal input / output solder pad and coplanar with it is found on the surface layer. Signal vias electrically connecting the signal traces are also found in the layout layer. These signal vias pass through layers M to N in the layout layer, where M and N are both positive integers and M is less than N. In the range from the layer above layer M to the layer below layer N in the layout layer, a predetermined number of ground vias are found layer by layer, centered on the signal vias, and the region enclosing the predetermined number of ground vias and signal vias is the first non-simplified region.

[0008] The third selection mode: In the layout layer of the complete 3D model, find the layout layer with signal traces and a first coplanar ground metal area located on one side of the signal traces. The first coplanar ground metal area extends along the signal traces. Divide the signal traces into a plurality of signal trace units. Taking each of the signal trace units as the center, find the layout layer with a first reference ground area layer by layer in the block of the first coplanar ground metal area. In the layout layer, find a predetermined number of a plurality of first ground vias that electrically connect the first coplanar ground metal area and the first reference ground area layer by layer. The area enclosing the predetermined number of first ground vias and each signal trace unit is the first non-simplified area unit. In each layer of the layout layer, combine each first non-simplified area unit and the signal trace. Select the area after combining the first non-simplified area units and the signal traces as the first non-simplified area.

[0009] Fourth selection mode: In the layout layer of the complete 3D model, find the layout layer with a first ground metal area and a ground via inside the first ground metal area, the signal trace located on one side of the ground via, and the second ground metal area located on the other side of the ground via; find a predetermined number of ground vias that electrically connect the first ground metal area and the second ground metal area around the ground via; enclose the signal trace, the area around the ground via containing a predetermined number of ground vias, and the second ground metal area, and select the enclosed area as the first non-simplified area.

[0010] One or more first non-simplified regions selected through the different selection modes described above are areas where high-speed signals would significantly affect the transmission of high-speed signals within the multilayer metal circuit structure. Therefore, preserving the complete structure of these selected first non-simplified regions can maintain the accuracy of the electrical simulation. On the other hand, replacing the regions outside the first non-simplified regions in the complete 3D model with metal structures can significantly simplify the 3D model of the multilayer metal circuit structure, shorten the overall electrical simulation time, and, moreover, this invention reproduces the human judgment of engineers in a programmed and automated manner, which can also significantly reduce the reliance on the electrical simulation experience of senior engineers.

[0011] In one aspect, in the second selection mode, the farthest of a predetermined number of grounding vias from the signal conducting vias is selected, and the distance between the signal conducting via and the farthest of the predetermined number of grounding vias is defined as the selection radius, and a first non-simplified region is selected based on the selection radius.

[0012] In another aspect, in the third selection mode described above, coplanar grounding metal areas are typically provided on both sides of the signal trace. Therefore, the present invention also searches for a second coplanar grounding metal area on the other side of the signal trace relative to the first coplanar grounding metal area, and this second coplanar grounding metal area also extends along the signal trace. If such a second coplanar grounding metal area exists, a layout layer with a second reference grounding area is searched from the layout layer of the complete three-dimensional model described above. Furthermore, taking each signal trace unit as the center, a predetermined number of multiple second grounding vias electrically connected to either the second coplanar grounding metal area or the first and second reference grounding areas are searched layer by layer within the block of the second coplanar grounding metal area. The area enclosing the predetermined number of first grounding vias, the area of ​​the second grounding vias, and the area of ​​each signal trace unit are then defined as the first non-simplified region unit. Similarly, the first non-simplified region can then be obtained by assembling the aforementioned multiple first non-simplified region units.

[0013] In another aspect, in the third selection mode described above, a virtual window is selected centered on each signal trace unit. The window is enlarged to a first size, and it is determined whether the window can cover the first grounding via within the first grounding metal area. The window is then enlarged to a second size, and it is determined whether the window can cover the second grounding via within the second grounding metal area. The distance between the center of the window and the furthest point from the center of the first grounding via is defined as the selection radius, and the distance between the center of the window and the furthest point from the center of the second grounding via is defined as another selection radius. The first non-simplified region unit is selected based on the two selection radii.

[0014] This invention also provides an automated simplification mechanism for a three-dimensional model of a multilayer metal circuit structure. This mechanism utilizes a computer to create a complete three-dimensional model based on the layout design of the multilayer metal circuit structure, and then simplifies the complete three-dimensional model into a simplified three-dimensional model. The complete three-dimensional model contains multiple layout layers. The automated simplification mechanism includes the following steps: selecting a first non-simplified region according to the method described above; obtaining at least one other non-simplified region based on the trace-to-trace isolation, via-to-via isolation, or via-to-trace isolation of the complete three-dimensional model; enclosing the first non-simplified region and at least one other non-simplified region as a closed region; defining the region outside the enclosed region as a simplified region; replacing the simplified region with a metal structure; and jointly creating a simplified three-dimensional model from the metal structure and the layout of the enclosed region.

[0015] In one aspect, the step of obtaining at least one remaining non-simplified region based on the aforementioned trace-to-trace isolation further includes: locating a first signal trace, a second signal trace adjacent to the first signal trace, a plurality of first grounding vias disposed around the first signal trace, and a plurality of second grounding vias disposed around the second signal trace in the layout layer of the complete three-dimensional model; dividing the first signal trace into a plurality of first signal trace units, and dividing the second signal trace into a plurality of second signal trace units; and, one by one, centered on each of the first signal trace units, locating a first predetermined number of first grounding vias. A second non-simplified region unit is selected by perforating and enclosing the region of the first predetermined number of first grounding vias and the corresponding regions of each first signal trace unit; a third non-simplified region unit is selected by finding a second predetermined number of second grounding vias and enclosing the region of the second predetermined number of second grounding vias and the corresponding regions of each second signal trace unit, taking each of the second signal trace units as the center; each of the second non-simplified region units is combined to form a second non-simplified region, and each of the third non-simplified region units is combined to form a third non-simplified region; the second and third non-simplified regions are enclosed to form a closed region to obtain at least one other non-simplified region.

[0016] In another aspect, the step of obtaining at least one remaining non-simplified region based on the isolation degree of the perforation to the perforation further includes: locating a first signal trace, a second signal trace adjacent to the first signal trace, a plurality of first signal conductive perforations disposed around the first signal trace, and a plurality of second signal conductive perforations disposed around the second signal trace in the layout layer of the aforementioned complete three-dimensional model; determining, one by one, with each of the first signal conductive perforations as the center, whether any second signal conductive perforation exists within a predetermined distance; if the determination result is yes, the closest second signal conductive perforation is compared with the first signal conductive perforation... The distance between the perforations is used as the selection radius. A fourth non-simplified region unit is selected, and each of the fourth non-simplified region units is combined to form a fourth non-simplified region. Taking each of the second signal conductive perforations as the center, it is determined whether any first signal conductive perforation exists within a predetermined distance. If the determination result is yes, the distance between the closest first signal conductive perforation and the second signal conductive perforation is used as another selection radius. A fifth non-simplified region unit is selected, and each of the fifth non-simplified region units is combined to form a fifth non-simplified region. The above-mentioned fourth and fifth non-simplified regions are enclosed to form a closed region, thereby obtaining at least one other non-simplified region.

[0017] In another aspect, the step of obtaining at least one other non-simplified region based on the isolation degree of the perforation to the traces further includes: finding a plurality of signal interferences and signal traces adjacent to the signal interferences in the layout layer of the complete 3D model; selecting a sixth non-simplified region unit centered on each signal interference according to a selection radius, the sixth non-simplified region unit covering the aforementioned signal traces of a predetermined length; and uniting the sixth non-simplified region units into a sixth non-simplified region, the aforementioned sixth non-simplified region being at least one other non-simplified region. Attached Figure Description

[0018] The detailed steps and features of the method for selecting non-simplified regions in the three-dimensional model of a multilayer metal circuit structure and the automated simplification mechanism of the three-dimensional model will be described in the following embodiments. However, it should be understood that the embodiments and figures described below are merely illustrative examples and should not be used to limit the scope of the patent application of this invention.

[0019] Figure 1 This is a partial schematic diagram of the complete three-dimensional model of the first embodiment;

[0020] Figure 2 It is similar to a diagram used to illustrate multiple signal conductive vias and grounding vias;

[0021] Figure 3 This is a partial schematic diagram of the surface of the complete 3D model, used to illustrate the first selection mode;

[0022] Figure 4 This is a partial schematic diagram of a layout layer below the surface of the complete 3D model, used to illustrate the first selection mode;

[0023] Figure 5 This is a flowchart of the steps for selecting the first mode;

[0024] Figure 6 This is a partial schematic diagram of a layout layer of the complete 3D model, used to illustrate the second selection mode;

[0025] Figure 7 This is a flowchart of the steps for the second selection mode;

[0026] Figure 8 This is a partial schematic diagram of a layout layer of the complete 3D model, used to illustrate the third selection mode;

[0027] Figure 9 It is a partial schematic diagram of multiple layout layers of the complete 3D model, used to illustrate the first and second reference junction areas;

[0028] Figure 10 This is a flowchart of the steps for the third selection mode;

[0029] Figure 11 This is a partial schematic diagram of multiple layout layers of a complete 3D model, used to illustrate the fourth selection mode;

[0030] Figure 12 This is a flowchart of the steps for the fourth selection mode;

[0031] Figure 13 This is a flowchart of the steps of the automation simplification mechanism in the second embodiment;

[0032] Figure 14 This is a partial schematic diagram of a layout layer of a complete 3D model, used to illustrate the isolation between traces;

[0033] Figure 15 This is another flowchart used to illustrate the sub-steps of step S5.2;

[0034] Figure 16 This is a partial schematic diagram of a layout layer of a complete 3D model, used to illustrate the isolation between perforations;

[0035] Figure 17 This is another flowchart used to illustrate the sub-steps of step S5.2;

[0036] Figure 18 This is a partial schematic diagram of a layout layer of a complete 3D model, used to illustrate the isolation of the perforations from the traces;

[0037] Figure 19 This is another flowchart used to illustrate the sub-steps of step S5.2;

[0038] Figure 20 This is a partial schematic diagram of a simplified 3D model;

[0039] Figure 21 yes Figure 20 A partial three-dimensional sectional view.

[0040] Explanation of reference numerals in the attached figures:

[0041] 10': Complete 3D Model; 10': Simplified 3D Model

[0042] 11, 11', 11”: Layout layer; 11T: Surface layer

[0043] UR1, UR1': First non-simplified region; M: Metal structure

[0044] SR: Simplified Area

[0045] First selection mode:

[0046] 12: Pad Group 121: Signal Input / Output Pads

[0047] 122: Grounding pad; 13: Grounding metal area

[0048] 14: Signal trace 15: Piercing

[0049] 151: Grounding via 152: Signal conducting via

[0050] 16: Grounding vias R1, R1': First region

[0051] R2: Second region; radi1, radi1': Selected radius

[0052] S1.1~S1.4: Steps

[0053] Second selection mode:

[0054] 22: Signal conductive via 23: Grounding via

[0055] S2.1~S2.3: Steps

[0056] Third selection mode:

[0057] 31: First common-plane grounded metallic region; 32: Signal trace

[0058] 32U: Signal trace unit; 33: Second coplanar grounding metal area

[0059] 34: First reference area 35: Second reference area

[0060] 36: First grounding hole radi2, radi2': Select radius

[0061] S3.1~S3.4: Step W: Window

[0062] Fourth selection mode:

[0063] 41: First grounded metallic zone; 42: Grounding via.

[0064] 43: Signal trace 431: First signal trace unit

[0065] 432: First metal block; 433: Second signal trace unit

[0066] 434: Second metal block; 44: Second grounding metal area

[0067] 45: Grounding hole S4.1~S4.5: Steps

[0068] Trace to trace:

[0069] 51: First signal trace; 51U: First signal trace unit

[0070] 52: Second signal trace; 52U: Second signal trace unit

[0071] 53: First grounding hole; 54: Second grounding hole

[0072] 55: Other traces 56: Other perforations

[0073] A1~A4: Substep UR2: Second non-simplified region

[0074] UR3: Third non-simplified region; URA: Other non-simplified regions.

[0075] S5.1~S5.4: Steps

[0076] Perforation to perforation:

[0077] 61: First signal trace 62: Second signal trace

[0078] 63: First grounding hole; 64: Second grounding hole

[0079] B1~B3: Sub-steps URB: Other non-simplified regions

[0080] radi3,radi3': Select radius

[0081] Piercing to trace:

[0082] 71: First signal trace 72: Second signal trace

[0083] radi4: Select radius; URC: Other non-simplified regions. Detailed Implementation

[0084] In the embodiments described below, the terms “region” (e.g., without simplification) and “range” refer to a portion of the three-dimensional structure in a complete three-dimensional model of a multilayer metal circuit structure. The terms “area” (e.g., ground metal “area”) and “block” refer to a portion of the surface in a layout layer of a complete three-dimensional model of a multilayer metal circuit structure.

[0085] The following detailed description of the technical content and features of the present invention is provided in conjunction with several listed embodiments and accompanying drawings. The directional terms such as "upper," "lower," "inner," "outer," "top," and "bottom" mentioned in this specification are merely illustrative descriptions based on the normal usage direction and are not intended to limit the scope of the claims.

[0086] Furthermore, the terms "first," "second," "third," etc., used in the following embodiments are for distinguishing descriptions only and should not be construed as indicating or implying relative importance.

[0087] To illustrate the technical features of the present invention in detail, the following two embodiments are provided in conjunction with the accompanying drawings, wherein:

[0088] The first embodiment illustrates a method for selecting a first non-simplified region in a three-dimensional model of a multilayer metal circuit structure. This method involves selecting a first non-simplified region from a complete three-dimensional model of the multilayer metal circuit structure's layout design. In this embodiment, a computer capable of performing general functions is used to execute electrical simulation software to model the complete three-dimensional model and select the first non-simplified region. The electrical simulation software can be, for example, but not limited to, ANSYS HFSS software. Typically, a multilayer metal circuit structure layout design has multiple layout layers; therefore, the established complete three-dimensional model will also have multiple layout layers. Each layout layer, depending on its design, may contain structures such as solder pads (located on the surface), ground metal areas, signal vias, ground vias, ground voids, and signal traces, or combinations of one or more of these structures.

[0089] Please refer to Figure 1 and Figure 2 , Figure 1 The partial structure of the completed 3D model 10 is shown, including six layout layers 11. The topmost layout layer 11 (i.e., the surface layer 11T) contains at least two signal traces 14 and multiple vias 15 passing through the surface layer 11T. The vias 15 can be grounding vias 151 (see...). Figure 2 ) or signal conductive via 152 (see Figure 1 and Figure 2 ).like Figure 1 and Figure 2 As shown, if all perforations 15 are displayed, the result will be as follows. Figure 2 As shown, it is a very detailed and complex model. Without appropriate simplification, directly applying it... Figure 1 and Figure 2 Performing electrical simulations on the complete 3D model 10 shown would consume a significant amount of time in the calculation and solution of the electrical simulation. The method for selecting the first non-simplified region described in the first embodiment is selected by at least one or more of the following selection modes, which are explained below:

[0090] First selection mode: Please refer to the following: Figures 3 to 5 The first selection mode includes the following steps.

[0091] Step S1.1: As Figure 3As shown, it illustrates a partial structure of the surface layer 11T in the layout layer 11 of the complete 3D model 10. In this embodiment, the surface layer 11T is the uppermost layer in the layout layer 11. In some cases, the surface layer 11T may also be the lowermost layer in the layout layer 11. First, the pad group 12 is located in the surface layer 11T of the layout layer 11 of the complete 3D model 10. In this embodiment, the pad group 12 is used to solder different pins of the chip. The pad group 12 includes a plurality of ground pads 121 and a plurality of signal input / output pads 122.

[0092] Step S1.2: Centered on one of the signal input / output pads 122, locate a predetermined number of ground pads 121 around the periphery of the signal input / output pad 122, and select the block enveloping the predetermined number of ground pads 121 and the signal input / output pads 122 as the first block R1. In this embodiment, the signal input / output pad 122 connected to the signal trace 14 is selected as the center. To improve the accuracy of the electrical simulation or to more accurately simulate the isolation between high-speed signals, a predetermined number of ground pads will be included to consider a wider energy distribution of high-speed signals. In some cases, the selected first block R1 is magnified by a predetermined factor to the magnified first block R1', depending on the size of the three-dimensional metal circuit structure of the product to be simulated (e.g., a small package substrate or a mobile phone motherboard, or a large server motherboard).

[0093] Step S1.3: In the layout layer 11 of the complete 3D model 10, find the layout layer 11 that has a ground metal area 13 and the ground metal area 13 is located below the pad group 12 (e.g., Figure 4 As shown, a ground metal region 13 (made of copper) is provided on most of the surface of the layout layer 11. Each ground pad 121 of the surface layer 11T is electrically connected to the ground metal region 13 through one or more ground vias 151. A ground via 16 is provided inside the ground metal region 13 corresponding to the position of the pad group 12 of the surface layer 11T. The ground via 16 penetrates the layout layer 11, reducing the capacitance effect between the surface layer 11T and the layout layer 11. Then, the area encompassing one or more ground vias 16 (extending to the bottom of the ground via 16; if there is only one ground via, only the area of ​​the single ground via is selected) and the area containing a predetermined number of ground vias 151 is designated as the first region R2.

[0094] Step S1.4: Combine the enlarged first block R1' and the first region R2 to form the first non-simplified region.

[0095] Second selection mode: Please refer to... Figure 5 , Figure 6 and Figure 7 The second selection mode includes the following steps:

[0096] Step 2.1: As Figure 3 As shown, in the layout layer 11 of the complete 3D model 10, the surface layer 11T is searched for the pad group 12, which contains a plurality of ground pads 121 and a plurality of signal input / output pads 122.

[0097] Step 2.2: Locate the signal trace 14 on the surface layer 11T that connects to the signal input / output pads 122 and is coplanar with the signal input / output pads 122. Then, locate the signal via 22 in the layout layer 11 that electrically connects to the signal trace 14. The signal via 22 is defined as passing through the Mth to Nth layout layers 11 from top to bottom, where M and N are both positive integers and M is less than N. In this embodiment, the signal via 22 directly electrically connects to the signal trace 14, and an example is taken where the signal via 22 passes through the 3rd to 6th layout layers 11.

[0098] Step 2.3: Within the range from the layer above the Mth layer to the layer below the Nth layer in layout layer 11, find a predetermined number of ground vias 23 that are relatively adjacent to the signal conductive via 22, layer by layer, with the signal conductive via 22 as the center. In this embodiment, one or more ground vias 23 that are relatively adjacent to the signal conductive via 22 are found within the range from the 2nd layout layer 11 to the 7th layout layer 11, such as... Figure 6 As shown, there are four grounding vias 23 that are relatively adjacent to the signal conductive vias 22. Then, the area encompassing a predetermined number of grounding vias 23 and the signal conductive vias 22 is defined as the first non-simplified region UR1. Similarly, in some cases, the range of the selected first non-simplified region UR1 is magnified by a predetermined factor to the magnified first non-simplified region UR1', depending on the size of the three-dimensional metal circuit structure of the product to be simulated (e.g., a small package substrate or a mobile phone motherboard, or a large server motherboard). In this embodiment, the grounding via 23 that is farthest from the signal conductive via 22 is selected, and the distance between the signal conductive via 22 and the farthest grounding via 23 is defined as the selection radius radi1. This is magnified by a predetermined factor (e.g., magnified to 2 times) to the magnified selection radius radi1', and the magnified first non-simplified region UR1' is selected based on the range encompassed by the magnified selection radius radi1' (covering the range of the layout layer 11 from the layer above the M layer to the layer below the N layer).

[0099] Third selection mode: Please refer to Figures 8 to 10The third selection mode includes the following steps:

[0100] Step 3.1: In the layout layer 11 of the complete 3D model 10, locate the layout layer 11 with signal traces 32 and a first coplanar ground metal region 31 located on one side of the signal traces 32. The first coplanar ground metal region 31 extends along the signal traces 32 in a manner parallel to the signal traces 32. Typically, in the layout design of multilayer metal circuit structures involving radio frequency signals, a second coplanar ground metal region 33 is also provided on the other side of the signal traces 32 relative to the first coplanar ground metal region 31. Therefore, the second coplanar ground metal region 33 is also located during the simulation. The second coplanar ground metal region 33 also extends along the signal traces 32 in a manner parallel to the signal traces 32. It is worth noting that the layout layer 11 with the structure of the first and second coplanar ground metal regions 31 and 33 and the signal traces 32 is not necessarily located on the surface layer 11T of the multilayer metal circuit structure.

[0101] Step 3.2: Divide the signal trace 32 into a plurality of signal trace units 32U.

[0102] Step 3.3: Taking each of the signal trace units 32U as the center, within the block of the first coplanar grounding metal region 31, search layer by layer in the layout layer for layout layer 11' located above layout layer 11 and having a first reference grounding area 34, and layout layer 11' located below layout layer 11 and having a second reference grounding area 35. Then, search layer by layer in the layout layer for a predetermined number of first grounding vias 36 electrically connecting the first coplanar grounding metal region 31 and the first reference grounding area 34, and electrically connecting the first coplanar grounding metal region 31 and the second reference grounding area 35. The reference grounding area 35 has a plurality of first grounding vias 36. If a second coplanar grounding metal area 33 exists, in the layout layer 11 of the complete three-dimensional model 10, a predetermined number of second grounding vias are searched layer by layer within the block of the second coplanar grounding metal area 33, centered on each of the signal trace units 32U, and electrically connected to the second coplanar grounding metal area 33 and electrically connected to the first and second reference grounding areas 34, 35 (in this embodiment, there are no second grounding vias within the block of the second coplanar grounding metal area 33).

[0103] Typically, a virtual window W can be selected, centered on each signal trace unit 32U. This window W is then proportionally enlarged to a first size. It is then determined whether the window W covers the first grounding via 36 within the block of the first grounding metal region 31. If a second coplanar grounding metal region 33 exists, the window W is also proportionally enlarged to a second size (the second size may be greater than, equal to, or smaller than the first size), and it is determined whether the window W covers the second grounding via within the block of the second grounding metal region 33. For example, if... Figure 8 As shown, with the window W as the center, when enlarged to the first size, the window W covers two first grounding vias 36 (a predetermined number of two). At this time, the distance between the center of the window W and the farthest first grounding via 36 is defined as the selection radius radi2. The area enclosed and selected in a semicircle by the first grounding via 36 and the trace unit 32U is designated as the first non-simplified region unit. In some cases, the magnification can be specified to expand outward to the enlarged selection radius radi2', and then, with the center of the window W as the center and the expanded selection radius radi2' as the radius, the first non-simplified region unit is selected in a semicircle.

[0104] On the other hand, in this embodiment, since the size of window W is enlarged, no second grounding via is still covered within the block of the second coplanar grounding metal region 33. Therefore, the area encompassed by all blocks of window W within the second coplanar grounding metal region 33, combined with the enclosed area of ​​the first grounding via 36 and trace unit 32U, is designated as the first non-simplified region unit. Conversely, assuming that when the size of window W is enlarged, no first grounding via is covered within the first coplanar grounding metal region 31, but the second grounding via is covered within the second coplanar grounding metal region 33, then all blocks of the first coplanar grounding metal region 31 are retained, and these blocks are combined into the first non-simplified region unit.

[0105] Step 3.4: After obtaining each first non-simplified region unit in step S3.3, each first non-simplified region unit and signal trace 32 are combined in each layer of layout layer 11, 11', 11" and selected as the first non-simplified region UR1.

[0106] Fourth selection mode: Please refer to Figure 11 and Figure 12 The fourth selection mode includes the following steps:

[0107] Step S4.1: In the layout layer 11 of the complete 3D model 10, locate the layout layer 11 with a first ground metal area 41 and a ground via 42 inside the first ground metal area 41, the signal trace 43 located on one side of the ground via 42, and the second ground metal area 44 located on the other side of the ground via 42. In this embodiment, the layout layer 11' with the signal trace 43 is located above the layout layer 11 with the first ground metal area 41 and the ground via 42, while the layout layer 11" with the second ground metal area 44 is located below the layout layer 11. The signal trace 43 includes a first signal trace unit 431, a second signal trace unit 433, a first metal block 432 connected to the first signal trace unit 431, and a second metal block 434 connected to the second signal trace unit 433 and spaced apart from the first metal block 432. The first and second metal blocks 432 and 434 are located directly above the ground via 42.

[0108] Step S4.2: Locate a predetermined number of grounding vias 45 that electrically connect the first grounding metal area 41 and the second grounding metal area 44 around the grounding via 42.

[0109] Step S4.3: Enclose the area containing the predetermined number of grounding vias 45 and the second grounding metal area 44 around the signal trace 43 and the grounding via 42, and select the enclosed area as the first non-simplified area UR1.

[0110] One or more first non-simplified regions UR1 selected by the above different selection modes can then be replaced by a metal structure M in the regions other than the selected one or more first non-simplified regions UR1. This can greatly simplify the complete three-dimensional model 10 of the multilayer metal circuit structure, thereby shortening the overall electrical simulation time.

[0111] Through the four selection modes described above, the complete 3D model 10 can be simplified for electrical simulation while maintaining a certain level of accuracy. However, to further improve the accuracy of the electrical simulation, the influence of isolation can be further considered. The influence of isolation can be divided into three cases: considering trace-to-trace isolation, considering via-to-via isolation, and considering via-to-trace isolation. Therefore, the following second embodiment will further illustrate an automated simplification mechanism for a complete 3D model of a multilayer metal circuit structure. It also uses a computer to build a complete 3D model 10 based on the layout design of the multilayer metal circuit structure, and simplifies the complete 3D model 10 into a simplified 3D model 10'. The complete 3D model 10 includes multiple layout layers 11. Please refer to... Figure 13 The above-mentioned automated simplification mechanism includes the following steps:

[0112] Step S5.1: Select the first non-simplified region UR1 according to the first non-simplified region selection method of the above embodiment. It should be noted that, depending on the different layout designs of the multilayer metal circuit structure, the selected first non-simplified region UR1 may have one or more regions.

[0113] Step S5.2: Considering the impact of isolation, obtain at least one remaining non-simplified region, as explained below:

[0114] A: Consider the isolation between traces:

[0115] If we consider the effect of trace isolation on traces, step S5.2 can be further divided into the following sub-steps, please refer to... Figure 14 and Figure 15 .

[0116] Sub-step A1: Locate the first signal trace 51, the second signal trace 52 adjacent to the first signal trace 51, a plurality of first grounding vias 53 located around and adjacent to the first signal trace 51, and a plurality of second grounding vias 54 located around and adjacent to the second signal trace 52 in the layout layer 11 of the complete 3D model 10. Figure 14 As shown, in one of the layout layers 11, the first signal trace 51 is located on the left side of the layout layer 11, and the second signal trace 52 is located on the right side of the layout layer 11. Several traces 55 and through holes 56 are also provided between the first signal trace 51 and the second signal trace 52.

[0117] Sub-step A2: Divide the first signal trace 51 into a plurality of first signal trace units 51U, and divide the second signal trace 52 into a plurality of second signal trace units 52U.

[0118] Sub-step A3: Taking each of the first signal trace units 51U as the center, find a first predetermined number of first grounding vias 53 and select a second non-simplified region unit that encompasses the area of ​​the first predetermined number of first grounding vias 53 and the corresponding area of ​​each of the first signal trace units 51U; similarly, taking each of the second signal trace units 52U as the center, find a second predetermined number of second grounding vias 54 and select a third non-simplified region unit that encompasses the area of ​​the second predetermined number of second grounding vias 54 and the corresponding area of ​​each of the second signal trace units 52U.

[0119] Sub-step A4: The second non-simplified region unit of the union set is the second non-simplified region UR2, and the third non-simplified region unit of the union set is the third non-simplified region UR3. The second and third non-simplified regions UR2 and UR3 are enclosed regions to obtain the remaining non-simplified regions URA.

[0120] B: Consider the isolation between perforations (Via to Via):

[0121] If the effect of perforation on the isolation degree of perforation is considered, step S5.2 can be further divided into the following sub-steps, please refer to... Figure 16 and Figure 17 .

[0122] Sub-step B1: Similarly, locate the first signal trace 61, the second signal trace 62 adjacent to the first signal trace 61, a plurality of first signal conductive vias 63 located around and adjacent to the first signal trace 61, and a plurality of second signal conductive vias 64 located around and adjacent to the second signal trace 62 in the layout layer 11 of the complete 3D model 10. In this embodiment, there are two first signal conductive vias 63, located at opposite ends of the first signal trace 61, and the first signal trace 61 is located in the inner layout layer 11. It should be noted that in some cases, the first signal trace 61 and the two first signal conductive vias 63 may be located in the same layer.

[0123] Sub-step B2: Taking each of the first signal conductive vias 63 of the first signal trace 61 as the center, determine whether any second signal conductive via 64 exists within a first predetermined distance. If the determination result is yes, use the distance between the nearest second signal conductive via 64 and the first signal conductive via 63 as the selection radius radi3, and select the fourth non-simplified region unit. In some cases, an enlarged retention distance can be added as the enlarged selection radius, and the fourth non-simplified region unit is selected using the enlarged selection radius. The fourth non-simplified region units are then combined to form the fourth non-simplified region. Figure 16 As shown, a second signal aperture 64 can be found within a first predetermined distance of the first signal aperture 63. Therefore, the distance between the first signal aperture 63 and the nearest second signal aperture 64 is used as the selection radius radi3 to enclose the fourth non-simplified region unit.

[0124] Furthermore, taking each of the second signal conductive vias 64 of the second signal trace 62 as the center, it is determined whether any first signal conductive via 63 exists within the second predetermined distance. If the determination result is yes, the distance between the closest first signal conductive via 63 and the second signal conductive via 64 is taken as another selection radius radi3' (it is also possible to add an enlarged retention distance as another enlarged selection radius), and the fifth non-simplified region unit is selected, and each fifth non-simplified region unit is combined to form the fifth non-simplified region.

[0125] Sub-step B3: The region of each fourth non-simplified region unit in the union is the fourth non-simplified region, the region of each fifth non-simplified region unit in the union is the fifth non-simplified region, and the envelope of the fourth and fifth non-simplified regions is the closed region to obtain the remaining non-simplified regions URB.

[0126] C: Consider the impact of perforation on the via trace:

[0127] If the effect of perforation on the trace is considered, step S5.2 can be further divided into the following sub-steps, please refer to [reference needed]. Figure 18 and Figure 19 .

[0128] Sub-step C1: Similarly, locate a plurality of aggressors 71 and signal traces 72 of adjacent aggressors 71 in the layout layer 11 of the complete 3D model 10. In this embodiment, each aggressor 71 is essentially a signal conductive via.

[0129] Sub-step C2: Select the sixth non-simplified region unit centered on the signal interfering party 71 according to the selection radius radi4. The sixth non-simplified region unit covers the signal trace 72 of a predetermined length.

[0130] Sub-step C3: Each sixth non-simplified region unit in the union is the sixth non-simplified region, and the sixth non-simplified region is the remaining non-simplified region URC that is required.

[0131] In step S5.2, different remaining non-simplified regions URA-URC are obtained based on the isolation degree considerations for different situations, and then the following steps are performed.

[0132] Step S5.3: Enclose the first non-simplified region UR1 and the remaining non-simplified regions URA-URC as a closed region. For example, if the influence of trace isolation on trace is considered, then the first to third non-simplified regions are enclosed as closed regions; if the influence of trace isolation on trace and perforation isolation on perforation is considered simultaneously, then the first to fifth non-simplified regions are enclosed as closed regions; if the influence of trace isolation on trace and perforation isolation on trace is considered simultaneously, then the first to third and sixth to seventh non-simplified regions are enclosed as closed regions, and so on for other cases. Then, define the region outside the enclosed region UR1 and at least one of the remaining non-simplified regions URA-URC as the simplified region SR (e.g., ...). Figure 20 ).

[0133] Step S5.4: Replace the simplified region SR defined in step S5.3 with the metal structure M (e.g., Figure 21 For example, a solid structure formed of pure copper. Thus, the desired simplified 3D model 10' is jointly established by the aforementioned metal structure M and the layout of the first unsimplified region UR1 and the remaining unsimplified regions URA-URC after the envelopment. The simplified 3D model 10' is as follows: Figure 20 and Figure 21 As shown. In Figure 20 In the middle, it can be seen that compared to Figure 2 Most of the perforated structures have been replaced by metal structures (M). Figure 21 As can be seen, some areas of the multi-layered layout layer 11 have been replaced by the metal structure M.

[0134] It should be noted that replacing the simplified region SR with a solid metal structure M will result in a structure similar to the original multilayer metal circuit structure with a large area of ​​copper foil before any layout is done. Moreover, such a replacement will not affect the accuracy of the electrical simulation.

[0135] The inventors have conducted actual electrical simulation tests. Taking the layout design of a multilayer metal circuit structure containing a 4-channel Wi-Fi module as an example, the electrical simulation time can be reduced to 12 hours using the automated simplification mechanism of this embodiment. Taking the layout design of a multilayer metal circuit structure containing a 22-channel 4G LTE high-speed signal as an example, the electrical simulation time can be reduced to 48 hours. Without using the simplification mechanism of this embodiment to simplify the complete 3D model, the electrical simulation time is estimated to be 3 to 5 times the time required after simplification. It can be seen that this embodiment can indeed significantly reduce the overall electrical simulation time. Since the electrical simulation time can be compressed to within 2 days, the electrical simulation schedule is more in line with industry needs. Moreover, performing electrical simulation in a programmed manner can also reduce the reliance on the electrical simulation experience of senior engineers.

[0136] It is worth noting that the problem addressed by this invention is mainly the design of multilayer metal circuit structures for high-speed signals. The non-simplified regions selected are mainly areas where the current of high-speed signals is easily affected. The selection method is quite systematic and scientific, and can effectively improve the efficiency of electrical simulation. These are the key points of this invention.

[0137] Finally, it must be reiterated that the methods and components disclosed in the foregoing embodiments of the present invention are merely illustrative examples and are not intended to limit the scope of the patent of the present invention. Any simple structural modifications or changes made without departing from the spirit of the present invention, or any substitutions with other equivalent components, should still fall within the scope of the claims of the present invention.

Claims

1. A method for selecting a non-simplified region in a three-dimensional model of a multilayer metal circuit structure, characterized in that: a first non-simplified region is selected from a complete three-dimensional model of the layout design of the multilayer metal circuit structure; The complete 3D model contains multiple layout layers, and the method for selecting the first non-simplified region includes at least one of the following selection modes: First selection mode: In the layout layer of the complete 3D model, find the pad group on the surface, the pad group comprising a plurality of ground pads and at least one signal input / output pad; Centered on the at least one signal input / output pad, find a predetermined number of grounding pads around the periphery of the at least one signal input / output pad; The block that encloses the predetermined number of grounding pads and the at least one signal input / output pad is selected as the first block; In the layout layer of the complete 3D model, find the layout layer with a ground metal area and the ground metal area is located below the pad group, wherein the ground pads in the pad group are electrically connected to the ground metal area through a plurality of grounding vias, and one or more grounding vias are provided inside the ground metal area. The grounding vias are located around the one or more grounding vias. Select the area that encloses the one or more grounding vias and the area of ​​a predetermined number of grounding vias as the first area. The first block and the first region are combined to form the first non-simplified region; Second selection mode: In the layout layer of the complete 3D model, find the pad group on the surface, the pad group comprising a plurality of ground pads and at least one signal input / output pad; Find signal traces on the surface layer that connect to the at least one signal input / output pad and are coplanar with the at least one signal input / output pad, and find signal conductive vias that electrically connect to the traces in the layout layer, wherein the signal conductive vias are through layers M to N in the layout layer, where M and N are both positive integers and M is less than N; In the range from the layer above the Mth layer to the layer below the Nth layer in the layout layer, a predetermined number of grounding vias that are adjacent to the signal conductive vias are searched layer by layer with the signal conductive vias as the center. The area that encloses the predetermined number of grounding vias and the signal conductive vias is the first non-simplified area. Third selection mode: In the layout layer of the complete 3D model, find a layout layer with a signal trace and a first coplanar ground metal area located on one side of the signal trace, the first coplanar ground metal area extending along the signal trace; The signal trace is divided into a plurality of signal trace units; Centered on each of the signal trace units, layer by layer within the block of the first coplanar ground metal region, a layout layer having a first reference ground region is searched in the layout layer, and a predetermined number of first ground vias electrically connecting the first coplanar ground metal region and the first reference ground region are searched layer by layer in the layout layer. The area enclosing the predetermined number of first ground vias and each of the signal trace units is the first non-simplified region unit. In the layout layer, each layer combines the first non-simplified region unit and the signal trace, and the region after each of the first non-simplified region units and the signal trace is selected as the first non-simplified region; Fourth selection mode: In the layout layer of the complete 3D model, find the layout layer with a first ground metal area and a ground via inside the first ground metal area, the signal trace located on one side of the ground via, and the second ground metal area located on the other side of the ground via. Locate a predetermined number of grounding vias around the grounding via and electrically connect the first grounding metal area and the second grounding metal area; The region encompassing the signal trace, the area surrounding the grounding via containing the predetermined number of grounding vias, and the second grounding metal area is selected as the first non-simplified region.

2. The method for selecting non-simplified regions as described in claim 1, characterized in that, In the second selection mode, the farthest of the predetermined number of grounding vias from the signal conducting via is selected, and the distance between the signal conducting via and the farthest of the predetermined number of grounding vias is defined as the selection radius. The first non-simplified region is selected based on the selection radius.

3. The method for selecting the non-simplified region as described in claim 1, characterized in that, In the third selection mode, a second coplanar ground metal region is also searched on the other side of the signal trace relative to the first coplanar ground metal region, the second coplanar ground metal region extending along the signal trace; In addition, within the layout layers of the complete 3D model, a layout layer with a second reference junction area is sought. Centered on each of the signal trace units, a predetermined number of second grounding vias electrically connected to the second coplanar grounding metal region and either the first or second reference grounding region are searched layer by layer within the block of the second coplanar grounding metal region. The area enclosing the predetermined number of first grounding vias, the area of ​​the second grounding vias, and each of the signal trace units constitutes the first non-simplified region unit.

4. The method for selecting non-simplified regions as described in claim 3, characterized in that, In the third selection mode, a virtual window is selected centered on each of the signal trace units. The window is enlarged to a first size, and it is determined whether the window can cover the first grounding via within the first grounding metal area. The window is then enlarged to a second size, and it is determined whether the window can cover the second grounding via within the second grounding metal area. The distance between the center of the window and the furthest point from the center of the first grounding via is defined as the selection radius, and the distance between the center of the window and the furthest point from the center of the second grounding via is defined as another selection radius. The first non-simplified region unit is selected based on the two selection radii.

5. An automated simplification method for a three-dimensional model of a multilayer metal circuit structure, comprising using a computer to create a complete three-dimensional model based on the layout design of the multilayer metal circuit structure, and simplifying the complete three-dimensional model into a simplified three-dimensional model, wherein the complete three-dimensional model contains a plurality of layout layers, and the automated simplification mechanism includes the following steps: The first non-simplified region is selected using the non-simplified region selection method as described in claim 1; Based on the isolation degree of trace to trace, the isolation degree of perforation to perforation, or the isolation degree of perforation to trace of the complete three-dimensional model, at least the remaining non-simplified regions are obtained; The first non-simplified region and the at least one other non-simplified region are enclosed as a closed region. The region outside the enclosed region is defined as a simplified region. The simplified region is replaced by a metal structure. The simplified three-dimensional model is jointly established by the layout of the metal structure and the enclosed region.

6. The automated simplification method as described in claim 5, characterized in that, The step of obtaining the at least one remaining non-simplified region based on the isolation degree of the trace to the trace further includes: In the layout layer of the complete three-dimensional model, find the first signal trace, the second signal trace adjacent to the first signal trace, the plurality of first grounding vias disposed around the first signal trace, and the plurality of second grounding vias disposed around the second signal trace; The first signal trace is divided into a plurality of first signal trace units, and the second signal trace is divided into a plurality of second signal trace units; Taking each of the first signal trace units as the center, a first predetermined number of first grounding vias are found, and the area encompassing the first predetermined number of first grounding vias and the corresponding area of ​​each of the first signal trace units is selected to form a second non-simplified region unit; taking each of the second signal trace units as the center, a second predetermined number of second grounding vias are found, and the area encompassing the second predetermined number of second grounding vias and the corresponding area of ​​each of the second signal trace units is selected to form a third non-simplified region unit; Each of the second non-simplified region units in the union is a second non-simplified region, and each of the third non-simplified region units in the union is a third non-simplified region. Enclosing the second and third non-simplified regions as closed regions yields the at least one remaining non-simplified region.

7. The automated simplification method as described in claim 5, characterized in that, The step of obtaining the at least one remaining non-simplified region based on the degree of isolation between the perforations further includes: In the layout layer of the complete 3D model, find a first signal trace, a second signal trace adjacent to the first signal trace, a plurality of first signal conductive vias disposed around the first signal trace, and a plurality of second signal conductive vias disposed around the second signal trace. Taking each of the first signal conductive vias as the center, determine whether there is any second signal conductive via within a predetermined distance. If the determination result is yes, take the distance between the closest second signal conductive via and the first signal conductive via as the selection radius, select the fourth non-simplified region unit, and combine all the fourth non-simplified region units into the fourth non-simplified region. Taking each of the second signal conductive vias as the center, determine whether any of the first signal conductive vias exists within a predetermined distance. If the determination result is yes, take the distance between the closest first signal conductive via and the second signal conductive via as another selection radius, select a fifth non-simplified region unit, and combine all the fifth non-simplified region units into a fifth non-simplified region. The at least one remaining non-simplified region is obtained by enclosing the fourth and fifth non-simplified regions as closed regions.

8. The automated simplification method as described in claim 5, characterized in that, The step of obtaining the at least one remaining non-simplified region based on the isolation degree of the perforation to the trace further includes: In the layout layer of the complete 3D model, find a plurality of signal jammers and signal traces adjacent to the signal jammers; Centered on the signal interfering entity, a sixth non-simplified region unit is selected according to the selection radius. The sixth non-simplified region unit covers the signal trace of a predetermined length. The sixth non-simplified region units are combined to form a sixth non-simplified region, which is the at least one other non-simplified region.

Images