High electron mobility transistor structure and method of manufacturing the same
Patent Information
- Application Number
- CN202211168336.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2022-03-14
- Filing Date
- 2022-09-23
- Publication Date
- 2026-10-16
- Estimated Expiration
- 2042-09-23
AI Technical Summary
[0003]一般为了提升效能,通常会于高电子迁移率晶体管的缓冲层进行掺杂,但缓冲层中的掺杂物会通过扩散在通道层析出,而造成例如通道层的片电阻值升高的问题
[0007] The advantage of this invention is that the doping concentration of the dopant at the interface between the channel layer and the barrier layer is greater than or equal to 1 × 10⁻⁶. 15 cm -3 The design can reduce the influence of the metal dopant on the sheet resistance of the nitride channel layer and provide an improved structure for a high electron mobility transistor with good performance.
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Figure CN116799053B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to semiconductor technology; in particular, it refers to a high electron mobility transistor. Background Technology
[0002] A high electron mobility transistor (HEMT) is a transistor with a two-dimensional electron gas (2-DEG). The 2-DEG is adjacent to the heterojunction surface between two materials with different band gaps. Since the HEMT does not use doped regions as the carrier channels of the transistor, but uses a 2-DEG with high electron mobility as the carrier channels, the HEMT has characteristics such as high breakdown voltage, high electron mobility, low on-resistance and low input capacitance, and can be widely used in high-power semiconductor devices.
[0003] To improve performance, the buffer layer of high electron mobility transistors (HETTs) is typically doped. However, dopants in the buffer layer can diffuse into the channel layer, causing problems such as increased sheet resistance. Therefore, reducing the impact of dopants on the sheet resistance of the channel layer and providing a high electron mobility transistor with good performance is a pressing issue. Summary of the Invention
[0004] In view of this, the purpose of the present invention is to provide a high electron mobility transistor structure and a method for manufacturing the same, which can reduce the influence of dopants on the sheet resistance of the channel layer and provide a high electron mobility transistor with good performance.
[0005] To achieve the above objectives, the present invention provides an improved high electron mobility transistor structure, comprising, in sequence: a substrate, a nucleation layer, a buffer layer, a channel layer, and a barrier layer; the buffer layer contains a dopant; the channel layer has a lower doping concentration of the dopant compared to the buffer layer; a two-dimensional electron gas is formed in the channel layer along the interface between the channel layer and the barrier layer; the doping concentration of the dopant at the interface between the channel layer and the barrier layer is greater than or equal to 1 × 10⁻⁶. 15 cm -3 .
[0006] The present invention also provides a method for manufacturing a high electron mobility transistor structure, comprising: providing a substrate; forming a nucleation layer on the substrate; forming a buffer layer on the nucleation layer and simultaneously performing a doping step; forming a channel layer on the buffer layer; forming a barrier layer on the channel layer; and forming a two-dimensional electron gas in the channel layer along the interface between the channel layer and the barrier layer; wherein the dopant concentration at the interface between the channel layer and the barrier layer is greater than or equal to 1 × 10⁻⁶. 15 cm -3 .
[0007] The advantage of this invention is that the doping concentration of the dopant at the interface between the channel layer and the barrier layer is greater than or equal to 1 × 10⁻⁶. 15 cm -3 The design can reduce the influence of the metal dopant on the sheet resistance of the nitride channel layer and provide an improved structure for a high electron mobility transistor with good performance. Attached Figure Description
[0008] Figure 1 A schematic diagram of a preferred embodiment of the improved high electron mobility transistor structure of the present invention.
[0009] Figure 2 This is a flowchart of a preferred embodiment of the manufacturing method of a high electron mobility transistor structure according to the present invention.
[0010] Figure 3 This is a flowchart illustrating a preferred embodiment of the manufacturing method for optimizing the nitride channel layer thickness and metal doping concentration of a high electron mobility transistor structure according to the present invention.
[0011] Figure 4 This is a graph showing the relationship between iron atom doping concentration and thickness in a preferred embodiment of the present invention.
[0012] Figure 5 This is a graph showing the relationship between the sheet resistance value and the iron atom doping concentration in a preferred embodiment of the present invention. Detailed Implementation
[0013] To more clearly illustrate the present invention, preferred embodiments are described in detail below with reference to the accompanying drawings.
[0014] Please refer to Figure 1 As shown, a preferred embodiment of the improved high electron mobility transistor structure 1 of the present invention is provided, which sequentially includes a substrate 10, a nucleation layer 20, a buffer layer 30, a channel layer 40 and a barrier layer 50. The improved high electron mobility transistor structure of the present invention can be formed on the substrate by metal-organic chemical vapor deposition (MOCVD).
[0015] Furthermore, the substrate 10 is a substrate with a resistivity greater than or equal to 1000Ω / cm. For example, the substrate may be a SiC substrate, a sapphire substrate, or a Si substrate.
[0016] The nucleation layer 20 is a nitride nucleation layer of aluminum nitride (AlN) or aluminum gallium nitride (AlGaN) and is located between the substrate 10 and the buffer layer 30.
[0017] The buffer layer 30 includes a dopant. In this embodiment, the buffer layer 30 is, for example, a gallium nitride nitride buffer layer, and the dopant is a metal dopant. Taking iron as an example, the dopant concentration of the buffer layer 30 is greater than or equal to 2 × 10⁻⁶. 17 cm -3 The metal doping concentration at the junction of the buffer layer 30 and the channel layer 40 is greater than or equal to 2 × 10⁻⁶. 17 cm -3 .
[0018] The channel layer 40 is, for example, a gallium aluminum nitride or gallium nitride nitride nitride channel layer, and a two-dimensional electron gas is formed in the channel layer 40 along the interface between the channel layer 40 and the barrier layer 50. In one embodiment, the buffer layer 30 and the channel layer 40 are composed of the same and uniformly distributed nitride, the thickness Y of the channel layer 40 is between 0.6 and 1.2 micrometers, the total thickness T of the buffer layer 30 and the channel layer 40 is less than or equal to 2 micrometers, and the channel layer 40 has a lower doping concentration of the dopant compared to the buffer layer 30. The metal doping concentration in the channel layer 40, that is, the iron atom concentration, decreases from the interface between the buffer layer 30 and the channel layer 40 towards the interface between the channel layer 40 and the barrier layer 50. In other embodiments, the iron atom concentration may also be distributed in the buffer layer 30 and the channel layer 40 in other ways.
[0019] Furthermore, in one embodiment, the doping concentration of the dopant in the buffer layer 30 is uniformly distributed at the same thickness, and the doping concentration of the dopant in the channel layer 40 is uniformly distributed at the same thickness. The thickness of the buffer layer 30 refers to the distance from the junction of the buffer layer 30 and the nucleation layer 20 to the upper surface of the buffer layer or towards the channel layer 40. The thickness of the channel layer 40 refers to the distance from the junction of the buffer layer 30 and the channel layer 40 to the upper surface of the channel layer 40 or towards the barrier layer 50. Preferably, the buffer layer 30 satisfies the condition (maximum metal dopant concentration - minimum metal dopant concentration) / maximum metal dopant concentration ≤ 0.2 at the same thickness, and the channel layer satisfies the condition (maximum metal dopant concentration - minimum metal dopant concentration) / maximum metal dopant concentration ≤ 0.2 at the same thickness.
[0020] Wherein, the doping concentration of the dopant at the interface between the channel layer 40 and the barrier layer 50 is greater than or equal to 1 × 10⁻⁶. 15 cm -3 In another embodiment, the doping concentration of the dopant at the interface between the channel layer 40 and the barrier layer 50 is greater than or equal to 1 × 10⁻⁶. 16 cm -3 And less than or equal to 2×10 17 cm -3 .
[0021] The metal doping concentration X at the junction of the nitride buffer layer 30 and the nitride channel layer 40 is defined as the number of metal atoms per cubic centimeter. The thickness Y of the nitride channel layer 40 is in micrometers (μm). The thickness Y of the nitride channel layer 40 satisfies the condition: Y ≤ (0.2171)ln(X) - 8.34. Preferably, the thickness Y of the nitride channel layer 40 satisfies the condition: (0.2171)ln(X) - 8.54 ≤ Y. Therefore, the influence of the metal dopant on the sheet resistance of the nitride channel layer 40 can be reduced, and an improved structure of high electron mobility transistor with good performance can be provided. When the metal doping concentration X is a certain value, the maximum value of the thickness Y of the nitride channel layer 40 can be calculated. Conversely, when the thickness Y of the nitride channel layer 40 is a certain value, the minimum value of the metal doping concentration X can be calculated, so as to obtain the optimized range of the nitride channel layer 40 thickness corresponding to the metal doping concentration, or the optimized range of the metal doping concentration corresponding to the thickness of the nitride channel layer 40.
[0022] Please refer to Figure 2The diagram shown is a flowchart of a high electron mobility transistor structure manufacturing method according to a preferred embodiment of the present invention. The high electron mobility transistor structure of the present invention can be formed on a substrate by metal-organic chemical vapor deposition (MOCVD). The high electron mobility transistor structure manufacturing method includes:
[0023] Step S02, a substrate 10 is provided; the substrate 10 is a substrate with a resistivity greater than or equal to 1000Ω / cm. For example, the substrate 10 may be a SiC substrate, a sapphire substrate or a Si substrate.
[0024] Step S04: A nucleation layer 20 is formed on the substrate 10; the nucleation layer 20 is aluminum nitride (AlN) or aluminum gallium nitride (AlGaN).
[0025] Step S06: A buffer layer 30 is formed above the nucleation layer 20, and a doping step is performed simultaneously; the buffer layer 30 is a nitride buffer layer, wherein the epitaxial growth conditions of the nitride buffer layer satisfy: temperature 1030~1070℃, pressure 150~250 torr, V / III ratio 200~1500, and the dopant concentration in the doping step is greater than or equal to 2×10⁻⁶. 17 cm -3 The doping step is a metal doping step, in which the metal doped is iron. The metal doping step includes controlling the flow rate of Cp2Fe (cyclopentadienyl iron) to a certain value, thereby obtaining the buffer layer in which the doping concentration of the dopant is uniformly distributed at the same thickness. Preferably, the buffer layer 30 satisfies the condition (maximum metal dopant concentration - minimum metal dopant concentration) / maximum metal dopant concentration ≤ 0.2 at the same thickness.
[0026] Step S08: A channel layer 40 is formed above the buffer layer 30; the channel layer 40 is a nitride channel layer 40, wherein the epitaxial growth conditions of the nitride channel layer 40 satisfy: temperature 1030~1070℃, pressure 150~250 torr, V / III ratio 200~1500, and the metal doping concentration at the interface between the nitride buffer layer 30 and the nitride channel layer 40 is greater than or equal to 2×10⁻⁶. 17 cm -3In this embodiment, step S08 includes stopping the metal doping step and forming a channel layer 40 with a thickness of Y micrometers (μm) above the buffer layer 30. The thickness refers to the distance of the channel layer 40 from the junction of the buffer layer 30 and the channel layer 40 to the upper surface of the channel layer 40. The total thickness of the buffer layer 30 and the channel layer 40 is less than or equal to 2 micrometers, and the total thickness refers to the distance of the buffer layer 30 from the junction of the buffer layer 30 and the nucleation layer 20 to the upper surface of the channel layer 40. Iron atoms in the buffer layer 30 diffuse from the junction of the buffer layer 30 and the channel layer 40 towards the channel layer 40, such that the iron atom concentration in the channel layer 40 decreases from the junction of the buffer layer 30 and the channel layer 40 towards the surface of the channel layer 40.
[0027] Wherein, the metal doping concentration X at the junction of the nitride buffer layer 30 and the nitride channel layer 40 is defined as X metal atoms per cubic centimeter, and the thickness Y of the nitride channel layer 40 satisfies: Y≤(0.2171)ln(X)-8.34, preferably, the thickness Y of the nitride channel layer 40 satisfies: (0.2171)ln(X)-8.54≤Y.
[0028] Step S10: A barrier layer 50 is formed above the channel layer 40. A two-dimensional electron gas is formed in the channel layer 40 along the interface between the channel layer 40 and the barrier layer 50. The dopant concentration at the interface between the channel layer 40 and the barrier layer 50 is greater than or equal to 1 × 10⁻⁶. 15 cm -3 Preferably, the dopant concentration at the interface between the channel layer 40 and the barrier layer 50 is greater than or equal to 1 × 10⁻⁶. 16 cm -3 And less than or equal to 2×10 17 cm -3 .
[0029] Furthermore, in this embodiment, both the buffer layer 30 and the channel layer 40 are composed of uniformly distributed gallium nitride. The doping concentration of the dopant in the buffer layer 30 is uniformly distributed at the same thickness, and the doping concentration of the dopant in the channel layer 40 is also uniformly distributed at the same thickness. The thickness of the buffer layer 30 refers to the distance from the junction of the buffer layer 30 and the nucleation layer 20 to the upper surface of the buffer layer or towards the channel layer 40. The thickness of the channel layer 40 refers to the distance from the junction of the buffer layer 30 and the channel layer 40 to the upper surface of the channel layer or towards the barrier layer 50. Preferably, the buffer layer 30 satisfies the condition (maximum metal dopant concentration - minimum metal dopant concentration) / maximum metal dopant concentration ≤ 0.2 at the same thickness, and the channel layer satisfies the condition (maximum metal dopant concentration - minimum metal dopant concentration) / maximum metal dopant concentration ≤ 0.2 at the same thickness.
[0030] Please refer to Figure 3 The image shows a preferred embodiment of the present invention, a method for manufacturing an optimized nitride channel layer thickness and metal doping concentration for a high electron mobility transistor structure, comprising:
[0031] Step S202: Provide a substrate 10; form a nitride nucleation layer 20 on the substrate 10;
[0032] Step S204: A nitride buffer layer 30 is formed above the nitride nucleation layer 20 and a metal atom doping step is performed simultaneously.
[0033] Step S206: Stop the metal doping step and form a nitride channel layer 40 above the nitride buffer layer 30;
[0034] Step S208: Measure the metal concentration at the junction of the nitride buffer layer 30 and the nitride channel layer 40, and measure the concentration of metal atoms on the surface of the nitride channel layer 40 and at different thicknesses to obtain multiple metal doping concentration values. Based on the multiple metal doping concentration values and the corresponding thickness position of the nitride channel layer 40, calculate the change in metal doping concentration per unit thickness in the nitride channel layer as C.
[0035] Step S210 defines the metal doping concentration value as being between two of the plurality of metal doping concentration values, X1 and X2. Thus, when the metal doping concentration at the junction of the nitride buffer layer 30 and the nitride channel layer 40 is X, and the thickness of the nitride channel layer is Y, X1≤XC*Y≤X2 is satisfied, and an optimized metal doping concentration value and a corresponding nitride channel layer thickness value can be obtained. Step S208 further includes measuring the wafer resistance and the corresponding metal doping concentration at different thicknesses of the nitride channel layer to obtain a plurality of wafer resistance values and a plurality of corresponding metal doping concentration values, and obtaining two different values among the plurality of wafer resistance values to obtain two corresponding metal doping concentration values, X1 and X2.
[0036] For example, a user can perform step S202, providing a SiC substrate and forming an aluminum nitride nucleation layer on the substrate by metal-organic chemical vapor deposition (MOCVD);
[0037] Next, step S204 is executed, where a gallium nitride buffer layer is formed above the aluminum nitride nucleation layer using metal-organic chemical vapor deposition (MOCVD) under epitaxial growth conditions of 1030–1070 °C, 150–250 torr, and a V / III ratio of 200–1500. Simultaneously, an iron atom doping step is performed, while controlling the Cp2Fe (cyclopentadienyl iron) flow rate to a constant value, ensuring that the iron atom doping concentration in the gallium nitride buffer layer is a constant value of 5 × 10⁻⁶. 18 cm -3 ;
[0038] Next, step S206 is executed, the iron atom doping step is stopped, and a gallium nitride channel layer with a thickness of 0.6 to 1.2 micrometers is formed above the gallium nitride buffer layer by metal-organic chemical vapor deposition (MOCVD) to meet the following epitaxial growth conditions: temperature 1030 to 1070 °C, pressure 150 to 250 torr, and V / III ratio 200 to 1500, wherein the total thickness of the gallium nitride buffer layer and the gallium nitride channel layer is less than or equal to 2 micrometers;
[0039] Next, proceed to step S208, as follows: Figure 4 As shown, the iron atom doping concentration values C1, C2 and C3 corresponding to different thicknesses T1, T2 and T3 of the gallium nitride channel layer are obtained, and the change in metal doping concentration per unit thickness in the nitride channel layer is calculated as C. In this embodiment, C = 1 / 0.2171.
[0040] Next, step S210 is executed to obtain the sheet resistance values R1, R2, and R3 of the gallium nitride channel layer at different thicknesses T1, T2, and T3, as follows: Figure 5 As shown, a regression curve was obtained by plotting the sheet resistance value as the Y-axis and the iron atom doping concentration value as the X-axis. The regression curve showed that when the iron atom doping concentration value was less than a fixed value C4, the change in sheet resistance value as the iron atom doping concentration decreased approached 0. Furthermore, the corresponding two-phase dissimilar iron atom doping concentration value of 5 × 10⁻⁶ was obtained near the fixed value C4. 16 cm -3 1×10 17 cm -3 The iron atom doping concentration is limited to a value between 5 × 10⁻⁶ and the two-phase dissimilar iron atom doping concentration. 16 cm -3 1×10 17 cm -3 Between these conditions, when the metal doping concentration of the gallium nitride buffer layer at the interface between the gallium nitride buffer layer and the gallium nitride channel layer is X, and the thickness of the gallium nitride channel layer is Y, the condition 5 × 10⁻⁶ is satisfied. 16 ≤XC*Y≤1×10 17 Therefore, it can be deduced that (0.2171)ln(X)-8.54≤Y≤(0.2171)ln(X)-8.34. This example uses three different thickness values, iron atom doping concentration values, and sheet resistance values. In other embodiments, it is not excluded that more than three thickness values, iron atom doping concentration values, and sheet resistance values may be obtained.
[0041] In summary, the improved high electron mobility transistor structure of the present invention, by satisfying Y ≤ (0.2171)ln(X) - 8.34, can reduce the influence of the metal dopant on the sheet resistance of the nitride channel layer and provide a high electron mobility transistor structure with good performance. When the metal doping concentration X is a certain value, the maximum value of the nitride channel layer thickness Y can be calculated; conversely, when the nitride channel layer thickness Y is a certain value, the minimum value of the metal doping concentration X can be calculated. Thus, an optimized range of nitride channel layer thickness values corresponding to the metal doping concentration, or an optimized range of metal doping concentration values corresponding to the nitride channel layer thickness, can be obtained. Furthermore, in the improved high electron mobility transistor structure of the present invention, the doping concentration of the dopant at the interface between the channel layer and the barrier layer is greater than or equal to 1 × 10⁻⁶. 15 cm -3 The technical features can reduce the influence of the metal dopant on the sheet resistance of the nitride channel layer and provide an improved structure for a high electron mobility transistor with good performance.
[0042] The above description is only a preferred embodiment of the present invention. Any equivalent changes made by applying the present invention specification and the claims should be included within the patent scope of the present invention.
[0043] Explanation of reference numerals in the attached figures
[0044] [This invention]
[0045] 1: Improved structure of high electron mobility transistor
[0046] 10: Substrate
[0047] 20: Nucleation layer
[0048] 30: Buffer layer
[0049] 40: Channel Layer
[0050] 50: Barrier Layer
[0051] S02, S04, S06, S08, S10: Steps
[0052] S202, S204, S206, S208, S210: Steps
[0053] T,Y: Thickness
Claims
1. An improved structure for a high electron mobility transistor, comprising, in sequence: One substrate; One nucleation layer; A buffer layer containing a metal dopant; A channel layer, which has a lower metal doping concentration compared to the buffer layer; A barrier layer is formed in the channel layer along the interface between the channel layer and the barrier layer; The metal dopant concentration at the interface between the channel layer and the barrier layer is greater than 5 × 10⁻⁶. 16 cm -3 And less than or equal to 1×10 17 cm -3 Furthermore, the atomic concentration of the metal dopant in the channel layer decreases from the interface between the buffer layer and the channel layer towards the interface between the channel layer and the barrier layer.
2. The improved high electron mobility transistor structure as described in claim 1, wherein, The metal dopant is iron.
3. The improved high electron mobility transistor structure as described in claim 1, wherein, The doping concentration of the dopant in the buffer layer is greater than or equal to 2 × 10⁻⁶. 17 cm -3 .
4. The improved high electron mobility transistor structure as described in claim 1, wherein, The channel layer is aluminum gallium nitride or gallium nitride.
5. The improved high electron mobility transistor structure as described in claim 1, wherein, The nucleation layer is aluminum nitride (AlN) or aluminum gallium nitride (AlGaN).
6. The improved high electron mobility transistor structure as described in claim 1, wherein, The substrate is a substrate with a resistivity greater than or equal to 1000Ω / cm.
7. The improved high electron mobility transistor structure as described in claim 1, wherein, The total thickness of the buffer layer and the channel layer is less than or equal to 2 micrometers.
8. The improved high electron mobility transistor structure as described in claim 1, wherein, The doping concentration of the dopant in the buffer layer is uniformly distributed along the same thickness, and the doping concentration of the dopant in the channel layer is uniformly distributed along the same thickness.
9. A method for manufacturing a high electron mobility transistor structure, comprising: Provide a substrate; A nucleation layer is formed above the substrate; A buffer layer is formed above the nucleation layer while a metal doping step is performed simultaneously. A channel layer is formed above the buffer layer; A barrier layer is formed above the channel layer, and a two-dimensional electron gas is formed in the channel layer along the interface between the channel layer and the barrier layer. The metal dopant concentration at the interface between the channel layer and the barrier layer is greater than 5 × 10⁻⁶. 16 cm -3 And less than or equal to 1×10 17 cm -3 Furthermore, the atomic concentration of the metal dopant in the channel layer decreases from the interface between the buffer layer and the channel layer towards the interface between the channel layer and the barrier layer.
10. The method for manufacturing a high electron mobility transistor structure as described in claim 9, wherein, The metal dopant is iron.
11. The method for manufacturing a high electron mobility transistor structure as described in claim 9, wherein, The buffer layer has a dopant concentration greater than or equal to 2 × 10⁻⁶ during the doping step. 17 cm -3 .
Citation Information
Patent Citations
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JP2010182872A