A power-on soft start circuit

Abstract

The application discloses a power-on soft start circuit, comprising: a reference value generating circuit, which is used for outputting a slowly increasing reference value during a power-on starting process; and a protection threshold value generating circuit, which is used for outputing a slowly increasing protection threshold value during the power-on starting process, so that the application can realize smoother current output, greatly improve the risk of output current surge, and guarantee the smooth output of output voltage; further, the application further adds a frequency modulation circuit, so that when the output voltage is small at the initial stage of starting, the average output current at the time can be well limited, the risk of chip damage is reduced, and especially under abnormal conditions, such as output short circuit, the average output current is reduced by reducing the working frequency, so that the system reliability can be greatly improved; further, the application further adds a starting time detection circuit, so that damage caused by long-time working at the peak current can be avoided.

Description

Technical Field

[0001] This invention relates to the field of electronic circuit technology, and in particular to a power-on soft-start circuit. Background Technology

[0002] Currently, common methods for implementing power-on soft-start primarily involve directly or indirectly adjusting a reference value during the power-on process. This allows the reference value to rise from 0V to the final set value within a set startup time, thereby achieving stable inductor current and output voltage output and reducing inductor current surges. For example, taking a current-mode DC-DC switching power supply as one example in this application, most such chips involve a power-on soft-start circuit. By controlling the reference value to rise from 0V to the final set value within a set time, a stable output voltage is achieved.

[0003] In addition, output voltage is controlled through current limiting. On one hand, to limit the maximum peak inductor current, a cycle-by-cycle peak current threshold (OCP) is designed. On the other hand, for current-mode DC-DC control loops, the compensation threshold (COMP) controls the output current; the larger the output current, the larger the compensation threshold (COMP). Therefore, the maximum allowable COMP output during design will be greater than the chip's maximum set output current. For example, if the chip allows a maximum output of 1A, the maximum allowable output of COMP during design might be around 1.5A. Thus, through these two limiting methods, OCP and COMP, the peak inductor current is controlled. The system automatically selects the minimum value between the peak currents limited by OCP and COMP (generally, the peak current limited by COMP should be larger than the peak current limited by OCP). To meet system operation requirements, both OCP and COMP must exceed the system's maximum allowable load current during design. Furthermore, most chips have a fixed soft-start time during design, i.e., the time it takes for the reference value to rise to the final voltage. Therefore, during application, it is essential to ensure that the parameters of external devices allow the output voltage to follow the internal reference value within the set start-up time. If the output voltage fails to follow the internal reference value, the inductor current will operate at the minimum of the peak current limits set by OCP and COMP, meaning the inductor current will operate at the system's maximum peak current. For example, with a large load capacitance, even if the chip is operating at its maximum peak current, the output voltage may still fail to follow the reference value. If the capacitance is large enough, the inductor will operate at its maximum peak current for an extended period, potentially damaging both the chip and the inductor. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a power-on soft-start circuit that addresses the risk of damage to chips that operate at the maximum peak current for extended periods in existing technologies.

[0005] The technical solution adopted by this invention to solve its technical problem is: constructing a power-on soft-start circuit, which can be applied to reduce the surge of output current when a switching power supply is powered on, including:

[0006] A reference value generation circuit is used to output a slowly increasing reference value during the power-on startup process;

[0007] A protection threshold generation circuit is used to output a slowly increasing protection threshold during power-on startup.

[0008] A control circuit is configured to control the output voltage to slowly increase following the reference value during power-on startup, and to limit the output current to limit the output voltage based on the protection threshold during power-on startup.

[0009] Preferably, it further includes a frequency modulation circuit for monitoring the output voltage and generating a frequency signal positively correlated with the output voltage for use by the power-on soft-start circuit; the slow growth rate of the reference value output by the reference value generation circuit and / or the slow growth rate of the protection threshold output by the protection threshold generation circuit are positively correlated with the frequency signal output by the frequency modulation circuit.

[0010] Preferably, it further includes a startup time detection circuit, used to monitor the output voltage during power-on startup and use a frequency signal for timing. When the output voltage rises to a preset value within the first startup time, the control circuit is kept on. When the output voltage fails to rise to the preset value within the first startup time, the control circuit is turned off, the timing is maintained, and when the timing reaches the second startup time, the control circuit is turned on again. At the same time, the outputs of the reference value generation circuit and the protection threshold generation circuit are reset by a reset signal. The second startup time is an integer multiple of the first startup time.

[0011] Preferably, both the baseline value and the protection threshold increase linearly, stepwise, or curvilinearly.

[0012] Preferably, the protection threshold generation circuit is specifically used to control the protection threshold to increase in a stepwise manner during the power-on startup process based on the frequency signal output by the frequency modulation circuit, and the time step of the stepwise increase is positively correlated with the frequency signal output by the frequency modulation circuit.

[0013] And / or, the reference value generation circuit is specifically used to control the reference value to increase in a stepwise manner during the power-on startup process based on the frequency signal output by the frequency modulation circuit, wherein the time step of the stepwise increase is positively correlated with the frequency signal output by the frequency modulation circuit.

[0014] Preferably, the start-up time detection circuit uses the frequency signal output by the frequency modulation circuit for timing.

[0015] Preferably, there is one or more protection thresholds, and the protection threshold that ultimately limits the minimum output current increases in a stepwise manner.

[0016] Preferably, when there are multiple protection thresholds covering both current and voltage values, if the protection threshold that ultimately limits the minimum output current is in the form of a current value, then the protection threshold that ultimately limits the minimum output current is selected from the protection thresholds in the form of voltage values ​​in a step-like manner, and the number of steps for the protection thresholds in the form of voltage values ​​is greater than the number of steps for the protection thresholds in the form of current values.

[0017] Preferably, the protection threshold is in the form of a current value or a voltage value corresponding to the current value; for the slow increase of the voltage value, a counting segment circuit or a capacitor charging circuit can be used to implement the function; for the slow increase of the current value, a counting segment circuit can be used to implement the function, or the output of the slowly increasing voltage value can be output after being mirrored by the current.

[0018] The capacitor charging circuit specifically outputs a slowly increasing voltage through the accumulation of charge; or, it uses a frequency signal to generate a clock signal, and controls the periodic storage and transfer of charge based on the clock signal, with the output voltage value increasing by a gradient each time a charge is transferred.

[0019] The counting segmentation circuit specifically uses the currently received frequency signal to perform real-time counting. Whenever a round of counting reaches a target value, it controls the output voltage / current value to increase by a gradient and restarts a new round of counting.

[0020] The power-on soft-start circuit of the present invention has the following beneficial effects: In the power-on startup process, the reference value generation circuit outputs a slowly increasing reference value, so that the output voltage also increases slowly when following the reference value, thus achieving a stable output voltage; at the same time, the protection threshold generation circuit outputs a slowly increasing protection threshold during the power-on startup process. Because the protection threshold increases slowly, the peak current it limits will also increase slowly as startup progresses. Thus, if the output current must operate at the peak current, a smoother current output will be achieved, and the situation where the maximum peak current is allowed to be operated for a long time during startup will not occur. This greatly improves the risk of output current surge and can ensure a stable output voltage even if the voltage following based on the reference value fails.

[0021] Furthermore, the present invention adds a frequency modulation circuit to monitor the output voltage. It can generate a frequency signal that is positively correlated with the output voltage for use by the power-on soft-start circuit. For example, the step-by-step increase of the reference value generation circuit and the protection threshold generation circuit is positively correlated with the frequency signal. In this way, with the slow increase of the reference value and the protection threshold, combined with the modulation of the frequency signal by the output voltage, the average output current can be effectively limited when the output voltage is small at the beginning of startup, reducing the risk of chip damage. Especially in abnormal conditions, such as output short circuit, the average output current is reduced by reducing the operating frequency, which can greatly improve the system reliability.

[0022] Furthermore, the present invention adds a start-up time detection circuit. When the output voltage cannot reach the set value for a long time due to excessive load capacitance or output short circuit, the control circuit is shut down to avoid damage caused by prolonged operation at peak current. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort:

[0024] Figure 1 This is a schematic diagram of the power-on soft-start circuit according to Embodiment 1 of the present invention;

[0025] Figure 2 This is the circuit diagram of a switched capacitor circuit;

[0026] Figure 3 This is the equivalent diagram of a switched capacitor circuit;

[0027] Figure 4 This is one of the output schematic diagrams of a switched capacitor circuit;

[0028] Figure 5 This is the second schematic diagram of the output of a switched capacitor circuit;

[0029] Figure 6 This is the circuit schematic of an RC circuit;

[0030] Figure 7 This is a schematic diagram of the output of an RC circuit;

[0031] Figure 8 This is the circuit diagram of a capacitor linear charging circuit;

[0032] Figure 9 This is a schematic diagram of the output of a capacitor linear charging circuit;

[0033] Figure 10 This is the circuit diagram of a capacitor pulse charging circuit;

[0034] Figure 11 This is a schematic diagram of the output of a capacitor pulse charging circuit;

[0035] Figure 12 This is a schematic diagram of a specific implementation method one for the voltage-based protection threshold reuse reference value;

[0036] Figure 13 This is a schematic diagram of the second specific implementation method of the voltage-based protection threshold reuse reference value;

[0037] Figure 14 This is a schematic diagram of a segmented counting circuit for a protection threshold in the form of an output current value;

[0038] Figure 15 This is a schematic diagram illustrating how a protection threshold is implemented by using a reference value to output the current value.

[0039] Figure 16 This is a comparison chart of the existing power-on soft-start output waveform and the power-on soft-start output waveform of Embodiment 1;

[0040] Figure 17 This is a comparison chart of the inductor current between the existing power-on soft start and the power-on soft start of Implementation Example 1;

[0041] Figure 18 This is a schematic diagram of the power-on soft-start circuit according to Embodiment 2 of the present invention;

[0042] Figure 19 This is the circuit schematic of a frequency modulation circuit;

[0043] Figure 20 This is a schematic diagram illustrating the frequency change process of the frequency signal output by the frequency modulation circuit.

[0044] Figure 21 This is a schematic diagram of the power-on soft-start circuit according to Embodiment 3 of the present invention;

[0045] Figure 22 This is a comparison of the output waveforms of the existing power-on soft start under large load capacitor conditions and the power-on soft start of Example 3.

[0046] Figure 23 This is a comparison diagram of the inductor current between the existing soft start and the soft start of Example 3 under large load capacitor conditions;

[0047] Figure 24 This is a schematic diagram of the power-on soft-start circuit of Embodiment 4 of the present invention. Detailed Implementation

[0048] To address the drawback of existing technologies where chips risk damage from prolonged operation at maximum peak current, this invention provides a power-on soft-start circuit. The reference value generation circuit in this circuit outputs a slowly increasing reference value during power-on, ensuring that the output voltage also increases slowly as it follows the reference value. Similarly, the protection threshold generation circuit outputs a slowly increasing protection threshold during power-on. Because the protection threshold increases slowly, the peak current it limits also increases slowly as startup progresses. This ensures a smoother current output even if the output current must operate at peak current, preventing prolonged operation at maximum peak current during startup. This significantly reduces the risk of output current surges and guarantees stable output voltage even if the reference-based voltage follower fails.

[0049] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Typical embodiments of the invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to make the disclosure of the present invention more thorough and complete. It should be understood that the embodiments of the present invention and the specific features thereof are detailed descriptions of the technical solutions of this application, and not limitations thereof. Where there is no conflict, the embodiments of the present invention and the technical features thereof can be combined with each other.

[0050] Example 1

[0051] The power-on soft-start circuit of this embodiment can be used to reduce the surge of output current when a switching power supply is powered on. The switching power supply can be a DC-DC switching power supply or an AC-DC switching power supply, etc.

[0052] refer to Figure 1 The power-on soft-start circuit in this embodiment includes:

[0053] Reference value generation circuit 2 is used to output a slowly increasing reference value Vsoft during the power-on startup process;

[0054] Protection threshold generation circuit 3 is used to output a slowly increasing protection threshold Limit during power-on startup;

[0055] Control circuit 1 is used to control the output voltage Vout to slowly increase according to the reference value Vsoft during power-on startup, and to limit the output current Iout according to the protection threshold Limit during power-on startup to limit the output voltage Vout.

[0056] The following uses the application scenario of switching power supplies as an example to introduce the working principle of the reference value and the working principle of the protection threshold:

[0057] The working principle of the reference value Vsoft: After the circuit starts up, the reference value Vsoft will eventually maintain a stable value (e.g., Figure 6 , Figure 12 In the context of a power supply, the Vsoft_set is the stable value (Vsoft_set) reached by the reference value Vsoft during normal operation after startup. For example, during normal operation after startup, the power supply samples the output voltage and compares this sampled value with the stable reference value Vsoft_set. Based on the comparison result, it controls the relevant switches that control the output voltage, causing the output voltage to follow the reference value Vsoft_set. This stabilizes the output voltage at the desired voltage Vout_set. Therefore, by setting an appropriate reference value Vsoft_set, it is possible to ensure that the final output voltage reaches the desired voltage Vout_set. Thus, during the startup process of a power supply, to control the output voltage to slowly increase to the desired voltage Vout_set, the reference value Vsoft can be controlled to increase slowly, allowing the output voltage to follow the reference value Vsoft's slow increase. Eventually, Vsoft increases to Vsoft_set and remains stable, and the output voltage also slowly increases to Vout_set and remains stable. Furthermore, the term "following" here emphasizes a trend, not necessarily that the output voltage amplitude is exactly equal to the reference value Vsoft's amplitude, because the output voltage sampling is not necessarily 1:1.

[0058] The working principle of the protection threshold Limit: After the circuit starts up, the protection threshold Limit will eventually maintain a stable value (e.g., Figure 6 , Figure 12 The OCP_set and COMP_set values ​​(in the original text) limit the output current during normal operation after startup by utilizing the stable values ​​(OCP_set and COMP_set) reached by the protection threshold to prevent it from exceeding the set maximum peak current. In existing technologies, the protection threshold Limit is fixed (e.g., ...). Figure 6 The COMP and OCP values ​​in the text specifically correspond to the maximum peak current. Therefore, when a situation arises during the startup of the switching power supply requiring the output current to operate at the system's maximum peak current, it operates according to the maximum peak current during normal operation. However, in this embodiment, the protection threshold during the startup process is not the value corresponding to the maximum peak current during normal operation, but rather increases slowly throughout the startup process (e.g., ...). Figure 6 , Figure 12The peak current is limited by OCP_limit and COMP_limit, so the peak current is also increased slowly. Therefore, if the output current must work at the peak current, a smoother current output will be achieved. There will be no situation where the maximum peak current is allowed to be operated for a long time during the startup process, which greatly improves the risk of output current surge. Moreover, it can ensure stable output voltage in the event of voltage follower failure based on reference value.

[0059] It is understood that the protection threshold output by the protection threshold generation circuit 3 can be one or more, depending on the circuit to which the startup circuit is applied. For example, if the soft-start circuit of the present invention is applied to a current-mode DC-DC switching power supply, there are two types of peak current (OCP allowed peak current and COMP allowed peak current), so there are also two protection thresholds (e.g., voltage OCP_limit and COMP_limit).

[0060] There are several ways to slowly increase the protection threshold (Limit) and the baseline value (Vsoft), such as linear, step-like, or curvilinear growth. Preferably, the protection threshold (Limit) and the baseline value (Vsoft) grow in a step-like manner, eventually maintaining a stable value. During normal operation after startup, the protection threshold (Limit) and the baseline value (Vsoft) operate based on this stable value.

[0061] Preferably, when there are multiple protection thresholds Limit, only the protection threshold Limit with the smallest final output current limit can be selected to increase in a step-like manner. Other protection thresholds Limit can either increase in a step-like manner or remain in the previous manner with a fixed amplitude. The number of steps in the step-like increase of different protection thresholds Limit can be the same or different.

[0062] More preferably, when there are multiple protection thresholds Limit and they cover both current and voltage values, if the protection threshold Limit that ultimately limits the smallest output current after the circuit starts is in the form of a current value, considering that the step-by-step increase scheme for the current value threshold is relatively more complex than that for the voltage value threshold, the protection threshold Limit that ultimately limits the smallest output current can be selected from the voltage value protection thresholds Limit and increased in a step-by-step manner. In order to better achieve the protection function, the rise step of the voltage value protection threshold Limit is smaller than that of the current value protection threshold Limit, so the number of steps of the voltage value protection threshold Limit is greater than that of the current value protection threshold Limit.

[0063] For example, suppose the protection thresholds Limit have current-based values ​​I1_limit and I2_limit, and voltage-based values ​​V1_limit and V2_limit. They all limit the output current. If the protection threshold that ultimately limits the smallest output current is I1_limit, and among V1_limit and V2_limit, V1_limit has the smaller final limit, then both I1_limit and V1_limit can be made to increase in a stepped manner during startup, with the number of steps in V1_limit being much greater than the number of steps in I1_limit. Due to implementation complexity, I1_limit should not have too many steps, while V1_limit can have as many steps as possible. This way, in the early stages of startup, V1_limit is used to limit the output current, but ultimately, I1_limit is used to limit the output current. For example, refer to... Figure 6 , 12 Taking a current-mode DC-DC switching power supply as an example, OCP_limit is a current-based protection threshold, while COMP_limit is a voltage-based protection threshold. The output current ultimately limited by OCP_limit is less than that limited by COMP_limit. Both OCP_limit and COMP_limit are output in a stepped manner, but OCP_limit is only designed with three steps, while COMP_limit has far more steps. Therefore, initially, COMP_limit is primarily effective when it is less than OCP_limit. Later, and after normal startup, when COMP_limit exceeds OCP_limit, OCP_limit takes effect. During normal operation after startup, the stabilized OCP_limit is the one that takes effect.

[0064] In terms of circuit implementation:

[0065] Control Circuit 1: No special circuit is specified. It can be used for any circuit that needs to be regulated during the power-on startup process. In this article, for ease of description, the commonly used current-mode DC-DC switching power supply is mainly used as an example. Its output signals Vout and IL are only used as control parameters of the DC-DC control circuit for example.

[0066] Reference value generation circuit 2: The reference value Vsoft is in the form of a voltage value. The reference value generation circuit 2 can be implemented by a counting segment circuit or a capacitor charging circuit.

[0067] Protection threshold generation circuit 3: When the protection threshold Limit is a voltage value corresponding to the current value (e.g., COMP_limit), the protection threshold generation circuit 3 can be implemented using a counting segment circuit or a switched capacitor circuit. In this case, the implementation of the protection threshold generation circuit 3 can refer to the reference value generation circuit 2, or even reuse the output of the reference value generation circuit 2. When the protection threshold Limit is a current value (e.g., OCP_limit), the protection threshold generation circuit 3 can be implemented using a counting segment circuit, or it can be output after mirroring the current using a slowly increasing voltage value (e.g., reference value Vsoft or COMP_limit).

[0068] Specifically, the capacitor charging circuit outputs a slowly increasing voltage by accumulating charge; or, it uses a frequency signal to generate a clock signal, and controls the periodic storage and transfer of charge based on the clock signal, with the output voltage value increasing by a gradient each time a charge is transferred.

[0069] The following describes four types of capacitor charging circuits.

[0070] The first type is the switched capacitor circuit. The switched capacitor circuit uses a frequency signal to generate a clock signal, and controls the periodic storage and transfer of charge based on the clock signal. Each time the charge is transferred, the output voltage value increases by a gradient.

[0071] refer to Figure 2 The paper presents a feasible implementation scheme for a switched capacitor circuit, which includes a first switch Sa, a second switch Sb, and an intermediate capacitor C2. The first terminal of the intermediate capacitor C2 is connected to a fixed voltage v1 via the first switch Sa, and the first terminal of the intermediate capacitor C2 outputs charge via the second switch Sb. The second terminal of the intermediate capacitor C2 is grounded. If the second switch Sb needs to output a voltage (such as a reference value Vsoft or a voltage-based protection threshold COMP_limit), a capacitor C3 needs to be connected after it.

[0072] In this circuit, the first switch Sa and the second switch Sb are logic switches, which are turned on when high and turned off when low. The first switch Sa is controlled by the first switch signal clka, and the second switch Sb is controlled by the second switch signal clkb. The first switch signal clka and the second switch signal clkb are two non-overlapping clock signals with a period of Tclk, which can be generated from a frequency signal through sequential logic, combinational logic, and delay circuits. For example, the frequency signal can be divided and fed into a relevant circuit to change the duty cycle to obtain a clock signal, and then this signal can be inverted and delayed to obtain another clock signal.

[0073] Because the first switch signal clka and the second switch signal clkb are two non-overlapping clock signals, the first switch Sa and the second switch Sb cannot be turned on simultaneously. Therefore, when v1 and v2 are not equal, a charge packet will be transferred between v1 and v2 in each cycle Tclk. The charge amount is the difference between q1 and q2, which can be expressed as:

[0074] q1-q2=C(v1-v2) (1);

[0075] The specific principle behind the voltage gradient increase is as follows: assuming v2 also has a capacitor C3, such as... Figure 4 The fixed voltage v1 is a voltage with stable amplitude, and initially v2 equals 0V. During the first cycle Tclk: when Sa is on, v1 is transferred to the intermediate capacitor C2 (i.e., charge storage). When Sb is on, the voltage on capacitor C2 is evenly distributed (i.e., charge transfer) to the two capacitors C2 and C3. During the second cycle Tclk: when Sa is on again, the intermediate capacitor C2 is charged to v1 again. When Sb is on again, the voltage on capacitors C2 and C3 is again evenly distributed, and the voltage on C3 increases by a gradient. This process continues, with the voltage on C3 increasing by a gradient in each cycle, until v2 eventually equals v1. Therefore, the value of v1 can be set according to the desired final output voltage value (e.g., the reference value Vsoft_limit eventually stabilizes at Vsoft_set, or the voltage-based protection threshold COMP_limit eventually stabilizes at COMP_set).

[0076] If v1 and v2 change very slowly compared to Tclk, then the average current transmitted within the clock cycle Tclk is:

[0077]

[0078] Where Rsc is the equivalent resistance of the switched capacitor circuit, such as Figure 3 Therefore, the equivalent resistance Rsc of the switched capacitor circuit is:

[0079]

[0080] This formula can reflect the rate of increase of the stepped voltage (such as Vsoft, COMP_limit) output of a switched capacitor circuit. The larger Rsc is, the slower the voltage rises. Therefore, different voltage rise curves can be achieved by adjusting Tclk.

[0081] To achieve a more ideal stepped voltage growth curve, the fixed voltage v1 can be segmented to obtain a smooth starting current, such as... Figure 5The fixed voltage v1 is a voltage that increases in a stepped manner. Specifically, the v1 voltage is divided into four steps of output. The number of steps of the v1 voltage can be increased or decreased appropriately according to different needs.

[0082] Understandable, Figure 2 The circuit shown is an ideal switched capacitor circuit, and its function can be implemented in any way. Figure 2 As shown, this function can be achieved through various circuit structures.

[0083] The second type is a standard RC circuit: (Reference) Figure 6-7 v1 and v2 represent the input and output respectively. In this case, the output voltage increases slowly in a curve.

[0084] The third type is a capacitor linear charging circuit: (See reference) Figure 8-9 v1 and v2 represent the input and output respectively. The capacitor is charged directly using the current source. The selection circuit compares v1 with the voltage v1a on the capacitor and selects the smaller of v1 and v1a as the output. In this case, the output voltage increases slowly in a linear manner.

[0085] The fourth type is the capacitor pulse charging circuit: (Reference) Figure 10-11 v1 and v2 also represent input and output respectively. This situation is... Figure 8 Based on this, a switch is added. The switch is controlled by a clock signal. In this case, the rise step of the output voltage is very small, and it rises almost linearly.

[0086] Furthermore, to simplify the circuit and save costs, the voltage-valued protection threshold COMP_limit in this embodiment does not need to be redesigned; it is recommended to reuse Vsoft. (Reference) Figure 12 , 13 Two ways to reuse Vsoft are given, and v2 in the figure is Vsoft. Figure 12 A slowly increasing COMP_limit is generated by adding the vgs voltage of pmos to the slowly increasing v2. Figure 13 By applying a stable voltage vd (the magnitude of which depends on the circuit requirements) to a slowly rising v2, a slowly rising COMP_limit is generated through the op-amp buffer.

[0087] Specifically, the counting segmentation circuit uses a frequency signal for real-time counting. Whenever a round of counting reaches a target value, it controls the output voltage / current value to increase by a gradient and restarts a new round of counting.

[0088] For example, taking a current-mode DC-DC switching power supply as an example, the counting segment circuit counts according to the frequency signal. Suppose that OCP_limit counts N1 rounds, and one round counts N11, that is, one step count N11. COMP_limit counts N2 rounds, and one round counts N22, that is, one step count N22. Since N2 is greater than N1, then N22 is less than N11. After power-on, the counting segment circuit controls OCP_limit to start from OCP_set / N1 and COMP_limit to start from COMP_set / N2. OCP_set and COMP_set are the final stable values ​​of OCP_limit and COMP_limit, respectively. Initially, COMP_set / N2 is less than OCP_set / N1, so COMP_set / N2 takes effect. When the count reaches N22 after startup, COMP_limit increases to 2*COMP / N2. If the count reaches 2*N22, COMP_limit increases to 3*COMP / N2, and so on. The increase process of OCP_limit is similar. OCP_limit regulates the OCP of control circuit 1, and COMP_limit regulates the COMP of control circuit 1. The function of the counting segment circuit can be implemented in various ways by combining sequential logic circuits, combinational logic circuits and other circuits. For example, the counting function can be implemented using an independent counter or the counter inside the controller. Another example is the function of adding a gradient to the voltage / current value, which can be controlled by multiple voltages and multiple switches. For example, switching a switch will switch / add voltage or current once. Therefore, this implementation method is more complex than the switched capacitor circuit. If a step-by-step increase is used, the cost will be high due to the large number of steps. Therefore, it is recommended that the stepped increase of the voltage protection threshold be preferably implemented using a switched capacitor circuit.

[0089] For example, refer to Figure 14 I1, I2, I3... represent multiple current sources of the same magnitude. To generate a stepped increase in OCP_limit, a counter can be used to sequentially close the switches of I1, I2, I3..., thus achieving sequential superposition of currents. Alternatively, if I1, I2, I3... are replaced with voltages of sequentially increasing amplitude, a counter can be used to individually activate each switch in sequence to switch between voltages. Another approach is to design multiple voltage sources of the same magnitude connected in series, and then superimpose the voltages by controlling the sequential closing of multiple switches.

[0090] The above segmented counting circuit is suitable for stepped growth requirements. To achieve other forms of slow current output growth, the slowly increasing voltage value can be used as the output after current mirroring. (Reference) Figure 15Vref2 can also be another slowly rising voltage generated separately, or it can be a reuse of the previous v2 or Vsoft, which is used to control the magnitude of the voltage-controlled current source, and then output OCP_limit through mirroring.

[0091] The effect of this embodiment is illustrated using the current-mode DC-DC switching power supply described above as an example: If a traditional soft-start circuit is used, its output voltage Vout and inductor current IL are shown in the diagram below. Figure 16 (a) Since there are no limits on OCP and COMP during startup, the peak value of the current IL depends on the minimum of OCP and COMP. Therefore, there is a risk of overshoot in the current IL at each Vsoft step. With proper design of the external parameters, Vout can basically rise with Vsoft. Therefore, although there is overshoot in the inductor current at each Vsoft step, the overshoot is small, and the inductor current rises relatively smoothly without a large surge. The output Vout and IL of the soft-start circuit of Embodiment 1 of this invention are shown in the schematic diagram below. Figure 16 (b) It should be noted that the figure reflects the current limits imposed by COMP_limit and OCP_limit respectively, not the values ​​of COMP_limit and OCP_limit themselves. Tstart in the figure represents the startup time. In the early stages of startup, each Vsoft step limits COMP through COMP_limit. In the later stages of startup and after normal startup, Vsoft limits OCP through OCP_limit. This greatly reduces the risk of inductor current overshoot, resulting in a smoother inductor current rise and a less pronounced inductor surge. Figure 17 This demonstrates a direct comparison of the inductor current during startup between existing soft-start and the soft-start of Embodiment 1 of the present invention. It can be seen that the soft-start of the present invention has a smaller surge.

[0092] The frequency signal used in this embodiment is generated by a standard oscillator, and its frequency is fixed. In other embodiments, such as the following Embodiment 2, this frequency signal will be improved.

[0093] Example 2

[0094] refer to Figure 18 Compared with Embodiment 1, this embodiment differs in that a frequency modulation circuit 5 is added to monitor the output voltage and generate a frequency signal Fosc that is positively correlated with the output voltage for use by the power-on soft-start circuit. The slow growth rate of the reference value Vsoft output by the reference value generation circuit 2 and / or the slow growth rate of the protection threshold Limit output by the protection threshold generation circuit 3 are positively correlated with the frequency signal Fosc output by the frequency modulation circuit 5.

[0095] For example, the protection threshold generation circuit 3 is specifically used to control the protection threshold to increase in a step-like manner during the power-on startup process based on the frequency signal output by the frequency modulation circuit 5, and the time step of the step-like increase is positively correlated with the frequency signal output by the frequency modulation circuit 5.

[0096] For example, the reference value generation circuit 2 is specifically used to control the reference value to increase in a step-like manner during the power-on startup process based on the frequency signal output by the frequency modulation circuit 5, and the time step of the step-like increase is positively correlated with the frequency signal output by the frequency modulation circuit 5.

[0097] The time step refers to the duration of each step in the stepped voltage increase. For example, a clock can be generated based on the frequency signal output by the frequency modulation circuit 5. This clock can be used for counting in the counting segment circuit and as the source clock for the capacitor switching circuit. Therefore, the time step is positively correlated with the frequency signal. Since the frequency signal output by the frequency modulation circuit 5 is positively correlated with the output voltage, and the time step is positively correlated with the frequency signal, the time step is also positively correlated with the output voltage. Thus, by combining the slow increase of the reference value and protection threshold with the modulation of the frequency signal by the output voltage, the average output current can be effectively limited when the output voltage is small at the initial startup stage, reducing the risk of chip damage. Especially in abnormal situations, such as output short circuits, the reduction in the average output current by lowering the operating frequency can greatly improve system reliability.

[0098] refer to Figure 19 An example of a frequency modulation circuit 5 is given, which includes a first current source, a second current source, a first diode D1, a second diode D2, a voltage-controlled current source, a first capacitor C1, and an oscillator. The voltage-controlled current source is controlled by the difference between a set voltage vref and the output voltage Vout. The anode of the first diode D1 is connected to the output of the first current source and the anode of the second diode D2. The cathode of the first diode D1 is connected to the output of the second current source and the first terminal of the first capacitor C1. The cathode of the second diode D2 is grounded via the voltage-controlled current source. The second terminal of the first capacitor C1 is grounded. The input of the oscillator is connected to the first terminal of the first capacitor C1. The oscillator generates a frequency signal Fosc based on the set frequency modulation reference voltage vref_osc and the voltage at the first terminal of the first capacitor C1. The oscillator can be implemented by a comparator and a switch S1, where the switch S1 is controlled by the output frequency signal. Of course, there are other ways to implement the oscillator; this is just an example.

[0099] When the power-on enable signal EN of the entire startup circuit is high, frequency modulation circuit 5 begins to detect the output voltage Vout. The detected Vout voltage is used to modulate Fosc. Fosc is used in the generation of Vsoft, OCP_limit, and COMP_limit, for example, to generate the clock signals clka and clkb for the switched capacitor circuit, for counting in the segmented circuit, and ultimately to control the time step of Vsoft, OCP_limit, and COMP_limit. In the initial startup phase, when Vout is still at a low voltage, Fosc is modulated, thus reducing the average inductor current. Especially in abnormal conditions, such as a short circuit in Vout, reducing Fosc leads to a reduction in the average output current, which can greatly improve system reliability. The working principle of frequency modulation is as follows:

[0100] Diode D1 determines that the current flowing through it can only flow from left to right, and not from right to left in the opposite direction. Diode D2 determines that the current flowing through it can only flow from top to bottom, and not from bottom to top in the opposite direction.

[0101] When K*I ≤ Gm*(vref-vout) and vref > vout, the current flowing through D1 is 0, and the current flowing through D2 is Gm*(vref-vout). In this case, Fosc follows the following rules:

[0102]

[0103] When K*I ≥ Gm*(vref - vout) and vref > vout, the current flowing through D1 is K*I - Gm*(vref - vout), and the current flowing through D2 is Gm*(vref - vout). In this case, Fosc follows the following rules:

[0104]

[0105] When vref < vout, the current flowing through D1 is K*I, and the current flowing through D2 is 0. In this case, Fosc follows the following rules:

[0106]

[0107] Among them, F OSC The frequency of the frequency signal is represented by I, the output current of the second current source is represented by K, the ratio of the output currents of the first and second current sources is represented by Gm, the transconductance of the voltage-controlled current is represented by Vout, the output voltage is represented by vref, the set voltage is represented by C, the capacitance of the first capacitor is represented by vref_osc, and the frequency modulation reference voltage is represented by vref_osc.

[0108] Comparing the three equations (4)-(6) above, we can see that the output range of Fosc is [Fosc_min, Fosc_max]. Specifically:

[0109]

[0110] Within this range, Fosc follows equation (5), and it can be seen that Fosc is positively correlated with Vout.

[0111] refer to Figure 20 This illustrates the frequency change process corresponding to the frequency signal output by frequency modulation circuit 5. It's important to note that the figure shows the value of the frequency represented by Fosc, not the waveform of the Fosc signal itself, which is a square wave. (Combined with...) Figure 20 As shown in equation (7), by adjusting the values ​​of K, I, vref_soft, and GM, Fosc_min, Fosc_max, and the frequency modulation Vout range [Vouta, Voutb] can be designed.

[0112] Understandable, Figure 19 This is merely an example of a frequency modulation circuit 5, and its functional implementation is not limited. Figure 19 As shown, this function can be achieved through various circuit structures, or similar functions can be achieved.

[0113] Example 3

[0114] Referring to Figure 21, compared with Embodiment 1, this embodiment adds a startup time detection circuit 4, which is used to monitor the output voltage Vout during the power-on startup process and uses a frequency signal for timing. When the output voltage rises to a preset value within the first startup time T_start, the control circuit 1 is kept on. When the output voltage Vout fails to rise to the preset value within the first startup time T_start, the control circuit 1 is turned off, the timing is maintained, and when the timing reaches the second startup time, the control circuit 1 is turned on again. At the same time, the outputs of the reference value generation circuit 2 and the protection threshold generation circuit 3 are reset by the reset signal reset. The second startup time is an integer multiple of the first startup time T_start.

[0115] Taking a current-mode DC-DC switching power supply as an example: When the power-on enable signal EN of the entire startup circuit flips from low to high, the start_limit signal sent to the control circuit 1 by the startup time detection circuit 4 also flips from low to high, turning on the control circuit 1 and starting to detect the output voltage Vout, using a frequency signal for timing. When Vout rises to 50%Vout_set within the T_start time (specifically implemented through frequency signal-based counting) (50% is just an example; different judgment points can be selected according to different needs; Vout_set refers to the final stable value of Vout), start_limit remains high, and the control circuit 1 remains on. When the Vout voltage does not rise to 50%Vout_set within the T_start time, start_limit flips from high to low, turning off the control circuit 1, and the startup time detection circuit 4 continues timing. When the timing reaches n*T_start (the value of n can be selected according to actual needs), start_limit will flip from low to high again, and Vsoft, OCP_limit, and COMP_limit will be reset via the reset signal. Control circuit 1 is turned on again, repeating the soft-start process. During the T_start time, the Vout voltage is checked again, and this cycle repeats. Startup time detection circuit 4 not only ensures that the chip does not operate at its maximum peak current for an extended period due to abnormal conditions such as excessive load capacitance during startup, but also significantly reduces the average current during a short circuit in the event of a Vout short circuit by using a pulse-activated (T_start on, n*T_start off) method, thus preventing chip damage.

[0116] refer to Figure 22 When the load capacitance is large, if an existing soft-start circuit is used, its output voltage Vout and inductor current IL are shown in the diagram below. Figure 22 (a) Due to the large capacitance, the Vout voltage cannot rise with Vsoft, and the inductor current quickly reaches the maximum peak current limited by OCP until Vout is output to Vout_set. Generally, the maximum peak current limited by OCP is greater than the maximum peak current during normal operation of control circuit 1, so Vout will overshoot during startup, posing a risk of overvoltage. If the load capacitance is too large, Vout will take even longer to rise to Vout_set, and the chip will operate at the maximum peak current set by OCP for an extended period, posing a risk of damage to both the chip and the inductor. The soft-start circuit of this embodiment, with its output Vout and IL schematic diagram as shown in the figure... Figure 22(b) COMP is limited by COMP_limit at each Vsoft step, and OCP is segmented and limited throughout the startup time. Therefore, the inductor current will not quickly reach its maximum peak current during startup. Simultaneously, the startup time detection circuit 4 detects the time it takes for Vout voltage to rise from 0V to 50%Vout_set. If the timer reaches T-start and Vout has not yet reached 50%Vout_set, the control circuit 1 is immediately shut down, greatly reducing the risk of chip damage. Figure 23 This is a direct comparison of the inductor current of existing soft starters and the soft starter of this invention under large capacitor load conditions. It can be seen that the inductor current of the soft starter of this invention rises gradually and smoothly, and it has a start-up timeout detection. When the start-up time exceeds T-start, the control circuit 1 will be shut down and the inductor current will drop to 0.

[0117] Example 4

[0118] refer to Figure 24 This embodiment adds a start-up time detection circuit 4 to the second embodiment. The frequency signal used by the start-up time detection circuit 4 for timing, like the reference value generation circuit 2 and the protection threshold generation circuit 3, comes from the frequency modulation circuit 5.

[0119] In this embodiment, during the power-on startup process, the combined effect of three factors—the stepwise increase of the reference value and the protection threshold, the frequency modulation based on the output voltage, and the pulse activation—further improves the system reliability.

[0120] In summary, the power-on soft-start circuit of the present invention has the following beneficial effects: The reference value generation circuit outputs a slowly increasing reference value during power-on startup, so the output voltage also increases slowly when following the reference value, achieving stable output voltage. Simultaneously, the protection threshold generation circuit outputs a slowly increasing protection threshold during power-on startup. Because the protection threshold increases slowly, the peak current it limits also increases slowly as startup progresses. Thus, even if the output current must operate at the peak current, a smoother current output is achieved, preventing the circuit from being allowed to operate at the maximum peak current for an extended period during startup. This greatly reduces the risk of output current surges and ensures stable output voltage even if the voltage following based on the reference value fails. Furthermore, the present invention also increases the frequency... A frequency modulation circuit is used to monitor the output voltage. It can generate a frequency signal that is positively correlated with the output voltage for the power-on soft-start circuit. For example, the step-by-step increase of the reference value generation circuit and the protection threshold generation circuit is positively correlated with the frequency signal. In this way, with the slow increase of the reference value and the protection threshold, combined with the modulation of the frequency signal by the output voltage, the average output current can be effectively limited when the output voltage is small at the beginning of startup, reducing the risk of chip damage. Especially in abnormal conditions, such as output short circuit, the average output current is reduced by reducing the operating frequency, which can greatly improve the system reliability. Furthermore, the present invention also adds a startup time detection circuit. When the output voltage cannot reach the set value for a long time due to excessive load capacitance or output short circuit, the control circuit is shut down to avoid damage caused by prolonged operation at peak current.

[0121] It should be noted that the term "connected" or "linked" as used in this article includes not only directly connecting two entities, but also indirectly connecting them through other entities that have beneficial improvement effects.

[0122] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.

[0123] The terms "first," "second," and other ordinal numbers used in this specification are used to describe various constituent elements, but these constituent elements are not limited by these terms. The purpose of using these terms is solely to distinguish one constituent element from others. For example, a first constituent element may be named a second constituent element without departing from the scope of the invention, and similarly, a second constituent element may be named a first constituent element. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0124] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims. All of these forms are within the protection scope of the present invention.

Claims

1. A power-on soft-start circuit, applicable to reducing output current surges when a switching power supply is powered on, characterized in that, include: A reference value generation circuit is used to output a slowly increasing reference value during the power-on startup process; A protection threshold generation circuit is used to output a slowly increasing protection threshold during power-on startup. A control circuit is configured to control the output voltage to slowly increase following the reference value during power-on startup, and to limit the output current based on the protection threshold during power-on startup to limit the output voltage. A frequency modulation circuit is used to monitor the output voltage and generate a frequency signal that is positively correlated with the output voltage for use by the power-on soft-start circuit; the slow growth rate of the reference value output by the reference value generation circuit and / or the slow growth rate of the protection threshold output by the protection threshold generation circuit are positively correlated with the frequency signal output by the frequency modulation circuit. It also includes a startup time detection circuit, which monitors the output voltage during the power-on startup process and uses the frequency signal output by the frequency modulation circuit for timing. When the output voltage rises to a preset value within the first startup time, the control circuit is kept on. If the output voltage fails to rise to the preset value within the first startup time, the control circuit is turned off, the timing is maintained, and when the timing reaches the second startup time, the control circuit is turned on again. At the same time, the outputs of the reference value generation circuit and the protection threshold generation circuit are reset through a reset signal. The second startup time is an integer multiple of the first startup time. The protection threshold generation circuit is specifically used to control the protection threshold to increase in a step-like manner during the power-on startup process based on the frequency signal output by the frequency modulation circuit. The time step of the step-like increase is positively correlated with the frequency signal output by the frequency modulation circuit. And / or, the reference value generation circuit is specifically used to control the reference value to increase in a stepwise manner during the power-on startup process based on the frequency signal output by the frequency modulation circuit, wherein the time step of the stepwise increase is positively correlated with the frequency signal output by the frequency modulation circuit.

2. The power-on soft-start circuit according to claim 1, characterized in that, There may be one or more protection thresholds, and the protection threshold that ultimately limits the minimum output current increases in a stepwise manner.

3. The power-on soft-start circuit according to claim 2, characterized in that, When there are multiple protection thresholds covering both current and voltage values, if the protection threshold that ultimately limits the minimum output current is in the current value form, then the protection threshold that ultimately limits the minimum output current is selected from the protection thresholds in the voltage value form, and the number of steps for the protection thresholds in the voltage value form is greater than the number of steps for the protection thresholds in the current value form.

4. The power-on soft-start circuit according to claim 1, characterized in that, The reference value is in voltage form, and the protection threshold is in current form or a voltage value corresponding to the current value. For the slow increase of the voltage value, a counting segment circuit or a capacitor charging circuit can be used to achieve the function. For the slow increase of the current value, a counting segment circuit can be used to achieve the function, or the output of the slowly increasing voltage value can be output after being mirrored by the current. The capacitor charging circuit specifically outputs a slowly increasing voltage through the accumulation of charge. Alternatively, a clock signal can be generated using a frequency signal, and the charge can be periodically stored and transferred based on the clock signal. Each time a charge is transferred, the output voltage value increases by a gradient. The counting segmentation circuit specifically uses the currently received frequency signal to perform real-time counting. Whenever a round of counting reaches a target value, it controls the output voltage / current value to increase by a gradient and restarts a new round of counting.

5. The power-on soft-start circuit according to claim 1, characterized in that, The frequency modulation circuit includes a first current source, a second current source, a first diode, a second diode, a voltage-controlled current source, a first capacitor, and an oscillator. The voltage-controlled current source is controlled by the difference between a set voltage and the output voltage. The anode of the first diode is connected to the output of the first current source and the anode of the second diode. The cathode of the first diode is connected to the output of the second current source and the first terminal of the first capacitor. The cathode of the second diode is grounded via the voltage-controlled current source. The second terminal of the first capacitor is grounded. The input of the oscillator is connected to the first terminal of the first capacitor. The oscillator generates a frequency signal based on a set frequency modulation reference voltage and the voltage at the first terminal of the first capacitor.

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