一种双管并联NPC三电平逆变器的叠层母排及逆变器
By using a stacked busbar of a dual-transistor parallel NPC three-level inverter in the inverter, and setting a surge absorption capacitor connection terminal with a controllable semiconductor device in parallel, the voltage spike suppression problem is solved, and the current carrying capacity and capacity of the inverter are improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- HIWING TECH ACAD OF CASIC
- Filing Date
- 2022-03-13
- Publication Date
- 2026-07-17
AI Technical Summary
In existing inverters, voltage spikes caused by circuit parasitic inductance cannot be effectively suppressed, leading to overvoltage breakdown of controllable semiconductor devices and limited current carrying capacity, thus failing to provide greater current.
The stacked busbar of the dual-tube parallel NPC three-level inverter increases the current carrying capacity and suppresses voltage spikes by setting surge absorption capacitor connection terminals near the controllable semiconductor devices and connecting the controllable semiconductor devices in parallel.
It improves the inverter's current carrying capacity and capacity, suppresses voltage spikes in controllable semiconductor devices during switching between conduction and shutdown, and enhances the inverter's voltage output capability.
Smart Images
Figure CN116800106B_ABST