Display device

Abstract

A display device (1) includes a substrate layer (10) provided with a second resin substrate layer (16) on an inorganic substrate layer (14), a light emitting element layer (60) provided above the second resin substrate layer, and a sealing film (80) provided on the light emitting element layer. A through hole (H) is formed in a non-display region (N) of the display device. A recess (100) is formed around the through hole of the second resin substrate layer in the non-display region. An end surface of the resin substrate layer facing the inside of the recess constitutes an inclined end surface (102). An inorganic sealing layer extends into the recess in a manner to cover the inclined end surface, and is in contact with the inorganic substrate layer in the recess. An end surface of the inorganic sealing layer on the through hole side is located at a position away from the periphery of the through hole.

Description

Technical Field

[0001] This disclosure relates to a display device. Background Technology

[0002] In recent years, self-emissive organic EL (OLED) displays, which use organic electroluminescence (EL) elements, have attracted much attention as a replacement for liquid crystal displays. In this OLED display, in order to house electronic components such as cameras and fingerprint sensors inside the display area where images are displayed, a structure has been proposed that includes an island-shaped non-display area with a through-hole extending along the thickness direction within this non-display area.

[0003] For example, Patent Document 1 discloses a light-emitting panel for a pointer plate, which has a central hole formed as a through hole for inserting a drive shaft of a pointer. In this light-emitting panel, an outer coating covering a thin-film transistor (TFT) is provided on a transparent substrate, and an inverted conical spacer is provided in a ring around the central hole on the outer coating. This spacer divides the electrodes provided on the outer coating into a display area outside the spacer and a non-display area inside the spacer. Therefore, even if the electrodes in the non-display area deteriorate from the portion exposed on the inner peripheral surface of the central hole, the deterioration will not propagate to the electrodes in the display area, preventing damage to the organic EL element.

[0004] Existing technical documents

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent Application Publication No. 2010-14475 Summary of the Invention

[0007] The technical problem to be solved by the present invention

[0008] In the light-emitting panel of Patent Document 1, the outer coating is made of an inorganic insulating material such as silicon nitride. In this light-emitting panel, when the transparent substrate is made of a flexible sheet, an organic insulating material such as polyimide resin is used as the material for the flexible sheet. In this case, moisture enters between the transparent substrate and the outer coating from the inner peripheral surface of the central hole. This moisture enters along the interface between the transparent substrate and the outer coating and reaches the display area located outside the spacer wall, potentially causing deterioration of the organic EL element.

[0009] The purpose of this disclosure is to prevent moisture from entering the display area through a through-hole formed in the non-display area in a display device with a non-display area disposed inside the display area.

[0010] Solution for solving the problem

[0011] The present disclosure pertains to a display device, which includes: a substrate layer having an inorganic substrate layer and a resin substrate layer disposed on the inorganic substrate layer; a light-emitting element layer disposed above the resin substrate layer and including a plurality of light-emitting elements; and a sealing film disposed to cover the plurality of light-emitting elements and including an inorganic sealing layer. The display device of the present disclosure includes a display area for displaying images by emitting light from the light-emitting elements and an island-shaped non-display area located inside the display area. A through-hole is formed in the non-display area, extending along the thickness direction of the substrate layer. In the non-display area, a recess is formed around the through-hole in the resin substrate layer, exposing the inorganic substrate layer on its bottom surface. The end face of the resin substrate layer facing the recess is inclined towards the inorganic substrate layer, closer to the through-hole. The inorganic sealing layer extends from the display area into the recess, covering the inclined end face in the non-display area, and contacts the inorganic substrate layer within the recess. The end face of the inorganic sealing layer on the through-hole side is located away from the periphery of the through-hole.

[0012] Invention Effects

[0013] According to the technology disclosed herein, in a display device in which a non-display area is provided inside the display area, it is possible to prevent moisture from entering the display area through a through-hole formed in the non-display area. Attached Figure Description

[0014] Figure 1 This is a top view showing the general structure of an organic EL display device.

[0015] Figure 2 It is along Figure 1 A cross-sectional view of an organic EL display device with line II-II (shown in the bent state at the bend with double-dotted lines).

[0016] Figure 3 It shows the composition of Figure 1 A top view of the pixels and various display wiring of the display area surrounded by the III line.

[0017] Figure 4 It is along Figure 3 A cross-sectional view of an organic EL display device with IV-IV lines.

[0018] Figure 5 This is a cross-sectional view showing the stacked structure of the organic EL layer in an organic EL display device.

[0019] Figure 6This is an equivalent circuit diagram showing the pixel circuitry of an organic EL display device.

[0020] Figure 7 This is a top view showing the non-display area and its surroundings of an organic EL display device.

[0021] Figure 8 It is along Figure 7 A cross-sectional view of an organic EL display device with lines VIII-VIII.

[0022] Figure 9 This is a summary flowchart of the manufacturing method for organic EL display devices.

[0023] Figure 10 It is a modified example of an organic EL display device and Figure 8 The corresponding cross-sectional view. Detailed Implementation

[0024] Hereinafter, the illustrated embodiments will be described in detail based on the accompanying drawings. In the following embodiments, an organic EL display device having organic EL elements will be used as an example of the display device to which this disclosure relates.

[0025] Furthermore, in the following embodiments, the description of setting or forming other membranes, layers, elements, or other constituent elements on the basis of a certain constituent element not only means that there are other constituent elements directly above a certain constituent element, but also includes the case where other constituent elements such as membranes, layers, elements, etc. are sandwiched between the two constituent elements.

[0026] Furthermore, in the following embodiments, unless otherwise specified, descriptions of connecting a certain membrane, layer, element, or other constituent element to other membrane, layer, element, or other constituent elements imply electrical connection. This description, without departing from the spirit of this disclosure, refers not only to direct connection but also to indirect connection via other membrane, layer, element, or other constituent elements. This description also includes cases where other constituent elements are integrated with a certain constituent element, that is, where a part of a certain constituent element constitutes another constituent element.

[0027] Furthermore, in the following embodiments, a description stating that a constituent element of a film, layer, or element is on the same layer as other constituent elements of films, layers, or elements means that the constituent element is formed by the same process as the other constituent elements. A description stating that a constituent element of a film, layer, or element is a lower layer of other constituent elements of films, layers, or elements means that the constituent element is formed by a process performed earlier than the other constituent elements. A description stating that a constituent element of a film, layer, or element is an upper layer of other constituent elements of films, layers, or elements means that the constituent element is formed by a process performed later than the other constituent elements.

[0028] Furthermore, in the following embodiments, the description of a certain component such as a film, layer, or element being the same or equivalent to other components such as films, layers, or elements does not mean that a certain component is completely identical to other components, or only completely identical, but includes a state in which a certain component is substantially the same as other components, or substantially equivalent to other components, such as variations within the range of manufacturing deviations or tolerances.

[0029] Furthermore, in the following embodiments, the use of terms such as "first," "second," "third," etc., is for distinguishing the statements to which these terms are given, and does not limit the number of statements or any particular order.

[0030] Implementation Method

[0031] The OLED display device 1 of this embodiment is used in various devices such as displays for mobile devices like smartphones and tablets, monitors for personal computers (PCs), and television sets. The OLED display device 1 is combined with electronic components such as cameras, fingerprint sensors, and facial recognition sensors. For example, the OLED display device 1 can be combined with a camera to form a display device with a built-in camera on the front side capable of capturing and displaying images.

[0032] -Composition of Organic EL Display Device-

[0033] The configuration of the organic EL display device 1 according to this embodiment will be described below. Figure 1 and Figure 2 As shown, the organic EL display device 1 has a display area D for displaying images, a border area F disposed around the display area D, and a non-display area N disposed inside the display area D.

[0034] The display area D is a rectangular area constituting the screen. In this embodiment, a rectangular display area D is illustrated, but the display area D can also be a generally rectangular shape, such as having at least one arc-shaped side, at least one arc-shaped corner, or at least one side having a cutout. Figure 3 As shown, the display area D is composed of multiple pixels Px.

[0035] Multiple pixels Px are arranged in a matrix. Each pixel Px consists of three sub-pixels Sp. The three sub-pixels Sp are Spr, which has a red-emitting region E; Spg, which has a green-emitting region E; and Spb, which has a blue-emitting region E. These three sub-pixels Sp are arranged, for example, in a stripe pattern.

[0036] like Figure 1 and Figure 2As shown, the border area F is a rectangular frame-shaped area that constitutes the non-display portion outside the screen. A terminal T for connecting to external circuitry is provided on one side of the border area F. A connection point for connecting to external circuitry is provided between the display area D in the border area F and the terminal T. Figure 1 The horizontal direction, i.e. the first direction X, is used as the axis of bending, and the bending part B is bent.

[0037] In the bent portion B, a laminate consisting of the substrate coating film 22, the gate insulating film 26, the first interlayer insulating film 30, and the second interlayer insulating film 34 (described later) is formed (for convenience, in... Figure 2 A slit S1 is formed on the laminate (not shown). The slit S1 is configured as a groove extending along the direction of the bend B, penetrating the laminate and exposing the substrate layer 10. A filler layer F1 is provided within the slit S1 to bury it. The filler layer F1 is formed of an organic resin material such as polyimide resin, acrylic resin, or polysiloxane resin.

[0038] The terminal portion T is bent into a shape, for example, 180° (U-shape) at the bending portion B via the frame area F, and is disposed on the back side of the organic EL display device 1. Figure 2 (Represented by double-dotted lines). The terminal section T is connected to a wiring substrate Cb such as an FPC (Flexible Printed Circuit). The bezel area F is provided with multiple lead-out wires L1 extending from the display area D to the terminal section T. The multiple lead-out wires L1 are connected to the display control circuit (not shown) at the terminal section T via the wiring substrate Cb.

[0039] In the bezel area F, within the planarization film 38pf (described later), the trench G is formed in a frame shape to surround the display area D. The trench G may also be formed in a generally C-shape, opening on the terminal portion T side when viewed from above. The trench G penetrates the planarization film 38pf, dividing it into an inner and outer section of the bezel area F. The trench G serves to prevent moisture from seeping into the display area D from the outer side of the bezel area F.

[0040] In the border area F, on the side that forms the edge adjacent to the edge where the terminal portion T is provided ( Figure 1 In the left and right sides of the display area, a drive circuit Dc, including a gate driver and a gear shifter driver, is provided on a single piece. The drive circuit Dc is located on the display area D side, which is closer to the groove G. The drive circuit Dc or a part thereof (gate driver or gear shifter driver) may also be located on the outer periphery of the frame area F, which is closer to the groove G.

[0041] A first border wiring 36fa is provided in the border area F (for convenience, in...). Figure 1Add a diagonal shadow line extending from the top left to the bottom right in the middle), and the second border wiring is 36fb (for convenience, in Figure 1 (with an additional shading line extending from the upper right to the lower left), the first barrier wall Wa and the second barrier wall Wb.

[0042] The first bezel wiring 36fa is frame-shaped closer to the display area D than the trench G and the driving circuit Dc. The first bezel wiring 36fa extends towards the terminal portion T in a layer lower than the planarization film 38pf, passing through the trench G. A high-level power supply voltage (ELVDD) is supplied to the first bezel wiring 36fa at the terminal portion T via the wiring substrate Cb.

[0043] The second border wiring 36fb is approximately C-shaped on the outer periphery of the border region F, which is closer to the trench G and the drive circuit Dc. Both ends of the second border wiring 36fb extend along the first border wiring 36fa toward the terminal portion T. A low-level power supply voltage (ELVSS) is supplied to the second border wiring 36fb at the terminal portion T via the wiring substrate Cb.

[0044] The first barrier wall Wa is formed in a frame shape on the outer periphery of the groove G. The second barrier wall Wb is formed in a frame shape on the outer periphery of the first barrier wall Wa. During the manufacturing process of the organic EL display device 1, the first barrier wall Wa and the second barrier wall Wb serve to prevent the organic material from expanding outward to the frame region F when the organic material containing the organic sealing layer 84 of the sealing film 80 is coated.

[0045] The non-display area N is shaped like an island. Within the non-display area N, for example, to house an electronic component Ec such as a camera on the back side, a through-hole H is formed extending through the thickness direction of the substrate layer 10 (described later). The non-display area N and the through-hole H are formed into similar shapes, such as circles. These non-display areas N and the through-hole H can also be rectangular or other shapes, or they may not be similar shapes.

[0046] A third barrier wall Wc is provided in the non-display area N. The third barrier wall Wc is formed in a frame shape around the through hole H. During the manufacturing process of the organic EL display device 1, when the organic resin material forming the organic sealing layer 84 is coated, the third barrier wall Wc serves to prevent the organic resin material from spreading inward to the non-display area N.

[0047] The organic EL display device 1 employs an active matrix driving method where the emitting of light from each sub-pixel Sp is controlled by a TFT 50, and the image is displayed through the operation of the TFT 50. For example... Figure 2 and Figure 4As shown, the organic EL display device 1 includes a substrate layer 10, a TFT layer 20 disposed on the substrate layer 10, a light-emitting element layer 60 disposed on the TFT layer 20, and a sealing film 80 disposed on the light-emitting element layer 60.

[0048] <Substrate Layer>

[0049] The substrate layer 10 is the base layer for forming the panel of the organic EL display device 1. The substrate layer 10 is flexible. The substrate layer 10 has a first resin substrate layer 12, an inorganic substrate layer 14, and a second resin substrate layer 16. The first resin substrate layer 12 is located on the opposite side of the TFT layer 20. The second resin substrate layer 16 is located on the side of the TFT layer 20. The inorganic substrate layer 14 is disposed between the first resin substrate layer 12 and the second resin substrate layer 16.

[0050] The first resin substrate layer 12 and the second resin substrate layer 16 are formed, for example, of organic insulating materials such as polyimide resin. The inorganic substrate layer 14 is formed, for example, of at least one inorganic insulating material selected from silicon nitride, silicon oxide, and silicon oxynitride. The inorganic substrate layer 14 is constituted by a single-layer film or a laminated film formed from such inorganic insulating materials. A protective film (not shown) is attached to the back side of the substrate layer 10 (first resin substrate layer 12).

[0051] <TFT layer>

[0052] The TFT layer 20 includes a plurality of TFTs 50. The TFT layer 20 comprises a substrate coating film 22, a semiconductor layer 24, a gate insulating film 26, a first conductive layer 28, a first interlayer insulating film 30, a second conductive layer 32, a second interlayer insulating film 34, a third conductive layer 36, and a first resin layer 38, which are sequentially disposed on the substrate layer 10.

[0053] A substrate coating film 22 is disposed on substantially the entire surface of the substrate layer 10. The substrate coating film 22 is formed, for example, from at least one inorganic insulating material selected from silicon oxide, silicon nitride, and silicon oxynitride. The substrate coating film 22 is constituted by a single layer or a laminated film formed from such inorganic insulating materials.

[0054] Multiple semiconductor layers 24 are disposed in an island-like manner on the substrate coating film 22. The semiconductor layers 24 are formed, for example, of low-temperature polycrystalline silicon (LTPS). The semiconductor layers 24 may also be formed of oxide semiconductors such as indium gallium zinc oxide (In-Ga-Zn-O), or other semiconductor materials.

[0055] The gate insulating film 26 is continuously disposed on the substrate coating film 22 in such a manner as to cover multiple semiconductor layers 24. The gate insulating film 26 is formed, for example, from at least one inorganic insulating material selected from silicon oxide, silicon nitride, and silicon oxynitride. The gate insulating film 26 is constituted by a monolayer or a stacked film formed from such inorganic insulating material. The gate insulating film 26 may also be disposed in an island shape on each semiconductor layer 24.

[0056] A first conductive layer 28 is disposed on the gate insulating film 26. The first conductive layer 28 includes a plurality of gate wirings 28gl, a plurality of emitter control wirings 28el, a plurality of first portion wirings 28hl, a plurality of gate electrodes 28ge, and a plurality of first capacitor electrodes 28ce. These various wirings and electrodes are formed in the same layer from the same material. For example, conductive materials such as aluminum (Al), tungsten (W), molybdenum (Mo), tantalum (Ta), chromium (Cr), titanium (Ti), and copper (Cu) are used as materials for these various wirings and electrodes. These various wirings and electrodes are constituted by a single-layer film or a multilayer film formed from such conductive materials.

[0057] The first interlayer insulating film 30 is disposed on the gate insulating film 26 in such a manner that it covers a plurality of gate wirings 28gl, a plurality of emitter control wirings 28e1, a plurality of first portion wirings 28hl, a plurality of gate electrodes 28ge, and a plurality of first capacitor electrodes 28ce. The first interlayer insulating film 30 is formed of at least one inorganic insulating material selected from silicon oxide, silicon nitride, and silicon oxynitride. The first interlayer insulating film 30 is constituted by a single layer or a multilayer film formed of such inorganic insulating material.

[0058] A second conductive layer 32 is disposed on the first interlayer insulating film 30. The second conductive layer 32 includes a plurality of first power lines 32pl and a plurality of second capacitor electrodes 32ce. These first power lines 32pl and second capacitor electrodes 32ce are formed of the same material in the same layer. For example, conductive materials such as aluminum (Al), tungsten (W), molybdenum (Mo), tantalum (Ta), chromium (Cr), titanium (Ti), and copper (Cu) are used as materials for these first power lines 32pl and second capacitor electrodes 32ce. These first power lines 32pl and second capacitor electrodes 32ce are formed by a single-layer film or a multilayer film formed of such conductive materials.

[0059] The second interlayer insulating film 34 is disposed on the first interlayer insulating film 30 such that it covers a plurality of first power supply wirings 32pl and a plurality of second capacitor electrodes 32ce. The second interlayer insulating film 34 is formed of at least one inorganic insulating material selected from silicon oxide, silicon nitride, and silicon oxynitride. The second interlayer insulating film 34 is constituted by a single-layer film or a laminated film formed of such inorganic insulating material. The first interlayer insulating film 30 and the second interlayer insulating film 34 constitute the interlayer insulating film 35.

[0060] A third conductive layer 36 is disposed on the second interlayer insulating film 34. The third conductive layer 36 includes multiple source wirings 36sl, multiple source electrodes 36se, multiple drain electrodes 32de, multiple second power supply wirings 36pl, multiple second portion wirings 36hl, a first border wiring 36fa, and a second border wiring 36fb. These various wirings and electrodes are formed in the same layer from the same material. For example, conductive materials such as aluminum (Al), tungsten (W), molybdenum (Mo), tantalum (Ta), chromium (Cr), titanium (Ti), and copper (Cu) are used as materials for these various wirings and electrodes. These various wirings and electrodes are constituted by a single-layer film or a multilayer film formed from such conductive materials.

[0061] The first resin layer 38 is disposed on the second interlayer insulating film 34 and is located above the third conductive layer 36. The first resin layer 38 includes a planarization film 38pf and a first wall layer (not shown). The planarization film 38pf and the first wall layer are formed in the same layer from the same material. The planarization film 38pf and the first wall layer are composed of resin materials such as polyimide resin and acrylic resin.

[0062] A planarization film 38pf is disposed in the inner peripheral portion of the display area D and the bezel area F, covering multiple source wirings 36sl, multiple source electrodes 36se, multiple drain electrodes 36de, multiple second power supply wirings 36pl, multiple second partial wirings 36hl, and a first bezel wiring 36fa. The planarization film 38pf planarizes the surface of the TFT layer 20 so that it does not reflect these various wirings and electrodes, as well as the surface shape of each TFT 50.

[0063] Two first wall layers are provided on the outer periphery of the planarization film 38pf in the frame region F. One first wall layer constitutes a first barrier wall Wa, and the other first wall layer constitutes a second barrier wall Wb. The first wall layer of the first barrier wall Wa is provided at a distance from the planarization film 38pf on the outer periphery of the planarization film 38pf. The first wall layer of the second barrier wall Wb is provided at a distance from the first wall layer of the first barrier wall Wa on the outer periphery of the first barrier wall Wa.

[0064] <Various types of cabling>

[0065] like Figure 1 and Figure 3 As shown, multiple gate wirings 28gl are in the display area D, in a direction orthogonal to the first direction X ( Figure 1 The gate wirings 28gl are spaced apart in the second direction Y and extend parallel to each other in the first direction X. These gate wirings 28gl are display wirings that transmit gate signals and are configured for each row of sub-pixels Sp. Each gate wiring 28gl is connected to the gate driver of the driving circuit Dc. Each gate wiring 28gl is selected to become active by the gate driver at a predetermined timing.

[0066] Multiple emission control lines 28el extend parallel to each other in the display area D, spaced apart in the second direction Y and parallel to each other in the first direction X. These emission control lines 28el are display wirings for transmitting emission control signals, and are arranged for each row of sub-pixels Sp. Each emission control line 28el is connected to the emission driver of the drive circuit Dc. Each emission control line 28el is sequentially selected by the emission driver to become inactive at a predetermined timing.

[0067] Multiple source wires 36sl are spaced apart from each other in the first direction X and extend parallel to each other in the second direction Y in the display area D. Each source wire 36sl is a display wiring for transmitting source signals and is provided for each column of sub-pixels Sp. Each source wire 36sl is connected to the lead wire L1. Each source wire 36sl is connected to the display control circuit via a terminal T.

[0068] Multiple first power supply lines 32pl are spaced apart from each other in the second direction Y and extend parallel to each other in the first direction X in the display area D. Multiple second power supply lines 36pl are spaced apart from each other in the first direction X and extend parallel to each other in the second direction Y in the display area D. These first power supply lines 32pl and second power supply lines 36pl are display wirings for applying a specified high-level power supply voltage (ELVDD).

[0069] The first power wiring 32pl and the second power wiring 36pl are arranged in a grid pattern to form power wiring P1. Each first power wiring 32pl is connected to the corresponding second power wiring 36pl and the first border wiring 36fa via a contact hole (not shown) formed in the second interlayer insulating film 34. Each second power wiring 36pl is connected to the first border wiring 36fa.

[0070] Multiple first-part wirings 28hl are respectively disposed in the bezel region F in the portion between the display region D and the bent portion B, and in the portion between the bent portion B and the terminal portion T, such that these two portions are spaced apart from each other in the first direction X and extend parallel to each other in the second direction Y. Each first-part wiring 28hl located on the display region D side further than the bent portion B is connected to the corresponding source wiring 36sl via a contact hole (not shown) formed in the interlayer insulating film 35. Each first-part wiring 28hl constitutes a part of the lead wiring L1.

[0071] Multiple second-part wirings 36h1 are spaced apart from each other in the first direction X and extend parallel to each other in the second direction Y in the fill layer F1, respectively, across the bend portion B in the frame region F. These second-part wirings 36h1 are connected via contact holes (not shown) formed in the interlayer insulating film 35 to the first-part wiring 28h1 located further from the bend portion B towards the display area D and the first-part wiring 28h1 located further from the bend portion B towards the terminal portion T. Each second-part wiring 36h1 together with the first-part wiring 28h1 constitutes the lead-out wiring L1.

[0072] <Various Electrodes>

[0073] Multiple gate electrodes 28ge, source electrodes 36se, and drain electrodes 36de are provided for each sub-pixel Sp. These electrodes constitute the electrodes of the TFT 50. At least one first capacitor electrode 28ce and at least one second capacitor electrode 32ce are provided for each sub-pixel Sp. These electrodes constitute the electrodes of the capacitor 55.

[0074] <TFT>

[0075] Multiple TFTs 50 are provided for each sub-pixel Sp. All TFTs 50 are top-gate type TFTs. Each TFT 50 is composed of a semiconductor layer 24, a gate insulating film 26, a gate electrode 28ge, an interlayer insulating film 35, a source electrode 36se, and a drain electrode 36de. The source electrode 36se and the drain electrode 36de are separated from each other and connected to different portions (conduction regions) in the semiconductor layer 24 at locations separated from the region (intrinsic region) overlapping with the gate electrode 28ge, via contact holes 35h formed on the interlayer insulating film 35.

[0076] <Capacitor>

[0077] At least one capacitor 55 is provided for each sub-pixel Sp. The capacitor 55 is a data retention element. The capacitor 55 consists of a first capacitor electrode 28ce, a first interlayer insulating film 30, and a second capacitor electrode 32ce. The first capacitor electrode 28ce and the second capacitor electrode 32ce overlap through the first interlayer insulating film 30.

[0078] <Light-emitting element layer>

[0079] The light-emitting element layer 60 is disposed above the substrate layer 10 (second resin substrate layer 16) across the TFT layer 20. The light-emitting element layer 60 includes a plurality of organic EL elements 70. The organic EL element 70 is an example of a light-emitting element. The light-emitting element layer 60 includes a fourth conductive layer 62, a second resin layer 64, an organic EL layer (organic electroluminescent layer) 66, and a fifth conductive layer 68 sequentially disposed on a planarization film 38pf.

[0080] The fourth conductive layer 62 is located above the first resin layer 38. The fourth conductive layer 62 includes a plurality of first electrodes 62fe. The first electrodes 62fe are disposed on the sub-pixels Sp (each organic EL element 70). The first electrodes 62fe function as anodes for injecting holes into the organic EL layer 66. The first electrodes 62fe have light reflectivity.

[0081] The materials used to form the first electrode 62fe include conductive materials such as silver (Ag), aluminum (Al), vanadium (V), cobalt (Co), nickel (Ni), tungsten (W), gold (Au), titanium (Ti), ruthenium (Ru), manganese (Mn), indium (In), (Yb), lithium fluoride (LiF), platinum (Pt), palladium (Pd), molybdenum (Mo), iridium (Ir), and tin (Sn).

[0082] Furthermore, the material of the first electrode 62fe can be an alloy of astatine (At) and astatine oxide (AtO2), etc. Alternatively, the material of the first electrode 62fe can also be a conductive oxide such as tin oxide (SnO), zinc oxide (ZnO), indium tin oxide (ITO), or indium zinc oxide (IZO). To improve the hole injection efficiency into the organic EL layer 66, the material of the first electrode 62fe is preferably a material with a high work function. The first electrode 62fe can also be formed by stacking multiple layers of the above-mentioned materials.

[0083] The second resin layer 64 includes an edge mask 64ec, a photosensitive spacer 64ps, and a second wall layer (not shown). The edge mask 64ec, the photosensitive spacer 64ps, and the second wall layer are formed of the same material in the same layer. Materials used for the edge mask 64ec, the photosensitive spacer 64ps, and the second wall layer include, for example, polyimide resin, acrylic resin, polysiloxane resin, phenolic varnish resin, and other resin materials.

[0084] An edge cover 64ec divides adjacent first electrodes 62fe. The edge cover 64ec is formed in a grid shape, covering the periphery of each first electrode 62fe. An opening 64eo is formed on the edge cover 64ec to expose each first electrode 62fe. A portion of the surface of the edge cover 64ec forms a plurality of upwardly protruding photosensitive spacers 64ps. Although not shown, a plurality of photosensitive spacers 64ps ​​are also arranged in a prescribed manner in the frame region F. The second wall layer is divided into two on each first wall layer in the frame region F. One second wall layer forms a first barrier wall Wa, and the other second wall layer forms a second barrier wall Wb.

[0085] <Organic EL Layer>

[0086] The organic EL layer 66 is an example of a light-emitting functional layer. The organic EL layer 66 is disposed on each of the first electrodes 62fe within each opening 64eo of the edge cover 64ec. For example... Figure 5 As shown, the organic EL layer 66 has a hole injection layer 66hi, a hole transport layer 66ht, a light-emitting layer 66le, an electron transport layer 66et, and an electron injection layer 66ei sequentially disposed on the first electrode 62fe. Several of these layers, including the hole injection layer 66hi, the hole transport layer 66ht, the light-emitting layer 66le, the electron transport layer 66et, and the electron injection layer 66ei, can be disposed together as a continuous arrangement in multiple sub-pixels Sp.

[0087] The hole injection layer 66hi is also known as the anode buffer layer. The hole injection layer 66hi serves to bring the energy levels of the first electrode 29 and the organic EL layer 66 closer together, improving the efficiency of hole injection from the first electrode 29 into the organic EL layer 66. Examples of materials that can be used for the hole injection layer 66hi include triazole derivatives, oxadiazole derivatives, imidazole derivatives, polyaryl alkyl derivatives, pyrazoline derivatives, phenylenediamine derivatives, oxazole derivatives, styrene-anthracene derivatives, fluorenone derivatives, hydrazone derivatives, and stilbene derivatives.

[0088] The hole transport layer 66ht effectively moves holes to the light-emitting layer 66e. Materials used for the hole transport layer 66ht include, for example, porphyrin derivatives, aromatic tertiary amine compounds, styrene-based amine derivatives, polyvinylcarbazole, poly(p-phenylenevinylene), polysilane, triazole derivatives, oxadiazole derivatives, imidazole derivatives, polyaryl alkane derivatives, pyrazoline derivatives, pyrazolone derivatives, phenylenediamine derivatives, aryl amine derivatives, amine-substituted chalcone derivatives, oxazole derivatives, styrene-based anthracene derivatives, fluorenone derivatives, hydrazone derivatives, stilbene derivatives, hydrogenated amorphous silicon, zinc sulfide, zinc selenide, etc.

[0089] When a voltage is applied through the first electrode 62fe and the second electrode 68se, the light-emitting layer 66le causes holes injected from the first electrode 62fe and electrons injected from the second electrode 68se to recombine and emit light. The light-emitting layer 66le is formed, for example, of a different material that corresponds to the emission color (red, green, or blue) of the organic EL element 70 in each sub-pixel Sp.

[0090] Materials used as the light-emitting layer 66le include, for example, metal oxide compounds [8-hydroxyquinoline metal complex], naphthalene derivatives, anthracene derivatives, diphenylethylene derivatives, vinyl acetone derivatives, triphenylamine derivatives, butadiene derivatives, coumarin derivatives, benzoxazole derivatives, oxadiazole derivatives, oxazole derivatives, benzimidazole derivatives, thiadiazole derivatives, benzothiazole derivatives, styryl derivatives, styrylamine derivatives, bis(styrylbenzene) derivatives, tristyrylbenzene derivatives, perylene derivatives, perylene derivatives, amidine derivatives, pyridine derivatives, rhodamine derivatives, benzoxazine derivatives, quinacridone derivatives, quinacridone derivatives, poly(p-phenylene oxide), polysilane, etc.

[0091] The electron transport layer 66et effectively facilitates the movement of electrons to the light-emitting layer 66le. Materials used for the electron transport layer 66et include, for example, oxadiazole derivatives, triazole derivatives, benzoquinone derivatives, naphthoquinone derivatives, anthraquinone derivatives, tetracyanoanthraquinone dimethane derivatives, dibenzoquinone derivatives, fluorenone derivatives, silicon heterocyclic derivatives, and metal oxide compounds.

[0092] The electron injection layer 66ei is also known as the cathode buffer layer. The electron injection layer 66ei serves to bring the energy levels of the second electrode 68se and the organic EL layer 66 closer together, improving the efficiency of electron injection from the second electrode 68se to the organic EL layer 66. Materials used for the electron injection layer 66ei include, for example, inorganic alkali compounds such as lithium fluoride (LiF), magnesium fluoride (MgF2), calcium fluoride (CaF2), strontium fluoride (SrF2), and barium fluoride (BaF2), as well as alumina (Al2O3) and strontium oxide (SrO).

[0093] The fifth conductive layer 68 includes a second electrode 68se. The second electrode 68se is continuously disposed in common with multiple sub-pixels Sp. The second electrode 68se covers the edge mask 64ec and is disposed on the organic EL layer 66, overlapping the first electrode 62fe across the organic EL layer 66. The second electrode 68se functions as a cathode for injecting electrons into the organic EL layer 66. The second electrode 68se has light transmittance.

[0094] Materials used as the second electrode 68se include, for example, silver (Ag), aluminum (Al), vanadium (V), titanium (Ti), yttrium (Y), sodium (Na), manganese (Mn), indium (In), magnesium (Mg), lithium (Li), ytterbium (Yb), lithium fluoride (LiF), etc.

[0095] Alternatively, the second electrode 68se can also be formed from alloys such as magnesium (Mg) / copper (Cu), magnesium (Mg) / silver (Ag), sodium (Na) / potassium (K), astatine (At) / astatine oxide (AtO2), lithium (Li) / aluminum (Al), lithium (Li) / calcium (Ca) / aluminum (Al), lithium fluoride (LiF) / calcium (Ca) / aluminum (Al).

[0096] <Organic EL Components>

[0097] Organic EL elements 70 are provided for each sub-pixel Sp. Multiple organic EL elements 70 are top-emitting organic EL elements. Each organic EL element 70 has a first electrode 62fe, an organic EL layer 66, and a second electrode 68se. The organic EL elements 70 emit light in regions corresponding to openings 64eo of the edge mask 64ec. The regions in the sub-pixel Sp corresponding to openings 64eo of the edge mask 64ec constitute the light-emitting region E. The organic EL layer 66 emits light by applying a current between the first electrode 62fe and the second electrode 68se.

[0098] The first electrode 62fe is connected to the drain electrode 36de of a designated TFT 50 (third TFT 50C) in the corresponding sub-pixel Sp via a contact hole 38h formed in the planarization film 38pf. The organic EL layer 66 is sandwiched between the first electrode 62fe and the second electrode 68se. The second electrode 68se extends to the frame region F and is connected to the second frame wiring 36fb on one or both of the planarization film 38pf and the first barrier wall Wa and the first barrier wall Wa and the second barrier wall Wb.

[0099] <Pixel Circuit>

[0100] Multiple TFTs 50, capacitors 77, and organic EL elements 70 are configured for each sub-pixel Sp. Figure 6 The pixel circuit Pc is shown. The pixel circuit Pc controls the light emission of the organic EL element 70 in the light-emitting region E of the corresponding sub-pixel Sp based on the gate signal supplied to the gate wiring 28gl, the emission signal supplied to the emission control wiring 28el, the source signal supplied to the source wiring 36sl, the high-level power supply voltage (ELVDD) supplied to the power supply wiring Pl, and the low-level power supply voltage (ELVSS) supplied to the second electrode 68se.

[0101] The pixel circuit Pc comprises multiple TFTs 50, namely a first TFT 50A, a second TFT 50B, and a third TFT 50C. The first TFT 50A is connected in each sub-pixel Sp to the corresponding gate wiring 28gl, source wiring 36sl, and the second TFT 50B. The second TFT 50B is connected in each sub-pixel Sp to the corresponding first TFT 50A, power supply wiring P1, and the third TFT 50C. The third TFT 50C is connected in each sub-pixel Sp to the corresponding second TFT 50B, emission control wiring 28e1, and organic EL element 70. A capacitor 55 is connected in each sub-pixel Sp to the corresponding first TFT 50A, second TFT 50B, and power supply wiring P1.

[0102] <Sealing film>

[0103] A sealing film 80 is disposed on the light-emitting element layer 60 in such a way as to cover multiple organic EL elements 70. The sealing film 80 protects the organic EL layer 66 of each organic EL element 70 from the influence of moisture, oxygen, etc. The sealing film 80 has a first inorganic sealing layer 82, an organic sealing layer 84, and a second inorganic sealing layer 86 disposed sequentially on the light-emitting element layer 60.

[0104] The first inorganic sealing layer 82 covers the second electrode 68se in the display area D, and covers the first barrier wall Wa and the second barrier wall Wb in the frame area F, extending to the outer periphery of the second barrier wall Wb. The first inorganic sealing layer 82 also covers the third barrier wall Wc in the non-display area N, extending to the inner periphery of the third barrier wall Wc.

[0105] An organic sealing layer 84 is disposed on the first inorganic sealing layer 82. The organic sealing layer 84 is disposed inside the first barrier wall Wa and outside the third barrier wall Wc. The organic sealing layer 84 may also exist between the first barrier wall Wa and the second barrier wall Wb. The organic sealing layer 84 is surrounded by the first inorganic sealing layer 82 and the second inorganic sealing layer 86, and is encapsulated between these two layers 82 and 86.

[0106] The second inorganic sealing layer 86 covers the organic sealing layer 84 and extends on the outer peripheral side of the second barrier wall Wb and the inner peripheral side of the third barrier wall Wc. The peripheral portion of the second inorganic sealing layer 86 overlaps and joins with the peripheral portion of the first inorganic sealing layer 82 on the outer peripheral side of the first barrier wall Wa and the inner peripheral side of the third barrier wall Wc.

[0107] The first inorganic sealing layer 82 and the second inorganic sealing layer 86 are each formed of at least one inorganic insulating material selected, for example, from silicon oxide, silicon nitride, and silicon oxynitride. The organic sealing layer 84 is formed, for example, from at least one organic insulating material selected from acrylic resin, epoxy resin, silicone resin, polyurea resin, polyoxymethylene resin, polyimide resin, and polyamide resin.

[0108] Furthermore, on the surface side of the organic EL display device 1, a touch panel, a protective panel, etc. (not shown) are attached via an optical adhesive material 90 called OCA (Optical Clear Adhesive) provided on the sealing film 80. Through-holes H in the non-display area N are formed on the first resin substrate layer 12, the inorganic substrate layer 14, and the optical adhesive material 90 in the substrate layer 10.

[0109] <Composition of Non-Display Areas>

[0110] like Figure 7 and Figure 8 As shown, in the non-display area N, a recess 100 is formed circumferentially around the through-hole H of the laminate composed of the second resin substrate layer 16, the base coating film 22, the gate insulating film 26, the first interlayer insulating film 30, and the second interlayer insulating film 34, exposing the inorganic substrate layer 14 on the bottom surface. The end face of the laminate facing into the recess 100 is formed as an inclined end face 102 that slopes towards the inorganic substrate layer 14 and closer to the through-hole H. The recess 100 is open to the through-hole H.

[0111] The second electrode 68se is disposed on the outside of the recess 100, not inside the recess 100. The third barrier wall Wc is disposed on the outer periphery of the recess 100 (the periphery of the opening of the recess 100). Therefore, the organic sealing layer 84 is disposed only on the outside of the recess 100. That is, the organic sealing layer 84 is not disposed inside the recess 100. On the other hand, the first inorganic sealing layer 82 and the second inorganic sealing layer 86 are disposed inside the recess 100.

[0112] The first inorganic sealing layer 82 extends from the display area D into the recess 100 such that it covers the inclined end face 102 in the non-display area N, and is in contact with the inorganic substrate layer 14 within the recess 100. Specifically, the first inorganic sealing layer 82 extends from the inclined end face 102 of the laminate to the surface of the inorganic substrate layer 14 within the recess 100. Furthermore, the portion of the first inorganic sealing layer 82 on the outer peripheral side of the bottom surface of the recess 100 is in contact with the inorganic substrate layer 14. The second inorganic sealing layer 86 is disposed on the surface of the first inorganic sealing layer 82 inside the third barrier wall Wc.

[0113] The end faces 82ef and 86ef of the first inorganic sealing layer 82 and the second inorganic sealing layer 86 on the through-hole H side are located at the portion moving away from the periphery of the through-hole H towards the display area D side. The end face 82ef of the first inorganic sealing layer 82 on the through-hole H side and the end face 86ef of the second inorganic sealing layer 86 on the through-hole H side are formed on the same surface (the position where the same end face is formed) in the thickness direction of the substrate layer 10. The distance d between the end faces 82ef and 86ef of the first inorganic sealing layer 82 and the second inorganic sealing layer 86 on the through-hole H side and the periphery of the through-hole H, that is, the distance d from the end face of the sealing film 80 facing the through-hole H side to the periphery of the through-hole H, is, for example, 600 μm or more and 800 μm or less.

[0114] -Operation of Organic EL Display Device-

[0115] In the organic EL display device 1, in each sub-pixel Sp, the corresponding emission control wiring 28el is first selected to become inactive, and the organic EL element 70 becomes non-emitting. Then, if the gate wiring 28gl corresponding to the non-emitting organic EL element 70 is selected to become active, a gate signal is input to the first TFT 50A via the gate wiring 28gl, and the first TFT 50A becomes conductive. When the first TFT 50A becomes conductive, a predetermined voltage corresponding to the source signal transmitted via the source wiring 36sl is applied to the second TFT 50B and written to the capacitor 55.

[0116] Furthermore, when the emission control wiring 28el is set to a non-selected state and becomes inactive, an emission signal is input to the third TFT 50C via the emission control wiring 28el, and the third TFT 50C becomes conductive. When the third TFT 50C becomes conductive, a current corresponding to the gate voltage of the second TFT 50B is supplied from the power supply wiring P1 to the organic EL element 70. As a result, each organic EL layer 66 (light-emitting layer 66e) emits light and displays an image. In addition, since the gate voltage of the second TFT 50B is maintained by the capacitor 55 even when the first TFT 50A becomes off, the light emission of the organic EL layer 66 is maintained for each sub-pixel Sp until the gate signal of the next frame is input.

[0117] -Manufacturing method of organic EL display device-

[0118] The manufacturing method of the organic EL display device 1 according to this embodiment will be described below. Figure 9 As shown, the manufacturing method of the organic EL display device 1 includes: substrate layer formation process ST1, TFT layer formation process ST2, light-emitting element layer formation process ST3, sealing film formation process ST4, flexibility process ST5, through-hole formation process ST6, and mounting process ST7.

[0119] <Substrate Layer Formation Process>

[0120] In the substrate layer formation process ST1, firstly, a non-photosensitive polyimide resin (approximately 2 μm thick) is coated onto a glass substrate. Then, the coated film is pre-baked and post-baked. This forms the first resin substrate layer 12.

[0121] Next, on the substrate on which the first resin substrate layer 12 is formed, an inorganic insulating film (approximately 600 nm thick) such as a silicon oxide film is formed, for example, by plasma CVD (Chemical Vapor Deposition). In this way, an inorganic substrate layer 14 constituting the substrate layer 10 is formed.

[0122] Next, a non-photosensitive polyimide resin (approximately 2 μm thick) is coated onto the substrate on which the inorganic substrate layer 14 is formed. Then, the coated film is pre-baked and post-baked. In this way, a second resin substrate layer 16 is formed. Thus, substrate layer 10 is formed.

[0123] <TFT layer formation process>

[0124] In the TFT layer formation process ST2, an inorganic insulating film (approximately 1000 nm thick) such as a silicon oxide film is formed on the substrate on which the substrate layer 10 is formed, for example, by plasma CVD. In this way, a base coating film 22 is formed.

[0125] Next, an amorphous silicon film (approximately 50 nm thick) is formed on the substrate on which the base coating film 22 is formed, for example, by plasma CVD. Then, the amorphous silicon film is crystallized by laser annealing or the like to form a semiconductor film composed of polycrystalline silicon. Furthermore, the semiconductor film is patterned to form multiple semiconductor layers 24.

[0126] Next, an inorganic insulating film (approximately 100 nm thick) such as a silicon oxide film is formed on the substrate on which the semiconductor layer 24 is formed, for example by plasma CVD. In this way, a gate insulating film 26 is formed in such a way that multiple semiconductor layers 24 are covered.

[0127] Furthermore, on the substrate where the gate insulating film 26 is formed, for example by sputtering, an aluminum film (approximately 350 nm thick) and a molybdenum nitride film (approximately 50 nm thick) are sequentially formed. Then, these metal layers are patterned to form a first conductive layer 28, such as multiple gate wirings 28gl.

[0128] Next, the first conductive layer 28 is used as a mask to dope impurity ions. As a result, intrinsic regions and conductor regions are formed on each semiconductor layer 24.

[0129] Next, on a substrate on which intrinsic regions and conductor regions are formed on each semiconductor layer 24, an inorganic insulating film (approximately 500 nm thick) such as a silicon oxide film is formed, for example by plasma CVD. In this way, a first interlayer insulating film 30 is formed.

[0130] Furthermore, on the substrate where the first interlayer insulating film 30 is formed, for example by sputtering, an aluminum film (approximately 350 nm thick) and a molybdenum nitride film (approximately 50 nm thick) are sequentially formed. Then, these metal laminates are patterned to form multiple first power wirings 32pl and other second conductive layers 32.

[0131] Next, on the substrate where the second conductive layer 32 is formed, an inorganic insulating film (approximately 500 nm thick) such as a silicon oxide film is formed, for example, by plasma CVD. In this way, a second interlayer insulating film 34 is formed, constituting an interlayer insulating film 35.

[0132] Then, in the display area D, the gate insulating film 26 and the interlayer insulating film 35 (first interlayer insulating film 30, second interlayer insulating film 34) are patterned. This forms a contact hole 35h. Next, in the bending portion B, the base coating film 22, the gate insulating film 26, and the interlayer insulating film 35 are removed. This forms a slit Sl. Furthermore, in the non-display area N, the base coating film 22, the gate insulating film 26, and the interlayer insulating film 35 are removed, and the second resin substrate layer 16 is further removed. In this way, a recess 100 is formed.

[0133] Next, a photosensitive polyimide resin, such as a photosensitive one, is coated onto the substrate having the contact hole 35h, the slit Sl, and the recess 100. Then, the coated film is pre-baked, exposed, developed, and post-baked. In this way, a filling layer Fl is formed within the slit Sl of the bending portion B.

[0134] Next, on the substrate where the filling layer Fl is formed, a titanium film (approximately 30 nm thick), an aluminum film (approximately 300 nm thick), and a titanium film (approximately 50 nm thick) are sequentially formed, for example, by sputtering. Then, these metal stacked films are patterned to form a third conductive layer 36 with multiple source wirings 36sl, etc.

[0135] Furthermore, on the substrate where the third conductive layer 36 is formed, a photosensitive polyimide resin (approximately 2 μm thick) is coated, for example, by spin coating or slot coating. Then, the coated film is pre-baked, exposed, developed, and post-baked. This forms a planarization film 38 pf and a first wall layer. Thus, the TFT layer 20 is formed.

[0136] <Light-emitting element layer formation process>

[0137] In the light-emitting element layer formation process ST3, using a known method, a fourth conductive layer 62 (multiple first electrodes 62fe), a second resin layer 64 (edge ​​mask 64ec, photosensitive spacer 64ps, second wall layer), an organic EL layer 66 (hole injection layer 66hi, hole transport layer 66ht, light-emitting layer 66le, electron transport layer 66et, electron injection layer 66ei), and a fifth conductive layer 68 (second electrode 68se) are sequentially formed on a substrate on which the TFT layer 20 is formed. Here, when forming the second electrode 68se, it is formed only on the outer side of the recess 100 in the non-display area N. Then, the light-emitting element layer 60 is formed.

[0138] <Sealing film formation process>

[0139] In the sealing film formation process ST4, multiple inorganic insulating films, such as a silicon nitride film (approximately 200 nm thick) and a silicon oxide film (approximately 1000 nm thick), are sequentially formed on the substrate where the light-emitting element layer 60 is formed, for example, by plasma CVD. In this way, the first inorganic sealing layer 82 is formed.

[0140] Next, on the substrate where the first inorganic sealing film 82 is formed, an organic insulating material (approximately 5000 nm thick) is coated, for example, by inkjet printing, to form an organic sealing layer 84. At this time, the wetting and spreading of the organic insulating material is blocked by one or both of the first barrier wall Wa and the second barrier wall Wb and the third barrier wall Wc, and the area where the organic sealing layer 84 is formed is restricted to a specified area.

[0141] Next, on the substrate where the organic sealing layer 84 is formed, an inorganic insulating film (approximately 600 nm thick), such as a silicon nitride film, is formed, for example, by plasma CVD. This forms a second inorganic sealing layer 86. Then, the first inorganic sealing layer 82 and the second inorganic sealing layer 86 are patterned together. Thus, the first inorganic sealing layer 82 and the second inorganic sealing layer 86 are shaped such that their outer peripheral end faces are separated from the outer periphery of the substrate layer 10 by a predetermined interval, and their end faces 82ef and 86ef on the via H side are separated from the periphery of the subsequently formed via H by a predetermined interval. This forms a sealing film 80.

[0142] <Flexible Processes>

[0143] In the flexibility process ST5, a touch panel, a protective panel, etc., are attached to the surface of the substrate on which the sealing film 80 is formed using an optical adhesive material 90. Then, the glass substrate is peeled off from the lower surface of the substrate layer 10 by irradiating it with a laser from the glass substrate side of the substrate layer 10. Next, a protective film is attached to the lower surface of the substrate layer 10 after the glass substrate has been peeled off.

[0144] <Through Hole Formation Process>

[0145] In the via formation process ST6, a via H is formed in the non-display area N of the substrate layer 10 after the glass substrate has been peeled off, for example, by irradiating a laser in a ring. At this time, the first resin substrate layer 12 and the inorganic substrate layer 14 in the substrate layer 10 are exposed in the via H, but because the first inorganic sealing layer 82 and the second inorganic sealing layer 86 forming the sealing film 80 are kept at a distance from the periphery of the via H, they are not exposed in the via H.

[0146] Installation Procedure

[0147] In the mounting process ST7, a wiring substrate Cb is connected to the terminal portion T of the substrate with through holes H using conductive materials such as ACF (Anisotropic Conductive Film) and ACP (Anisotropic Conductive Paste).

[0148] This makes the wiring board Cb and the terminal T conductive, and external circuits such as display control circuits are installed together with the wiring board Cb.

[0149] Then, the organic EL display device 1 and electronic components such as the camera Ec are housed together in the frame. On the back side of the organic EL display device 1, in the area that overlaps with the non-display area N when viewed from above (strictly speaking, the area corresponding to the through hole), the electronic components are placed.

[0150] As described above, an organic EL display device 1 can be manufactured.

[0151] -Features of the implementation method-

[0152] In the organic EL display device 1 of this embodiment, the first inorganic sealing layer 82 constituting the sealing film 80 extends from the display area D into the recess 100 such that it covers the inclined end face 102 in the non-display area N, and contacts the inorganic substrate layer 14 within the recess 100. The end face 82ef of the first inorganic sealing layer 82 on the through hole H side is located at a position away from the periphery of the through hole H. Thus, since the sealing film 80 terminates at a distance from the periphery of the through hole H, and the first inorganic sealing layer 82 forming the sealing film 80 and the inorganic substrate layer 14 are properly bonded between the inorganic insulating materials, even if moisture... Figure 8 As indicated by the middle arrow, moisture can seep in through the via H formed in the non-display area N, which also reduces the possibility of moisture seeping into the display area D through the end of the sealing film 80, specifically through the space between the first inorganic sealing layer 82 and the inorganic substrate layer 14. This suppresses the degradation of the organic EL element 70 caused by moisture seeping into the display area D.

[0153] Furthermore, in the organic EL display device 1, if an inverted conical spacer wall, as in the prior art, is provided around the through-hole H, the relatively thin first inorganic sealing layer 82 and second inorganic sealing layer 86 in the sealing film 80 may sometimes experience poor coverage due to this spacer wall, failing to properly cover the underlying layer. If poor coverage occurs, moisture can seep into the display area D from the defective area, potentially causing degradation of the organic EL element 70. In contrast, the organic EL display device 1 according to this embodiment, since it does not have an inverted conical spacer wall, can significantly reduce the probability of poor coverage on the sealing film 80. Therefore, degradation of the organic EL element 70 can also be suppressed. As described above, the reliability of the organic EL display device 1 can be improved.

[0154] Variations

[0155] In the above embodiment, the two end faces 82ef and 86ef of the through hole H side of the first inorganic sealing layer 82 and the second inorganic sealing layer 86 constituting the sealing film 80 are configured to be formed as the same surface. In contrast, as... Figure 10 As shown, in this modified example, the first inorganic sealing layer 82 extends from the inclined end face 102 of the second resin substrate layer 16 to the surface of the inorganic substrate layer 14 within the recess 100, similar to the embodiment described above. However, the second inorganic sealing layer 86 covers the end face 82ef of the through hole H side of the first inorganic sealing layer 82 and is in contact with the inorganic substrate layer 14 further towards the through hole H side than the end face 82ef of the first inorganic sealing layer 82. To manufacture this organic EL display device 1, the first inorganic sealing layer 82 and the second inorganic sealing layer 86 can be patterned separately in the sealing film forming process ST4.

[0156] According to this modified example of the organic EL display device 1, based on the first inorganic sealing layer 82, the second inorganic sealing layer 86 is also appropriately bonded to the inorganic substrate layer 14, so even if moisture such as... Figure 10 As indicated by the middle arrow, the through-hole H formed in the non-display area N allows moisture to seep into the display area D through the end of the sealing film 80, further reducing the possibility of moisture entering the display area D. Therefore, this helps to suppress the degradation of the organic EL element 70 and improve the reliability of the organic EL display device 1.

[0157] Other Implementation Methods

[0158] In the above embodiment, the organic EL layer 66 is disposed individually in each sub-pixel Sp, but it is not limited thereto. The organic EL layer 66 may also be disposed continuously and shared in multiple sub-pixels Sp. In this case, the organic EL display device 1 may be equipped with a color filter or the like to display the tone of each sub-pixel 6.

[0159] In the above embodiment, each pixel Px is composed of sub-pixels Sp of three colors, but is not limited to this. The sub-pixels Sp constituting each pixel Px are not limited to three colors, but can also be four or more colors. In addition, the three-color sub-pixels Sp constituting each pixel Px are arranged in a stripe pattern, but is not limited to this. The arrangement of multiple sub-pixels Sp can also be a Pentile arrangement or other arrangements.

[0160] In the above embodiments, the first TFT 50A, the second TFT 50B, and the third TFT 50C are all top-gate type, but are not limited to this. These first TFT 50A, second TFT 50B, and third TFT 50C can also be bottom-gate type. In addition, the number of TFTs 50 disposed in the sub-pixel Sp can be two or more.

[0161] In the above embodiment, the first electrode 62fe is the anode and the second electrode 68se is the cathode, but it is not limited to this. The first electrode 62fe can also be the cathode and the second electrode 68se can also be the anode. In this case, the organic EL layer 66 has an inverted stacked structure.

[0162] In the above embodiment, the organic EL layer 66 is a five-layer structure consisting of a hole injection layer 66hi, a hole transport layer 66ht, a light-emitting layer 66le, an electron transport layer 66et, and an electron injection layer 66ei, but is not limited to this. The organic EL layer 66 can also be a three-layer structure consisting of a hole injection layer that also serves as a hole transport layer, a light-emitting layer 66le, and an electron transport layer that also serves as an electron injection layer; any structure can be adopted.

[0163] In the above embodiments, an organic EL display device was exemplified as a display device, but it is not limited thereto. The technology disclosed herein can be applied, for example, to display devices including multiple light-emitting elements driven by current. As such a display device, a display device having a QLED (Quantum-dot Light Emitting Diode) that uses a quantum dot layer as a light-emitting element can be cited.

[0164] As described above, preferred embodiments have been illustrated as examples of the technology disclosed herein. However, the technology disclosed herein is not limited to this and can also be applied to embodiments with appropriate modifications, substitutions, additions, omissions, etc. Furthermore, the components described in the accompanying drawings and detailed description may include components that are not essential for solving the problem. Therefore, the inclusion of these unnecessary components in the accompanying drawings and detailed description should not immediately lead to the conclusion that these non-essential components are essential.

[0165] Practicality in industry

[0166] As described above, the technology disclosed herein is useful for display devices.

[0167] Explanation of reference numerals in the attached figures

[0168] D display area

[0169] H-hole

[0170] N Non-display area

[0171] 1. Organic EL display device (display device)

[0172] 10 substrate layers

[0173] 14 Inorganic substrate layers

[0174] 16 Second resin substrate layer

[0175] 60 light-emitting element layers

[0176] 62Fe first electrode

[0177] 66 Organic EL Layers

[0178] 68se second electrode

[0179] 70 Organic EL (Light Emitting Device) Components

[0180] 80 sealing film

[0181] 82 First Inorganic Sealing Layer

[0182] 82ef end face

[0183] 84 Organic Sealing Layer

[0184] 86 Second Inorganic Sealing Layer

[0185] 86ef end face

[0186] 100 recesses

[0187] 102 Inclined end face

Claims

1. A display device comprising: The substrate layer has an inorganic substrate layer and a resin substrate layer disposed on the inorganic substrate layer; A light-emitting element layer is disposed above the resin substrate layer and includes a plurality of light-emitting elements; as well as A sealing film is provided to cover the plurality of light-emitting elements and has an inorganic sealing layer. The device includes a display area and island-shaped non-display areas. The display area displays images by emitting light from the light-emitting element, and the non-display areas are located inside the display area. The display device is characterized in that a through-hole is formed in the non-display area, extending along the thickness direction of the substrate layer. In the non-display area, a recess is formed around the through-hole of the resin substrate layer to expose the inorganic substrate layer on the bottom surface. The end face of the resin substrate layer facing the recess is inclined in such a way that it is closer to the through hole side as it moves towards the inorganic substrate layer. The inorganic sealing layer extends from the display area into the recess in such a way that it covers the inclined end face in the non-display area, and is in contact with the inorganic substrate layer within the recess. The end face of the inorganic sealing layer on the through-hole side is located away from the periphery of the through-hole.

2. The display device according to claim 1, characterized in that, The sealing membrane has a first inorganic sealing layer and a second inorganic sealing layer as the inorganic sealing layer, and an organic sealing layer disposed between the first inorganic sealing layer and the second inorganic sealing layer.

3. The display device according to claim 2, characterized in that, The organic sealing layer is only provided on the outside of the recess.

4. The display device according to claim 2 or 3, characterized in that, The end face of the through hole side of the first inorganic sealing layer and the end face of the through hole side of the second inorganic sealing layer are formed on the same surface.

5. The display device according to claim 2 or 3, characterized in that, The first inorganic sealing layer is located below the second inorganic sealing layer and extends from the inclined end face of the resin substrate layer to the surface of the inorganic substrate layer within the recess. The second inorganic sealing layer covers the end face of the first inorganic sealing layer on the through-hole side, and is in contact with the inorganic substrate layer on the through-hole side further than the end face of the first inorganic sealing layer.

6. The display device according to any one of claims 1 to 3, characterized in that, The distance between the end face of the inorganic sealing layer on the through hole side and the periphery of the through hole is more than 600 μm and less than 800 μm.

7. The display device according to any one of claims 1 to 3, characterized in that, The inorganic sealing layer and the inorganic substrate layer are respectively formed of at least one inorganic material selected from silicon oxide, silicon nitride and silicon oxynitride.

8. The display device according to any one of claims 1 to 3, characterized in that, The plurality of light-emitting elements each have a first electrode, a light-emitting functional layer disposed on the first electrode, and a second electrode disposed on the light-emitting functional layer.

9. The display device according to claim 8, characterized in that, The light-emitting functional layer is an organic electroluminescent layer that emits light by applying current between the first electrode and the second electrode.

Images