Image sensor diagonal isolation structure

Abstract

This disclosure relates to a diagonal isolation structure for an image sensor. An image sensor, an isolation structure, and manufacturing techniques are provided. An image sensor includes an electromagnetic radiation source disposed on a substrate, a pixel array disposed on the substrate and thermally coupled to the electromagnetic radiation source, and an isolation structure disposed on the substrate between the electromagnetic radiation source and the pixel array. The isolation structure defines a first reflective surface oriented on a first bias relative to a lateral axis of the pixel array and a second reflective surface oriented on a second bias relative to the lateral axis. The isolation structure can be configured to attenuate residual electromagnetic radiation reaching the near-end region of the pixel array by pairing first and second reflections of the electromagnetic radiation by the first and second reflective surfaces.

Description

Technical Field

[0001] This disclosure generally relates to image sensors, and specifically (but not exclusively) to CMOS image sensors and their applications. Background Technology

[0002] Image sensors are widely used in digital cameras, cellular phones, security cameras, and other imaging systems such as those used in medical, automotive, and other applications. As image sensors are integrated into a wider range of electronic devices, there is a desire to enhance their functionality and performance (e.g., resolution, power consumption, dynamic range, etc.) through improvements in device architecture design and image processing.

[0003] A typical image sensor operates in response to image light incident on the sensor and reflected from an external scene. The image sensor comprises an array of pixels with photosensitive elements (e.g., photodiodes) that absorb a portion of the incident image light and generate image charge in the process. The image charge light generated by the pixel light can be measured as an analog output image signal on a column line, which varies depending on the incident image light. In other words, the amount of image charge generated is proportional to the intensity of the image light, which is read out as an analog image signal from the column line and converted into a digital value to produce a digital image (i.e., image data) representing the external scene. Summary of the Invention

[0004] On one hand, this disclosure provides an image sensor comprising: an electromagnetic radiation source disposed on a substrate; a pixel array disposed on the substrate and thermally coupled to the electromagnetic radiation source; and an isolation structure disposed on the substrate between the electromagnetic radiation source and the pixel array, the isolation structure defining a first reflective surface oriented on a first bias relative to a lateral axis of the pixel array and a second reflective surface oriented on a second bias relative to the lateral axis, wherein the isolation structure is configured to attenuate residual electromagnetic radiation reaching a near-end region of the pixel array by pairing a first reflection and a second reflection of the electromagnetic radiation by the first reflective surface and the second reflective surface.

[0005] On the other hand, this disclosure further provides an isolation structure comprising: a substrate including a plurality of diagonal isolation structures, the substrate defining a lateral axis and a vertical axis perpendicular to the lateral axis, wherein the diagonal isolation structures of the plurality of diagonal isolation structures define a first reflective surface oriented on a first bias relative to the lateral axis and a second reflective surface oriented on a second bias relative to the lateral axis, and wherein the diagonal isolation structures are configured to attenuate electromagnetic radiation by pairing a first reflection and a second reflection of the electromagnetic radiation by the first reflective surface and the second reflective surface. Attached Figure Description

[0006] The invention is described with reference to the following figures, which are non-limiting and non-exhaustive examples, wherein similar reference numerals are used throughout the various views to refer to similar parts, unless otherwise specified. Where appropriate, not all examples of elements are necessarily labeled to avoid confusion in the figures. The figures are not necessarily drawn to scale, but rather focus on illustrating the principles described.

[0007] Figure 1A This illustration shows a top view of an image sensor comprising an active pixel region, a dark pixel region, an electromagnetic radiation source, and a diagonal deep trench isolation structure according to an embodiment of the present disclosure.

[0008] Figure 1B Description of embodiments according to this disclosure Figure 1A The image sensor is shown in the cross-sectional view along line AA′.

[0009] Figures 2A to 2B This describes a conventional deep trench isolation structure, typically used to reduce the lateral transmission of electromagnetic radiation to active pixels in the active pixel area.

[0010] Figure 3A This is a schematic diagram illustrating an example image sensor layout including a diagonal deep trench isolation structure configured to improve the isolation of active pixels, according to an embodiment of the present disclosure.

[0011] Figure 3B This is a schematic diagram illustrating an example diagonal deep trench isolation structure configured as a lattice structure according to an embodiment of the present disclosure.

[0012] Figure 3C This is a schematic diagram illustrating an example array of diagonal deep trench isolation structures configured to improve the isolation of active pixels, according to embodiments of the present disclosure.

[0013] Figure 3D This is a schematic diagram illustrating an example of an interleaved array comprising a diagonal deep trench isolation structure configured to improve the isolation of active pixels, according to an embodiment of the present disclosure.

[0014] Figure 4 This is a functional block diagram of an imaging system comprising an image sensor having multiple layers of metal stacks, as taught in this disclosure.

[0015] Corresponding reference characters throughout the various views of the accompanying drawings indicate corresponding components. Those skilled in the art will understand that the elements in the drawings are illustrated for simplicity and clarity and are not necessarily drawn to scale. For example, the dimensions of some elements in the drawings may be exaggerated relative to other elements to aid in understanding the various embodiments of the invention. Furthermore, to facilitate easier observation of these various embodiments of the invention, common but well-known elements that are useful or necessary in commercially viable embodiments are generally not depicted. Detailed Implementation

[0016] This document describes embodiments of devices, systems, and methods, each comprising or otherwise associated with an image sensor, having a diagonal deep trench isolation structure configured to improve electromagnetic isolation of active pixels. Numerous specific details are set forth in the following description to provide a thorough understanding of the embodiments. However, those skilled in the art will recognize that the techniques described herein can be practiced without one or more of these specific details or in conjunction with other methods, components, materials, etc. In other instances, well-known structures, materials, or operations have not been shown or described in detail to avoid obscuring certain aspects.

[0017] Throughout this specification, references to "an example" or "an embodiment" mean that a particular feature, structure, or characteristic described in connection with that embodiment is included in at least one embodiment of the invention. Therefore, the appearance of the phrase "in an example" or "an embodiment" in various places throughout this specification does not necessarily refer to the same embodiment. Furthermore, specific features, structures, or characteristics may be combined in suitable manner in one or more embodiments.

[0018] To facilitate the description of the relationship of one element or feature relative to another element or feature as illustrated in the figures, spatial relative terms such as “below,” “under,” “above,” “below,” “above,” “top,” “bottom,” “left,” “right,” “center,” “middle,” and the like are used herein. It will be understood that spatial relative terms are intended to cover different orientations of the device in use or operation, other than those depicted in the figures. For example, if the device in the figures is rotated or flipped, then an element described as “below,” “under,” or “below” other elements or features will be oriented as “above” other elements or features. Thus, the exemplary terms “below” and “below” can cover both above and below orientations. The device may be oriented in other ways (rotated ninety degrees or other orientations), and the spatial relative descriptive terms used herein will be interpreted accordingly. Furthermore, it will be understood that when an element is described as being “between” two other elements, it may be the only element between the two other elements, or there may be one or more intermediate elements.

[0019] Several terms are used throughout this specification. These terms should have their general meaning in the field to which they belong, unless explicitly defined herein or otherwise indicated in the context of their use. It should be noted that component names and symbols may be used interchangeably throughout this document (e.g., Si and silicon); however, both have the same meaning.

[0020] Advances in semiconductor processing technology have enabled the fabrication of complementary metal-oxide-semiconductor devices (e.g., image sensors, processors, displays, and the like) with increasingly smaller feature sizes, allowing for the miniaturization of many devices. For image sensors, miniaturization has resulted in devices where the image sensor assembly, including a photodiode and a metallization layer, is formed on a shared substrate containing signal processing and control circuitry (e.g., application-specific integrated circuits (ASICs) and power supply circuitry). One benefit of miniaturization is the reduction in power requirements, overall sensor area, and pixel density of the image sensor. However, the control and power supply circuitry generates heat that is transferred through the shared substrate and induces dark current non-uniformity in the image sensor pixel array. Therefore, as miniaturization increases, conventional methods for correcting dark current become ineffective. Consequently, techniques are needed to attenuate electromagnetic radiation laterally transported in the semiconductor substrate before it reaches the photodiode and induces dark current non-uniformity.

[0021] The embodiments described herein include an image sensor configured to attenuate electromagnetic radiation laterally transmitted through the semiconductor substrate of the image sensor. The image sensor includes a diagonal isolation structure formed between pixels in an image sensor pixel array, the pixels potentially including active pixels, dark pixels, and / or dummy pixels. The diagonal isolation structure may include a triangular zigzag pattern (e.g., a triangular "zigzag") describing a generally linear axis, wherein the axis is generally orthogonal to the lateral axis of the image sensor (e.g., ...). Figure 1A (A-A'). Alternatively, the diagonal isolation structure may comprise a rotated square lattice, a rotated rectangular lattice, a rotated rhomboid lattice, or other geometric lattices. Advantageously, the diagonal isolation structure described herein can be formed by processes already performed by a CMOS fabrication system, including (but not limited to) photolithographic patterning, deposition and etching, and planarization. Furthermore, compared to conventional isolation structures (e.g., deep trench isolation structures formed to reduce optical crosstalk between photodiodes), the diagonal isolation structure described herein more effectively reflects EM radiation containing thermal energy away from the pixels of the image sensor, and the diagonal isolation structure typically presents a square lattice configuration aligned vertically and laterally with the image sensor.

[0022] Figure 1AThis is a schematic plan view illustrating an example image sensor 100 comprising an active pixel region 110, a dark pixel region 130, and a diagonal deep trench isolation structure 109 according to an embodiment of the present disclosure. The image sensor 100 includes an active pixel region 110, a dummy pixel region 120, a dark pixel region 130, a peripheral region 140, and one or more application-specific integrated circuits (ASICs) 190, wherein one or more components can act as electromagnetic (EM) radiation sources 195. In the illustrated embodiment, the dummy pixel region 120, the dark pixel region 130, and the peripheral region 140 laterally surround the active pixel region 110. The dummy pixel region 120 is disposed between the active pixel region 110 and the dark pixel region 130. The dark pixel region 130 is disposed between the peripheral region 140 and the dummy pixel region 120. The dark pixel region 130 is also disposed between the peripheral region 140 and the active pixel region 110. The ASIC 190 and the EM source 195 are illustrated within the peripheral region 140.

[0023] The active pixel area 110 includes one or more active pixel photodiodes 112 (reference). Figure 1B This generates one or more image signals representing an external scene. For example, in response to incident light on the active pixel region 110 (e.g., electromagnetic (EM) radiation with energy detectable by the human eye, EM radiation invisible to the human eye, etc.), image charge can be collected by the active pixel photodiode 112 of the active pixel region 110. The image charge can be read out as an analog signal converted into a digital signal (e.g., an image signal contained in a given one or more pixels in the active pixel region 110). The dark pixel region 130 contains a dark pixel photodiode 132 (see reference). Figure 1B This is achieved by generating one or more dark current reference signals (e.g., based on the readout of one or more dark pixel photodiodes contained in the dark pixel region 130). The dark current reference signals can be generated by the dark pixel photodiode 132 to correct noise output from the active pixel photodiode 112. For example, dark current can cause a raised baseline in the image signal and reduce the signal-to-noise ratio of the image sensor 100, thereby degrading sensor performance. Dark current correction may include (but is not limited to) baseline correction and / or denoising techniques, such as subtracting the dark current reference signal from one or more image signals.

[0024] In some embodiments, the dummy pixel region 120 may be contained between the dark pixel region 130 and the active pixel region 110. The dummy pixel region 120 may contain a plurality of dummy pixel photodiodes 122 (see reference). Figure 1B This can correspond to a non-imaging photodiode. For example, a dummy pixel region 120 can be disposed between active pixel regions 110 to isolate the active pixel photodiode 112 from the dark pixel region 130, ASIC 190, EM source 195, other unspecified circuitry or logic that may be disposed in the peripheral region 140, or other components of the image sensor 100.

[0025] Virtual pixel area 120 and dark pixel area 130 in Figure 1A The description indicates that it is substantially concentric with the active pixel area 110. In some embodiments, the dummy pixel area 120 and the dark pixel area 130 may take different configurations, including (but not limited to) open-loop shapes, rectangular shapes, circular shapes, or others, as shown in the reference. Figure 3A To describe in more detail. For example, dark pixel region 130 may partially surround active pixel region 110 and may define a plurality of gaps to provide additional area for forming circuitry or other components (e.g., ASIC 190). Dark pixel region 130 may have a rectangle aligned with rows or columns of active pixel photodiodes contained in active pixel region 110. In some embodiments, the plurality of active pixel photodiodes contained in active pixel region 110 are arranged (e.g., arranged in rows and columns) such that active pixel region 110 has a square or rectangular shape. However, in other embodiments, active pixel region 110 may have a different shape (e.g., circular, hexagonal, or another shape).

[0026] Figure 1B Description of embodiments according to this disclosure Figure 1A The image sensor 100 described herein is a cross-sectional view along line 100-AA′. The image sensor 100 includes an active pixel region 110, a dummy pixel region 120, a dark pixel region 130, and a peripheral region 140. The image sensor 100 further includes a semiconductor material 101 (e.g., silicon, silicon-germanium alloy, germanium, silicon carbide alloy, indium gallium arsenide alloy, other alloys formed from III-V compounds, other semiconductor materials or alloys, combinations thereof, its substrate, its bulk substrate, or a wafer thereof), having a first side 103 (e.g., a back side) and a second side 105 (e.g., a front side), a metal layer 107, an isolation structure 108, a diagonal trench structure 109, active pixel photodiodes 112 (e.g., a first active pixel photodiode 112-1 and a second active pixel photodiode 112-2), and dummy pixels. Photodiode 122 (e.g., first dummy pixel photodiode 122-1), dark pixel photodiode 132 (e.g., first dark pixel photodiode 132-1 and second dark pixel photodiode 132-2), anti-reflective (AR) layer 150, buffer oxide layer 152, and one or more opaque layers 154 and 156 are used to isolate and define active pixel 112, dark pixel 132, buffer layer 172 (e.g., ceramic or other oxide), color filter 174 (e.g., green color filter 174-G, red color filter 174-R or other color filter), and microlens 176.

[0027] For the active pixel region 110, opaque layers 154 and 156 may be stacked to block or otherwise attenuate EM radiation incident on the dark pixel region 130 (e.g., to prevent EM radiation from reaching the multiple dark pixel photodiodes 132). Similarly, a color filter 174 may be formed by patterning away portions of opaque layers 154 and 156 and subsequently depositing material for the color filter 174. In this way, opaque layers 154 and 156 serve to reduce crosstalk between adjacent photodiodes 112 in the active pixel region 110, which is supported by the deposition of the isolation structure 108, described in more detail below.

[0028] In one or more embodiments, the first side 103 may be referred to as the illuminated surface or side of the semiconductor material 101, and the second side 105 may be referred to as the unilluminated surface or side of the semiconductor material 101. An AR layer 150 may be disposed between the first side 103 of the semiconductor material 101 and the buffer oxide layer 152. In some embodiments, the antireflective layer 150 comprises tantalum oxide (e.g., Ta₂O₅), hafnium oxide (e.g., HfO₂), aluminum oxide (e.g., Al₂O₃), zirconium oxide (e.g., Zr₂O₃), or combinations thereof. The antireflective layer 150 may be about 10 nm thick, about 20 nm thick, about 30 nm thick, about 40 nm thick, about 50 nm thick, about 60 nm thick, about 70 nm thick, about 80 nm thick, about 90 nm thick, about 100 nm thick, about 110 nm thick, about 120 nm thick, about 130 nm thick, about 140 nm thick, about 150 nm thick, or thicker, including fractions and interpolations thereof. A buffer oxide layer 152 may be disposed between the antireflective layer 150 and the opaque layers 154 and 156. In some embodiments, the buffer oxide layer 152 comprises a dielectric oxide (e.g., SiO2) and is at least 100 nm thick. In some embodiments, the buffer oxide layer 152 has a thickness between 100 nm and 130 nm. The buffer oxide layer 152 may be disposed over the AR layer 150 and under the color filter 174. Thus, the buffer oxide layer 152 can be planarized to a substantially uniform surface to improve consistency between different active pixels 110. The buffer oxide layer 152 may impart improved structural integrity and chemical and / or radiation protection to the underlying layers (e.g., the antireflective layer 150, semiconductor material 101, etc.). For example, the buffer oxide layer 152 may be disposed at a certain thickness to enhance mechanical strength during chemical mechanical polishing (CMP) processes for planarization and to reduce mechanical stress and other damage to the antireflective layer 150, semiconductor material 101, etc.

[0029] In some embodiments, the semiconductor material 101 includes one or more layers disposed beneath the buffer oxide layer 152 (e.g., between the buffer oxide layer 152 and a first side 103 of the semiconductor substrate 101). For example, a surface passivation layer may be disposed between the AR layer 152 and the first side 103 of the semiconductor material 101. The surface passivation layer may be formed of a high-κ material (e.g., a material having a dielectric constant greater than that of silicon oxide) that provides a fixed negative charge (e.g., hafnium oxide, aluminum oxide, or other passivating oxides) to provide surface passivation of the first side 103 of the semiconductor material. In this context, surface passivation describes a technique for reducing the effects of charge accumulation in optoelectronic materials, which can impair sensor operation and, in some cases, lead to dielectric breakdown.

[0030] In the active pixel region 110, dummy pixel region 120, and dark pixel region 130, an isolation structure 108 (e.g., a deep trench isolation structure formed of at least one oxide material) is arranged to electrically and optically isolate individual photodiodes (e.g., active pixel photodiode 112, dummy pixel photodiode 122, and / or dark pixel photodiode 132). The isolation structure 108 may extend from a first side 103 of the semiconductor material 101 for at least a portion of the distance between the first side 103 and the second side 105. In some embodiments, the isolation structure 108 may be formed by a deposition and removal operation comprising (but not limited to) a patterned reactive ion etching of the semiconductor material 101, followed by deposition of a filler material (e.g., an oxide material, a low-n material, different dielectric materials, or combinations thereof) into the trench formed in the semiconductor material 101.

[0031] In some embodiments, the isolation structure 108 may be formed by patterning the removal of a semiconductor substrate material and subsequently depositing one or more dielectric materials. In some embodiments, the deposition may also comprise a metallic material, which may be a surface film (e.g., by prior deposition of a metallic material), a ceramic-metal mixture (e.g., by simultaneous deposition of a metal and oxide material), or a metal filler material deposited on a dielectric substrate (e.g., by prior deposition of a dielectric material). In some embodiments, the isolation structure 108 (see, for example, isolation structure 108-O) is formed of an antireflective layer 150, a buffer oxide layer 152, and may include a material layer between the antireflective layer 150 and the buffer oxide layer 152. In this manner, the antireflective layer 150, the buffer oxide layer 152, and the material layer (if included) (e.g., a diffusion barrier, a light-absorbing material, etc.) may at least partially cushion the isolation structure 108.

[0032] It should be understood that in some embodiments, at least one isolation structure 108 of the active pixel region 110, the dummy pixel region 120, and / or the dark pixel region 130 may be configured as isolation structure 108-O. In some embodiments, a surface passivation layer is disposed between the antireflective layer 150 and the buffer oxide layer 152 to sense hole accumulation regions near the buffer oxide layer 152. In this way, the surface passivation layer passivates surface defects and trench sidewall defects that may occur during manufacturing, which would otherwise affect the operation of the pixel photodiodes 112 and / or 132.

[0033] In some embodiments, a buffer layer 172 is disposed between the microlens 176 and the opaque layers 154 and / or 156. In some embodiments, the buffer layer 172 is a transparent (e.g., transparent to photons with characteristic energy of incident visible and / or invisible light) dielectric layer comprising an oxide-based material (e.g., SiO2) or a low-n material with a refractive index less than the corresponding refractive index of the semiconductor material 101, the color filter 174, and / or the microlens 176. In some embodiments, at least a portion of the buffer layer 172 has a thickness greater than 100 nm (e.g., 110 nm, 125 nm, 150 nm).

[0034] The peripheral region 140 may accommodate electronic and optical components included as part of the image sensor 100, including (but not limited to) the diagonal isolation structure 109, the ASIC 190, and / or the EM radiation source 195. (See preceding reference...) Figure 1A The EM radiation source 195 may include components or elements of the ASIC 190 that generate EM radiation, such as visible photons and / or thermal energy, which may induce non-uniform dark currents in the dark pixel region 130 and / or the active pixel region 110. In some embodiments, the EM radiation source 190 includes power supply circuitry configured to convert supply power (e.g., from a battery) into input power for the ASIC 190. For example, the power supply circuitry may include a voltage stepping circuitry to increase the input voltage from the battery supply voltage by several orders of magnitude.

[0035] Figure 2A and 2B This is a schematic diagram illustrating a conventional isolation structure commonly used to reduce the lateral transmission of electromagnetic radiation to active pixels in the active pixel area. Figure 2A Indicates corresponding to Figure 1B The simplified cross-sectional view of the section described herein has been removed to simplify visual interpretation. Therefore, Figure 2A Optoelectronic components, such as photodiodes, as well as polarizing filters, color filters, microlenses, overlays, and other components, are omitted to allow for a focus on describing the interaction between the isolation structure and the electromagnetic radiation delivered through the substrate of the image sensor.

[0036] Figure 2AThe isolation structure described herein represents a conventional rectangular lattice isolation structure in the active pixel region, dummy pixel region, and / or dark pixel region of a conventional image sensor, wherein the EM radiation source is included in or on the substrate as part of the miniaturized sensor device. The EM radiation source may be or be included in power supply circuitry or other electronic components that generate heat during operation. Therefore, EM radiation 205 is described as being delivered from the EM radiation source through the substrate toward the dark pixel region and / or dummy pixel region. (See reference...) Figure 1B To describe in more detail, an isolation structure is formed to limit crosstalk between pixels by reflecting and / or absorbing incident photons received through the first side of the image sensor. Therefore, Figure 2A and Figure 2B The isolation structures shown typically include sidewalls with sidewall angles approximately perpendicular to the first side. It is worth noting that... Figure 2A The sidewall angles are not scaled proportionally but are emphasized to illustrate the characteristic tapered shape of the isolation structure. In this way, at least a portion of the EM irradiation 205 generated by the EM radiation source delivered through the substrate will interact with the isolation structure at an incident angle substantially perpendicular to the sidewalls of the isolation structure. As understood by those skilled in the art of optics, EM radiation (including, but not limited to, photons) can be transmitted through or reflected from the material interface based at least in part on the ratio of the refractive indices of the materials forming the interface and the incident angle relative to the surface normal of the reflecting surface. Typically, the proportion of photons reflected at the interface increases with increasing incident angle relative to the surface normal (e.g., where the surface normal defines a zero-angle condition).

[0037] For the source of EM radiation 205 located in the peripheral area, a predictable portion of EM radiation 205 will be transmitted through several isolation structures, thereby allowing residual EM radiation 210 to reach active pixels, which may include dark pixels and / or active pixels. In some cases, a photodiode can detect the residual EM radiation 210, which can non-uniformly increase the dark current signal in a portion of the active pixels. This non-uniformity effect can degrade the performance of the image sensor by affecting pixels closer to the EM radiation source and pixels farther from the EM radiation source in different ways. When dark current is used to correct image data, non-uniformity in the dark current above the active pixel region 110 can significantly degrade image quality.

[0038] For reference Figures 1A to 1B and Figures 3A to 3CAs described in the embodiments of this disclosure, even when an isolation structure is placed between the dark pixel and / or the active pixel and the EM radiation source, residual EM radiation 210 will still be transmitted through a rectangular, regular isolation structure (e.g., a lattice of cells formed from an isolation structure material), not to mention a single isolation structure having generally vertical or narrow tapered sidewalls. It is understood that allowing residual EM radiation 210 to reach the active pixel before it is attenuated to a level that induces a negligible dark current in the photodiode of the affected area of ​​the active pixel, or no dark current in the photodiode of the affected area, will degrade sensor accuracy and performance by unevenly affecting the dark current in the affected area.

[0039] Figure 2B This is a top view of the rectangular lattice isolation structure and a schematic diagram illustrating the interaction between EM radiation 205 and the surface of the isolation structure. Figure 2B The views described herein represent views from the surface of a conventional image sensor, such as a first surface 103 or a second surface 105. (As in...) Figure 2A In this paper, components of a conventional image sensor are omitted to focus on the interaction between EM radiation 205 and the isolation structure. Therefore, from... Figure 2B The schematic diagram omits the overlay, underlay, and interstitial materials and structures, but should be understood as describing an isolation structure formed in a semiconductor substrate using CMOS-compatible manufacturing processes (e.g., patterned etching and deposition of the filling material), as shown in the reference. Figure 1B To describe in more detail.

[0040] As in Figure 2A An EM radiation source generates EM radiation 205, which is delivered toward the isolation structure via a semiconductor substrate. As an illustrative example, the EM radiation source is shown as an isotropic heat source (e.g., a point source) that generates EM radiation 205 (e.g., where the EM radiation source is a heat source, such as in the case where the EM radiation source is a power supply circuit or other electronic component emitting infrared photons). In this case, the EM radiation 205 can be delivered through the substrate in a linear direction toward the isolation structure and can interact with the isolation structure in a manner at least partially dependent on the refractive index of the substrate, the refractive index of the isolation structure, and the incident angle of the EM radiation 205, according to the physical principles of optics (e.g., partial refraction and partial reflection).

[0041] As explained, EM radiation incident on the surface of the isolation structure orthogonally aligned with the EM radiation source will approach the surface at a low angle of incidence (where 90 degrees corresponds to the surface and zero degrees corresponds to the surface normal). Under these conditions, the proportion of transmitted light will be significant and may exceed the proportion of reflected light, where the refractive index of the isolation structure material is lower than that of the semiconductor substrate material. Furthermore, the EM radiation 205 interacting with the lateral surface of the isolation structure will exhibit a low angle of incidence, making reflection advantageous when the isolation structure has a relatively low refractive index.

[0042] For small CMOS image sensors, the characteristic distance between the EM radiation source and the isolation structure can be on the order of micrometers or even nanometers. Therefore, the formation of hot pixels characterized by increased dark current, or the formation of one or more regions of hot pixels (with non-uniform dark current between said(s) regions and the residual active pixel), is more likely near the EM radiation source than far away. Understandably, the effects of residual EM radiation 210 reaching the active pixel include a reduction in the signal-to-noise ratio of the affected pixel, thereby impairing image processing (e.g., dark current correction) by affecting the pixel dark current in a non-uniform and unstable manner (at least in part due to dynamic changes in heat generated when the image sensor draws more or less power from the EM radiation source).

[0043] Figure 3A This is a schematic diagram illustrating an example image sensor 300 layout according to an embodiment of the present disclosure, including a diagonal isolation structure 109 configured to improve the isolation of active pixels 110. The example image sensor 300 includes a reference... Figure 1A The components described. For example, the example image sensor 300 includes an ASIC 190, which can be configured to be disposed in a peripheral region 140 of the example image sensor 300 that at least partially surrounds the active pixel region 110 and the dark pixel region 130. In the following description, the pixels of the active pixel region 110 are referred to as active pixels 110, and the pixels of the dark pixel region 130 are referred to as dark pixels 130.

[0044] For reference Figure 1A In more detail, the example image sensor 300 may include a power supply circuit 310, which includes one or more EM radiation sources 195, including (but not limited to) infrared radiation sources or other radiation sources that can induce increased dark current in the active pixel 110. One or more diagonal isolation structures 109 disposed between the active pixel 110 and the power supply circuit 310 may be configured relative to a reference... Figures 2A to 2B The described conventional image sensor reduces residual EM radiation 210 reaching the near-end region 315 of the active pixel 110 (reference). Figures 2A to 2B ) flux.

[0045] In illustrative examples, the EM radiation source 195 may include resistive elements exhibiting ohmic heating, voltage conversion elements of a power supply circuit 310 configured to boost voltage from a supply voltage (e.g., from a battery) to the input voltage of the ASIC 190, or other electronic components that generate heat as part of the operation. In the case of thermal coupling with the active pixel 110 via the substrate 101, the generated heat can be transported to the proximal region 315 of the active pixel through various physical mechanisms, including (but not limited to) conduction, radiation, etc. In some embodiments, the power supply circuit may generate EM radiation 205 comprising high-energy photons in the visible spectrum, but the transmission of visible photons through the substrate 101 may be limited.

[0046] In doing so, the power supply circuit 310 can emit EM radiation 205 that is isotropically or anisotropically distributed. For example, the resistive elements of the power supply circuit 310 can act as an isotropic point source of thermal radiation. In this way, the diagonal isolation structure 109, which is closer to the localized EM radiation source 195, can receive a higher incident flux of EM radiation 205. Thus, although the diagonal isolation structure 109 is shown to extend vertically to at least co-exist with the power supply circuit 310, at least some portions of the diagonal isolation structure 109 can be omitted, and the area of ​​the substrate can be repurposed for other purposes (e.g., ASIC 190, power supply circuit 310, other CMOS components, such as vias, etc.), wherein the EM radiation source 195 can be identified during the design of the power supply circuit 310 (e.g., through operational simulation) and the radiation transmission mode can be predetermined.

[0047] Using this information, the diagonal isolation structure 109 can be discontinuously positioned in one or more regions of the example image sensor 300 located near the EM radiation source 195 to attenuate the level of residual EM radiation 210 reaching the proximal region 315, while also reserving a limited substrate area for other applications. It should be understood that the specific location of the EM radiation source 195 may depend on the design of the power supply circuitry 310 and / or the ASIC 190 used. At least for this reason, the precise placement of the diagonal isolation structure 109 can be determined as part of the overall sensor design, rather than based on a priori specifications of the relative positions of the active pixel 110 and the ASIC 190 components of the example image sensor 300.

[0048] In some embodiments, the diagonal isolation structure may include sloping sidewalls to redirect EM radiation 205 away from the proximal region 325 in a third dimension, for example, through the first side 103 or through the second side 105. For example, in cases where EM radiation 205 includes thermal radiation, the diagonal isolation structure 305 may be configured to redirect EM radiation 205 toward a heat sink thermally coupled to the power supply circuitry 310 of the example image sensor 300 via the first side 103 and / or through the second side 105.

[0049] Figure 3B This is a schematic diagram illustrating an example diagonal isolation structure 320 configured as a lattice according to an embodiment of the present disclosure. The isolation structure 320 defines a first reflective surface 321-1 oriented at a first bias Θ1 relative to the array of active pixels 110, and a second reflective surface 321-2 oriented at a second bias Θ2 relative to the array of active pixels. In this context, the term "bias" refers to the angular orientation of reflective surfaces 321-1 and 321-2 relative to the respective vertical 325-axis and lateral 327-axis defined by the lattice of the isolation structure 108 for isolating the active pixels 110 in the active pixel region 110. Figure 3B Please refer to the explanation below. Figure 1B The diagram shows a plan view of the diagonal isolation structure 320 formed as described by the isolation structure 108. In an illustrative example, a uniform photoresist layer can be patterned using two separate patterns: a first pattern for forming the isolation structure 108 in the active pixel region 110, and a second pattern for forming the diagonal isolation structure 320 in the peripheral region 140. (See reference...) Figure 1B The subsequent removal and deposition operations, described in more detail, can be performed simultaneously to form isolation structure 108 and diagonal isolation structure without increasing the number and complexity of manufacturing operations.

[0050] In some embodiments, the first reflective surface 321-1 and the second reflective surface 321-2 are offset by equal and opposite angles relative to the lateral axis 327 to form a pair of complementary reflective surfaces, which are configured to redirect the incident EM radiation 205 away from the active pixel 110 by a pair of low-angle reflections. In some embodiments, the first and second offsets may be unequal as a method of redirecting the incident EM radiation 205 away from the active pixel 110 and the power supply circuit 310.

[0051] The first and / or second bias can be configured such that incident EM radiation 205 aligned or approximately aligned with the transverse axis 327 interacts with the first and / or second reflective surfaces 321-1 and 321-2 at an acute angle of incidence rather than a normal angle (e.g., 90 degrees relative to the respective reflective surfaces 321-1 or 321-2). See reference... Figure 2BAs described, lower incident angles (e.g., closer to grazing angles or angles close to zero degrees relative to the surface) are more likely to reflect incident radiation, wherein the refractive index of the reflecting surface is relatively low compared to the refractive index of the medium through which the radiation travels. Therefore, the first and / or second biases can be configured such that incident EM radiation 205 from the EM radiation source 195 near the near-end region 315 is incident at an incident angle that is likely to reflect the EM radiation 205. For this purpose, the first and / or second biases can range from about 10 degrees to about 90 degrees, from about 15 degrees to about 85 degrees, from about 20 degrees to about 80 degrees, from about 25 degrees to about 75 degrees, from about 30 degrees to about 70 degrees, from about 30 degrees to about 65 degrees, from about 30 degrees to about 60 degrees, from about 35 degrees to about 55 degrees, or from about 40 degrees to about 50 degrees, including their fractions and interpolations. For example, the first and / or second offset may be approximately 1 degree, approximately 2 degrees, approximately 3 degrees, approximately 4 degrees, approximately 5 degrees, approximately 6 degrees, approximately 7 degrees, approximately 8 degrees, approximately 9 degrees, approximately 10 degrees, approximately 15 degrees, approximately 20 degrees, approximately 25 degrees, approximately 30 degrees, approximately 35 degrees, approximately 40 degrees, approximately 45 degrees, approximately 50 degrees, approximately 55 degrees, approximately 60 degrees, approximately 65 degrees, or greater, including fractions and interpolations. The first and second offsets may be equal angles, opposite angles, or different angles. See reference... Figure 2B To describe in more detail, for an offset at an angle close to orthogonality to the incident EM radiation 205, reflection becomes less desirable compared to transmission as the refractive index transitions from a higher to a lower refractive index. For this reason, the diagonal isolation structure 320 can be configured at the design stage, at least in part, based on the location and intended orientation of the EM radiation source 195, such that the EM radiation 205 is redirected and / or reflected away from the near-end region 315.

[0052] In some embodiments, the first bias and / or the second bias may be determined at least in part based on the critical angle of internal reflection derived from Snell's law. For example, in the case where the substrate 101 has a higher refractive index than the diagonal isolation structure 320, there exists a critical angle in which EM radiation incident at an angle greater than the critical angle will be reflected. In this way, the first bias and / or the second bias may be approximately equal to or smaller than the critical angle of the paired materials, as described by the following expression: Where n1 represents the refractive index of a material with a higher refractive index.

[0053] The diagonal isolation structure 320 is illustrated as a repeating lattice of units defined by side length 330, with only a portion shown. Figure 3BThe ellipse “…” is used to indicate that the lattice can be extended in one or more directions to increase the size and number of cells of the diagonal isolation structure 320. In some embodiments, the lattice 320 may be a regular lattice that defines a substantially uniform side length for each of the reflective surfaces 321 comprising reflective surfaces 321-1 and / or 321-2, and thus defines the size of the cells constituting the lattice, which is substantially equal to the size of the active pixel 110 defined by the isolation structure 108. For example, the fabrication process for the diagonal isolation structure 320 may include optical lithographic patterning of a uniform photoresist layer disposed over the active pixel region 110 and the peripheral region 140, wherein the lattice pattern is transferred onto the active pixel region 110 to later define the isolation structure 108, thereafter the substrate is rotated relative to the optical lithography source (e.g., a laser), and the same lattice pattern is transferred onto the peripheral region 140 to later define the diagonal isolation structure 320. Although Figure 3B The diagonal isolation structure 320 is described as a regular rectangular / square lattice, but an irregular lattice can also be provided by spatial variations in the side length 330 and / or the first and / or second bias. Advantageously, introducing spatial variations in the lattice geometry can reduce the transmission of EM radiation 205 through vertices or other points in the diagonal isolation structure 320, as shown in the reference. Figure 3D A more detailed description is provided below.

[0054] Therefore, a side length of 330 can be approximated to the size of the active pixel 110, including (but not limited to) approximately 0.1μm, approximately 0.2μm, approximately 0.3μm, approximately 0.4μm, approximately 0.5μm, approximately 0.6μm, approximately 0.7μm, approximately 0.8μm, approximately 0.9μm, approximately 1μm, approximately 1.1μm, approximately 1.2μm, approximately 1.3μm, approximately 1.4μm, approximately 1.5μm, approximately 1.6μm, approximately 1.7μm, approximately 1.8μm, approximately 1.9μm, approximately 2.0μm, approximately 2.5μm, approximately 3.0μm, and approximately 3.5μm. μm, approximately 4.0 μm, approximately 4.5 μm, approximately 5.0 μm, approximately 5.5 μm, approximately 6.0 μm, approximately 6.5 μm, approximately 7.0 μm, approximately 7.5 μm, approximately 8.0 μm, approximately 8.5 μm, approximately 9.0 μm, approximately 9.5 μm, approximately 10.0 μm, approximately 10.5 μm, approximately 11.0 μm, approximately 11.5 μm, approximately 12.0 μm, approximately 12.5 μm, approximately 13.0 μm, approximately 13.5 μm, approximately 14.0 μm, approximately 14.5 μm, approximately 15.0 μm or larger, including fractions and interpolations. However, the side length 330 can actually be limited by the spatial constraint of the peripheral region 140 between the near-end region 315 and the EM radiation source 195. Furthermore, the smaller side length 330 corresponds to a denser lattice structure with more repeating examples of the first reflective surface 321-1 and the second reflective surface 321-2 above a given region. Advantageously, placing a larger number of reflective surfaces between the EM radiation source 195 and the near-end region 315 increases the attenuation of the EM radiation 205, thereby reducing the flux of residual EM radiation 210 reaching the near-end region 315. However, due to the lower manufacturability constraints of the side length 330, the first reflective surface 321-1 and the second reflective surface 321-2 may be blurred. Therefore, an effective lower limit for the side length can be imposed by the process parameters and / or constraints of the semiconductor manufacturing process used to manufacture the example image sensor 300.

[0055] Figure 3C This is a schematic diagram illustrating an example array 350 of a diagonal isolation structure 355 configured to improve the isolation of active pixels 110 according to an embodiment of the present disclosure. See reference... Figure 3B In more detail, the diagonal isolation structure 355 may be disposed in the peripheral region 140 between the EM radiation source 195 and the near-end region 315, such that the EM radiation 205 incident on the diagonal isolation structure 355 is attenuated, thereby reducing the residual EM radiation 210 to a degree to which the flux of the residual EM radiation entering the near-end region 315 induces a negligible non-uniform dark current in the active pixel region 110 or no non-uniform dark current in the active pixel region 110. In this context, "negligible" is used to indicate that in some examples, for example, by calibrating the example image sensor 300, a non-zero dark current attributable to the residual EM radiation 210 in the near-end region 315 is tolerable, which is relevant to the reference... Figures 2A to 2B The relatively high throughput exhibited by the described isolation structure is unavailable.

[0056] Similar to the diagonal isolation structure 320, the diagonal isolation structure 355 defines the first reflective surface 321-1 and the second reflective surface 321-2 according to the first bias and the second bias, respectively. Similarly, reflective surfaces 321-1 and / or 321-2 can be described by side length 330, as shown in reference... Figure 3B A more detailed description follows. In some embodiments, the diagonal isolation structure 355 includes multiple repeating examples of the first reflective surface 321-1 and the second reflective surface 321-2 to define a "zigzag" structure comprising multiple pairs of reflective surfaces that together act as a retroreflector of the incident EM radiation 205. Similar to the diagonal isolation structure 320, the ellipse "..." is used to indicate that the instance array 350 may contain more or fewer than four diagonal isolation structures 355, and that individual diagonal isolation structures may contain more or fewer than four examples of reflective surfaces 321-1 and 321-2. In some embodiments, the instance array 350 includes one, two, three, four, five, six, seven, eight, nine, ten, or more diagonal isolation structures 355. Understandably, the number of diagonal isolation structures 355 may be constrained by a lower manufacturability limit under which the structure will be distinct in the manufactured image sensor and an upper limit set by the area available for the instance array 350.

[0057] Advantageously, the diagonal isolation structures 355 can be formed in the substrate 101 without bridging between individual isolation structures 355. Thus, incident EM radiation 205 partially transmitted to the material of the diagonal isolation structures 355 can be isolated within the diagonal isolation structures 355 (e.g., by internal reflection) and not transported to a location closer to the proximal region 315. Additionally, the diagonal isolation structures 355 can be offset relative to each other, as referenced. Figure 3D In more detail, as a limit for EM radiation 205 through the vertex 387 of the joint reflective surface 321 (see reference) Figure 3D The method of transmission.

[0058] Figure 3D This is a schematic diagram illustrating an example interleaved array 370 of a diagonal isolation structure 355 configured to improve the isolation of active pixels according to an embodiment of the present disclosure. The example interleaved array 370 is... Figure 1A An instance of the diagonal isolation structure 109, and like the instance array 350, is Figure 3AAn example of a diagonal isolation structure 305. The staggered array 370 includes a first subset 375 of the diagonal isolation structure 355 and a second subset 380 of the diagonal isolation structure 355. In the example staggered array 370, the first subset 375 is offset vertically 385 from the second subset 380 along the vertical axis 325 and laterally 395 along the horizontal axis 327. In some embodiments, the horizontal offset 395 may correspond to the side length 330, for example, in the range of about 0.1 μm to about 15 μm. For example, the lateral offset can be approximately 0.1 μm, approximately 0.2 μm, approximately 0.3 μm, approximately 0.4 μm, approximately 0.5 μm, approximately 0.6 μm, approximately 0.7 μm, approximately 0.8 μm, approximately 0.9 μm, approximately 1 μm, approximately 1.1 μm, approximately 1.2 μm, approximately 1.3 μm, approximately 1.4 μm, approximately 1.5 μm, approximately 1.6 μm, approximately 1.7 μm, approximately 1.8 μm, approximately 1.9 μm, approximately 2.0 μm, approximately 2.5 μm, approximately 3.0 μm, approximately 3.5 μm, approximately 4.0 μm, approximately... 4.5 μm, approximately 5.0 μm, approximately 5.5 μm, approximately 6.0 μm, approximately 6.5 μm, approximately 7.0 μm, approximately 7.5 μm, approximately 8.0 μm, approximately 8.5 μm, approximately 9.0 μm, approximately 9.5 μm, approximately 10.0 μm, approximately 10.5 μm, approximately 11.0 μm, approximately 11.5 μm, approximately 12.0 μm, approximately 12.5 μm, approximately 13.0 μm, approximately 13.5 μm, approximately 14.0 μm, approximately 14.5 μm, approximately 15.0 μm or greater, including fractions and interpolations. Generally, smaller pitch allows for a larger number of diagonal isolation structures 355 within the instance array 350. The lower limit of the pitch may be based at least in part on maintaining the separation between the diagonal isolation structures 355. The upper limit of the pitch may be based at least in part on area constraints in the peripheral region 140.

[0059] As described with reference to example array 350, example interleaved array 370 may include more or fewer than four diagonal isolation structures 355, and may extend in any vertical direction to include more than four examples of first reflective surfaces 321-1 and / or 321-2. (Referring to reference...) Figures 3B to 3C As with the previously described isolation structure, the reflective surface 321 defined by the diagonal isolation structure 355 is configured to attenuate EM radiation 205 by pairing a first reflection 371-1 with a second reflection 371-2 made by the first reflective surface 321-1 and the second reflective surface 321-2. It should be understood that the first reflection 371-1 may occur on either the first reflective surface 321-1 or the second reflective surface 321-2, as illustrated by the different rays of EM radiation 205.

[0060] At the junction between the reflective surfaces 321, a diagonal isolation structure 355 defines a vertex 381, including a first vertex 387-1 and a second vertex 387-2. Using vertex 381 as a reference, a vertical offset 385 can be approximately half the vertical distance 395 between the first vertex 387-1 and the second vertex 387-2. Advantageously, the staggered array 370 is configured with a vertical offset that allows EM radiation 205 to be incident on the vertices 387 of the diagonal isolation structure 355 of the first subset 375, wherein EM radiation 205 is more likely to be transmitted to be reflected by the diagonal isolation structure 355 of the second subset 380 than EM radiation 205 incident on the reflective surface 321. Where the vertical offset 385 is approximately half the vertical distance 395, paired reflections 371 will redirect EM radiation passing through adjacent vertices 387.

[0061] In some embodiments, the vertical offset 385 may be greater than or less than the vertical distance 395. Advantageously, this configuration can be used to retain EM radiation in the substrate 101 between the diagonal isolation structures 355 for removal by the first surface 103 and / or the second surface 105, rather than redirecting it to the EM radiation source 195.

[0062] It should be understood that existing CMOS fabrication techniques can be used to implement the fabrication of the diagonal isolation structure 109 (e.g., as in...). Figures 3A to 3D The various process steps involved in the diagonal isolation structure 305 described herein include, but are not limited to, photolithography, metal deposition (e.g., atomic layer deposition, physical vapor deposition, thermal evaporation, magnetron sputtering, or the like), etching techniques (e.g., dry etching techniques, such as plasma etching, wet etching techniques, such as chemical etching, or the like), and planarization techniques (e.g., chemical mechanical polishing). It should be understood that CMOS manufacturing systems typically reproduce patterns within process tolerances that allow for some degree of deviation from the precise design. Edge placement error (EPE) is an example figure of merit used to describe the precision and accuracy of CMOS processes, where EPE values ​​below the allowable tolerance may contain tolerable deviations.

[0063] In some cases, tolerances may be based at least in part on the functionality of the resulting structure. For example, for diagonally isolated structures 320 and / or 355, attenuation of residual EM radiation 210 below a tolerable level (e.g., through undetectable or virtually undetectable dark signals from the proximal region 315) can be used as a criterion for determining manufacturing precision tolerances. In this way, the term “substantially” in the context of “substantially aligned,” “substantially parallel,” “substantially orthogonal,” or the like can be interpreted as indicating a structure exhibiting the stated properties within manufacturing tolerances. Similarly, the term “substantially,” which includes (but is not limited to) the use of “substantially” to describe minor or tolerable deviations from the stated conditions or properties, can be understood to apply to structures manufactured according to a design incorporating the stated conditions or properties, where the manufacturing process may introduce tolerable deviations.

[0064] Figure 4 This is a functional block diagram of an imaging system 402 including an image sensor 400 with a diagonally isolated structure, according to the teachings of this disclosure. The image sensor 400 may have corresponding... Figures 1A to 1B The image sensor 100 and / or described herein Figure 3A The structure of the example image sensor 300 described herein. The imaging system 402 includes an image sensor 400 that generates an electrical or image signal in response to incident light 470, an objective lens 465 having adjustable optical power to focus on one or more points of interest within an external scene 403, and a controller 450 that controls, in particular, the operation of the image sensor 400 and the objective lens 465. The image sensor 400 is... Figures 1A to 1B The image sensor 100 and / or described herein Figure 3A The example image sensor 300 described herein is one possible implementation. The image sensor 400 is a simplified schematic diagram showing a semiconductor material 401 (in which a plurality of photodiodes 405 are disposed within corresponding portions of the semiconductor material 401), a plurality of color filters 410, and a plurality of microlenses 415. The controller 450 includes one or more processors 452, a memory 454, a control circuit system 456, a readout circuit system 458, and functional logic 460.

[0065] Controller 450 includes logic and / or circuitry to control the operation of various components of imaging system 402 (e.g., in the pre-, post-, and in-situ stages of image and / or video acquisition). Controller 450 may be implemented as hardware logic (e.g., application-specific integrated circuit, field-programmable gate array, system-on-a-chip, etc.), software / firmware logic executing on a general-purpose microcontroller or microprocessor, or a combination of both. In one embodiment, controller 450 includes processor 452 coupled to memory 454, which stores instructions executed by controller 450 and / or one or more other components of imaging system 402. When executed, these instructions cause imaging system 402 to perform operations associated with various functional modules, logic blocks, or circuitry of imaging system 402, including control circuitry 456, readout circuitry 458, functional logic 460, image sensor 400, objective lens 465, and another element of imaging system 402 (illustrated or otherwise). The memory is a non-transitory computer-readable medium that may contain (but is not limited to) volatile (e.g., RAM) or non-volatile (e.g., ROM) storage systems that can be read by the controller 450. It should be further understood that the controller 450 may be a monolithic integrated circuit, one or more discrete interconnected electrical components, or a combination thereof. Additionally, in some embodiments, one or more electrical components may be coupled together to collectively serve as the controller 450 for orchestrating the operation of the imaging system 402.

[0066] Control circuitry 456 controls the operating characteristics of photodiode array 405 (e.g., exposure duration, when digital images or videos are captured, and the like). Readout circuitry 458 reads or otherwise samples analog signals from individual photodiodes (e.g., reads electrical signals generated by each of the plurality of photodiodes 405 in response to incident light to generate image signals for capturing image frames, and the like), and may include amplification circuitry, analog-to-digital (ADC) circuitry, image buffers, or others. In the illustrated embodiment, readout circuitry 458 is included in controller 450, but in other embodiments, readout circuitry 458 may be decoupled from controller 450. Functional logic 460 is coupled to readout circuitry 458 to receive image data to de-mosaic image data and generate one or more image frames. In some embodiments, electrical signals and / or image data may be manipulated or otherwise processed by functional logic 460 (e.g., applying post-image effects, such as cropping, rotation, red-eye removal, brightness adjustment, contrast adjustment, or others).

[0067] The above process can be implemented using software and / or hardware. The described techniques can constitute machine-executable instructions embodied in a tangible or non-transitory machine-readable storage medium, said instructions being executed by a machine (e.g., a computer). Figure 4 When the controller 450 is executed, it will cause the machine to perform the described operations. Alternatively, the process may be implemented in hardware, such as an application-specific integrated circuit (“ASIC”), a field-programmable gate array (FPGA), or other means.

[0068] Tangible machine-readable storage media include mechanisms that provide (i.e., store) information in a non-transitory form accessible to a machine (e.g., a computer, network device, personal digital assistant, manufacturing tool, device having one or more processors, etc.). For example, machine-readable storage media include recordable / non-recordable media (e.g., read-only memory (ROM), random access memory (RAM), disk storage media, optical storage media, flash memory devices, etc.).

[0069] It is not intended that the above description of the illustrative examples of the invention (including those described in the abstract) be exhaustive or limit the invention to the specific forms disclosed. Although specific examples of the invention are described herein for illustrative purposes, those skilled in the art will recognize that various modifications are possible within the scope of the invention.

[0070] These modifications can be made to the invention based on the above detailed description. The terminology used in the appended claims should not be construed as limiting the invention to the specific instances disclosed in this specification. Rather, the scope of the invention should be fully defined by the appended claims, which should be interpreted according to the established principles of claim interpretation.

Claims

1. An image sensor, comprising: An electromagnetic radiation source is placed in the peripheral region of the substrate; A pixel array, which is disposed in an active pixel region on the substrate and thermally coupled to the electromagnetic radiation source; as well as An isolation structure is disposed in the peripheral region on the substrate between the electromagnetic radiation source and the pixel array, the isolation structure defining a first reflective surface oriented on a first bias relative to the lateral axis of the pixel array and a second reflective surface oriented on a second bias relative to the lateral axis. The isolation structure is configured to attenuate residual electromagnetic radiation reaching the near-end region of the pixel array by pairing the first reflection and the second reflection of the electromagnetic radiation by the first reflective surface and the second reflective surface, and the isolation structure includes a diagonal isolation structure array, the diagonal isolation structure including a first subset of diagonal isolation structures and a second subset of diagonal isolation structures.

2. The image sensor according to claim 1, wherein the first reflective surface and the second reflective surface reflect electromagnetic radiation in the infrared energy range.

3. The image sensor of claim 1, wherein the first bias describes a first angle of less than 90 degrees relative to the lateral axis.

4. The image sensor of claim 3, wherein the first angle relative to the lateral axis is from 30 degrees to 60 degrees.

5. The image sensor of claim 4, wherein the first angle relative to the lateral axis is 45 degrees.

6. The image sensor of claim 4, wherein the first angle relative to the lateral axis is less than or equal to the critical angle for internal reflection of the substrate and the isolation structure.

7. The image sensor of claim 6, wherein the second bias describes a second angle from 30 degrees to 60 degrees relative to the lateral axis.

8. The image sensor of claim 7, wherein the second angle relative to the lateral axis is symmetrical to the first angle relative to the lateral axis.

9. The image sensor of claim 1, wherein the first reflective surface or the second reflective surface has a side length from 0.1 μm to 20 μm.

10. The image sensor of claim 9, wherein the diagonal isolation structure of the diagonal isolation structure array defines a third reflective surface oriented on the first bias, and wherein the second reflective surface is adjacent to the first reflective surface and the third reflective surface.

11. The image sensor of claim 9, wherein the isolation structure comprises silicon oxide.

12. The image sensor of claim 9, wherein the substrate defines a lateral axis and a vertical axis perpendicular to the lateral axis, wherein the first subset of the diagonal isolation structure is laterally offset from the second subset of the diagonal isolation structure along the lateral axis, and wherein the first subset of the diagonal isolation structure is vertically offset from the second subset of the diagonal isolation structure along the vertical axis.

13. The image sensor of claim 12, wherein the diagonal isolation structure of the first subset of the diagonal isolation structure includes a first vertex and a second vertex, and wherein the vertical offset is approximately half the vertical distance between the first vertex and the second vertex.

14. An isolation structure comprising: A substrate comprising an active pixel region and a peripheral region, the peripheral region comprising a plurality of diagonal isolation structures located within the peripheral region, the substrate defining a lateral axis and a vertical axis perpendicular to the lateral axis. The diagonal isolation structure of the plurality of diagonal isolation structures defines a first reflective surface oriented on a first bias relative to the lateral axis and a second reflective surface oriented on a second bias relative to the lateral axis. Furthermore, the diagonal isolation structure is configured to attenuate the electromagnetic radiation by pairing the first reflection and the second reflection of the electromagnetic radiation by the first reflective surface and the second reflective surface.

15. The isolation structure of claim 14, wherein the first offset describes a first angle from 30 degrees to 60 degrees relative to the lateral axis.

16. The isolation structure of claim 15, wherein the second offset describes a second angle relative to the lateral axis, the second angle relative to the lateral axis being symmetrical to the first angle relative to the lateral axis.

17. The isolation structure of claim 14, wherein the first reflective surface or the second reflective surface has a side length from 0.1 μm to 20 μm.

18. The isolation structure of claim 14, wherein a first subset of the diagonal isolation structures of the plurality of diagonal isolation structures is offset vertically along the vertical axis from a second subset of the diagonal isolation structures of the plurality of diagonal isolation structures.

19. The isolation structure of claim 18, wherein the diagonal isolation structure of the first subset of the diagonal isolation structure includes a first vertex and a second vertex, and wherein the vertical offset is half the length between the first vertex and the second vertex of the projection of the groove onto the vertical axis.

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