Memory space crash positioning method and device, equipment and storage medium

Abstract

The application discloses a memory space crash positioning method and device, equipment and storage medium, and belongs to the computer technical field. The application obtains the crash information corresponding to the first memory space when detecting that the first memory space crashes; the second memory space analyzes the crash information to obtain the crash stack information; and the first memory space is positioned according to the crash stack information. When the first memory space crashes, the second memory space analyzes the crash information of the first memory space to obtain the crash stack information, and then the crash of the first memory space is positioned according to the crash stack information. When the arm space crashes, the x86 space can be used for analysis to position the crash of the arm space, and the accuracy of the crash positioning is improved.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a method, apparatus, device, and storage medium for locating memory space crashes. Background Technology

[0002] When a crash occurs in ARM space, the target stack needs to be output to facilitate problem localization. The interpreter executes translated x86 code, which is dynamically generated and different from the original function. If the original function has a branch case, a new translation block is generated. The functions are distributed in non-contiguous address spaces. When a crash occurs while executing instructions in ARM space, the crash stack is in x86 space, not the target stack, and the specific code in ARM space cannot be located. Current technology cannot accurately locate the problem when a crash occurs in ARM space.

[0003] The above content is only used to help understand the technical solution of the present invention and does not represent an admission that the above content is prior art. Summary of the Invention

[0004] The main objective of this invention is to provide a method, apparatus, device, and storage medium for locating memory space crashes, aiming to solve the technical problem that existing technologies cannot accurately locate crashes in ARM memory.

[0005] To achieve the above objectives, the present invention provides a method for locating memory space crashes, the method comprising the following steps:

[0006] When a crash is detected in the first memory space, the crash information corresponding to the first memory space is obtained;

[0007] The crash information is parsed using the second memory space to obtain the crash stack information;

[0008] The first memory space is located based on the crash stack information.

[0009] Optionally, parsing the crash information through the second memory space to obtain crash stack information includes:

[0010] The abnormal instruction information that caused the first memory space to crash is determined based on the crash information;

[0011] Extract processor information associated with the first memory space from the crash information;

[0012] The crash stack information is obtained based on the abnormal instruction information and the processor information.

[0013] Optionally, obtaining the crash stack information based on the abnormal instruction information and the processor information includes:

[0014] The address information corresponding to the abnormal instruction information is obtained by using the instruction counter based on the processor information;

[0015] The crash stack information is obtained based on the address information.

[0016] Optionally, obtaining the crash stack information based on the address information includes:

[0017] The address information is parsed by calling a preset function to obtain the crash stack information.

[0018] Optionally, the preset function includes: a first preset function and a second preset function;

[0019] The process of calling a preset function to parse the address information and obtain the crash stack information includes:

[0020] Call the first preset function to obtain the symbol information corresponding to the address information;

[0021] The second preset function is invoked to determine the backtrack segment node corresponding to the address information;

[0022] The crash stack information is obtained based on the symbol information and the backtracking segment nodes.

[0023] Optionally, obtaining the crash stack information based on the symbol information and the backtrack segment nodes includes:

[0024] Obtain the current stack frame when the first memory space crashes;

[0025] Based on the symbol information and the backtracking segment node, the current stack frame is backtracked to obtain the crash stack information.

[0026] Optionally, the step of backtracking the current stack frame based on the symbol information and the backtracking segment node to obtain crash stack information includes:

[0027] Based on the current stack frame, the first memory space is extracted according to the symbol information and the backtracking segment node to obtain multiple stack frames corresponding to the first memory space.

[0028] Select the target stack frame from the plurality of stack frames;

[0029] The crash stack information is obtained based on the target stack frame.

[0030] Optionally, the step of extracting stack frames from the first memory space based on the current stack frame according to the symbol information and the backtracking segment node to obtain multiple stack frames corresponding to the first memory space includes:

[0031] The memory space and address information of the current stack frame are determined based on the backtrack segment node;

[0032] Based on the memory space of the current stack frame and the address information, multiple stack frames are extracted sequentially from the first memory space.

[0033] Optionally, selecting the target stack frame from the plurality of stack frames includes:

[0034] The top stack frame is selected from the multiple stack frames according to the stack frame extraction order;

[0035] Use the top stack frame as the target stack frame.

[0036] Optionally, the step of locating the crash in the first memory space based on the crash stack information includes:

[0037] Extract the exception code from the crash stack information;

[0038] The first memory space is located based on the exception code.

[0039] Furthermore, to achieve the above objectives, the present invention also proposes a memory space crash location device, the memory space crash location device comprising:

[0040] The detection module is used to obtain the crash information corresponding to the first memory space when a crash is detected in the first memory space;

[0041] The parsing module is used to parse the crash information through the second memory space to obtain crash stack information;

[0042] The location module is used to locate the first memory space based on the crash stack information.

[0043] Optionally, the parsing module is further configured to determine, based on the crash information, the abnormal instruction information that caused the first memory space to crash; extract processor information associated with the first memory space from the crash information; and obtain crash stack information based on the abnormal instruction information and the processor information.

[0044] Optionally, the parsing module is further configured to obtain the address information corresponding to the abnormal instruction information based on the processor information using an instruction counter; and obtain crash stack information based on the address information.

[0045] Optionally, the parsing module is further configured to call a preset function to parse the address information and obtain crash stack information.

[0046] Optionally, the preset function includes: a first preset function and a second preset function;

[0047] The parsing module is further configured to call the first preset function to obtain the symbol information corresponding to the address information; call the second preset function to determine the backtracking segment node corresponding to the address information; and obtain the crash stack information based on the symbol information and the backtracking segment node.

[0048] Optionally, the parsing module is further configured to obtain the current stack frame when the first memory space crashes; and to backtrack the current stack frame based on the symbol information and the backtracking segment node to obtain crash stack information.

[0049] Optionally, the parsing module is further configured to extract stack frames from the first memory space based on the current stack frame according to the symbol information and the backtracking segment node, to obtain multiple stack frames corresponding to the first memory space; select a target stack frame from the multiple stack frames; and obtain crash stack information based on the target stack frame.

[0050] Optionally, the parsing module is further configured to determine the memory space and address information of the current stack frame based on the backtrace segment node; and to extract multiple stack frames sequentially from the first memory space based on the memory space and address information of the current stack frame.

[0051] Furthermore, to achieve the above objectives, the present invention also proposes a memory space crash location device, which includes: a memory, a processor, and a memory space crash location program stored on the memory and running on the processor, wherein the memory space crash location program is configured to implement the memory space crash location method as described above.

[0052] In addition, to achieve the above objectives, the present invention also proposes a storage medium storing a memory space crash location program, wherein the memory space crash location program, when executed by a processor, implements the memory space crash location method as described above.

[0053] This invention obtains crash information corresponding to the first memory space when a crash is detected; parses the crash information through a second memory space to obtain crash stack information; and locates the crash in the first memory space based on the crash stack information. Specifically, when a crash occurs in the first memory space, the crash information is parsed through the second memory space to obtain crash stack information, and then the crash in the first memory space is located based on the crash stack information. This improves the accuracy of crash location by allowing the x86 space to parse and locate the crash in the ARM space when a crash occurs in the ARM space, thus enhancing the accuracy of crash location. Attached Figure Description

[0054] Figure 1This is a schematic diagram of the structure of the memory space crash location device in the hardware operating environment involved in the embodiments of the present invention;

[0055] Figure 2 This is a flowchart illustrating the first embodiment of the memory space crash location method of the present invention;

[0056] Figure 3 This is a schematic diagram of the overall scheme flow in one embodiment of the memory space crash location method of the present invention;

[0057] Figure 4 This is a flowchart illustrating the second embodiment of the memory space crash location method of the present invention;

[0058] Figure 5 This is a flowchart illustrating the third embodiment of the memory space crash location method of the present invention;

[0059] Figure 6 This is a structural block diagram of the first embodiment of the memory space crash location device of the present invention.

[0060] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0061] It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of the invention.

[0062] Reference Figure 1 , Figure 1 This is a schematic diagram of the memory space crash location device in the hardware operating environment involved in the embodiments of the present invention.

[0063] like Figure 1As shown, the memory space crash location device may include: a processor 1001, such as a central processing unit (CPU), a communication bus 1002, a user interface 1003, a network interface 1004, and a memory 1005. The communication bus 1002 is used to establish communication between these components. The user interface 1003 may include a display screen or an input unit such as a keyboard; optionally, the user interface 1003 may also include a standard wired interface or a wireless interface. The network interface 1004 may optionally include a standard wired interface or a wireless interface (such as a Wireless-Fidelity (Wi-Fi) interface). The memory 1005 may be a high-speed random access memory (RAM) or a stable non-volatile memory (NVM), such as a disk drive. The memory 1005 may also optionally be a storage device independent of the aforementioned processor 1001.

[0064] Those skilled in the art will understand that Figure 1 The structure shown does not constitute a limitation on the memory space crash location device and may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0065] like Figure 1 As shown, the memory 1005, which serves as a storage medium, may include an operating system, a network communication module, a user interface module, and a memory space crash location program.

[0066] exist Figure 1 In the memory space crash location device shown, the network interface 1004 is mainly used for data communication with the network server; the user interface 1003 is mainly used for data interaction with the user; the processor 1001 and the memory 1005 in the memory space crash location device of the present invention can be set in the memory space crash location device, and the memory space crash location device calls the memory space crash location program stored in the memory 1005 through the processor 1001 and executes the memory space crash location method provided in the embodiment of the present invention.

[0067] This invention provides a method for locating memory space crashes, referring to... Figure 2 , Figure 2 This is a flowchart illustrating the first embodiment of a memory space crash location method according to the present invention.

[0068] In this embodiment, the memory space crash location method includes the following steps:

[0069] Step S10: When a crash is detected in the first memory space, obtain the crash information corresponding to the first memory space.

[0070] In this embodiment, the executing entity can be a memory space crash location device. The memory space crash location device can be an electronic device such as a personal computer or a server, or it can be another server in an air conditioner that can perform the same or similar functions. This embodiment does not limit this. In this embodiment and the following embodiments, the memory space crash location device is used as an example to illustrate the memory space crash location method of the present invention.

[0071] It's important to clarify that ARM and x86 refer to different processor architectures. ARM, or Advanced Reduced Instruction Set Machine (RISC) architecture, is a 32-bit Reduced Instruction Set Computing (RISC) processor architecture widely used in many embedded system designs. Due to its energy-efficient nature, ARM processors are well-suited for mobile communications, aligning with its primary design goal of low power consumption. The x86 architecture, including the Intel 8086, 80186, 80286, 80386, and 80486, is a Complex Instruction Set Computing (CISC) architecture. It contains many machine instructions designed to efficiently complete a specific task (such as instructions in MMX and SSE). Compared to ARM, x86's primary design goal is high performance.

[0072] Furthermore, when the ARM memory space crashes, the crash stack needs to be located within the ARM memory space, which is equivalent to locating the crash in the ARM memory space. However, the interpreter connected to the ARM memory space executes translated x86 code, and this x86 code is dynamically generated, unlike the original function. The original function generates a new translation block whenever there is a branch case, and the functions are distributed in non-contiguous address spaces. When the ARM memory space crashes, the crash stack is in the x86 space, and current technology cannot locate the crash stack in the ARM memory space.

[0073] To address the aforementioned technical issues, this embodiment uses x86 memory space to parse the crashed ARM memory space, thereby locating the crash in the ARM memory space. Specifically, this can be achieved as follows.

[0074] In this specific implementation, when a crash is detected in the first memory space, the crash information corresponding to the first memory space needs to be obtained. In this embodiment, the first memory space refers to the ARM memory space.

[0075] In specific implementation, this embodiment can detect whether the first memory space has crashed based on the detection command input by the user. It can also set a preset period, and automatically perform a crash detection on the first memory space every preset period. The preset period can be set according to actual needs, and the above detection methods can also be selected according to actual detection needs. This embodiment does not impose any restrictions.

[0076] It's important to note that x86 does not have unaligned exceptions, but ARM and MIPS do. Therefore, different CPU architectures require specific checks of their exception vector tables to identify the exception type. Understanding the different exception types provides a fundamental direction for problem analysis and a general approach to solving them. More mature exception management mechanisms typically provide more exception-related information through the operating system, making it easier to determine the exception's origin, such as whether it occurred in kernel or user mode. Based on the code context in which the exception occurred, the fault type can be determined. For example, ARM memory space crashes usually occur when an error happens during the execution of a specific instruction, such as accessing an invalid address due to an illegal address.

[0077] In specific implementation, this embodiment combines Figure 3 This section explains the process of analyzing the relevant information when a crash occurs in the x86 memory space accessing the ARM memory space.

[0078] exist Figure 3In the x86 memory space, CPU-related information (e.g., R0 to R16) is first retrieved from the ARM memory space. Then, the `dladdr` function in the ARM memory space is called with `pc` as the parameter. Based on the CPU-related information obtained above, the corresponding symbol name and the file name where the symbol is located are resolved. Next, `pc = lr`, and the `linker.dl_iterate_phdr(pc)` function is called to extract the unwind segment node corresponding to the address. Finally, based on the unwind segment node, the current function stack frame size, `lr`, and `sp` (current function) are calculated. The above steps can recursively extract the stack space in the ARM memory space. By repeating the above steps, the entire stack space in the ARM memory space can be obtained. The top of the stack is the stack space where the crash occurred, thus completing the crash location of the ARM memory space. Among them, `Pc`: Instruction Counter, used to store the address of the instruction to be executed. It has a direct path to the MAR in main memory and has the function of incrementing by 1 to form the address of the next instruction. `Sym`: The `sym` function is used to create symbolic numbers, symbolic variables, and symbolic objects. The symbol object's type is sym, which can be verified using class(S), where S is a symbol object. File: In Windows, it refers to the various data decompression formats within a folder. It's also an IT term for "file transfer protocol" and a programming language's file command. Lr: LR (LinkRegister), a special function in the ARM architecture: 1) to store subroutine return addresses; 2) when an exception occurs, the value stored in LR equals the PC value at the time of the exception minus 4 (or 2), allowing execution to return to the previous location before the exception occurred based on the LR value in various exception modes. Sp: The stack pointer always points to the top of the stack. Generally, the bottom of the stack cannot be moved, so before pushing data onto the stack, the stack pointer must be modified to point to new free space, and the data is stored thereafter; the reverse is true when popping data from the stack. dladdr: A function that retrieves symbol information for a specific address. The linker.dl_iterate_phdr(pc) function is used to extract the unwind segment node corresponding to the address.

[0079] It should be noted that the crash information corresponding to the first memory space obtained in this embodiment includes, but is not limited to, processor information associated with the first memory space (arm memory space), processor instructions executed in the arm memory space at the time of the crash, and the address and symbol information of the instructions. This embodiment does not impose any restrictions on these.

[0080] Step S20: Parse the crash information through the second memory space to obtain crash stack information.

[0081] In practical implementation, when a crash occurs in the first memory space, it is impossible to directly locate the first memory space. In this embodiment, the crash information obtained is parsed through the second memory space to locate the crash in the first memory space. The second memory space in this embodiment refers to the x86 memory space. By parsing the second memory space, the stack in the first memory space can be extracted, thereby locating the information of the crashed stack, i.e., the crash stack information. In this embodiment, the dladdr function and the linker.dl_iterate_phdr(pc) function can be used to parse the crash information. The dladdr function is used to obtain the symbol information of the address, and the linker.dl_iterate_phdr(pc) function is used to extract the unwind segment node corresponding to the address. Furthermore, other functions can be used to parse the crash information for different needs; this embodiment does not impose any restrictions on this.

[0082] Step S30: Locate the crash in the first memory space based on the crash stack information.

[0083] In practice, after obtaining the crash stack information, the space stack in the first memory space where the crash occurred can be determined based on the crash stack information. The purpose of crash localization in the first memory space is to find the space stack in the first memory space that caused the crash.

[0084] This embodiment obtains crash information corresponding to the first memory space when a crash is detected in the first memory space; it then parses the crash information through the second memory space to obtain crash stack information; and finally locates the crash in the first memory space based on the crash stack information. By parsing the crash information of the first memory space through the second memory space when a crash occurs in the first memory space, and then locating the crash in the first memory space based on the crash stack information, this embodiment improves the accuracy of crash location when a crash occurs in the ARM space, enabling parsing through the x86 space to locate the crash in the ARM space.

[0085] refer to Figure 4 , Figure 4 This is a flowchart illustrating a second embodiment of a memory space crash location method according to the present invention.

[0086] Based on the first embodiment described above, in the memory space crash location method of this embodiment, step S20 specifically includes:

[0087] Step S201: Determine the abnormal instruction information that caused the first memory space to crash based on the crash information.

[0088] In a specific implementation, due to erroneous or abnormal instructions causing errors in the ARM memory space when executing the instruction, the first memory space may crash. Therefore, after obtaining the crash information, this embodiment determines the abnormal instruction information of the abnormal instruction based on the obtained crash information. The abnormal instruction information includes, but is not limited to, the instruction identifier information of the instruction.

[0089] Step S202: Extract the processor information associated with the first memory space from the crash information.

[0090] In a specific implementation, this embodiment can also extract processor information associated with the first memory space from the crash information. Specifically, in this embodiment, the corresponding processor information can be extracted based on the processor's identifier, i.e., the CPU's ID. Of course, other methods can also be used to obtain processor information in this embodiment, and this embodiment does not limit this.

[0091] Step S203: Obtain crash stack information based on the abnormal instruction information and the processor information.

[0092] It should be noted that after obtaining the abnormal instruction information and processor information, the crash stack information can be further obtained based on these two pieces of information. Specifically, the address information corresponding to the abnormal instruction information can be obtained through the instruction counter based on the processor information, and then the crash stack information can be obtained based on the address information.

[0093] In this embodiment, the instruction counter, or PC, is used to store the address of the instruction. The address information corresponding to the abnormal instruction information can be obtained through the instruction counter.

[0094] Furthermore, in this embodiment, the address information is parsed according to a preset function to obtain the crash stack information. The preset function in this embodiment includes a first preset function and a second preset function. The first preset function can be the dladdr function used to obtain the symbol information of the address, and the second preset function can be the linker.dl_iterate_phdr(pc) function used to extract the unwind segment node corresponding to the address. In actual practice, other functions can also be used instead in this embodiment, and there is no limitation on this.

[0095] In the specific implementation, calling the first preset function can obtain the symbol information corresponding to the address information, that is, the sym name of the resolved address. The sym function is used to create symbolic numbers, symbolic variables, and symbolic objects. The type of the symbolic object is sym. Calling the second preset function can obtain the backtracking segment node corresponding to the address information, for example... Figure 3A(func), B(func), and C(func) shown are backtracking segment nodes. Finally, the crash stack information can be obtained based on the symbol information and the backtracking segment nodes, which can be implemented as follows.

[0096] In the specific implementation, the execution of instructions is essentially a function call. The environment required for the function call is the stack frame. In this embodiment, the current stack frame when the first memory space crashes is first obtained. Then, the current stack frame is backtracked based on symbol information and backtracking segment nodes, thereby recursively retrieving the space stack in the first memory space to obtain the crash stack information.

[0097] Furthermore, the recursive process is based on the current stack frame extracting stack frames from the first memory space according to the symbol information and backtracking segment nodes, to obtain multiple stack frames corresponding to the first memory space. Specifically, the memory space and address information of the current stack frame are determined according to the backtracking segment nodes. Based on the memory space and address information of the current stack frame, the address of the next stack frame corresponding to the current stack frame and the stack pointer and other information can be obtained. Multiple stack frames are extracted from the first memory space in sequence according to this information.

[0098] It should be noted that the crash occurs within a specific stack frame. Therefore, after obtaining multiple stack frames, it is necessary to filter out the target stack frame from among them. The target stack frame is the stack frame where the crash occurred, and finally, the crash stack information can be obtained based on the target stack frame.

[0099] In practice, the crash occurs at the current stack position, i.e., the top of the stack. The top stack frame can be extracted recursively. According to the last-in-first-out principle of the stack, and combined with the extraction order of the stack frames, the last extracted stack frame can be obtained. This stack frame is the top stack frame. In this embodiment, this stack frame is used as the target stack frame. The information of the target stack frame is the crash stack information. The crash stack information includes, but is not limited to, the local variable table, operand stack, dynamic linking, and method return address of the method stored in the stack frame.

[0100] This embodiment determines the abnormal instruction information that caused the first memory space to crash based on the crash information; extracts the processor information associated with the first memory space from the crash information; obtains the address information corresponding to the abnormal instruction information based on the processor information using an instruction counter; calls the first preset function to obtain the symbol information corresponding to the address information; calls the second preset function to determine the backtracking segment node corresponding to the address information; obtains the current stack frame when the first memory space crashes; extracts stack frames from the first memory space based on the current stack frame according to the symbol information and the backtracking segment node, obtaining multiple stack frames corresponding to the first memory space; filters out the target stack frame from the multiple stack frames; obtains the crash stack information based on the target stack frame; obtains the symbol information and backtracking segment node through the first and second preset functions; and then recursively extracts the space stack in the first memory space based on the obtained symbol information and backtracking segment node, thereby finding the space stack in the first memory space where the crash occurred, thus achieving crash localization of the first memory space and improving the accuracy of crash localization.

[0101] refer to Figure 5 , Figure 5 This is a flowchart illustrating a third embodiment of a memory space crash location method according to the present invention.

[0102] Based on the first or second embodiment described above, a third embodiment of the present invention for a memory space crash location method is proposed.

[0103] In this embodiment, step S30 specifically includes:

[0104] Step S301: Extract the exception code from the crash stack information.

[0105] It should be noted that instruction execution occurs within the stack frame, where the corresponding code is executed. If the first memory space crashes, meaning that instruction execution fails in the first memory space, it indicates that an exception code has appeared in the stack frame that caused the instruction execution to fail. The exception code can be obtained from the crash stack information. The exception code includes code with incorrect formatting or code with incorrect address information, etc.

[0106] Step S302: Locate the crash in the first memory space based on the exception code.

[0107] In practice, after obtaining the exception code, the exception code is the code in the first memory space (i.e., the ARM memory space). This exception code is the cause of the first memory space crashing. Identifying this exception code means that the crash location of the first memory space has been achieved.

[0108] Furthermore, after locating the crash in the first memory space, this embodiment can also repair the abnormal code that caused the crash in the first memory space, so that the first memory space can continue to execute processor instructions normally. Specifically, this embodiment can repair the crash in the first memory space by repairing the code format of the abnormal code or repairing the address information of the abnormal code. Of course, this embodiment can also adopt other methods to repair the crash according to actual needs, and this embodiment does not limit this.

[0109] This embodiment extracts the exception code from the crash stack information and performs crash localization on the first memory space based on the exception code. After determining the space stack where the crash occurred in the first memory space, it can identify the exception code that caused the space stack to crash, which improves the accuracy of crash localization. At the same time, it can further repair the exception code. While achieving accurate crash localization, it can also intelligently repair the crash, thus improving the user experience.

[0110] Furthermore, this embodiment of the invention also proposes a storage medium storing a memory space crash location program, which, when executed by a processor, implements the steps of the memory space crash location method described above.

[0111] Since this storage medium adopts all the technical solutions of all the above embodiments, it has at least all the beneficial effects brought about by the technical solutions of the above embodiments, which will not be repeated here.

[0112] Reference Figure 6 , Figure 6 This is a structural block diagram of the first embodiment of the memory space crash location device of the present invention.

[0113] like Figure 6 As shown, the memory space crash location device proposed in this embodiment of the invention includes:

[0114] The detection module 10 is used to obtain the crash information corresponding to the first memory space when a crash is detected in the first memory space.

[0115] The parsing module 20 is used to parse the crash information through the second memory space to obtain crash stack information.

[0116] The location module 30 is used to locate the first memory space based on the crash stack information.

[0117] This embodiment obtains crash information corresponding to the first memory space when a crash is detected in the first memory space; it then parses the crash information through the second memory space to obtain crash stack information; and finally locates the crash in the first memory space based on the crash stack information. By parsing the crash information of the first memory space through the second memory space when a crash occurs in the first memory space, and then locating the crash in the first memory space based on the crash stack information, this embodiment improves the accuracy of crash location when a crash occurs in the ARM space, enabling parsing through the x86 space to locate the crash in the ARM space.

[0118] In one embodiment, the parsing module 20 is further configured to determine, based on the crash information, the abnormal instruction information that caused the first memory space to crash; extract processor information associated with the first memory space from the crash information; and obtain crash stack information based on the abnormal instruction information and the processor information.

[0119] In one embodiment, the parsing module 20 is further configured to obtain the address information corresponding to the abnormal instruction information based on the processor information using an instruction counter; and obtain crash stack information based on the address information.

[0120] In one embodiment, the parsing module 20 is further configured to call a preset function to parse the address information and obtain crash stack information.

[0121] In one embodiment, the preset function includes: a first preset function and a second preset function;

[0122] The parsing module 20 is further configured to parse the address information by calling a preset function to obtain crash stack information, including: calling the first preset function to obtain symbol information corresponding to the address information; calling the second preset function to determine the backtracking segment node corresponding to the address information; and obtaining crash stack information based on the symbol information and the backtracking segment node.

[0123] In one embodiment, the parsing module 20 is further configured to obtain the current stack frame when the first memory space crashes; and to backtrack the current stack frame based on the symbol information and the backtracking segment node to obtain crash stack information.

[0124] In one embodiment, the parsing module 20 is further configured to extract stack frames from the first memory space based on the current stack frame according to the symbol information and the backtracking segment node, to obtain multiple stack frames corresponding to the first memory space; select a target stack frame from the multiple stack frames; and obtain crash stack information based on the target stack frame.

[0125] In one embodiment, the parsing module 20 is further configured to determine the memory space and address information of the current stack frame based on the backtrace segment node; and to extract multiple stack frames sequentially from the first memory space based on the memory space and address information of the current stack frame.

[0126] In one embodiment, the parsing module 20 is further configured to select the top stack frame from the plurality of stack frames according to the stack frame extraction order; and use the top stack frame as the target stack frame.

[0127] In one embodiment, the positioning module 30 is further configured to extract exception code from the crash stack information and perform crash positioning on the first memory space based on the exception code.

[0128] It should be understood that the above are merely illustrative examples and do not constitute any limitation on the technical solutions of the present invention. In specific applications, those skilled in the art can make settings as needed, and the present invention does not impose any restrictions on this.

[0129] It should be noted that the workflow described above is merely illustrative and does not limit the scope of protection of this invention. In practical applications, those skilled in the art can select some or all of the workflow to achieve the purpose of this embodiment according to actual needs, and no restrictions are imposed here.

[0130] In addition, for technical details not described in detail in this embodiment, please refer to the memory space crash location method provided in any embodiment of the present invention, which will not be repeated here.

[0131] Furthermore, it should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or system. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or system that includes that element.

[0132] The sequence numbers of the above embodiments of the present invention are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0133] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as read-only memory (ROM) / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of the present invention.

[0134] The above are merely preferred embodiments of the present invention and do not limit the scope of the patent. Any equivalent structural or procedural transformations made based on the description and drawings of the present invention, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of the present invention.

Claims

1. A method for locating memory space crashes, characterized in that, The memory space crash location method includes: When a crash is detected in the first memory space, the crash information corresponding to the first memory space is obtained; The crash information is parsed using the second memory space to obtain the crash stack information; The first memory space is located based on the crash stack information; The first memory space is an ARM memory space, and the second memory space is an x86 memory space.

2. The memory space crash location method as described in claim 1, characterized in that, The step of parsing the crash information through the second memory space to obtain crash stack information includes: The abnormal instruction information that caused the first memory space to crash is determined based on the crash information; Extract processor information associated with the first memory space from the crash information; The crash stack information is obtained based on the abnormal instruction information and the processor information.

3. The memory space crash location method as described in claim 2, characterized in that, The step of obtaining crash stack information based on the abnormal instruction information and the processor information includes: The address information corresponding to the abnormal instruction information is obtained by using the instruction counter based on the processor information; The crash stack information is obtained based on the address information.

4. The memory space crash location method as described in claim 3, characterized in that, The step of obtaining the crash stack information based on the address information includes: The address information is parsed by calling a preset function to obtain the crash stack information.

5. The memory space crash location method as described in claim 4, characterized in that, The preset functions include: a first preset function and a second preset function; The process of calling a preset function to parse the address information and obtain the crash stack information includes: Call the first preset function to obtain the symbol information corresponding to the address information; The second preset function is invoked to determine the backtrack segment node corresponding to the address information; The crash stack information is obtained based on the symbol information and the backtracking segment nodes.

6. The memory space crash location method as described in claim 5, characterized in that, The step of obtaining the crash stack information based on the symbol information and the backtrack segment nodes includes: Obtain the current stack frame when the first memory space crashes; Based on the symbol information and the backtracking segment node, the current stack frame is backtracked to obtain the crash stack information.

7. The memory space crash location method as described in claim 6, characterized in that, The step of backtracking the current stack frame based on the symbol information and the backtracking segment node to obtain crash stack information includes: Based on the current stack frame, the first memory space is extracted according to the symbol information and the backtracking segment node to obtain multiple stack frames corresponding to the first memory space. Select the target stack frame from the plurality of stack frames; The crash stack information is obtained based on the target stack frame.

8. The memory space crash location method as described in claim 7, characterized in that, The step of extracting stack frames from the first memory space based on the current stack frame according to the symbol information and the backtrack segment node, to obtain multiple stack frames corresponding to the first memory space, includes: The memory space and address information of the current stack frame are determined based on the backtrack segment node; Based on the memory space of the current stack frame and the address information, multiple stack frames are extracted sequentially from the first memory space.

9. The memory space crash location method as described in claim 7, characterized in that, The step of selecting the target stack frame from the plurality of stack frames includes: The top stack frame is selected from the multiple stack frames according to the stack frame extraction order; Use the top stack frame as the target stack frame.

10. The memory space crash location method according to any one of claims 1 to 9, characterized in that, The step of locating the crash in the first memory space based on the crash stack information includes: Extract the exception code from the crash stack information; The first memory space is located based on the exception code.

11. A memory space crash location device, characterized in that, The memory space crash location device includes: The detection module is used to obtain the crash information corresponding to the first memory space when a crash is detected in the first memory space; The parsing module is used to parse the crash information through the second memory space to obtain crash stack information; The location module is used to locate the first memory space from the crash stack information. The first memory space is an ARM memory space, and the second memory space is an x86 memory space.

12. The memory space crash location device as described in claim 11, characterized in that, The parsing module is further configured to determine, based on the crash information, the abnormal instruction information that caused the first memory space to crash; extract the processor information associated with the first memory space from the crash information; and obtain crash stack information based on the abnormal instruction information and the processor information.

13. The memory space crash location device as described in claim 12, characterized in that, The parsing module is further configured to obtain the address information corresponding to the abnormal instruction information based on the processor information through the instruction counter; and obtain the crash stack information based on the address information.

14. The memory space crash location device as described in claim 13, characterized in that, The parsing module is also used to call a preset function to parse the address information and obtain the crash stack information.

15. The memory space crash location device as described in claim 14, characterized in that, The preset functions include: a first preset function and a second preset function; The parsing module is further configured to call the first preset function to obtain the symbol information corresponding to the address information; call the second preset function to determine the backtracking segment node corresponding to the address information; and obtain the crash stack information based on the symbol information and the backtracking segment node.

16. The memory space crash location device as described in claim 15, characterized in that, The parsing module is further configured to obtain the current stack frame when the first memory space crashes; and to backtrack the current stack frame based on the symbol information and the backtracking segment node to obtain crash stack information.

17. The memory space crash location device as described in claim 16, characterized in that, The parsing module is further configured to extract stack frames from the first memory space based on the current stack frame according to the symbol information and the backtracking segment node, thereby obtaining multiple stack frames corresponding to the first memory space; and to select the target stack frame from the multiple stack frames. The crash stack information is obtained based on the target stack frame.

18. The memory space crash location device as described in claim 17, characterized in that, The parsing module is further configured to determine the memory space and address information of the current stack frame based on the backtrace segment node; and to extract multiple stack frames sequentially from the first memory space based on the memory space and address information of the current stack frame.

19. A memory space crash location device, characterized in that, The memory space crash location device includes: a memory, a processor, and a memory space crash location program stored on the memory and running on the processor, the memory space crash location program being configured to implement the memory space crash location method as described in any one of claims 1 to 10.

20. A storage medium, characterized in that, The storage medium stores a memory space crash location program, which, when executed by a processor, implements the memory space crash location method as described in any one of claims 1 to 10.

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