A power supply driving circuit, chip and method

CN116827093BActive Publication Date: 2026-10-27FREMONT MICRO DEVICES SHENZHEN LTD
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Patent Information

Application Number
CN202210281318.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-03-21
Publication Date
2026-10-27
Estimated Expiration
2042-03-21

AI Technical Summary

Technical Problem

但是由于变压器的非理想因素,VCC电压不但随输出电压的变化而变化,还随输出电流的增大而增大,随着输出电流的减小而减小

Benefits of technology

[0028]本发明的电源驱动电路、芯片以及方法,具有以下有益效果:在每个导通周期都会兼顾充电需求,如果当前的导通周期需要充电则在当前的导通周期内驱动管完全导通后会关断电流采样开关管、导通充电开关管,利用导通周期的前期流过驱动管的小电流来充电,在当前导通周期的后期再切换回到导通电流采样开关管、关断充电开关管,让驱动管输出的电流还是按照正常的路径从电流采样开关管流过,如此,不仅使得供电电压不随输出功率的变化,避免了供电电路烦琐的设计调试,而且可以在不影响驱动管开关周期的基础上实现整个电路或者芯片的充电,而且这种充电方式是利用多个周期的小电流充电,极大的改善了储能电容ESR对电源电压的影响,可有效扩大ESR适用范围,适用标准低压CMOS工艺,储能模块可以由较贵的贴片电容替换到便宜的电解电容来实现,节省了系统成本,提高了可靠性并具有广泛的适用性。

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Abstract

The application discloses a power supply driving circuit, a chip and a method. In each conduction period, whether the charging demand needs to be considered is considered. If the current conduction period needs to be charged, the current sampling switch tube is turned off, the charging switch tube is turned on, the small current flowing through the driving tube in the early stage of the current period is used for charging, and the driving tube output current is switched back to the conduction current sampling switch tube and the off charging switch tube in the late stage of the current period, so that the driving tube output current still flows through the current sampling switch tube along the normal path. As a result, the power supply voltage does not change with the output power, the circuit or chip charging is realized on the basis of not affecting the switching period of the driving tube, the influence of the capacitor ESR in the energy storage module on the power supply voltage is greatly improved, the ESR application range is effectively expanded, the low-voltage CMOS process is applicable, the energy storage module can be replaced from the expensive surface mount capacitor to the cheap electrolytic capacitor, and the system cost is saved.
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Description

Technical Field

[0001] This invention relates to the field of power supplies, and more particularly to a power supply driving circuit, chip, and method. Background Technology

[0002] like Figure 1 The existing control chip power supply system consists of a starting resistor Rst, a VCC capacitor 65, an equivalent series resistance (ESR) 64 of the VCC capacitor, a freewheeling diode 60, and a transformer auxiliary winding NA. Its working principle is as follows: When the power system is turned on, the VCC capacitor charges through the starting resistor Rst, and the chip is in a shutdown state. When the VCC voltage rises to a certain voltage set internally by the controller, the control chip starts working, turning on the power transistor Q1. The primary inductance of the transformer begins to charge. When the primary inductance current reaches a certain set value, the control chip turns off the power transistor Q1. The energy stored in the primary inductance is then transferred to the output winding inductance and the auxiliary winding inductance, supplying power to the output load and the control chip, respectively. The controller determines the next time to turn on transistor Q1 or the peak value of the primary current based on the output voltage, and this cycle repeats. In general, the control chip does not adjust accordingly based on the VCC voltage level. After stabilization, the VCC voltage value is mainly determined by the output voltage, the number of turns in the output winding NS, and the number of turns in the auxiliary winding NA, where VCC ≈ Vo*NA / NS. However, due to the non-ideal factors of the transformer, the VCC voltage not only changes with the output voltage, but also increases with the increase of the output current and decreases with the decrease of the output current. This causes the VCC voltage to vary significantly under different loads, while the operating voltage range of the control IC's power supply is often not very large. This makes it necessary to make multiple adjustments to the design of the power supply circuit to achieve a good result. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a power drive circuit, chip and method to address the shortcomings of the prior art where the power supply voltage VCC varies greatly under different loads.

[0004] The technical solution adopted by this invention to solve its technical problem is: to construct a power drive circuit for connecting a drive transistor to realize power driving and charging of the energy storage module, wherein the power drive circuit includes:

[0005] A charging detection module, connected to the energy storage module, is used to detect the power supply voltage of the energy storage module and generate a self-charging signal when the power supply voltage is lower than the self-charging threshold.

[0006] A current sampling switch transistor is provided, the input of which is connected to an input power supply, and the output of which is grounded via the current sampling switch transistor.

[0007] A charging switch transistor, the input of which is connected between the driving transistor and the current sampling switch transistor, and the output of which is connected to the energy storage module;

[0008] The sampling and detection module has its input connected between the driving transistor and the current sampling switch transistor, and is used to acquire the current flowing from the driving transistor to the current sampling switch transistor and generate a sampling voltage.

[0009] The control module is connected to the output of the sampling and detection module to acquire the sampling voltage, and is connected to the output of the charging detection module and the control terminal of the charging switch tube, for controlling the driving tube based on the sampling voltage to periodically alternate between the conduction cycle and the off cycle;

[0010] If the control module does not receive the self-charging signal when it enters a conduction cycle, it will be in a first conduction control state after entering the conduction cycle. The first conduction control state is to turn on the current sampling switch and turn off the charging switch.

[0011] If the control module receives the self-charging signal each time it enters a conduction cycle, it first enters the first conduction control state after entering the conduction cycle. After the driving transistor is fully turned on, it switches to the second conduction control state to use the small current flowing through the driving transistor in the early stage to charge the energy storage module. After the preset charging time, it switches back to the first conduction control state. The second conduction control state is to turn off the current sampling switch and turn on the charging switch.

[0012] Preferably, if the control module receives the self-charging signal each time it enters a conduction cycle, it first enters a first conduction control state for a preset on-time to ensure that the driving transistor is fully turned on, and then switches to the second conduction control state.

[0013] Preferably, the preset turn-on duration does not exceed 30% of the conduction cycle duration or does not exceed 400 ns, and the preset charging duration does not exceed 30% of the conduction cycle duration.

[0014] Preferably, the preset turn-on duration and the preset charging duration ensure that the sampled voltage has not yet reached the first reference voltage when switching back to the first conduction control state;

[0015] The power drive circuit further includes:

[0016] A current input circuit is connected to the control terminal of the driving transistor and is used to input current to drive the driving transistor to conduct.

[0017] A discharge circuit, connected to the control terminal of the driving transistor, is used to discharge the control terminal of the driving transistor;

[0018] The control module is further configured to, upon entering each conduction cycle, simultaneously turn on the current input circuit and turn off the discharge circuit while the current sampling switch is turned on; upon entering the conduction cycle, upon switching to the second conduction control state, simultaneously turn off the current input circuit; upon switching back to the first conduction control state, simultaneously turn on the current input circuit; and upon entering the conduction cycle, upon the sampling voltage reaching the first reference voltage, turn off the current input circuit to stop driving the drive transistor, and upon the sampling voltage continuing to rise to the second reference voltage, turn off the current sampling switch and simultaneously control the discharge circuit to discharge, thereby forcibly and completely turning off the drive transistor to enter the turn-off cycle.

[0019] Preferably, the driving transistor is a Darlington transistor, which includes a pre-stage transistor and a post-stage transistor. The discharge circuit includes a first discharge switch and a second discharge switch. The first discharge switch is connected between the base of the pre-stage transistor and ground, and the second discharge switch is connected between the base of the post-stage transistor and ground. The discharge circuit discharges when both the first and second discharge switches are turned on simultaneously.

[0020] Preferably, the current input circuit includes a current source and a current input switch. The current source draws current from the supply voltage to generate current. The current input switch is connected between the base of the front-stage transistor and the current source. When the current input switch is turned on, the current input circuit inputs current to drive the driving transistor to turn on.

[0021] Preferably, the charging detection module includes a latch comparator, one input of which is connected to the self-charging threshold, the other input of which is connected to the output of the energy storage module, and its control terminal is connected to the control module;

[0022] The latch comparator is used to detect the supply voltage of the energy storage module, compare the supply voltage with the self-charging threshold and generate the self-charging signal, latch the newly generated self-charging signal, and output the self-charging signal to the control module at the beginning of the next conduction cycle under the trigger of the control module.

[0023] Preferably, a starting resistor is also connected between the input and output of the driving transistor. The input power supply is used to charge the energy storage module through the starting resistor and the parasitic diode of the charging switch transistor when the power is turned on. When the power supply voltage rises to the preset voltage set inside the control module, the power drive circuit starts to work.

[0024] On the other hand, a power drive chip was constructed, which integrates the power drive circuit as described in the previous item.

[0025] On the other hand, a power supply driving method is also constructed, including:

[0026] If the supply voltage is not lower than the self-charging threshold when entering a conduction cycle, the system is in the first conduction control state after entering the conduction cycle. The first conduction control state is to turn on the current sampling switch and turn off the charging switch.

[0027] If the supply voltage is lower than the self-charging threshold when the control module enters a conduction cycle, it will first be in the first conduction control state after entering the conduction cycle. After the driving transistor is fully turned on, it will switch to the second conduction control state to use the small current flowing through the driving transistor in the early stage to charge the energy storage module. After the preset charging time, it will switch back to the first conduction control state. The second conduction control state is to turn off the current sampling switch and turn on the charging switch.

[0028] The power drive circuit, chip, and method of the present invention have the following beneficial effects: Charging demand is considered in each conduction cycle. If charging is required in the current conduction cycle, the current sampling switch is turned off and the charging switch is turned on after the driving transistor is fully turned on in the current conduction cycle. The small current flowing through the driving transistor in the early stage of the conduction cycle is used for charging. In the later stage of the current conduction cycle, the current sampling switch is turned on again and the charging switch is turned off, allowing the current output by the driving transistor to flow through the current sampling switch along the normal path. This not only ensures that the supply voltage does not change with the output power, avoiding cumbersome design and debugging of the power supply circuit, but also enables charging of the entire circuit or chip without affecting the switching cycle of the driving transistor. Furthermore, this charging method utilizes small currents over multiple cycles, greatly improving the impact of the energy storage capacitor's ESR on the power supply voltage, effectively expanding the ESR application range, and being applicable to standard low-voltage CMOS processes. The energy storage module can be implemented by replacing expensive surface-mount capacitors with cheaper electrolytic capacitors, saving system costs, improving reliability, and having wide applicability. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort:

[0030] Figure 1This is a schematic diagram of the chip power supply structure in an ESR topology AC-DC circuit in the prior art;

[0031] Figure 2 This is a schematic diagram of the power supply drive circuit of the present invention;

[0032] Figure 3 This is a schematic diagram of the power drive circuit in a preferred embodiment of the present invention;

[0033] Figure 4 This is a schematic diagram illustrating an application scenario of the ESR topology AC-DC power supply chip in a specific embodiment of the present invention;

[0034] Figure 5 yes Figure 4 The circuit waveform diagram shown is shown. Detailed Implementation

[0035] To address the drawback of traditional power supply circuits where the supply voltage VCC varies significantly under different loads, this invention provides a power drive circuit, chip, and method. This invention connects a drive transistor and a current sampling switch in series between the input power supply and ground. During normal operation, the control module can perform feedback control on the drive transistor based on the sampled voltage, causing it to periodically enter on-cycle and off-cycles. When the energy storage module's power supply is insufficient, the charging detection module outputs a self-charging signal. If the control module receives the self-charging signal when entering the conduction cycle, it first turns on the current sampling switch and turns off the charging switch after entering the conduction cycle. After the driving transistor is fully turned on, it turns off the current sampling switch and turns on the charging switch, thereby using the small current flowing through the driving transistor in the early stage to charge the energy storage module. After the preset charging time, it switches back to turning on the current sampling switch and turning off the charging switch. In this way, not only does the supply voltage not change with the output power, avoiding the cumbersome design and debugging of the power supply circuit, but it can also achieve the charging of the entire circuit or chip without affecting the switching cycle of the driving transistor. Moreover, this charging method uses small current charging in multiple cycles, which greatly improves the impact of the energy storage capacitor's ESR on the power supply voltage, effectively expanding the ESR application range. It is applicable to standard low-voltage CMOS technology, and the energy storage module can be implemented by replacing the more expensive surface-mount capacitors with cheaper electrolytic capacitors, saving system costs, improving reliability, and having wide applicability.

[0036] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Typical embodiments of the invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to make the disclosure of the present invention more thorough and complete. It should be understood that the embodiments of the present invention and the specific features thereof are detailed descriptions of the technical solutions of this application, and not limitations thereof. Where there is no conflict, the embodiments of the present invention and the technical features thereof can be combined with each other.

[0037] The power drive circuit of this invention can be applied to AC-DC, DC-DC and other power chips, see reference. Figure 2 This circuit can control the periodic switching of the drive transistor Q1 to drive the power supply, and it can also be used to charge the energy storage module 1. The energy storage module 1 is used to provide the power supply voltage VCC. For example, the energy storage module 1 is an external VCC capacitor of the chip. The entire power drive circuit can be integrated into a power drive chip. The energy storage module 1 and the drive transistor Q1 can be integrated into the power supply drive chip, or they can be externally connected to the power drive chip.

[0038] The power drive circuit of the present invention includes: a charging detection module 2, a current sampling switch K0, a charging switch K3, a sampling detection module 3, and a control module 4.

[0039] Charging detection module 2, connected to the energy storage module 1, is used to detect the supply voltage VCC and generate a self-charging signal VCC_S when the supply voltage VCC is lower than the self-charging threshold Vref_vcc. The implementation of charging detection module 2 is not limited; for example, it can be composed of a conventional voltage sampling detection module and a voltage comparison circuit. (Reference) Figure 4 In this embodiment, the charging detection module 2 preferably uses a latch comparator CP1, one input of which is connected to the self-charging threshold Vref_vcc, and the other input is connected to the output of the energy storage module 1. Its control terminal is connected to the control module 4. The latch comparator CP1 is used to detect the supply voltage VCC of the energy storage module 1, compare the supply voltage VCC with the self-charging threshold Vref_vcc and generate the self-charging signal VCC_S, latch the newly generated self-charging signal VCC_S, and output the self-charging signal VCC_S to the control module 4 at the beginning of the next conduction cycle under the trigger of the control module 4. That is to say, the self-charging signal VCC_S is not output immediately, but is only given to the control module 4 at the beginning of each conduction cycle. The control module 4 can use the control signal it gives to the current sampling switch K0 to synchronously trigger the latch comparator CP1 to output the latched signal to itself.

[0040] The driver transistor Q1 and the current sampling switch K0 are connected in series between the input power supply and ground. Specifically, the input of the driver transistor Q1 is connected to the input power supply, and the output of the driver transistor Q1 is grounded via the current sampling switch K0. The input power supply to the driver transistor Q1 is primarily AC power; see reference [link to relevant documentation]. Figure 4 For example, one end of the primary winding of the transformer in an AC-DC power system can be directly connected to the external input power supply Vin, and the other end of the primary winding can be connected to the input of the driver transistor Q1. The current flowing into the driver transistor Q1 is the inductor current Ip. The driver transistor Q1 switches periodically, and one of its operating cycles consists of a conduction cycle and a turn-off cycle. The operating cycle of the driver transistor Q1 and the peak value of the current Ip are determined by the energy supply demand, for example, using... Figure 4 Taking the application as an example, the working cycle and peak current Ip of its driving transistor Q1 are affected by the load on the secondary winding side.

[0041] The charging switch K3 has its input connected between the driving switch Q1 and the current sampling switch K0, and its output connected to the energy storage module 1.

[0042] The sampling and detection module 3, whose input is connected between the driving transistor Q1 and the current sampling switch K0, is used to acquire the current flowing from the driving transistor Q1 to the current sampling switch K0 and generate a sampling voltage Vcs. The sampling and detection module 3 can use a resistor to implement the current sampling and detection function.

[0043] Control module 4 is connected to the output of sampling and detection module 3 to acquire the sampling voltage Vcs, and is also connected to the output of charging detection module 2 and the control terminal of charging switch K3. Control module 4 is used to control the driving transistor Q1 based on the sampling voltage Vcs, causing it to periodically alternate between the on and off cycles.

[0044] If the control module 4 does not receive the self-charging signal VCC_S when it enters a conduction cycle, it will be in the first conduction control state after entering the conduction cycle.

[0045] If the control module 4 receives the self-charging signal VCC_S each time it enters a conduction cycle, it will first be in the first conduction control state after entering the conduction cycle. After the driving transistor Q1 is fully turned on, it will switch to the second conduction control state to use the small current flowing through the driving transistor Q1 in the early stage to charge the energy storage module 1, thereby realizing the charging of the entire circuit or chip. After the preset charging time t1, it will switch back to the first conduction control state.

[0046] The first conduction control state is to turn on the current sampling switch K0 and turn off the charging switch K3, and the second conduction control state is to turn off the current sampling switch K0 and turn on the charging switch K3.

[0047] On the one hand, in normal operation when charging is not required, the charging switch K3 is clocked off. The control module 4 performs feedback control on the driving transistor Q1 based on the sampled voltage Vcs, causing it to periodically be in the on-cycle and off-cycle. Specifically, when the supply voltage VCC is normal and charging is not required, the driving transistor Q1 ends the off-cycle and enters the on-cycle, which is generally triggered by the pulse frequency mode inside the chip's control module. The end of the on-cycle and the entry into the off-cycle are achieved by the control module 4 through feedback control based on the sampled voltage Vcs.

[0048] Secondly, in order to achieve charging of the entire circuit or chip without affecting the normal switching cycle of the driving transistor Q1 or the normal energy transfer of the current Ip, the present invention uses a small current during the early conduction of one or more conduction cycles to charge the energy storage module 1 when charging is required. Specifically, if the self-charging signal VCC_S is received each time a conduction cycle is entered, the device first enters a first conduction control state with a preset on-time t0. The length of the preset on-time t0 is sufficient to ensure that the driving transistor Q1 is fully turned on. Since the main purpose of the preset on-time t0 is to ensure that the driving transistor is fully turned on, it is generally around 300ns, not exceeding 400ns. Because our purpose is to charge using the small current flowing through the driving transistor in the early stage, we immediately switch to the second conduction control state after entering the preset on-time t0 of the conduction cycle. The second conduction control state is maintained for a preset charging time t1, which does not exceed 30% of the conduction cycle duration. Of course, in this case, the driver transistor Q1 ends the turn-off cycle and enters the turn-on cycle in the same way as before, which is also triggered by the pulse frequency mode inside the chip's control module.

[0049] In this embodiment, the selected driver transistor Q1 requires a current input to its control terminal to be driven in order to conduct. Therefore, as Figure 3 A current input circuit 5 is set up and connected to the control terminal of the driving transistor Q1. The current input circuit 5 is used to input current to drive the driving transistor Q1 to conduct. When we turn off the driving transistor Q1, we first cancel this current input. For example, in each conduction cycle, when the sampling voltage Vcs reaches the first reference voltage, the current input circuit 5 is turned off to stop driving the driving transistor Q1. However, even if the input current is canceled, the driving transistor Q1 is not actually turned off at this time, and the current I flowing through the driving transistor Q1 continues. LIt will continue and increase until the driver transistor Q1 is completely turned off. However, after removing the input current to the control terminal of the driver transistor Q1, we do not allow it to slowly reach complete turn-off on its own. This is because if we did, the peak current Ip when the driver transistor Q1 is completely turned off might not match our energy supply, and the peak value would be uncontrollable. (Reference) Figure 3 Preferably, to ensure that the current Ip when the driving transistor Q1 is completely turned off is controllable and meets the energy output requirements, we further designed a discharge circuit 6. The discharge circuit 6 is connected to the control terminal of the driving transistor Q1 and is used to discharge the control terminal of the driving transistor Q1. Specifically, after stopping the driving transistor Q1, when the sampling voltage Vcs continues to rise and reaches the second reference voltage, we turn off the current sampling switch K0 and simultaneously control the discharge circuit 6 to discharge, thus forcibly and completely turning off the driving transistor Q1.

[0050] Therefore, in general, the control module 4 is used for:

[0051] On the one hand, under normal operating conditions without receiving the self-charging signal VCC_S, in each conduction cycle: the current input circuit 5 and the current sampling switch K0 are first turned on, and the discharge circuit 6 is turned off simultaneously. The charging switch K3 remains off. When the sampling voltage Vcs reaches the first reference voltage, the current input circuit 5 is turned off to stop driving the driving transistor Q1. When the sampling voltage Vcs continues to rise and reaches the second reference voltage, the current sampling switch K0 is turned off and the discharge circuit 6 is turned on simultaneously to start discharging, thereby forcibly and completely turning off the driving transistor Q1, thus ending the current conduction cycle and entering the turn-off cycle.

[0052] Secondly, each time a new self-charging signal VCC_S is received, a preset charging duration t1 will be configured in each subsequent conduction cycle for charging until the current self-charging signal VCC_S is released. The charging start time in each conduction cycle is chosen after the driving transistor is fully turned on, approximately after starting to "turn on the current input circuit 5 and the current sampling switch K0, and simultaneously turn off the discharge circuit 6", and waiting for a preset on-time t0. Then, the current sampling switch K0 and the current input circuit 5 are turned off, and the charging switch K3 is turned on to start charging. After waiting for a preset charging time t1, the cycle switches back to "turn on the current input circuit 5 and the current sampling switch K0, and simultaneously turn off the charging switch K3". Then, when the sampling voltage Vcs reaches the first reference voltage, the current input circuit 5 is turned off to stop driving the driving transistor Q1. When the sampling voltage Vcs continues to rise and reaches the second reference voltage, the current sampling switch K0 is turned off, and the discharge circuit 6 is simultaneously turned on to start discharging, thereby forcibly and completely turning off the driving transistor Q1, thus ending the current conduction cycle and entering the turn-off cycle.

[0053] If the self-charging signal VCC_S is still present when the next conduction cycle arrives after the shutdown cycle ends, the above operation will be performed again in the next conduction cycle, and so on, until the self-charging signal VCC_S is released. For example, if a self-charging signal VCC_S is generated during the i-th operating cycle, regardless of whether the current cycle is the on or off cycle, the self-charging signal VCC_S will be detected when entering the (i+1)-th operating cycle. Therefore, charging will occur during the pre-off phase of the (i+1)-th operating cycle. If the self-charging signal VCC_S remains at the end of the (i+1)-th operating cycle, it will remain after one off cycle and will not be deactivated. Therefore, the self-charging signal VCC_S will be detected again when entering the (i+2)-th operating cycle, and charging will occur again during the pre-off phase of the (i+2)-th operating cycle. If the self-charging signal VCC_S remains, it will continue to charge during the pre-off phase of the (i+3)-th operating cycle after one off cycle, and so on, until the self-charging signal VCC_S is deactivated. After the self-charging signal VCC_S is deactivated, the driver transistor Q1 returns to normal operation.

[0054] The following summarizes the on and off times of each switch in a complete duty cycle consisting of the on-time and off-time:

[0055] 1) The oscillator triggers the control module 4. The control module 4 turns on the current input circuit 5 and the current sampling switch K0, turns off the discharge circuit 6, and keeps the charging switch K3 off. At this time, a conduction cycle begins.

[0056] If there is no self-charging signal VCC_S when entering the current conduction cycle, the current input circuit 5 is turned off when the sampling voltage Vcs reaches the first reference voltage. When the sampling voltage Vcs continues to rise and reaches the second reference voltage, the current sampling switch K0 is turned off and the discharge circuit 6 is turned on simultaneously to start discharging. At this time, one conduction cycle ends.

[0057] If a self-charging signal VCC_S is present when entering the current conduction cycle, then starting from the moment the current sampling switch K0 is turned on, after waiting for a preset on-time t0, the current sampling switch K0 and the current input circuit 5 are turned off and the charging switch K3 is turned on to start charging. After waiting for a preset charging time t1, the current sampling switch K0 and the current input circuit 5 are turned on and the charging switch K3 is turned off. Then, when the sampling voltage Vcs reaches the first reference voltage, the current input circuit 5 is turned off. When the sampling voltage Vcs continues to rise and reaches the second reference voltage, the current sampling switch K0 is turned off and the discharge circuit 6 is turned on simultaneously to start discharging. At this time, one conduction cycle ends.

[0058] 2) After the conduction cycle ends, the shutdown cycle begins, and the system waits for the next oscillator to be triggered before entering the conduction cycle again.

[0059] refer to Figure 4 The following example uses an AC-DC power chip with an ESR topology integrating the power drive circuit of this invention as a case study to provide a specific circuit example. This AC-DC power chip internally includes a power drive chip and a drive transistor Q1, and externally connects to an energy storage module 1 (VCC capacitor C0), etc. The drive transistor Q1 is a Darlington transistor. The pins of this AC-DC power chip include a chip voltage pin VCC, a feedback pin FB, a ground pin GND, two drive transistor control pins, and one drive transistor output pin. The input of the drive transistor Q1 is connected to the positive terminal of the external input power supply via the primary side of the transformer. The bases of the two transistors of the drive transistor Q1 are respectively connected to the corresponding drive transistor output pins. The output of the drive transistor Q1 is connected to the drive transistor output pin. The GND pin is connected to the negative terminal of the external input power supply. The energy storage module 1 is connected to the chip voltage pin VCC. The feedback pin FB is connected to the voltage divider on one side of the auxiliary winding; based on this voltage divider, the output voltage can be determined.

[0060] Specifically, the driving transistor includes a front-stage transistor and a rear-stage transistor, and the discharge circuit 6 includes a first discharge switch K2 and a second discharge switch K4. The current sampling switch K0, the first discharge switch K2, and the second discharge switch K4 are all specifically NMOS transistors NM3 and NM2. The first discharge switch K2 is connected between the base of the front-stage transistor and ground, and the second discharge switch K4 is connected between the base of the rear-stage transistor and ground. The discharge circuit 6 discharges when both the first discharge switch K2 and the second discharge switch K4 are simultaneously turned on.

[0061] Specifically, the current input circuit 5 includes a current source Ibase and a current input switch K1. The current source Ibase draws current from the supply voltage VCC, and the current input switch K1 is specifically a PMOS transistor PM1. The current input switch K1 is connected between the base of the preceding transistor and the current source Ibase. When the current input switch K1 is turned on, the current input circuit 5 inputs current to drive the driving transistor Q1 to turn on.

[0062] Preferably, the charging switch K3 is a PMOS transistor, and a start-up resistor Rhv is connected between the input and output of the driving transistor Q1. The input power supply is used to charge the energy storage module 1 through the start-up resistor Rhv and the parasitic diode of the charging switch K3 when the entire circuit or chip is powered on. When the supply voltage VCC rises to the preset voltage set inside the control module 4, the power driving circuit starts to work to ensure the power supply of the entire circuit or chip.

[0063] The following is in conjunction with the appendix Figure 4 , 5 The complete working principle of this invention is as follows:

[0064] 1) When the chip is powered on, the external input power supply Vin is turned on. The Vin power supply charges the VCC capacitor C0 through the start-up resistor Rhv. When the Vcc voltage on C0 rises to the preset voltage set inside the control module 4, the chip starts to work. After the chip starts working, it will periodically turn the driver transistor Q1 on and off. When the driver transistor Q1 is on, the primary inductance of the transformer is charged. When the driver transistor Q1 is off, the energy stored in the primary inductance will be converted into the output winding inductance and the auxiliary winding inductance.

[0065] 2) After the chip starts working, at the beginning of each conduction cycle, it will determine whether the Vcc voltage is normal. The chip will decide whether the VCC capacitor needs to be charged in this cycle based on the level of VCC_S.

[0066] like Figure 4At the rising edge of Von1 in the first cycle, VCC_S is high, indicating that VCC is high and therefore no charging is needed in this cycle. Von0 and Von1 are both high, Q1 is turned on, and the primary current Ip enters one end of switch K0 and connects to GND. When Ip increases to ipk0 (meaning Vcs reaches the first reference voltage), Von1 turns off, causing the current Ibase flowing into the base of Q1 to become 0. However, due to the turn-off delay characteristic of Q1, Q1 will remain on for the next few hundred ns to several microseconds, and Ip will continue to increase along the original flow path. When Ip increases to Ipk1 (meaning Vcs reaches the second reference voltage), Voff becomes high, quickly discharging the charge stored in the base of Q1, causing Q1 to turn off immediately, and then converting the energy on the primary inductor to the output load.

[0067] 3) such as Figure 4 On the rising edge of Von1 in the second cycle, VCC_S is low, indicating that VCC is low and charging is needed in this cycle. Von0 and Von1 are both high, Q1 is turned on, and the primary current Ip enters one end of switch K0, connecting to GND. After time t0 from the moment Q1 is turned on, Von0 and Von1 are both low, and Vch turns on K3, thus preventing Ip from flowing through K0. This forces the current of Q1 to flow through K3 and charge capacitor C0. After time t1 from the moment K3 is turned on, Vch turns off K3, and Vo... With n0 and Von1 set to high level, Ip continues to flow back to one end of switch K0, connected to GND. When Ip increases by ipk0, Von1 turns off, causing the current Ibase flowing into the base of Q1 to become 0. However, due to the turn-off delay characteristic of Q1, Q1 will remain on for the next few microseconds, and Ip continues to increase along its original path. When Ip increases to Ipk1, Voff becomes high level, rapidly discharging the charge stored in the base of Q1, causing Q1 to turn off immediately. Then, the energy on the primary inductor is transferred to the output load. Therefore, this invention utilizes only the small current charging during the time period t0 to t0+t1 after the start of the drive transistor's conduction cycle, which greatly saves the area of ​​the charging switch K3, is applicable to standard low-voltage CMOS processes, significantly reduces chip costs, and simultaneously greatly expands the applicable range of the electrolytic capacitor ESR, significantly reducing system BOM costs.

[0068] Based on a unified inventive concept, this invention also discloses a power supply driving method, comprising:

[0069] If the supply voltage VCC is not lower than the self-charging threshold Vref_vcc when entering a conduction cycle, then the first conduction control state is entered after entering the conduction cycle. The first conduction control state is to turn on the current sampling switch K0 and turn off the charging switch K3.

[0070] If the supply voltage VCC is lower than the self-charging threshold Vref_vcc when the control module 4 enters a conduction cycle, it will first be in the first conduction control state after entering the conduction cycle. After the driving transistor Q1 is fully turned on, it will switch to the second conduction control state to use the small current flowing through the driving transistor Q1 in the early stage to charge the energy storage module 1. After the preset charging time t1, it will switch back to the first conduction control state. The second conduction control state is to turn off the current sampling switch K0 and turn on the charging switch K3.

[0071] Those skilled in the art will understand that the methods described in the above embodiments can be implemented by the control module 4. For details on the implementation process, please refer to the foregoing circuit section; further details will not be repeated here.

[0072] In summary, the power drive circuit, chip, and method of the present invention have the following beneficial effects: Charging demand is considered in each conduction cycle. If charging is required in the current conduction cycle, the current sampling switch is turned off and the charging switch is turned on after the drive transistor is fully turned on during the current conduction cycle. The small current flowing through the drive transistor in the early stage of the conduction cycle is used for charging. In the later stage of the current conduction cycle, the current sampling switch is turned on again and the charging switch is turned off, allowing the current output by the drive transistor to flow through the current sampling switch along the normal path. This not only ensures that the supply voltage does not change with the output power, avoiding cumbersome design and debugging of the power supply circuit, but also enables charging of the entire circuit or chip without affecting the switching cycle of the drive transistor. Moreover, this charging method utilizes small currents over multiple cycles, greatly improving the impact of the energy storage capacitor's ESR on the power supply voltage, effectively expanding the ESR application range, and being applicable to standard low-voltage CMOS processes. The energy storage module can be implemented by replacing expensive surface-mount capacitors with cheaper electrolytic capacitors, saving system costs, improving reliability, and having wide applicability.

[0073] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.

[0074] The terms "first," "second," and other ordinal numbers used in this specification are used to describe various constituent elements, but these constituent elements are not limited by these terms. The purpose of using these terms is solely to distinguish one constituent element from others. For example, without departing from the scope of the invention, a first constituent element may be named a second constituent element, and similarly, a second constituent element may be named a first constituent element. The "connection" or "linkage" between two entities described herein includes not only direct connection between the two entities but also indirect connection through other entities that have beneficial improvement effects.

[0075] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims. All of these forms are within the protection scope of the present invention.

Claims

1. A power drive circuit for connecting a drive transistor (Q1) to realize power drive and charge an energy storage module (1), characterized in that, The power drive circuit includes: The charging detection module (2) is connected to the energy storage module (1) and is used to detect the power supply voltage (VCC) of the energy storage module (1) and generate a self-charging signal (VCC_S) when the power supply voltage (VCC) is lower than the self-charging threshold (Vref_vcc). A current sampling switch (K0) is used, the input of the driving transistor (Q1) is used to connect to the input power supply, and the output of the driving transistor (Q1) is grounded through the current sampling switch (K0); The charging switch (K3) has its input connected between the driving switch (Q1) and the current sampling switch (K0), and its output connected to the energy storage module (1). The sampling and detection module (3) has its input connected between the driving transistor (Q1) and the current sampling switch transistor (K0) to obtain the current flowing from the driving transistor (Q1) to the current sampling switch transistor (K0) and generate a sampling voltage (Vcs). The control module (4) is connected to the output of the sampling detection module (3) and obtains the sampling voltage (Vcs), and is connected to the output of the charging detection module (2) and the control terminal of the charging switch (K3), for controlling the driving tube (Q1) based on the sampling voltage (Vcs) so that it periodically alternates between the conduction cycle and the turn-off cycle; If the control module (4) does not receive the self-charging signal (VCC_S) when it enters a conduction cycle, it will be in the first conduction control state after entering the conduction cycle. The first conduction control state is to turn on the current sampling switch (K0) and turn off the charging switch (K3). If the control module (4) receives the self-charging signal (VCC_S) when it enters a conduction cycle, it will first be in the first conduction control state after entering the conduction cycle. After the driving transistor (Q1) is fully turned on, it will switch to the second conduction control state to use the small current flowing through the driving transistor (Q1) in the early stage to charge the energy storage module (1). After the preset charging time (t1) is reached, it will switch back to the first conduction control state. The second conduction control state is to turn off the current sampling switch (K0) and turn on the charging switch (K3).

2. The power supply drive circuit according to claim 1, characterized in that, If the control module (4) receives the self-charging signal (VCC_S) when it enters a conduction cycle, it will first be in the first conduction control state for a preset turn-on time (t0) to ensure that the driving tube (Q1) is fully turned on, and then switch to the second conduction control state.

3. The power supply drive circuit according to claim 2, characterized in that, The preset turn-on duration (t0) does not exceed 30% of the conduction period or 400 ns, and the preset charging duration (t1) does not exceed 30% of the conduction period.

4. The power drive circuit according to claim 2, characterized in that, The preset turn-on duration (t0) and the preset charging duration (t1) ensure that the sampled voltage (Vcs) has not yet reached the first reference voltage when switching back to the first conduction control state. The power drive circuit further includes: The current input circuit (5) is connected to the control terminal of the driving transistor (Q1) and is used to input current to drive the driving transistor (Q1) to conduct. The discharge circuit (6) is connected to the control terminal of the driving transistor (Q1) and is used to discharge the control terminal of the driving transistor (Q1). The control module (4) is also used to simultaneously turn on the current input circuit (5) and turn off the discharge circuit (6) when the current sampling switch (K0) is turned on during each conduction cycle; after entering the conduction cycle, the current input circuit (5) is simultaneously turned off when switching to the second conduction control state; and the current input circuit (5) is simultaneously turned on when switching back to the first conduction control state; and after entering the conduction cycle, the current input circuit (5) is turned off when the sampling voltage (Vcs) reaches the first reference voltage to stop driving the drive transistor (Q1); and the current sampling switch (K0) is turned off when the sampling voltage (Vcs) continues to rise to the second reference voltage, and the discharge circuit (6) is simultaneously controlled to discharge to forcibly and completely turn off the drive transistor (Q1) so that it enters the turn-off cycle.

5. The power drive circuit according to claim 4, characterized in that, The driving transistor (Q1) is a Darlington transistor, and the driving transistor (Q1) includes a front-stage transistor and a rear-stage transistor. The discharge circuit (6) includes a first discharge switch (K2) and a second discharge switch (K4). The first discharge switch (K2) is connected between the base of the front-stage transistor and ground, and the second discharge switch (K4) is connected between the base of the rear-stage transistor and ground. When the first discharge switch (K2) and the second discharge switch (K4) are turned on simultaneously, the discharge circuit (6) discharges.

6. The power drive circuit according to claim 5, characterized in that, The current input circuit (5) includes a current source (Ibase) and a current input switch (K1). The current source (Ibase) draws power from the supply voltage (VCC) to generate current. The current input switch (K1) is connected between the base of the front-stage transistor and the current source (Ibase). When the current input switch (K1) is turned on, the current input circuit (5) inputs current to drive the driving transistor (Q1) to turn on.

7. The power supply drive circuit according to claim 1, characterized in that, The charging detection module (2) includes a latch comparator (CP1), one of which is connected to the self-charging threshold (Vref_vcc), the other input is connected to the output of the energy storage module (1), and its control terminal is connected to the control module (4). The latch comparator (CP1) is used to detect the supply voltage (VCC) of the energy storage module (1), compare the supply voltage (VCC) with the self-charging threshold (Vref_vcc) and generate the self-charging signal (VCC_S), latch the newly generated self-charging signal (VCC_S), and output the self-charging signal (VCC_S) to the control module (4) at the start of the next conduction cycle under the trigger of the control module (4).

8. The power supply drive circuit according to claim 1, characterized in that, A starting resistor (Rhv) is also connected between the input and output of the driving transistor (Q1). The input power supply is used to charge the energy storage module (1) through the starting resistor (Rhv) and the parasitic diode of the charging switch transistor (K3) when the power is turned on. When the supply voltage (VCC) rises to the preset voltage set inside the control module (4), the power drive circuit starts to work.

9. A power driver chip, characterized in that, It integrates a power drive circuit as described in any one of claims 1-8.

10. A power supply driving method, characterized in that, The power driving method is applied to the power driving circuit as described in any one of claims 1-8, and the power driving method includes: If the supply voltage (VCC) is not lower than the self-charging threshold (Vref_vcc) when entering a conduction cycle, the system is in the first conduction control state after entering the conduction cycle. The first conduction control state is to turn on the current sampling switch (K0) and turn off the charging switch (K3). If the supply voltage (VCC) is lower than the self-charging threshold (Vref_vcc) when the control module (4) enters a conduction cycle, it first enters the first conduction control state. After the driving transistor (Q1) is fully turned on, it switches to the second conduction control state to use the small current flowing through the driving transistor (Q1) in the early stage to charge the energy storage module (1). After the preset charging time (t1) is completed, it switches back to the first conduction control state. The second conduction control state is to turn off the current sampling switch (K0) and turn on the charging switch (K3).

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