A broadband multi-stage wilkinson power divider and apparatus
By using an outer and inner inductor to form a two-stage LC network in the Wilkinson power divider, combined with multi-layer metal wiring, the problems of large footprint and small bandwidth of traditional Wilkinson power dividers are solved, achieving an ultra-compact chip layout and increased bandwidth.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- BEIJING INST OF TECH
- Filing Date
- 2023-06-25
- Publication Date
- 2026-07-14
AI Technical Summary
Existing Wilkinson power dividers suffer from large footprint, high insertion loss, and low bandwidth on silicon substrates. In particular, in multi-stage power divider structures, traditional microstrip lines and LC networks further increase the chip area.
A two-stage LC network is formed by using an outer ring inductor and an inner ring inductor. The outer ring inductor consists of two inductors twisted together, and the inner ring inductor is a figure-eight shaped trace. The equivalent inductance is increased by coupling mutual inductance, and multiple metal layers are stacked on the silicon substrate for wiring, forming an ultra-compact wiring layout.
This effectively reduces the area occupied by the power divider on the chip, solves the problem of excessively long traces, increases bandwidth, and achieves an ultra-compact layout.
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Figure CN116827293B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of chip technology, and in particular to a broadband multi-stage Wilkinson power divider and device. Background Technology
[0002] The development of current technologies in satellite communication, radar detection, and many other fields requires the use of phased array systems for signal modulation. During transmission, a multi-stage power divider splits a single signal into multiple signals; during reception, a power combiner combines these multiple signals into a single signal. In systems requiring higher power, this is often achieved by power-dividing the signals into multiple paths, amplifying each path, and then combining them.
[0003] The basic circuit of a power divider is a 1-to-2 splitter, with both signals having equal amplitude and phase. However, due to the need for a certain degree of isolation in practical engineering, Wilkinson power dividers are often used. In this type, the input and output ports are connected via a quarter-wavelength transmission line, with a resistor connecting the two ends of the transmission line near the output port to achieve isolation.
[0004] Traditional on-chip power dividers on silicon substrates typically have two implementations: the first uses the classic Wilkinson power divider, directly employing transmission line types such as microstrip lines to realize a quarter-wavelength transmission line. The second uses a multi-stage LC network composed of lumped inductors and capacitors to represent the equivalent transmission line. Nowadays, to meet broadband requirements, more and more power dividers are adopting multi-stage power divider structures, that is, after a single-stage quarter-wavelength transmission line and isolation resistor, adding another stage of a quarter-wavelength transmission line and isolation resistor with the same center frequency to increase bandwidth.
[0005] Existing power dividers have the following drawbacks:
[0006] 1. The classic Wilkinson power divider directly uses transmission line types such as microstrip lines to implement 1 / 4 wavelength transmission lines, which leads to excessively long traces in the on-chip system, consuming a lot of chip area, and also has problems such as large insertion loss and small bandwidth.
[0007] 2. The second method uses a multi-stage LC network composed of lumped inductors and capacitors to represent the transmission line. This method also consumes a considerable amount of chip area. In order to pursue broadband performance, multi-stage power dividers introduce multiple transmission lines, which will inevitably further increase the occupied area. Summary of the Invention
[0008] In view of this, embodiments of the present invention provide a broadband multi-stage Wilkinson power divider and apparatus.
[0009] One aspect of this invention provides a broadband multi-stage Wilkinson power divider, including an outer inductor and an inner inductor;
[0010] The outer inductor is composed of a first inductor and a second inductor. The outer inductor is the first-stage transmission line of the power divider. The inductor tap of the outer inductor is connected to the combiner port.
[0011] The inner inductor is composed of a third inductor and a fourth inductor. The inner inductor is the second-stage transmission line of the power divider. The inner inductor is an "8"-shaped inductor.
[0012] The outer inductor and the inner inductor form an equivalent transmission line of a two-stage LC network, which reduces the area occupied by the power divider on the chip.
[0013] Optionally, the power divider further includes a first isolation resistor and a second isolation resistor:
[0014] A first isolation resistor, one end of which is electrically connected to the output port of the first inductor and the other end of which is electrically connected to the output port of the second inductor, is used to isolate the two output ports of the outer inductor;
[0015] The second isolation resistor has one end electrically connected to the output port of the third inductor and the other end electrically connected to the output port of the fourth inductor. The second isolation resistor is used to isolate the two output ports of the inner inductor.
[0016] Optionally, the outer inductor is connected to the inner inductor through a metal via.
[0017] Optionally, the outer inductor is formed by two inductors intertwined; the inner inductor is formed by two inductors intertwined; wherein, the intertwining of the two inductors increases the equivalent inductance value through mutual coupling.
[0018] Optionally, it also includes a substrate; the outer inductor, the inner inductor, the first isolation resistor, and the second isolation resistor are all disposed on the substrate.
[0019] Optionally, the substrate has nine metal layers stacked from bottom to top, the outer ring inductor is located on the ninth metal layer on the substrate; the inner ring inductor is located on the eighth metal layer and the ninth metal layer on the substrate, and the ninth metal layer is connected to the eighth metal layer through a via.
[0020] Optionally, the connection structure of the combining port adopts a T-shaped structure, and the input terminal line is connected to the terminal of the outer ring inductor in the first direction and the terminal of the outer ring inductor in the second direction through the combining port. The T-shaped structure is implemented on the ninth metal layer.
[0021] Optionally, the center of the outer inductor coincides with that of the inner inductor, and the inner diameter of the outer inductor is larger than the outer diameter of the inner inductor.
[0022] Optionally, it also includes:
[0023] After the signal reaches the inductor tap of the outer inductor from the combined port, it is split into two signals, which are transmitted clockwise and counterclockwise respectively.
[0024] The signal is transmitted from the outer inductor to the inner inductor and then to the two power divider output ports.
[0025] On the other hand, embodiments of the present invention provide a broadband multi-stage Wilkinson power divider, including the aforementioned broadband multi-stage Wilkinson power divider.
[0026] The embodiments of the present invention include at least the following beneficial results: the inner inductor of the embodiments of the present invention adopts an "8"-shaped routing inductor, realizing an ultra-compact routing layout of the power divider, which can effectively reduce the chip area and can shield and isolate each other with the outer inductor; the outer inductor and the inner inductor of the present invention form a two-stage transmission inductor, which effectively solves the problem of excessively long routing and can reduce the chip area occupied. Attached Figure Description
[0027] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0028] Figure 1 A 2D schematic diagram of a broadband multi-stage Wilkinson power divider provided in an embodiment of the present invention;
[0029] Figure 2 (a) is a schematic diagram of a conventional two-stage power divider provided in an embodiment of the present invention. Figure 2 (b) is a schematic diagram of a power divider provided in an embodiment of the present invention, which uses a two-stage LC network to equivalently replace a 1 / 4 wavelength transmission line;
[0030] Figure 3 This is a 3D schematic diagram of a broadband multi-stage Wilkinson power divider provided in an embodiment of the present invention.
[0031] Explanation of reference numerals in the attached diagram: 1-Input port; 2-First inductance of the outer ring inductor; 3-Second inductance of the outer ring inductor; 4-R1 is the first isolation resistor; 5-Third inductance of the inner ring inductor; 6-Fourth inductance of the inner ring inductor; 7-R2 is the second isolation resistor; 8-First power divider output port; 9-Second power divider output port; 10-via; 11-1 / 4 wavelength transmission line; 12-Equivalent LC network; 13-Input port; 14-First power divider output port; 15-Second power divider output port; 16-Inner ring inductor; 17-Outer ring inductor; 18-Input port; 19-First power divider output port; 20-Second power divider output port. Detailed Implementation
[0032] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.
[0033] In response to the problems existing in the current technology, such as Figure 1 As shown, this embodiment of the invention provides a broadband multi-stage Wilkinson power divider, including an outer inductor and an inner inductor:
[0034] The outer inductor, consisting of a first inductor and a second inductor, is the first-stage transmission line of the power divider. The inductor tap of the outer inductor is connected to the combiner port. The outer inductor is formed by two inductors twisted together. The twisting of the two inductors increases the equivalent inductance value through mutual coupling.
[0035] The inner inductor, consisting of the third and fourth inductors, is the second-stage transmission line of the power divider. The inner inductor is a figure-eight shaped inductor. The inner inductor is formed by two inductors intertwined, and the intertwining of the two inductors increases the equivalent inductance value through mutual coupling.
[0036] The outer inductor and the inner inductor form an equivalent transmission line of a two-stage LC network, which reduces the area occupied by the power divider on the chip.
[0037] Optionally, the power divider further includes a first isolation resistor and a second isolation resistor.
[0038] A first isolation resistor is provided, with one end electrically connected to the output port of the first inductor and the other end electrically connected to the output port of the second inductor. The first isolation resistor is used to isolate the two output ports of the outer inductor.
[0039] The second isolation resistor has one end electrically connected to the output port of the third inductor and the other end electrically connected to the output port of the fourth inductor. The second isolation resistor is used to isolate the two output ports of the inner inductor.
[0040] Specifically, the power divider in this embodiment of the invention uses a Wilkinson power divider, and the inner inductor uses an "8"-shaped trace, which can reduce the chip's footprint. (Refer to...) Figure 1 In the diagram, 2 represents the first inductance of the outer ring inductor, and 3 represents the second inductance of the outer ring inductor. Figure 1 Taking the first inductor as an example, the long dashed line represents the direction of current flow in the outer inductor, which is clockwise. The magnetic field generated inside the upper and lower parts of the figure-eight shape of the inner inductor is perpendicular to the inside. Therefore, the induced current generated in the inner inductor is 0 and will not cause signal interference. The dotted dashed line represents the direction of current flow in the inner inductor.
[0041] Specifically, refer to Figure 2 , Figure 2 Figure (a) shows the schematic diagram of a traditional two-stage power divider, and Figure (b) shows the schematic diagram of a power divider in this embodiment of the invention after replacing the 1 / 4 wavelength transmission line with a two-stage LC network. Compared with the traditional Wilkinson power divider, this invention adds a 1 / 4 wavelength transmission line and isolation resistor with the same center frequency after the single-stage 1 / 4 wavelength transmission line and isolation resistor to increase the bandwidth. In Figure (b), capacitors C1 and C2 are equivalent capacitors, which are formed by the induction between the outer inductance, the inner inductance and the substrate, and are used to reduce the impact on insertion loss.
[0042] Optionally, the outer inductor is connected to the inner inductor through a metal via.
[0043] Specifically, a via is a hole formed by drilling a hole in the dielectric layer between two metal layers and then connecting them with a metal post.
[0044] Optionally, the outer inductor is formed by two inductors intertwined; the inner inductor is formed by two inductors intertwined; wherein, the intertwining of the two inductors increases the equivalent inductance value through mutual coupling.
[0045] Specifically, refer to Figure 1 In the diagram, 2 represents the first inductance of the outer inductor, and 3 represents the second inductance. For clarity, the outer inductor is simplified to appear as a single coil, but it is actually composed of two coils wound together. Figure 1 In the diagram, 5 represents the third inductance of the inner coil, and 6 represents the fourth inductance. The inner coil is simplified to appear as a single coil, but it is actually composed of two coils wound together. The current flows in the same direction in the two adjacent coils, and the winding of the two inductors increases the equivalent inductance value through mutual coupling. (Refer to...) Figure 3 It can be seen that both the outer and inner inductors are made up of two inductors intertwined.
[0046] Optionally, a broadband multi-stage Wilkinson power divider of the present invention further includes a substrate: the outer inductor, the inner inductor, the first isolation resistor and the second isolation resistor are all disposed on the substrate.
[0047] Specifically, one embodiment of the present invention is implemented using TSMC 65nm process. The substrate is a silicon substrate, and nine metal layers are stacked on the substrate from bottom to top for different wiring. Adjacent metal layers are separated by dielectric layers, and the connection between adjacent metal layers is achieved through vias. The outer ring inductor, the inner ring inductor, the first isolation resistor, and the second isolation resistor are all disposed on the substrate.
[0048] Optionally, the substrate has nine metal layers stacked from bottom to top, the outer ring inductor is located on the ninth metal layer on the substrate; the inner ring inductor is located on the eighth metal layer and the ninth metal layer on the substrate, and the ninth metal layer is connected to the eighth metal layer through a via.
[0049] Specifically, the substrate has nine metal layers stacked from bottom to top, as shown in the reference. Figure 1 In the diagram, the gray lines represent the portion located on the eighth metal layer, and the black lines represent the portion located on the ninth metal layer. A portion of the ninth metal layer has vias connecting to the eighth metal layer to avoid trace crossings. Figure 1 It is known that the outer inductor is located on the ninth metal layer on the substrate, and the inner inductor is located on the eighth metal layer and the ninth metal layer on the substrate. The first isolation resistor (R1) is connected to the inductor led out through the eighth metal layer, and the second isolation resistor (R2) is connected to the inductor led out through the ninth metal layer. The isolation resistor is used to isolate the two connected ports, and also serves as a protection circuit when one of the ports is short-circuited or open-circuited.
[0050] Optionally, the connection structure of the combining port adopts a T-shaped structure, and the input terminal line is connected to the terminal of the outer ring inductor in the first direction and the terminal of the outer ring inductor in the second direction through the combining port. The T-shaped structure is implemented on the ninth metal layer.
[0051] Specifically, the connection structure of the combining port adopts a T-shaped structure. The input terminal line is connected to the terminal of the outer inductor in the first direction and the terminal of the outer inductor in the second direction through the combining port. The T-shaped structure is implemented on the ninth metal layer. After the signal reaches the inductor tap of the outer inductor from the combining port, it is split into two signals, which are transmitted clockwise and counterclockwise respectively. After the signal reaches the inner inductor from the outer inductor, it is transmitted to the two power divider output ports.
[0052] Optionally, the center of the outer inductor coincides with that of the inner inductor, and the inner diameter of the outer inductor is larger than the outer diameter of the inner inductor.
[0053] Specifically, in this embodiment of the invention, the inner inductor with an "8" shape is stacked in the center blank area of the coil formed by the outer inductor, thereby reducing the chip area while achieving ultra-wide bandwidth.
[0054] The following example illustrates the use of a broadband multi-stage Wilkinson power divider according to the present invention:
[0055] In radio frequency circuits in the field of communication, the wideband multi-stage Wilkinson power divider of this invention is used. A current signal is input from the input port and split into two signals through the combiner port, flowing into the outer inductor. The outer inductor serves as the first transmission line after the two signals. The outer inductor is connected to the inner inductor through vias. The inner inductor is a figure-eight shaped inductor. The figure-eight shaped routing realizes the ultra-compact wiring layout of the power divider, which can effectively reduce the chip area. The signal flows from the outer inductor to the inner inductor through vias and is finally output from the two output ports, realizing the splitting of one signal into two signals.
[0056] In summary, the broadband multi-stage Wilkinson power divider according to an embodiment of the present invention has the following advantages:
[0057] 1. In this embodiment of the invention, the inner inductor adopts an "8"-shaped routing inductor, which realizes an ultra-compact routing layout of the power divider, effectively reducing the chip area and providing mutual shielding and isolation with the outer inductor;
[0058] 2. The outer and inner inductors of this invention form a two-stage transmission inductor, which effectively solves the problem of excessively long traces and reduces the chip's footprint.
[0059] On the other hand, embodiments of the present invention also provide a broadband multi-stage Wilkinson power divider, including the aforementioned broadband multi-stage Wilkinson power divider.
[0060] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0061] Although embodiments of the invention have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.
[0062] The above is a detailed description of the preferred embodiments of the present invention, but the present invention is not limited to the embodiments described. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention, and these equivalent modifications or substitutions are all included within the scope defined by the claims of this application.
Claims
1. A broadband multi-stage Wilkinson power divider, characterized in that, Including outer inductance and inner inductance; The outer inductor is composed of a first inductor and a second inductor. The outer inductor is the first-stage transmission line of the power divider. The inductor tap of the outer inductor is connected to the combiner port. The inner inductor is composed of a third inductor and a fourth inductor. The inner inductor is the second-stage transmission line of the power divider. The inner inductor is an "8"-shaped inductor. The outer inductor and the inner inductor form an equivalent transmission line of a two-stage LC network, which is used to reduce the area occupied by the power divider on the chip. The power divider also includes a first isolation resistor and a second isolation resistor: A first isolation resistor, one end of which is electrically connected to the output port of the first inductor and the other end of which is electrically connected to the output port of the second inductor, is used to isolate the two output ports of the outer inductor; The second isolation resistor has one end electrically connected to the output port of the third inductor and the other end electrically connected to the output port of the fourth inductor. The second isolation resistor is used to isolate the two output ports of the inner inductor. After the signal reaches the inductor tap of the outer inductor from the combined port, it is split into two signals, which are transmitted clockwise and counterclockwise respectively. The signal is transmitted from the outer inductor to the inner inductor and then to the two power divider output ports.
2. A broadband multi-stage Wilkinson power divider according to claim 1, characterized in that, The outer inductor is connected to the inner inductor through a metal via.
3. A broadband multi-stage Wilkinson power divider according to claim 1, characterized in that, The outer inductor is formed by two inductors intertwined; the inner inductor is formed by two inductors intertwined; wherein, the intertwining of the two inductors increases the equivalent inductance value through mutual coupling.
4. A broadband multi-stage Wilkinson power divider according to claim 1, characterized in that, It also includes a substrate; the outer ring inductor, the inner ring inductor, the first isolation resistor and the second isolation resistor are all disposed on the substrate.
5. A broadband multi-stage Wilkinson power divider according to claim 4, characterized in that, The substrate has nine metal layers stacked from bottom to top. The outer ring inductor is located on the ninth metal layer on the substrate. The inner ring inductor is located on the eighth metal layer and the ninth metal layer on the substrate. The ninth metal layer is connected to the eighth metal layer through a via.
6. A broadband multi-stage Wilkinson power divider according to claim 5, characterized in that, The connection structure of the combining port adopts a T-shaped structure. The input terminal line is connected to the terminal of the outer ring inductor in the first direction and the terminal of the outer ring inductor in the second direction through the combining port. The T-shaped structure is implemented on the ninth metal layer.
7. A broadband multi-stage Wilkinson power divider according to claim 1, characterized in that, The outer inductor and the inner inductor have their centers coincide, and the inner diameter of the outer inductor is larger than the outer diameter of the inner inductor.
8. A broadband multi-stage Wilkinson power divider, characterized in that, Includes a broadband multi-stage Wilkinson power divider as described in any one of claims 1-7.