A method for manufacturing ohmic contacts for gallium nitride devices

By using a low-temperature alloy annealing method with a Cr/Al/Ti/W multilayer metal structure on GaN-based HEMT devices, the problems of rough ohmic contact surfaces and uneven electric fields were solved, thereby improving device reliability and reducing costs.

CN116844947BActive Publication Date: 2026-06-02XUZHOU GSR SEMICON CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
XUZHOU GSR SEMICON CO LTD
Filing Date
2022-11-30
Publication Date
2026-06-02

AI Technical Summary

Technical Problem

The fabrication of ohmic contacts in existing GaN-based HEMT devices suffers from rough surface morphology and numerous edge burrs, resulting in uneven electric field distribution and affecting device reliability and performance.

Method used

A Cr/Al/Ti/W multilayer metal structure is used as the ohmic contact. The source and drain electrodes are formed by low-temperature alloy annealing, which reduces the annealing temperature, improves the surface morphology, and enhances reliability.

Benefits of technology

This method achieves a smooth and uniform surface morphology for GaN-based HEMT devices, reducing manufacturing costs and improving device reliability.

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Abstract

This invention discloses a method for manufacturing ohmic contacts for gallium nitride (GaN) devices, belonging to the field of semiconductor device manufacturing technology. The method includes the following steps: defining source / drain etching patterns using photolithography; etching a depth of 10–15 nm in the AlGaN barrier layer; cleaning with acid / alkali solutions; performing surface oxidation treatment; defining source / drain ohmic contact patterns on the oxidized GaN-based HEMT epitaxial wafer; depositing a Cr / Al / Ti / W multilayer metal structure sequentially from bottom to top within the source / drain ohmic contact patterns as the source / drain ohmic contacts for the GaN device; performing metal lift-off to form source / drain electrodes; and performing alloy annealing at 400–800°C for 30 s–10 min to form the source / drain ohmic contact electrodes. The annealing temperature required for the Cr / Al / Ti / W titanium alloy contacts is 50–100°C lower than that for Ti / Al / Ni / Au source / drain ohmic contact metals. The lower annealing temperature results in a smoother and more uniform surface morphology for the GaN device, improving device reliability.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor device manufacturing technology, and more particularly to a method for manufacturing ohmic contacts for gallium nitride devices. Background Technology

[0002] In recent years, gallium nitride (GaN) wide-bandgap semiconductor materials have attracted widespread attention due to their excellent properties, such as large bandgap, high critical field strength, high thermal conductivity, high carrier saturation velocity, and high two-dimensional electron gas concentration at the heterojunction interface. Among them, the superior performance exhibited by AlGaN / GaN heterojunction high electron mobility transistors (AlGaN / GaN HFETs) and GaN heterojunction bipolar transistors (GaN HBTs) under high temperature, high pressure, high frequency, and high thermal conductivity has led to extensive and in-depth research both domestically and internationally, resulting in remarkable achievements. For AlGaN / GaN HFET devices, the ohmic contact resistance between the source and drain has always been a key factor affecting device performance. High-performance ohmic contacts play a crucial role in realizing the high current and high power advantages of AlGaN / GaN HFET devices. GaN is a wide-bandgap semiconductor material and is difficult to dope; therefore, compared to silicon devices, the fabrication of ohmic contacts for GaN HFETs is more challenging. Currently, mainstream GaN-based RF power and power switching devices all employ alloy systems, especially ohmic contacts, which typically use four layers of metal (Ti / Al / X / Au) with annealing temperatures exceeding 800℃. The inventors believe that these high-temperature gold-containing ohmic contacts have very rough surface morphology and numerous edge burrs, leading to uneven electric field distribution and potentially causing short circuits or reliability degradation. Therefore, a method for manufacturing ohmic contacts for gallium nitride devices needs to be designed.

[0003] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art. Summary of the Invention

[0004] The inventors discovered through research that gold-containing ohmic contacts that have undergone high-temperature processes have very rough surface morphology and many edge burrs, which can cause uneven electric field distribution in the device, leading to short circuits or reliability degradation.

[0005] In view of at least one of the above-mentioned technical problems, this disclosure provides a method for manufacturing ohmic contacts for gallium nitride devices, the specific technical solution of which is as follows:

[0006] A method for fabricating ohmic contacts for gallium nitride (GaN) devices includes the following steps: preparing a GaN-based HEMT epitaxial wafer, the GaN-based HEMT epitaxial wafer comprising a substrate, and a buffer layer, a GaN channel layer, and an AlGaN barrier layer epitaxially grown sequentially from bottom to top on the upper surface of the substrate; defining source / drain etching pattern regions on the GaN-based HEMT epitaxial wafer using photolithography, and etching the upper surface of the AlGaN barrier layer to a depth of 10–15 nm using ICP etching; cleaning the etched source / drain patterns using acid and alkaline solutions; and cleaning the resulting GaN... The GaN-based HEMT epitaxial wafer undergoes surface oxidation treatment; the source / drain ohmic contact pattern region is defined on the oxidized GaN-based HEMT epitaxial wafer using photolithography; source / drain ohmic contact metals are deposited sequentially from bottom to top on the source / drain ohmic contact pattern region on the upper surface of the GaN-based HEMT epitaxial wafer, consisting of a first layer of chromium, a second layer of aluminum, a third layer of titanium, and a fourth layer of tungsten; metal stripping is performed to form source / drain electrodes, and alloy annealing is carried out at 400–800℃ for 30 s–10 min to form source / drain ohmic contact electrodes.

[0007] In some embodiments of this disclosure, the thickness of the first layer of metallic chromium is 5–20 nm.

[0008] In some embodiments of this disclosure, the thickness of the second layer of aluminum is 30–300 nm.

[0009] In some embodiments of this disclosure, the thickness of the third layer of titanium is 20–200 nm.

[0010] In some embodiments of this disclosure, the thickness of the fourth tungsten layer is 20–200 nm.

[0011] In some embodiments of this disclosure, the substrate is made of Si, SiC, or sapphire.

[0012] Compared with the prior art, the present invention has the following advantages: A Cr / Al / Ti / W multilayer metal structure is deposited on the surface of a GaN-based HEMT epitaxial wafer as the source / drain ohmic contact of the gallium nitride device. The work function of Cr is similar to that of n-GaN, and due to the chemical properties of Cr, it can also effectively reduce the degree of oxidation of the source / drain ohmic contact. The annealing temperature required for the Cr / Al / Ti / W titanium alloy contact is 50-100°C lower than that for the Ti / Al / Ni / Au source / drain ohmic contact metal. The lower annealing temperature makes the surface morphology of the gallium nitride device smoother and more uniform, improving the reliability of the device. Replacing Au with W also greatly reduces the manufacturing cost of GaN-based HEMT devices. Attached Figure Description

[0013] Figure 1 This is a schematic diagram of the gallium nitride device structure in this invention;

[0014] Figure 2 This is a schematic diagram of the drain-source ohmic contact alloy structure in this invention.

[0015] The labels in the diagram are as follows: 1. Substrate; 2. Buffer layer; 3. GaN channel layer; 4. AlGaN barrier layer; 5. Source; 6. Drain; 7. Gate; 81. First layer of chromium; 82. Second layer of aluminum; 83. Third layer of titanium; 84. Fourth layer of tungsten. Detailed Implementation

[0016] To better understand the purpose, structure, and function of this invention, the technical solutions in the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this invention, and not all embodiments.

[0017] In the description of this application, it should be understood that the directional terms "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and providing a brief description, and do not indicate or imply that the device or unit referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0018] As shown in the attached diagram. Figures 1 to 2 As shown, a method for fabricating ohmic contacts for gallium nitride (GaN) devices is designed, comprising the following steps: preparing a GaN-based HEMT epitaxial wafer, the GaN-based HEMT epitaxial wafer including a substrate 1, and a buffer layer 2, a GaN channel layer 3, and an AlGaN barrier layer 4 epitaxially grown sequentially from bottom to top on the upper surface of the substrate 1, with a 2DEG formed between the GaN channel layer 3 and the AlGaN barrier layer 4; defining source and drain etching pattern regions on the GaN-based HEMT epitaxial wafer using photolithography, and etching the upper surface of the AlGaN barrier layer 4 to a depth of 10-15 nm using ICP etching; and processing the etched source and drain patterns using acid... The GaN-based HEMT epitaxial wafer is cleaned with an alkaline solution; the surface of the resulting GaN-based HEMT epitaxial wafer is oxidized; the source-drain ohmic contact pattern region is defined on the oxidized GaN-based HEMT epitaxial wafer using photolithography; source-drain ohmic contact metals are deposited sequentially from bottom to top on the source-drain ohmic contact pattern region on the upper surface of the GaN-based HEMT epitaxial wafer, consisting of a first layer of chromium 81, a second layer of aluminum 82, a third layer of titanium 83, and a fourth layer of tungsten 84; metal stripping is performed to form source-drain electrodes, and alloy annealing is carried out at 400–800℃ for 30 s–10 min to form source-drain ohmic contact electrodes.

[0019] A Cr / Al / Ti / W multilayer metal structure is deposited on the surface of a GaN-based HEMT epitaxial wafer as the source and drain ohmic contacts for gallium nitride devices. The work function of Cr in the first layer, chromium 81, is similar to that of n-GaN, and due to the chemical properties of Cr, it can also effectively reduce the degree of oxidation of the source and drain ohmic contacts. The annealing temperature required for the Cr / Al / Ti / W titanium alloy contacts is 50-100°C lower than that for Ti / Al / Ni / Au source and drain ohmic contacts. The lower annealing temperature makes the surface morphology of the gallium nitride device smoother and more uniform, improving the reliability of the device. Replacing Au with W in the fourth layer, tungsten 84, also greatly reduces the manufacturing cost of GaN-based HEMT devices.

[0020] The above embodiments illustrate three examples of implementing the above technical solutions:

[0021] Example 1

[0022] This embodiment discloses a method for manufacturing ohmic contacts for gallium nitride (GaN) devices, comprising the following steps: preparing a GaN-based HEMT epitaxial wafer, the GaN-based HEMT epitaxial wafer including a substrate 1, the substrate 1 being made of Si, and a buffer layer 2, a GaN channel layer 3, and an AlGaN barrier layer 4 epitaxially grown sequentially from bottom to top on the upper surface of the substrate 1, with a 2DEG formed between the GaN channel layer 3 and the AlGaN barrier layer 4; defining source and drain etching pattern regions on the GaN-based HEMT epitaxial wafer using photolithography, and etching the upper surface of the AlGaN barrier layer 4 to a depth of 10 nm using ICP etching technology; and performing etching... The obtained source / drain patterns were cleaned using acid and alkali solutions; the GaN-based HEMT epitaxial wafer was subjected to surface oxidation treatment; the source / drain ohmic contact pattern region was defined on the oxidized GaN-based HEMT epitaxial wafer using photolithography; source / drain ohmic contact metals were deposited sequentially from bottom to top on the source / drain ohmic contact pattern region on the upper surface of the GaN-based HEMT epitaxial wafer, consisting of a first layer of chromium 81, a second layer of aluminum 82, a third layer of titanium 83, and a fourth layer of tungsten 84; metal stripping was performed to form source / drain electrodes, and alloy annealing was performed at 400°C for 30 seconds to form source / drain ohmic contact electrodes.

[0023] The first layer of chromium has a thickness of 5 nm, the second layer of aluminum has a thickness of 30 nm, the third layer of titanium has a thickness of 200 nm, and the fourth layer of tungsten has a thickness of 20 nm.

[0024] Example 2

[0025] This embodiment discloses a method for manufacturing ohmic contacts for gallium nitride (GaN) devices, comprising the following steps: preparing a GaN-based HEMT epitaxial wafer, the GaN-based HEMT epitaxial wafer including a substrate 1, the substrate 1 being made of SiC, and a buffer layer 2, a GaN channel layer 3, and an AlGaN barrier layer 4 epitaxially grown sequentially from bottom to top on the upper surface of the substrate 1, with a 2DEG formed between the GaN channel layer 3 and the AlGaN barrier layer 4; defining source and drain etching pattern regions on the GaN-based HEMT epitaxial wafer using photolithography, and etching the upper surface of the AlGaN barrier layer 4 to a depth of 15nm using ICP etching technology; The etched source / drain patterns were cleaned using acid and alkali solutions; the GaN-based HEMT epitaxial wafer was subjected to surface oxidation treatment; the source / drain ohmic contact pattern region was defined on the oxidized GaN-based HEMT epitaxial wafer using photolithography; source / drain ohmic contact metals were deposited sequentially from bottom to top on the source / drain ohmic contact pattern region on the upper surface of the GaN-based HEMT epitaxial wafer, consisting of a first layer of chromium 81, a second layer of aluminum 82, a third layer of titanium 83, and a fourth layer of tungsten 84; metal stripping was performed to form source / drain electrodes, and alloy annealing was carried out at 800℃ for 10 minutes to form source / drain ohmic contact electrodes.

[0026] The first layer of chromium has a thickness of 20 nm, the second layer of aluminum has a thickness of 300 nm, the third layer of titanium has a thickness of 20 nm, and the fourth layer of tungsten has a thickness of 200 nm.

[0027] Example 3

[0028] This embodiment discloses a method for manufacturing ohmic contacts for gallium nitride (GaN) devices, comprising the following steps: preparing a GaN-based HEMT epitaxial wafer, the GaN-based HEMT epitaxial wafer including a substrate 1, the substrate 1 being made of sapphire, and a buffer layer 2, a GaN channel layer 3, and an AlGaN barrier layer 4 epitaxially grown sequentially from bottom to top on the upper surface of the substrate 1, with a 2DEG formed between the GaN channel layer 3 and the AlGaN barrier layer 4; defining source and drain etching pattern regions on the GaN-based HEMT epitaxial wafer using photolithography, and etching the upper surface of the AlGaN barrier layer 4 to a depth of 13 nm using ICP etching technology; The etched source / drain patterns were cleaned using acid and alkali solutions; the GaN-based HEMT epitaxial wafer was subjected to surface oxidation treatment; the source / drain ohmic contact pattern regions were defined on the oxidized GaN-based HEMT epitaxial wafer using photolithography; source / drain ohmic contact metals were deposited sequentially from bottom to top on the source / drain ohmic contact pattern regions on the upper surface of the GaN-based HEMT epitaxial wafer, consisting of a first layer of chromium 81, a second layer of aluminum 82, a third layer of titanium 83, and a fourth layer of tungsten 84; metal stripping was performed to form source / drain electrodes, and alloy annealing was carried out at 600℃ for 8 minutes to form source / drain ohmic contact electrodes.

[0029] The first layer of chromium has a thickness of 16 nm, the second layer of aluminum has a thickness of 260 nm, the third layer of titanium has a thickness of 140 nm, and the fourth layer of tungsten has a thickness of 180 nm.

[0030] It is understood that the present invention has been described through some embodiments, and those skilled in the art will recognize that various changes or equivalent substitutions can be made to these features and embodiments without departing from the spirit and scope of the invention. Furthermore, under the teachings of the present invention, these features and embodiments can be modified to adapt to specific situations and materials without departing from the spirit and scope of the invention. Therefore, the present invention is not limited to the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application are within the protection scope of the present invention.

Claims

1. A method for manufacturing an ohmic contact for a gallium nitride device, characterized in that, Includes the following steps: Prepare a GaN-based HEMT epitaxial wafer, which includes a substrate (1) and a buffer layer (2), a GaN channel layer (3), and an AlGaN barrier layer (4) epitaxially grown sequentially from bottom to top on the upper surface of the substrate (1). Define the source and drain etching pattern regions on the GaN-based HEMT epitaxial wafer using photolithography, and etch the AlGaN barrier layer (4) to a depth of 10-15 nm using ICP etching. Clean the etched source and drain patterns with acid and alkali solutions. Perform surface treatment on the obtained GaN-based HEMT epitaxial wafer. Oxidation treatment; using photolithography to define the source and drain ohmic contact pattern region on the oxidized GaN-based HEMT epitaxial wafer; depositing source and drain ohmic contact metals sequentially from bottom to top on the source and drain ohmic contact pattern region on the upper surface of the GaN-based HEMT epitaxial wafer, namely, the first layer of chromium (81), the second layer of aluminum (82), the third layer of titanium (83), and the fourth layer of tungsten (84); performing metal stripping to form source and drain electrodes, and performing alloy annealing treatment at 400-800℃ for 30s-10min to form source and drain ohmic contact electrodes.

2. The method for manufacturing an ohmic contact for a gallium nitride device according to claim 1, characterized in that, The thickness of the first layer of metallic chromium (81) is 5-20 nm.

3. The method for manufacturing an ohmic contact for a gallium nitride device according to claim 1, characterized in that, The thickness of the second layer of aluminum (82) is 30-300 nm.

4. The method for manufacturing an ohmic contact for a gallium nitride device according to claim 1, characterized in that, The thickness of the third layer of metallic titanium (83) is 20-200 nm.

5. The method for manufacturing an ohmic contact for a gallium nitride device according to claim 1, characterized in that, The thickness of the fourth layer of tungsten metal (84) is 20-200 nm.

6. The method for manufacturing an ohmic contact for a gallium nitride device according to claim 1, characterized in that, The substrate (1) is made of Si, SiC, or sapphire.