Chip package assembly, chip package method, and car machine circuit board

Abstract

The application provides a chip packaging assembly, a chip packaging method and a vehicle machine circuit board, wherein the chip packaging assembly comprises: a frame heat sink base island; an insulating layer arranged on one side of the frame heat sink base island; a chip arranged on the side of the insulating layer away from the frame heat sink base island, the side of the chip away from the insulating layer being provided with a plurality of first pin pads and at least one second pin pad for power supply, the second pin pad being electrically connected to the first side of the frame heat sink base island through a second bonding wire; a plurality of frame pins electrically connected to the first pin pads through first bonding wires across the insulating layer; and an insulating encapsulation body encapsulating the frame heat sink base island, the insulating layer and the chip, the second side of the frame heat sink base island away from the first side being exposed from the insulating encapsulation body to undergo vertical current flow. The application can greatly improve the integration and chip withstand voltage, enhance the reliability, heat dissipation performance and moisture-proof capability of the chip, and also reduce the thickness and volume of the chip packaging.

Description

Technical Field

[0001] This invention relates to the field of automotive chips, and more specifically, to chip packaging components, chip packaging methods, and automotive circuit boards. Background Technology

[0002] Based on the current technological development of automotive electronics, especially the demand for autonomous driving, the complexity and reliability of electronic products are constantly increasing. To achieve this, the concept of automotive systems is increasingly based on microcontroller architecture to drive integrated monolithic circuits, including power stages, control, drive, and protection circuits on the same chip. This requires a new generation of automotive-grade highly integrated intelligent high-side driver chips to replace electromechanical relays and related circuits on a larger scale.

[0003] Currently, electromechanical relays require additional components such as resistors and capacitors, making them bulky, complex, and costly. They also lack diagnostic functions and their reliability cannot meet new demands. Currently, automotive-grade highly integrated intelligent high-side driver chips are mainly manufactured by large international companies using VIPower vertical technology. These chips have low on-resistance, thus replacing relays and providing intelligent and diagnostic functions. The next generation of automotive-grade highly integrated intelligent high-side drivers has a very broad market application prospect. Given the lack of VIPower technology in China, our company adopted conventional BCD technology for 12V and 24V battery power supply systems, designing an automotive-grade highly integrated intelligent high-side driver chip. Its overall performance is comparable to internationally accepted products, boasting a compact size and stable, reliable performance. It simplifies the hardware and software design of the electronic control unit (ECU), enhances system reliability, and fills a gap in the domestic market. To ensure compatibility with industry-standard chip application solutions, the package frame heatsink is used as the chip's power pin, achieving vertical current flow within the package, thus inventing this automotive-grade highly integrated intelligent high-side driver chip package.

[0004] Therefore, the present invention provides a waterproof antenna and a vehicle having the chip packaging assembly. Summary of the Invention

[0005] In response to the problems in the prior art, the chip packaging component, chip packaging method and vehicle circuit board of the present invention overcome the difficulties of the prior art, can significantly improve the integration and chip withstand voltage, enhance the chip's reliability, heat dissipation performance and moisture resistance, and also reduce the thickness and volume of the chip package.

[0006] Embodiments of the present invention provide a chip packaging assembly, comprising:

[0007] A frame-type heat sink base island;

[0008] An insulating layer is disposed on one side of the heat sink base island of the frame;

[0009] A chip is disposed on the side of the insulating layer away from the frame heat sink base island. The side of the chip away from the insulating layer is provided with a plurality of first pin pads and at least one second pin pad for power supply. The second pin pad is electrically connected to the first side of the frame heat sink base island through a second bonding wire.

[0010] Several frame pins are electrically connected to the first pin pads via first bonding wires across the insulating layer; and

[0011] An insulating package encapsulates the frame heat sink base island, an insulating layer, and a chip, wherein a second side of the frame heat sink base island opposite to the first side is exposed from the insulating package to allow vertical current flow.

[0012] In a preferred embodiment, the outer periphery of the insulating layer has an edge portion that protrudes beyond the projection range of the chip, the edge portion being suspended from the frame heat sink base island, and the second bonding wire bypassing the edge portion and connecting to the edge region of the frame heat sink base island that is not covered by the insulating layer.

[0013] In a preferred embodiment, the frame heat sink base island, the insulating layer, and the chip are all rectangular, and the frame pins are respectively arranged on the outside of a pair of long sides of the rectangle.

[0014] In a preferred embodiment, the first pin pads are arranged along the long side of the rectangle, and the second pin pads are arranged along the short side of the rectangle.

[0015] In a preferred embodiment, the first bonding wire is a data lead, the second bonding wire is a power supply lead, and the area of ​​the second cross-section of the second bonding wire is greater than the area of ​​the first cross-section of the first bonding wire.

[0016] In a preferred embodiment, the insulating layer is included in the first projection area of ​​the frame heat sink base island, and the chip is included in the second projection area of ​​the frame heat sink base island, which is also included in the first projection area of ​​the insulating layer.

[0017] In a preferred embodiment, the insulating layer is bonded to one side of the frame heat sink base island via a first adhesive layer, and the chip is stacked and bonded to the side of the insulating layer opposite to the frame heat sink base island via a second adhesive layer.

[0018] In a preferred embodiment, the third projection area of ​​the first adhesive layer based on the frame heat sink base island and the fourth projection area of ​​the second adhesive layer based on the frame heat sink base island both coincide with the second projection area.

[0019] In a preferred embodiment, the connection point between the first bonding wire and the frame pin is higher than the frame heatsink base island.

[0020] Embodiments of the present invention also provide a chip packaging method for implementing the above-mentioned chip packaging component, comprising the following steps:

[0021] Provide a frame heat sink base island;

[0022] An insulating layer is provided on one side of the heat sink base island of the frame;

[0023] A chip is disposed on the side of the insulating layer away from the heat sink base island of the frame, and a plurality of first pin pads and at least one second pin pad serving as a power supply pad are formed on the side of the chip away from the insulating layer.

[0024] The second pin pad is electrically connected to the first side of the frame heatsink base island via a second bonding wire, and the first pin pad is electrically connected to a plurality of frame pins via a first bonding wire; and

[0025] An insulating package is provided to encapsulate the frame heat sink base island, the insulating layer, and the chip, wherein a second side of the frame heat sink base island opposite to the first side is exposed from the insulating package to serve as a power supply pin for the chip.

[0026] Embodiments of the present invention also provide a vehicle infotainment circuit board, including the chip packaging assembly described above, wherein the chip is powered by at least a vertical current passing through the heat sink base island of the frame.

[0027] The chip packaging components, chip packaging methods, and vehicle circuit boards of the present invention can significantly improve integration and chip withstand voltage, enhance chip reliability, heat dissipation performance and moisture resistance, and also reduce the thickness and volume of chip packaging. Attached Figure Description

[0028] Other features, objects, and advantages of the invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings.

[0029] Figure 1 This is a side cross-sectional view of the chip packaging assembly of the present invention.

[0030] Figure 2 This is a top view of the chip packaging assembly of the present invention.

[0031] Figure 3This is a schematic diagram of the process steps of the chip packaging method of the present invention.

[0032] Figure Labels

[0033] 1. Frame heat sink base island

[0034] 11. Edge Area

[0035] 2 First adhesive layer

[0036] 3 Insulation layer

[0037] 31 Edge

[0038] 4 Second adhesive layer

[0039] 5 chips

[0040] 61 First bond wire

[0041] 62 Second Bond Wire

[0042] 7 frame pins

[0043] 8. Insulating Encapsulation

[0044] 91 First pin pad

[0045] 92 Second pin pad

[0046] 10 Chip Packaging Components Detailed Implementation

[0047] The following specific examples illustrate the implementation methods of this application. Those skilled in the art can easily understand the other advantages and effects of this application from the content disclosed herein. This application can also be implemented or applied through other different specific embodiments, and various details in this application can be modified or changed according to different viewpoints and application systems without departing from the spirit of this application. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of this application can be combined with each other.

[0048] The embodiments of this application will now be described in detail with reference to the accompanying drawings, so that those skilled in the art can easily implement the application. This application may be embodied in many different forms and is not limited to the embodiments described herein.

[0049] In this application, the terms "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics represented in connection with that embodiment or example, which are included in at least one embodiment or example of this application. Furthermore, the specific features, structures, materials, or characteristics represented may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate different embodiments or examples represented in this application, as well as features of different embodiments or examples.

[0050] Furthermore, the terms "first" and "second" are used for illustrative purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the representation of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0051] For the purpose of clearly describing this application, devices that are not relevant to the description are omitted, and the same or similar components throughout the specification are given the same reference numerals.

[0052] Throughout this specification, when it is said that a device is "connected" to another device, this includes not only "direct connection" but also "indirect connection" by placing other components in between. Furthermore, when it is said that a device "comprises" a certain constituent element, unless otherwise stated otherwise, this does not exclude other constituent elements, but rather implies that other constituent elements may be included.

[0053] When we say that a device is "above" another device, this can mean that it is directly above the other device, or it can mean that other devices are present in between. Conversely, when we say that a device is "directly" "above" another device, there are no other devices present in between.

[0054] Although the terms first, second, etc., are used in some instances herein to refer to various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, first interface and second interface, etc., are used. Furthermore, as used herein, the singular forms “a,” “an,” and “the” are intended to also include the plural forms unless the context indicates otherwise. It should be further understood that the terms “comprising,” “including,” indicate the presence of features, steps, operations, elements, components, items, kinds, and / or groups, but do not exclude the presence, occurrence, or addition of one or more other features, steps, operations, elements, components, items, kinds, and / or groups. The terms “or” and “and / or” as used herein are interpreted as inclusive, or mean any one or any combination thereof. Thus, “A, B, or C” or “A, B, and / or C” means “any one of: A; B; C; A and B; A and C; B and C; A, B, and C.” Exceptions to this definition will only occur if the combination of elements, functions, steps, or operations is inherently mutually exclusive in some way.

[0055] The technical terms used herein are for reference only to specific embodiments and are not intended to limit the scope of this application. The singular form used herein includes the plural form unless the statement explicitly indicates otherwise. The word "comprising" as used in the specification means to specify a particular characteristic, region, integer, step, operation, element, and / or component, and does not exclude the presence or addition of other characteristics, regions, integers, steps, operations, elements, and / or components.

[0056] Although not explicitly defined, all terms, including technical and scientific terms used herein, shall have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains. Terms defined in commonly used dictionaries shall be further interpreted as having a meaning consistent with the relevant technical literature and the content of this present application, and shall not be over-interpreted as having an ideal or overly formulaic meaning unless otherwise defined.

[0057] Figure 1 This is a side cross-sectional view of the chip packaging assembly of the present invention. Figure 2 This is a top view of the chip packaging assembly of the present invention. Figure 1 and 2As shown, the chip packaging assembly of the present invention includes: a frame heat sink base island 1, an insulating layer 3, a chip 5, frame pins 7, and an insulating package 8. The insulating layer 3 is disposed on one side of the frame heat sink base island 1. The chip 5 is disposed on the side of the insulating layer 3 opposite to the frame heat sink base island 1. The side of the chip 5 opposite to the insulating layer 3 has several first pin pads 91 for transmitting data signals and at least one second pin pad 92 for power supply. The second pin pad 92 is electrically connected to the first side of the frame heat sink base island 1 via a second bonding wire 62. Several frame pins 7 are electrically connected to the first pin pads 91 across the insulating layer 3 via first bonding wires 61. The insulating package 8 encapsulates the frame heat sink base island 1, the insulating layer 3, and the chip 5. The second side of the frame heat sink base island 1 opposite to the first side is exposed from the insulating package 8 to experience vertical current flow, but this is not a limitation. In conventional technologies, chips using the BCD process (Bipolar-CMOS-DMOS device manufacturing process, capable of fabricating Bipolar, CMOS, and DMOS devices on the same chip) have a GND (grounded) substrate, making vertical current flow impossible. This invention, however, stacks a ceramic sheet or other insulating sheet and a chip within a metal frame mounting area, then encapsulates them in a plastic package. The insulating layer 3 in this invention can be a ceramic insulating sheet, isolating the chip 5 between the frame heatsink base island 1 and the chip 5, thereby enhancing the insulation between them. Furthermore, the frame heatsink base island 1 serves as the VCC of the chip 5 via bonding wires. This achieves vertical current flow (i.e., power supply from the bottom of the chip) in an automotive-grade, highly integrated intelligent high-side driver chip package. This invention uses the package frame heatsink as the chip power pin, requiring insulation separation between the chip substrate and the package frame heatsink. Moreover, this invention realizes the industry's desired high-side driver chip with small package size, high integration, good voltage withstand characteristics, ease of application, and domestic production capabilities, possessing scalability and compatibility with single-channel and multi-channel high-side drivers.

[0058] In a preferred embodiment, the outer periphery of the insulating layer 3 has an edge portion 31 that protrudes beyond the projection range of the chip 5. The edge portion 31 is suspended from the frame heat sink base island 1. The second bonding wire 62 bypasses the edge portion 31 and connects to the edge region 11 of the frame heat sink base island 1 that is not covered by the insulating layer 3. In this invention, the edge of the insulating layer 3 protrudes beyond the projection range of the chip 5, and this part is suspended from the frame heat sink base island 1, creating a three-dimensional creepage path between the chip 5 and the frame heat sink base island 1, thereby increasing the creepage distance from the chip 5 to the frame heat sink base island 1 and further improving the withstand voltage characteristics. In a preferred embodiment, an insulating gap is left between the second bonding wire 62 and the edge portion 31 of the insulating layer 3 to enhance the limiting effect on the second bonding wire 62. This allows the edge portion 31 to more effectively prevent the middle part of the second bonding wire 62 from contacting other parts of the chip during the packaging process, and also serves to limit the second bonding wire 62, but this is not the only function.

[0059] In a preferred embodiment, the frame heat sink base island 1, the insulating layer 3, and the chip 5 are all rectangular, and the frame pins 7 are arranged on the outer side of a pair of long sides of the rectangle, but this is not a limitation. In this embodiment, the first pin pad 91 is arranged along the long side of the rectangle, and the second pin pad 92 is arranged along the short side of the rectangle, which facilitates the setting of multiple different high-side signal sources. Furthermore, increasing the distance between the first bonding line 61 and the second bonding line 62 avoids signal interference, but this is not a limitation.

[0060] In a preferred embodiment, the first bonding wire 61 is a data lead and the second bonding wire 62 is a power supply lead. The area of ​​the second cross-section of the second bonding wire 62 is larger than the area of ​​the first cross-section of the first bonding wire 61, thereby enhancing the power supply capability and optimizing the use of materials, but not limited thereto.

[0061] In a preferred embodiment, the first projection area of ​​the insulating layer 3 based on the frame heat sink base island 1 is included by the frame heat sink base island 1, and the second projection area of ​​the chip 5 based on the frame heat sink base island 1 is included by the first projection area of ​​the insulating layer 3 based on the frame heat sink base island 1, so as to enhance the strength of the chip after packaging with a stacked structure, but not limited thereto.

[0062] In a preferred embodiment, the insulating layer 3 is bonded to one side of the frame heat sink base island 1 by a first adhesive layer 2, and the chip 5 is stacked on the side of the insulating layer 3 away from the frame heat sink base island 1 by a second adhesive layer 4, but this is not a limitation.

[0063] In a preferred embodiment, the third projection area of ​​the first adhesive layer 2 based on the frame heat sink base island 1 and the fourth projection area of ​​the second adhesive layer 4 based on the frame heat sink base island 1 both coincide with the second projection area, but this is not a limitation.

[0064] In a preferred embodiment, the connection point between the first bonding line 61 and the frame pin 7 is higher than the frame heat sink base island 1, but this is not a limitation.

[0065] In one embodiment, the present invention employs a high-voltage driver chip packaging design based on a metal lead frame. The metal lead frame includes a recessed die-mounting area, a molding compound, 16 pins or other pin counts, and a pin pitch of 0.5 mm. This allows for a package compatible with both multi-channel and single-channel high-side drives. The bonding wires between the chip and its pins are copper or gold wires with a diameter ranging from 18µm to 50µm. The lead frame thickness is 0.1–1 mm, and the material is metal. A ceramic sheet or other insulating sheet isolates the chip from the frame. The chip is bonded to the ceramic sheet or other insulating sheet using DAF (die attach film), an ultra-thin film adhesive used in semiconductor packaging to connect semiconductor chips to the packaging substrate and chips to each other. The ceramic sheet is bonded to the frame using epoxy paste, achieving insulation between the chip substrate and the heatsink of the packaging frame. Thick bonding wires connect the chip's power supply and the heatsink of the frame. This invention utilizes an integrated, ultra-thin E-pad package with integrated heat dissipation, achieving a molding thickness between 0.5mm and 2.5mm, thus providing excellent heat dissipation. This invention directly uses the heat sink base island as the chip's VCC pin, meeting the requirements of current automotive parts manufacturers, thereby reducing industry usage costs.

[0066] Based on the above technical features, the beneficial technical effects of the present invention include:

[0067] 1. Maintain the package shape that enables vertical current (using a heat sink for the chip's VCC) to facilitate industry compatibility and meet the needs of automotive parts manufacturers.

[0068] 2. Improved packaging integration and chip withstand voltage, enabling a single package to be compatible with multiple high-side or single high-side drivers.

[0069] 3. It can simplify the hardware and software design of the electronic control unit (ECU) and enhance system reliability.

[0070] 4. Improved reliability, heat dissipation performance, and moisture resistance.

[0071] Figure 3 This is a schematic diagram of the process steps of the chip packaging method of the present invention. Figure 3 As shown, the chip packaging method of the present invention, used to implement the above-mentioned chip packaging component, includes the following steps:

[0072] S110 provides a frame heat sink base island 1.

[0073] S120. An insulating layer 3 is provided on one side of the frame heat sink base island 1.

[0074] S130. A chip 5 is disposed on the side of the insulating layer 3 away from the heat sink base island 1, and a plurality of first pin pads 91 and at least one second pin pad 92 serving as a power supply pad are formed on the side of the chip 5 away from the insulating layer 3.

[0075] S140, the second pin pad 92 is electrically connected to the first side of the frame heat sink base island 1 through the second bonding wire 62, and the first pin pad 91 is electrically connected to several frame pins 7 through the first bonding wire 61.

[0076] S150. An insulating package 8 is provided, which includes a heat sink base island 1, an insulating layer 3, and a chip 5. The second side of the heat sink base island 1, which is away from the first side, is exposed from the insulating package 8 to serve as a power supply pin for the chip 5, but is not limited thereto.

[0077] Embodiments of the present invention also provide an in-vehicle infotainment circuit board, including the aforementioned chip packaging assembly (see...). Figure 1 The chip 5 is powered by at least the vertical current passing through the heat sink base island 1 of the frame. Its features and technical effects are as described above and will not be repeated here.

[0078] In summary, the chip packaging components, chip packaging methods, and vehicle circuit boards of the present invention can significantly improve integration and chip withstand voltage, enhance chip reliability, heat dissipation performance, and moisture resistance, and also reduce the thickness and volume of chip packaging.

[0079] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A chip packaging component, characterized in that, include: A frame heat sink base island (1); An insulating layer (3) is disposed on one side of the frame heat sink base island (1); A chip (5) is disposed on the side of the insulating layer (3) away from the frame heat sink base island (1). The side of the chip (5) away from the insulating layer (3) is provided with a plurality of first pin pads (91) and at least one second pin pad (92) for power supply. The second pin pad (92) is electrically connected to the first side of the frame heat sink base island (1) through a second bonding wire (62). Several frame pins (7) are electrically connected to the first pin pads (91) via a first bonding wire (61) across the insulating layer (3); and An insulating package (8) encapsulates the frame heat sink base island (1), the insulating layer (3), and the chip (5), with a second side of the frame heat sink base island (1) facing away from the first side exposed from the insulating package (8) to experience vertical current flow. The outer periphery of the insulating layer (3) has an edge portion (31) that protrudes beyond the projection range of the chip (5). The edge portion (31) is suspended from the frame heat sink base island (1). The second bonding wire (62) passes around the edge portion (31) and connects to the edge region (11) of the frame heat sink base island (1) that is not covered by the insulating layer (3). The insulating layer (3) is included by the frame heat sink base island (1) based on the first projection area of ​​the frame heat sink base island (1). The chip (5) is included by the frame heat sink base island (1) based on the second projection area of ​​the frame heat sink base island (1). The region is included by the insulating layer (3) based on the first projection area of ​​the frame heat sink base island (1). The insulating layer (3) is bonded to one side of the frame heat sink base island (1) by a first adhesive layer (2). The chip (5) is stacked on the side of the insulating layer (3) away from the frame heat sink base island (1) by a second adhesive layer (4). The first adhesive layer (2) based on the third projection area of ​​the frame heat sink base island (1) and the second adhesive layer (4) based on the fourth projection area of ​​the frame heat sink base island (1) both coincide with the second projection area.

2. The chip packaging assembly as described in claim 1, characterized in that, The frame heat sink base island (1), the insulating layer (3) and the chip (5) are all rectangular, and the frame pins (7) are arranged on the outside of a pair of long sides of the rectangle.

3. The chip packaging assembly as described in claim 2, characterized in that, The first pin pad (91) is arranged along the long side of the rectangle, and the second pin pad (92) is arranged along the short side of the rectangle.

4. The chip packaging assembly as described in claim 2, characterized in that, The first bonding wire (61) is a data lead, and the second bonding wire (62) is a power supply lead. The area of ​​the second cross section of the second bonding wire (62) is greater than the area of ​​the first cross section of the first bonding wire (61).

5. The chip packaging assembly as described in claim 1, characterized in that, The connection point between the first bonding wire (61) and the frame pin (7) is higher than the frame heat sink base island (1).

6. A chip packaging method, characterized in that: Provide a frame heat sink base island; An insulating layer is provided on one side of the heat sink base island of the frame; A chip is disposed on the side of the insulating layer away from the heat sink base island of the frame, and a plurality of first pin pads and at least one second pin pad serving as a power supply pad are formed on the side of the chip away from the insulating layer. The second pin pad is electrically connected to the first side of the frame heatsink base island via a second bonding wire, and the first pin pad is electrically connected to a plurality of frame pins via a first bonding wire; and An insulating package is provided to encapsulate the frame heat sink base island, the insulating layer, and the chip, wherein a second side of the frame heat sink base island opposite to the first side is exposed from the insulating package to serve as a power supply pin for the chip. The outer periphery of the insulating layer (3) has an edge portion (31) that protrudes beyond the projection range of the chip (5). The edge portion (31) is suspended from the frame heat sink base island (1). The second bonding wire (62) passes around the edge portion (31) and connects to the edge region (11) of the frame heat sink base island (1) that is not covered by the insulating layer (3). The insulating layer (3) is included by the frame heat sink base island (1) based on the first projection area of ​​the frame heat sink base island (1). The chip (5) is included by the frame heat sink base island (1) based on the second projection area of ​​the frame heat sink base island (1). The region is included by the insulating layer (3) based on the first projection area of ​​the frame heat sink base island (1). The insulating layer (3) is bonded to one side of the frame heat sink base island (1) by a first adhesive layer (2). The chip (5) is stacked on the side of the insulating layer (3) away from the frame heat sink base island (1) by a second adhesive layer (4). The first adhesive layer (2) based on the third projection area of ​​the frame heat sink base island (1) and the second adhesive layer (4) based on the fourth projection area of ​​the frame heat sink base island (1) both coincide with the second projection area.

7. A vehicle infotainment circuit board, characterized in that: The chip packaging assembly as described in claim 1 is provided with power to the chip by at least a vertical current passing through the heat sink base island of the frame.

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