Zero crossing synchronization communication circuit and method

CN116846428BActive Publication Date: 2026-08-18SHENZHEN GAOKERUN ELECTRONICS CO LTD
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Patent Information

Application Number
CN202310980843.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-08-07
Publication Date
2026-08-18
Estimated Expiration
2043-08-07

AI Technical Summary

Technical Problem

[0003]如果采用传统的低压方式通信,比如IIC或UART通信,会增加低压连接的线材,比如IIC的话,会增加VDD、GND、SDA及SCL的线材成本,同时低压且长距离通信,容易受干扰

Benefits of technology

[0032] Compared with the prior art, the beneficial effects of the present invention are: the present invention uses zero-crossing signal to synchronously control the number of pulse signals, and realizes different functional requirements according to the number of pulse signals. It can identify that the receiving end is connected when the AD value is less than the preset value, and otherwise not connected. It uses a small number of general-purpose components, reducing costs. It has a long communication distance and strong anti-interference ability.

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Abstract

The application discloses a zero-crossing synchronization communication circuit, and relates to the field of circuit control.The zero-crossing synchronization communication circuit comprises a sending module, a receiving module and a transmitting module.The sending module is used for controlling whether a communication protocol waveform signal of a communication line is output to the receiving module through a live wire alternating current zero-crossing signal.The receiving module is used for decoding the communication protocol waveform when a time difference between two rising edges of the received communication protocol waveform signal is greater than a preset value.The transmitting module is connected to the receiving module.Compared with the prior art, the application has the beneficial effects that: the application uses a zero-crossing signal to synchronously control the number of pulse signals, realizes different functional requirements according to the number of pulse signals, and has functions such as identifying that a receiving end has been connected when an AD value is less than a preset value, and otherwise not connected; a small number of general devices are used, and the cost is reduced; the communication distance is long, and the anti-interference performance is high.
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Description

Technical Field

[0001] This invention relates to the field of circuit control, specifically to a zero-crossing synchronous communication circuit and method. Background Technology

[0002] Electronic products and devices are widely used in daily life, and some electronic products and devices require two to three circuit boards. At the same time, the circuit boards need to communicate with each other. For example, the display board and the floor brush board of an AC vacuum cleaner communicate with each other. The distance between the two boards is usually more than 1 meter.

[0003] If traditional low-voltage communication methods are used, such as IIC or UART communication, it will increase the cost of low-voltage connection cables. For example, with IIC, the cost of cables for VDD, GND, SDA, and SCL will increase. At the same time, low-voltage and long-distance communication is susceptible to interference.

[0004] Therefore, existing circuit board communication methods need to be improved. Summary of the Invention

[0005] The purpose of this invention is to provide a zero-crossing synchronization communication circuit and method to solve the problems mentioned in the background art.

[0006] To achieve the above objectives, the present invention provides the following technical solution:

[0007] A zero-crossing synchronous communication circuit, comprising:

[0008] The transmitting module is used to control whether the communication protocol waveform signal of the communication line is output to the receiving module via the zero-crossing signal of the live wire AC power.

[0009] The receiving module is used to decode the communication protocol waveform when the time difference between the two rising edges of the received communication protocol waveform signal is greater than a preset value;

[0010] The transmitting module is connected to the receiving module.

[0011] As a further embodiment of the present invention: the transmitting module includes a transistor Q1, a live wire L, an interface MCU-OUT, and an interface MCU-AD. The live wire L is connected to one end of resistor R2 and one end of resistor R3. The other end of resistor R3 is connected to the emitter of transistor Q1, the cathode of diode D1, and one end of resistor R4. The other end of resistor R4 is connected to the interface MCU-AD. The collector of transistor Q1 is connected to the anode of diode D1 and the anode of diode D2. The cathode of diode D2 is connected to one end of resistor R5. The other end of resistor R5 is connected to the receiving module through a terminal block. The base of transistor Q1 is connected to one end of resistor R1 and the other end of resistor R2. The other end of resistor R1 is connected to the interface MCU-OUT.

[0012] As a further aspect of the present invention: transistor Q1 is a PMOS transistor.

[0013] As a further embodiment of the present invention: the receiving module includes a neutral line N, an interface MCU-IN, the interface MCU-IN is connected to one end of capacitor C1 and one end of resistor R9, the other end of capacitor C1 is grounded, the other end of resistor R9 is connected to one end of resistor R8, the negative terminal of diode D4, the positive terminal of diode D3, one end of resistor R7, the other end of resistor R8 is grounded, the positive terminal of diode D4 is grounded, the negative terminal of diode D3 is connected to the neutral line N, the other end of resistor R7 is connected to one end of resistor R6, and the other end of resistor R6 is connected to the transmitting module through a terminal block.

[0014] A zero-crossing synchronization communication method, applied to the zero-crossing synchronization communication circuit described above, includes the following steps:

[0015] Step 1: Select whether to output the communication protocol waveform signal based on the AC zero-crossing signal;

[0016] Step 2: Select whether to decode the communication protocol waveform based on the time difference between the two rising edges of the received communication protocol waveform signal.

[0017] As a further aspect of the present invention: Step 1 includes:

[0018] Step 11: Perform AD sampling on the live wire AC current;

[0019] Step 12: If the sampled AC AD value is less than the preset value, skip to step 3; otherwise, skip to step 5.

[0020] Step 13: If a zero-signal event has occurred, skip to step 4; otherwise, proceed to step 5.

[0021] Step 14: Output the communication protocol waveform to the receiving module;

[0022] Step 15, End.

[0023] As a further aspect of the present invention: Step 2 includes:

[0024] Step 21: If the received communication protocol waveform is the first rising edge, jump to step 2; otherwise, stay in step 1.

[0025] Step 22: The timer starts counting down;

[0026] Step 23: If the received communication protocol waveform is the second rising edge, skip to step 4; otherwise, skip to step 8.

[0027] Step 24: Stop the timer;

[0028] Step 25: If the timer value is greater than the preset value, skip to step 6; otherwise, skip to step 7.

[0029] Step 26: Output protocol waveform decoding signal;

[0030] Step 27: Reset the timer to zero;

[0031] Step 28: End.

[0032] Compared with the prior art, the beneficial effects of the present invention are: the present invention uses zero-crossing signal to synchronously control the number of pulse signals, and realizes different functional requirements according to the number of pulse signals. It can identify that the receiving end is connected when the AD value is less than the preset value, and otherwise not connected. It uses a small number of general-purpose components, reducing costs. It has a long communication distance and strong anti-interference ability. Attached Figure Description

[0033] Figure 1 This is the circuit diagram for the transmitting module.

[0034] Figure 2 This is the circuit diagram of the receiving module.

[0035] Figure 3 This is a schematic diagram of the transmission process of a zero-crossing synchronous communication circuit.

[0036] Figure 4 This is a schematic diagram of the receiving process of a zero-crossing synchronization communication circuit. Detailed Implementation

[0037] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0038] Please see Figure 1 and Figure 2 A zero-crossing synchronous communication circuit, comprising:

[0039] The transmitting module is used to control whether the communication protocol waveform signal of the communication line is output to the receiving module via the zero-crossing signal of the live wire AC power.

[0040] The receiving module is used to decode the communication protocol waveform when the time difference between the two rising edges of the received communication protocol waveform signal is greater than a preset value;

[0041] The transmitting module is connected to the receiving module.

[0042] In this embodiment: Please refer to Figure 1The transmitting module includes transistor Q1, live wire L, interface MCU-OUT, and interface MCU-AD. Live wire L is connected to one end of resistor R2 and one end of resistor R3. The other end of resistor R3 is connected to the emitter of transistor Q1, the cathode of diode D1, and one end of resistor R4. The other end of resistor R4 is connected to interface MCU-AD. The collector of transistor Q1 is connected to the anode of diode D1 and the anode of diode D2. The cathode of diode D2 is connected to one end of resistor R5. The other end of resistor R5 is connected to the receiving module through a terminal block. The base of transistor Q1 is connected to one end of resistor R1 and the other end of resistor R2. The other end of resistor R1 is connected to interface MCU-OUT.

[0043] In this embodiment: Please refer to Figure 1 Transistor Q1 is a PMOS transistor.

[0044] Initially, the interface MCU-OUT outputs a low level, and the interface MCU-AD performs AD sampling. Under normal circumstances, the AD sampling value of the output voltage of the live wire L will be lower than the AD preset value (for example, when the signal receiver is not connected, the AD sampling value is abnormal. If it is higher than the AD preset value, the triggering of the output communication protocol waveform will be stopped directly). When the output voltage of the live wire L crosses zero, the interface MCU-AD samples the zero-crossing signal. The controller receives the signal and controls the interface MCU-OUT to output the communication protocol waveform, so that the base of the transistor Q1 receives the signal, and outputs it to the receiving module through the transistor Q1, diode D2, resistor R5, and terminal block.

[0045] In this embodiment: Please refer to Figure 2 The receiving module includes a neutral line N, an interface MCU-IN, an interface MCU-IN connected to one end of capacitor C1 and one end of resistor R9, the other end of capacitor C1 grounded, the other end of resistor R9 connected to one end of resistor R8, the negative terminal of diode D4, the positive terminal of diode D3, one end of resistor R7, the other end of resistor R8 grounded, the positive terminal of diode D4 grounded, the negative terminal of diode D3 connected to the neutral line N, the other end of resistor R7 connected to one end of resistor R6, and the other end of resistor R6 connected to the transmitting module through a terminal block.

[0046] The received communication protocol waveform signal is input through the terminal block and then through resistors R6, R7, and R9 to the interface MCU-IN. To determine whether the received communication protocol waveform signal is normal, the time difference between the two rising edges of the received communication protocol waveform signal is measured (if the received communication protocol waveform signal is a sine wave or similar waveform, there is only one rising edge per cycle, so the cycle status can be determined by the time difference between the two rising edges). This is to avoid abnormal communication protocol waveform signals and misinterpretations that could cause control abnormalities. When the received communication protocol waveform signal is determined to be normal, the controller decodes the signal obtained from the interface MCU-IN and outputs it, completing the zero-crossing synchronization communication.

[0047] In this embodiment: Please refer to Figure 3 and Figure 4 A zero-crossing synchronization communication method, applied to the zero-crossing synchronization communication circuit described above, includes the following steps:

[0048] Step 1: Select whether to output the communication protocol waveform signal based on the AC zero-crossing signal;

[0049] Step 2: Select whether to decode the communication protocol waveform based on the time difference between the two rising edges of the received communication protocol waveform signal.

[0050] In this embodiment: Please refer to Figure 3 Step 1 includes:

[0051] Step 11: Perform AD sampling on the live wire AC current;

[0052] Step 12: If the sampled AC AD value is less than the preset value, skip to step 3; otherwise, skip to step 5.

[0053] Step 13: If a zero-signal event has occurred, skip to step 4; otherwise, proceed to step 5.

[0054] Step 14: Output the communication protocol waveform to the receiving module;

[0055] Step 15, End.

[0056] In this embodiment: Please refer to Figure 4 Step 2 includes:

[0057] Step 21: If the received communication protocol waveform is the first rising edge, jump to step 2; otherwise, stay in step 1.

[0058] Step 22: The timer starts counting down;

[0059] Step 23: If the received communication protocol waveform is the second rising edge, skip to step 4; otherwise, skip to step 8.

[0060] Step 24: Stop the timer;

[0061] Step 25: If the timer value is greater than the preset value, skip to step 6; otherwise, skip to step 7.

[0062] Step 26: Output protocol waveform decoding signal;

[0063] Step 27: Reset the timer to zero;

[0064] Step 28: End.

[0065] This invention utilizes zero-crossing signals to synchronously control the number of pulse signals (whether the communication protocol waveform signal is output). Different functional requirements are achieved based on the number of pulse signals. When the AD value is less than a preset value, it can identify that the receiving end is connected; otherwise, it is not connected. This invention only requires a live wire (L), a neutral wire (N), and a communication line to complete the communication setup (the live wire (L) and the neutral wire (N) are normal power supply lines; an additional communication line is added to transmit the communication protocol waveform signal). It uses a small number of general-purpose components, reducing costs. It has a long communication distance and strong anti-interference capability.

[0066] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0067] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A zero-crossing synchronous communication circuit, characterized in that: The zero-crossing synchronization communication circuit includes: The transmitting module is used to control whether the communication protocol waveform signal of the communication line is output to the receiving module via the zero-crossing signal of the live wire AC power. The receiving module is used to decode the communication protocol waveform when the time difference between the two rising edges of the received communication protocol waveform signal is greater than a preset value; The transmitting module connects to the receiving module; The transmitting module includes a transistor Q1, a live wire L, an interface MCU-OUT, and an interface MCU-AD. The live wire L is connected to one end of resistor R2 and one end of resistor R3. The other end of resistor R3 is connected to the emitter of transistor Q1, the cathode of diode D1, and one end of resistor R4. The other end of resistor R4 is connected to the interface MCU-AD. The collector of transistor Q1 is connected to the anode of diode D1 and the anode of diode D2. The cathode of diode D2 is connected to one end of resistor R5. The other end of resistor R5 is connected to the receiving module through a terminal block. The base of transistor Q1 is connected to one end of resistor R1 and the other end of resistor R2. The other end of resistor R1 is connected to the interface MCU-OUT. The receiving module includes a neutral line N, an interface MCU-IN, an interface MCU-IN connected to one end of capacitor C1 and one end of resistor R9, the other end of capacitor C1 grounded, the other end of resistor R9 connected to one end of resistor R8, the negative terminal of diode D4, the positive terminal of diode D3, one end of resistor R7, the other end of resistor R8 grounded, the positive terminal of diode D4 grounded, the negative terminal of diode D3 connected to the neutral line N, the other end of resistor R7 connected to one end of resistor R6, and the other end of resistor R6 connected to the transmitting module through a terminal block. The zero-crossing synchronization communication circuit uses the zero-crossing signal to synchronously control the number of pulse signals, and realizes different functional requirements according to the number of pulse signals. It also identifies that the receiving end is connected when the AD value is less than a preset value, otherwise it is not connected.

2. The zero-crossing synchronization communication circuit according to claim 1, characterized in that, Transistor Q1 is a PMOS transistor.

3. A zero-crossing synchronization communication method, applied to the zero-crossing synchronization communication circuit according to any one of claims 1 to 2, characterized in that, The zero-crossing synchronization communication circuit includes the following steps: Step 1: Select whether to output the communication protocol waveform signal based on the AC zero-crossing signal; Step 2: Select whether to decode the communication protocol waveform based on the time difference between the two rising edges of the received communication protocol waveform signal.

4. The zero-crossing synchronization communication method according to claim 3, characterized in that, Step 1 includes: Step 11: Perform AD sampling on the live wire AC current; Step 12: If the sampled AC AD value is less than the preset value, skip to step 3; otherwise, skip to step 5. Step 13: If a zero-signal event has occurred, skip to step 4; otherwise, proceed to step 5. Step 14: Output the communication protocol waveform to the receiving module; Step 15, End.

5. The zero-crossing synchronization communication method according to claim 3, characterized in that, Step 2 includes: Step 21: If the received communication protocol waveform is the first rising edge, jump to step 2; otherwise, stay in step 1. Step 22: The timer starts counting down; Step 23: If the received communication protocol waveform is the second rising edge, skip to step 4; otherwise, skip to step 8. Step 24: Stop the timer; Step 25: If the timer value is greater than the preset value, skip to step 6; otherwise, skip to step 7. Step 26: Output protocol waveform decoding signal; Step 27: Reset the timer to zero; Step 28: End.

Citation Information

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