LDPC码的译码方法、装置、译码器及介质
By implementing hierarchical scheduling of the parity-check matrix of LDPC codes and processing different bit nodes separately, especially adopting a read-only approach without updating the bit nodes corresponding to the zero matrix and identity matrix, the problem of hardware resource shortage in 5G NR is solved, and decoding efficiency and throughput are improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- HUBEI SILANG COMMUNICATION TECHNOLOGY CO LTD
- Filing Date
- 2023-07-18
- Publication Date
- 2026-07-17
AI Technical Summary
In 5G NR, the decoding method of LDPC code suffers from hardware resource constraints, especially in low code rate scenarios of PUSCH reception channel and HARQ retransmission scenarios, where insufficient hardware resources lead to an increase in processing cycle.
By performing hierarchical scheduling of the parity-check matrix of the LDPC code, different bit nodes are processed separately. In particular, the bit nodes corresponding to the zero matrix and identity matrix in the extended parity-check matrix block are read-only and not updated, thereby reducing the number of bit node update operations.
It alleviates hardware resource constraints, improves decoding efficiency and throughput, and saves processing time. It is particularly suitable for low bit rate scenarios, HARQ retransmission, and scenarios with large input data volumes.
Smart Images
Figure CN116846516B_ABST