Method for optimizing linearity of eddy current sensor based on FPGA high-speed parallel processing

Abstract

The present application relates to the technical field of eddy current sensor, especially to a linear optimization method of eddy current sensor based on FPGA high-speed parallel processing, comprising the following steps: S1: using FPGA as an output data controller of the eddy current sensor; S2: FPGA acquires output data of the eddy current sensor; S3: linear adjustment of the eddy current sensor is performed on the output data through a compensation algorithm; S4: FPGA parallel processing unit performs high-speed parallel processing on the linear adjustment result. The present application linearizes the output data of the eddy current sensor through the compensation algorithm, improves the linearity of the output data of the eddy current sensor, builds a discretization model, improves the glowworm algorithm, optimizes the model precision as the target, improves the linear precision of the model, improves the practicability of the result, and processes the output data of the eddy current sensor through the FPGA high-speed parallel processing unit, which greatly improves the data processing speed.

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