A direct modulation VCO spread spectrum clock generator based on two-point injection technique

Abstract

The application discloses a direct modulation VCO spread spectrum clock generator based on two-point injection technology, which comprises a crystal oscillator F REF , a phase frequency detector PFD, a charge pump CP1, a programmable charge pump CP2, a programmable charge pump CP3, a loop filter LPF, a voltage-controlled oscillator VCO, a frequency divider DIV1, a frequency divider DIV2 and a frequency divider DIV3. The programmable charge pump CP2 injects a current I mod into the loop filter LPF to generate a triangular wave modulation signal, so that the output frequency of the voltage-controlled oscillator VCO is changed in a certain range, and the energy of the center frequency on the frequency spectrum is expanded in a certain range. Considering that the triangular wave modulation signal is attenuated into a sine wave under the influence of the bandwidth and the low-pass characteristic of the loop filter LPF, the programmable charge pump CP3 is introduced to inject a current I com into the loop filter LPF to compensate the attenuated sine wave modulation signal, so that the sine wave modulation signal is restored to a triangular wave, and a better EMI reduction effect is achieved on the frequency spectrum. The fourth-order loop filter LPF is adopted to suppress the PLL reference spur.

Description

Technical Field

[0001] This invention relates to the field of spread spectrum clock generators, specifically a direct modulation VCO spread spectrum clock generator based on two-point injection technology. Background Technology

[0002] With the development of CMOS technology, the operating frequency of electronic devices is constantly increasing to meet the high-performance application requirements of systems. High-speed clocks are crucial in wired communication systems because they provide reliable timing for sending or receiving data. Today, with the rapid increase in data rates of wired systems such as PCIe, USB, or SATA, electromagnetic interference (EMI) problems caused by high-speed clocks are becoming increasingly important. Excessive EMI can cause catastrophic damage to communication systems. Spread spectrum clocking (SSC), as an effective and low-cost method to reduce EMI, has always been a hot research topic.

[0003] In spread spectrum clock generators, different modulation signal profiles offer varying EMI reduction effects. Common modulation signal profiles include triangular wave modulation, sine wave modulation, and Hershey-Kiss modulation. For example... Figure 2 Sine wave modulation spread spectrum clock output frequency follows the sine wave, but its spectral sidelobes are much higher than the mid-frequency amplitude, resulting in unsatisfactory EMI reduction. Triangle wave modulation spread spectrum clock output frequency follows the triangle wave linearly, with lower spectral sidelobe peaks and a flatter spectral center. Therefore, triangle wave modulation is more effective at reducing EMI than sine wave modulation. Hershey-Kiss modulation attenuates the peak energy of the output frequency more significantly than triangle wave modulation. However, since it is difficult to obtain a truly ideal Hershey-Kiss modulation signal, we prefer to use triangle wave modulation signals in circuit implementation.

[0004] Several techniques have been proposed for the spread spectrum clock generator structure of direct modulation VCO based on phase-locked loop (PLL). For example... Figure 3 By injecting a modulation current I between resistors R1 and R2 in the loop filter LPF mod Capacitors C1 and C2 act as integrators, at V b The point generates a triangular wave modulated signal. This structure requires the prerequisite R1C1 = R2C2 to achieve the ideal integration effect, and the spikes caused by the spread spectrum operation are suppressed by introducing resistor R3 and capacitor C3. Based on the same direct modulation VCO principle, such as... Figure 4 By injecting a modulation current I between resistor R1 and capacitor C1 in the loop filter LPF mod Introducing an additional current I P2With unity-gain buffer U1, capacitance multiplication technology is implemented to reduce the huge capacitance C1 caused by the small loop bandwidth of the direct modulation VCO structure PLL, saving area cost, while meeting condition f. mod When << 1 / (2πR1C2), capacitor C1 acts as an integrator, and at V dump A triangular wave modulation signal is generated. Reference spurious signals are further suppressed by introducing resistor R3 and capacitor C3.

[0005] The two techniques described above for implementing spread spectrum clocking result in spikes in the control voltage due to the continuous output of UP or DN signals from the phase-frequency discriminator (PFD) module in the time domain caused by the PLL negative feedback loop and the spread spectrum clock implementation. To eliminate these spikes and further suppress PLL reference spurious signals, resistor R3 and capacitor C3 are introduced in both structures. However, the originally near-ideal triangular wave modulation signal attenuates to a near-sine wave modulation signal due to insufficient PLL loop bandwidth and the low-pass characteristics of the loop filter, thus worsening the EMI reduction effect. If EMI reduction fails to meet current communication standards, the communication system will still suffer damage. Therefore, inventing a spread spectrum clock generator with good EMI reduction performance is of great significance. Summary of the Invention

[0006] To address the shortcomings of existing technologies, this invention provides a direct modulation VCO spread spectrum clock generator based on two-point injection technology. This is achieved by injecting a modulation current I between resistor R1 and capacitor C1 in the loop filter LPF. mod At the same time, add a compensation current I com The resistor R3 and capacitor C3 in the loop filter LPF are injected to solve the problems mentioned in the background art.

[0007] To achieve the above objectives, the present invention is implemented through the following technical solution: a direct modulation VCO spread spectrum clock generator based on two-point injection technology, comprising a crystal oscillator F. REF The system includes a frequency and phase detector (PFD), charge pumps CP1, CP2, and CP3, a loop filter (LPF), a voltage-controlled oscillator (VCO), frequency dividers DIV1, DIV2, and DIV3. Frequency divider DIV1 is connected to the crystal oscillator F. REF Connected to provide the reference frequency required for PLL locking. REF The frequency divider DIV2 and the crystal oscillator F REF The two differential square wave modulation signals UP2 and DN2 are generated by connecting them. The frequency and phase detector PFD and the frequency divider DIV1 are connected to identify the PLL. REF Signals and PLL FBThe signal frequency and phase difference generate UP and DN signals. The charge pump CP1 is connected to the frequency and phase detector PFD, and a current I is generated based on the UP and DN signals. CP The injection loop filter, wherein programmable charge pumps CP2 and CP3 are both connected to frequency divider DIV2, and respectively generate modulation current I. mod and compensation current I com A triangular wave modulation signal is generated by injecting a loop filter LPF. The loop filter LPF is connected to charge pump CP1, programmable charge pump CP2, and programmable charge pump CP3, which respectively convert current I... CP Modulation current I mod Compensation current I com Converted into the control voltage V of the voltage-controlled oscillator (VCO) ctrl The voltage-controlled oscillator (VCO) is connected to the loop filter (LPF), and the control voltage V is determined based on the output control voltage V of the loop filter (LPF). ctrl The output clock signal is generated to achieve frequency modulation in the time domain. The frequency divider DIV3 is connected to the voltage-controlled oscillator (VCO) to generate a feedback signal PLL. FB The feedback connection returns to the input terminal of the frequency and phase detector (PFD) to achieve final locking of the PLL.

[0008] Preferably, the loop filter LPF consists of resistors R1, R3, and R4, and capacitors C1, C2, C3, and C4. One end of capacitor C1 is grounded, and the other end is connected to resistor R1. One end of resistor R1 is connected to capacitor C1, and the other end is connected to capacitor C2 and resistor R3 at a single point. One end of capacitor C2 is grounded, and the other end is connected to resistors R1 and R3 at a single point. One end of resistor R3 is connected to resistor R1 and capacitor C2 at a single point, and the other end is connected to capacitor C3 and resistor R4 at a single point. One end of capacitor C3 is grounded, and the other end is connected to resistors R3 and R4 at a single point. One end of resistor R4 is connected to resistor R3 and capacitor C3 at a single point, and the other end is connected to capacitor C4. One end of capacitor C4 is grounded, and the other end is connected to resistor R4. The overall loop filter LPF is of fourth order and has four poles; therefore, the overall PLL is a fifth-order type-two PLL loop.

[0009] Preferably, the loop filter LPF is connected to the charge pump CP1, the programmable charge pump CP2, and the programmable charge pump CP3. The output of the charge pump CP1 is connected at a single point to the resistor R1 and capacitor C2 in the loop filter LPF. The charge pump CP1 generates the PLL main loop current I. CPThe current is injected between resistor R1 and capacitor C2 in the loop filter LPF. The output of the programmable charge pump CP2 is connected at a single point between resistor R1 and capacitor C1 in the loop filter LPF. The programmable charge pump CP2 generates a modulated current I. mod The current is injected between resistor R1 and capacitor C1 in the loop filter LPF. The output of the programmable charge pump CP3 is connected at a single point to resistor R3, resistor R4, and capacitor C3 in the loop filter LPF. The programmable charge pump CP3 generates a compensation current I. com The current is injected between resistor R3 and capacitor C3 in the loop filter LPF. The current magnitudes of the programmable charge pumps CP2 and CP3 are adjustable.

[0010] Preferably, the output of the loop filter LPF is connected to the input of the voltage-controlled oscillator (VCO), and the resistor R4 and capacitor C4 in the loop filter LPF are connected to the VCO input at a single point. The output V of the loop filter LPF is... ctrl The signal controls the voltage-controlled oscillator (VCO) to generate a corresponding frequency change.

[0011] The beneficial effects of the present invention: The present invention is a direct modulation VCO spread spectrum clock generator based on two-point injection technology, and proposes a two-point injection technology to realize spread spectrum clock.

[0012] 1. A programmable charge pump CP2 is used to inject modulation current I into the loop filter LPF. mod Simultaneously, an additional programmable charge pump CP3 is introduced to inject a compensation current I into the loop filter LPF between resistor R3 and capacitor C3. com This compensates for the disadvantage of the triangular wave modulation signal attenuation into a sine wave modulation signal caused by the PLL loop bandwidth and the low-pass characteristics of the filter. While eliminating spikes on the voltage-controlled oscillator (VCO) control voltage, it also takes into account spurious suppression and introduces a fourth-order loop filter (LPF) to achieve better EMI reduction.

[0013] 2. This invention achieves linear modulation, and the magnitudes of the currents of programmable charge pump CP2 and programmable charge pump CP3 can be changed according to user needs to achieve different spread spectrum depths. It has a certain tolerance to PVT changes and is suitable for application in the field of high-speed communication. Attached Figure Description

[0014] Other features, objects, and advantages of the invention will become more apparent from the following detailed description of non-limiting examples with reference to the accompanying drawings:

[0015] Figure 1 This is a schematic diagram of the spread spectrum clock generator structure based on two-point injection technology proposed in this invention;

[0016] Figure 2 The modulated signals with different profiles and their modulated spectra;

[0017] Figure 3 A schematic diagram of an existing spread spectrum clock generator based on the LPF resistor injection of a loop filter;

[0018] Figure 4 A schematic diagram of an existing spread spectrum clock generator based on capacitance multiplication technology;

[0019] Figure 5 This is a circuit diagram of the loop filter LPF and related injection points in this invention;

[0020] Figure 6 The control voltage V of the second-order loop filter LPF voltage-controlled oscillator VCO is... ctrl Simulation diagram;

[0021] Figure 7 The control voltage V of the third-order loop filter LPF voltage-controlled oscillator VCO is... ctrl Simulation diagram;

[0022] Figure 8 The present invention relates to a voltage-controlled oscillator (VCO) based on two-point injection technology, controlling the voltage V. ctrl Simulation diagram;

[0023] Figure 9 This is a diagram showing the EMI reduction effect after the spread spectrum of this invention is enabled. Detailed Implementation

[0024] To make the technical means, creative features, achieved objectives and effects of this invention easier to understand, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this invention, and not all embodiments (the selection of charge pump CP1, programmable charge pump CP2, and programmable charge pump CP3 can be multiple; the selection of PLL loop bandwidth can be based on the user's comprehensive consideration of lockout time, noise performance, etc., and can also adopt...). Figure 4 The modulation injection method of the unity-gain buffer structure shown is used to reduce the capacitor area in the loop filter LPF (all of which are within the scope of this patent). Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without inventive effort are within the scope of protection of this invention.

[0025] Spread Spectrum Clock (SSC): This is a method of reducing the energy (amplitude) of the fundamental frequency and odd harmonic frequencies of a clock signal by dispersing the energy of the clock signal spectrum from a narrow frequency band to a set wide frequency band through frequency modulation. It is an effective means of reducing electromagnetic interference (EMI) in a system.

[0026] Direct modulation VCO: Spread Spectrum Clock Generator (SSCG) is mostly based on Phase Locked Loop (PLL). The method of achieving frequency modulation by directly modulating the input control voltage of Voltage-controlled Oscillator (VCO) is called direct modulation VCO.

[0027] Spread spectrum modulation profile: The modulation profile of spread spectrum determines the form of the power spectrum. Common modulation profiles include triangular wave modulation, sine wave modulation, and Hershey-Kiss modulation.

[0028] Reference spurious signals: Due to non-ideal factors such as mismatch between charge pump charging and discharging currents, the output signal of the phase-locked loop has periodic spurious components, which are manifested in the spectrum as spikes at reference source frequencies on both sides of the output center frequency.

[0029] Please see Figure 1 This invention discloses a direct modulation VCO spread spectrum clock generator based on two-point injection technology, including a crystal oscillator F. REF Frequency and phase detector PFD, charge pump CP1, programmable charge pump CP2, programmable charge pump CP3, loop filter LPF, voltage-controlled oscillator VCO, frequency divider DIV1, frequency divider DIV2, and frequency divider DIV3. Frequency divider DIV1 is connected to crystal oscillator F. REF Connected to provide the reference frequency required for PLL locking. REF Frequency divider DIV2 and crystal oscillator F REF The two differential square wave modulation signals UP2 and DN2 are generated by connecting them. The frequency and phase detector PFD and the frequency divider DIV1 are connected to identify the PLL. REF Signals and PLL FB The signal frequency and phase difference generate UP and DN signals. The charge pump CP1 is connected to the frequency and phase detector PFD, and a current I is generated based on the UP and DN signals. CP The injection loop filter, programmable charge pumps CP2 and CP3 are both connected to frequency divider DIV2, generating modulation current I respectively. mod and compensation current Icom The injection loop filter LPF generates a triangular wave modulated signal. The loop filter LPF is connected to charge pump CP1, programmable charge pump CP2, and programmable charge pump CP3, which respectively convert current I... CP Modulation current I mod Compensation current I com Converted into the control voltage V of the voltage-controlled oscillator (VCO) ctrl The voltage-controlled oscillator (VCO) is connected to the loop filter (LPF), and the control voltage V is determined by the output of the loop filter (LPF). ctrl The output clock signal is generated to achieve frequency modulation in the time domain. The frequency divider DIV3 is connected to the voltage-controlled oscillator (VCO) to generate the feedback signal PLL. FB The feedback connection returns to the input terminal of the frequency and phase detector (PFD) to achieve final locking of the PLL.

[0030] The loop filter LPF consists of resistors R1, R3, and R4, and capacitors C1, C2, C3, and C4. One end of capacitor C1 is grounded, and the other end is connected to resistor R1. One end of resistor R1 is connected to capacitor C1, and the other end is connected to capacitor C2 and resistor R3 at a single point. One end of capacitor C2 is grounded, and the other end is connected to resistors R1 and R3 at a single point. One end of resistor R3 is connected to resistor R1 and capacitor C2 at a single point, and the other end is connected to capacitor C3 and resistor R4 at a single point. One end of capacitor C3 is grounded, and the other end is connected to resistors R3 and R4 at a single point. One end of resistor R4 is connected to resistor R3 and capacitor C3 at a single point, and the other end is connected to capacitor C4. One end of capacitor C4 is grounded, and the other end is connected to resistor R4. The overall loop filter LPF is of fourth order and has four poles; therefore, the overall PLL is a fifth-order type-two PLL loop.

[0031] The loop filter LPF is connected to charge pumps CP1, CP2, and CP3. The output of charge pump CP1 is connected at a single point between resistor R1 and capacitor C2 in the loop filter LPF. Charge pump CP1 generates the main loop current I of the PLL. CP The programmable charge pump CP2 is connected at a single point between resistor R1 and capacitor C2 in the loop filter LPF. The programmable charge pump CP2 generates a modulated current I. mod The injection point is between resistor R1 and capacitor C1 in the loop filter LPF. The output of programmable charge pump CP3 is connected at a single point between resistor R3, resistor R4, and capacitor C3 in the loop filter LPF. Programmable charge pump CP3 generates a compensation current I. com The injection loop filter LPF is located between resistor R3 and capacitor C3. The programmable charge pumps CP2 and CP3 have adjustable current values.

[0032] The output of the loop filter LPF is connected to the input of the voltage-controlled oscillator (VCO). Resistor R4 and capacitor C4 in the loop filter LPF are connected to the VCO input at a single point. The output V of the loop filter LPF is... ctrl The signal controls the voltage-controlled oscillator (VCO) to generate a corresponding frequency change.

[0033] Working principle of this invention:

[0034] This invention discloses a direct modulation VCO spread spectrum clock generator based on two-point injection technology, such as... Figure 1 The main structure of a conventional PLL consists of frequency divider DIV1, frequency and phase detector PFD, charge pump CP1, loop filter LPF, voltage-controlled oscillator VCO, and frequency divider DIV3, which enables the PLL to lock to the target frequency.

[0035] Frequency divider DIV2 corresponds to crystal oscillator F REF Frequency division is performed to generate two differential periodic modulation signals UP2(f) modp ) and DN2(f modn ), usually, f modp and f modn The frequency range is between 30kHz and 70kHz. The programmable charge pump CP2 operates based on the periodic signal UP2(f) modp ) and DN2(f modn Generate modulation current I mod Between resistor R1 and capacitor C1 in the injection loop filter LPF, we can write the equation from I... mod To V ctrl The transfer function is as follows:

[0036]

[0037] In the formula, R1, C1, and C2 are the resistor R1, capacitor C1, and capacitor C2 in the loop filter LPF, respectively, maintaining the modulation frequency f. mod By using <<(C1+C2) / (2πR1C1C2), we can obtain an ideal integral result, thus simplifying the above equation to

[0038]

[0039] The triangular wave modulated signal can be determined by the modulating current I. mod It can be obtained by integration, and can be found in V. ctrl The node generates a periodic triangular signal, and the periodic signal UP2(f) modp ) and DN2(f modn ) frequency and modulation current I modSince the generated triangular wave modulation signal and the three signals have the same frequency, this injection method can be used to implement a spread spectrum clock.

[0040] In traditional PLL-based direct modulation VCO spread spectrum clock generators, because the triangular wave modulation signal is applied to the VCO control voltage, the overall modulation path exhibits high-pass characteristics. Therefore, an extremely low PLL loop bandwidth is required to ensure that the modulation signal can pass completely through the PLL loop. Furthermore, the extremely low PLL loop bandwidth also helps filter out the modulation components at the output of the phase-frequency detector (PFD) due to the spread spectrum operation. As mentioned earlier, the modulation signal f... modp and f modn The frequency range is between 30kHz and 70kHz, so to achieve a spread spectrum clock, the loop bandwidth of the PLL needs to be set between 3kHz and 7kHz. Unfortunately, the extremely small loop bandwidth requires a large loop filter LPF capacitor C1, increasing the area cost and lengthening the PLL's lock-in time. Therefore, inventing a direct modulation VCO spread spectrum clock generator that has good spread spectrum performance without increasing area cost and lock-in time is of great significance.

[0041] As analyzed above, from I mod To V ctrl The point transfer function indicates that V ctrl A point can generate a periodic triangular wave modulated signal. If a second-order loop filter LPF is used, due to the modulation current I... mod The injection and spread spectrum clock implementation, in the time domain, the frequency phase detector (PFD) will identify the PLL. FB and PLL REF The phase difference between them, the output UP and DN signals, cause the charge pump CP1 to periodically charge and discharge the loop filter, thereby achieving V a Seeing spikes is undesirable. Fortunately, they can be filtered out by introducing resistor R3 and capacitor C3 in the loop filter LPF. However, while filtering out spikes, V... a The high-frequency components of the point triangular wave modulated signal will also be filtered out, thus attenuating the peak value of the triangular modulated signal. Furthermore, if the PLL loop bandwidth is selected too large, at V... a The signal is already a periodic signal after being low-pass filtered by resistor R1 and capacitor C2 in the loop filter LPF. After being filtered by resistor R3 and capacitor C3, in severe cases, it will attenuate to a near-sine wave modulated signal, which will worsen the EMI reduction effect.

[0042] In view of the above problems, the present invention proposes to introduce an additional programmable charge pump CP3, which has the same operation as the programmable charge pump CP2, but differs in their current magnitude. The compensation current I of the programmable charge pump CP3 is...com The modulation current I of the programmable charge pump CP2 is less than mod Similarly, as long as the sum of the equivalent impedances of resistors R1, capacitors C1, C2, and R3 in the loop filter LPF does not exceed the equivalent impedance of capacitor C3, the compensation current I can be controlled. com Injection point to V ctrl The transfer function is:

[0043]

[0044] In the formula, R4, C3, and C4 are resistor R4, capacitor C3, and capacitor C4 in the loop filter LPF, respectively. If the modulation frequency f mod By subtracting (C3+C4) / (2πR4C3C4), we can obtain an ideal integral result, so we can simplify the above equation to:

[0045]

[0046] Based on the above formula, we can know the compensation current I. com The injection of the control voltage V to the voltage-controlled oscillator (VCO) ctrl It still relies on integration, meaning it can compensate for the attenuated sinusoidal modulated signal. Simply adjusting the current of the programmable charge pump CP3 is enough to restore it to a triangular wave modulation. In addition, the compensation current I... com The introduction of this technology can relax the limitations of traditional direct-modulation VCO spread spectrum clock generator structures on PLL loop bandwidth. Even if the originally near-ideal triangular wave modulation signal is filtered into a sine wave modulation signal by the loop filter LPF, the bandwidth can be adjusted by adjusting the compensation current I. com The size of the PLL compensates for this, effectively reducing the PLL's locking time.

[0047] Considering spurious suppression, to maintain good reference spurious suppression performance, a smaller pole location needs to be selected. The location of the dominant pole of the loop filter LPF is as follows:

[0048]

[0049] As can be seen from the above formula, to obtain a better reference spurious suppression effect, C needs to be increased. eq The value of C, where C eq =C1·C2 / (C1+C2), where C1 and C2 are capacitors C1 and C2 in the loop filter LPF, respectively. Combined with the previous modulation frequency f... mod The prerequisite, C eq Increasing the capacitance in the loop filter LPF will increase the effect of the modulation current I. modThe integration is nonlinear, so this structure involves a trade-off between modulation linearity and spurious suppression. However, this invention prioritizes modulation linearity, reducing C... eq The value of allows the triangular wave modulation signal to achieve a more ideal integration effect and be more linear. By adding an additional resistor R4 and capacitor C4 to the loop filter LPF, better reference spurious suppression can be achieved.

[0050] The loop filter (LPF) structure used in this invention is as follows: Figure 5 A good linear modulation of the triangular wave was achieved based on the fourth-order loop filter LPF.

[0051] Specific simulation results are provided to help verify the theoretical correctness of this invention. For example... Figure 6 The figure shows the control voltage V entering the voltage-controlled oscillator (VCO) when a second-order loop filter (LPF) is used. ctrl It will contain spikes. Figure 7 A third-order loop filter (LPF) is introduced to filter out spikes, but the modulated signal is further attenuated. Ultimately, this invention proposes introducing a compensation current I... com The effect is similar to that of resistor R4 and capacitor C4. Figure 9 As shown, the control voltage V entering the voltage-controlled oscillator (VCO) is... ctrl The curve can be recovered as an approximate triangular modulated wave signal. Figure 9 The image shows a comparison of the spectrum before and after the spread spectrum is enabled in this invention. As can be seen from the image, the spread spectrum clock generator proposed in this invention can reduce EMI by up to 14.48 dB.

[0052] The above description outlines the working principle, main features, and advantages of this invention compared to conventional structures. It will be apparent to those skilled in the art that this invention is not limited to the detailed description of the exemplary embodiments above, and that it can be implemented in other specific forms without departing from the theory or essential characteristics of the invention. Therefore, this embodiment should be considered exemplary and non-limiting in all respects. The scope of this invention is defined by the appended claims rather than the foregoing description, and all variations falling within the meaning and scope of the claims are intended to be included within the inventive nature of this invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0053] Furthermore, it should be understood that this description in the specification is merely for clarity and ease of understanding. Those skilled in the art should consider the specification as a whole and may modify the technical solutions adopted in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A direct modulation VCO spread spectrum clock generator based on two-point injection technology, comprising a crystal oscillator F REF The components include a frequency and phase detector (PFD), a charge pump (CP1), a programmable charge pump (CP2), a programmable charge pump (CP3), a loop filter (LPF), a voltage-controlled oscillator (VCO), frequency dividers (DIV1, DIV2, and DIV3); wherein the frequency divider (DIV1) is connected to the crystal oscillator (F). REF Connected to provide the reference frequency required for PLL locking. REF The frequency divider DIV2 and the crystal oscillator F REF The two differential square wave modulation signals UP2 and DN2 are generated by connecting them. The frequency and phase detector PFD and the frequency divider DIV1 are connected to identify the PLL. REF Signals and PLL FB The signal frequency and phase difference generate UP and DN signals. The charge pump CP1 is connected to the frequency and phase detector PFD, and a current I is generated based on the UP and DN signals. CP The injection loop filter, wherein programmable charge pumps CP2 and CP3 are both connected to frequency divider DIV2, and respectively generate modulation current I. mod and compensation current I com A triangular wave modulation signal is generated by an injection loop filter LPF. The loop filter LPF is connected to charge pump CP1, programmable charge pump CP2, and programmable charge pump CP3, which respectively convert current I... CP Modulation current I mod Compensation current I com Converted into the control voltage V of the voltage-controlled oscillator (VCO) ctrl The voltage-controlled oscillator (VCO) is connected to the loop filter (LPF), and the control voltage V is determined based on the output control voltage V of the loop filter (LPF). ctrl The output clock signal is generated to achieve frequency modulation in the time domain. The frequency divider DIV3 is connected to the voltage-controlled oscillator (VCO) to generate a feedback signal PLL. FB The feedback connection returns to the input terminal of the frequency and phase detector (PFD) to achieve final locking of the PLL.

2. The direct modulation VCO spread spectrum clock generator based on two-point injection technology according to claim 1, characterized in that: The loop filter LPF consists of resistors R1, R3, and R4, and capacitors C1, C2, C3, and C4. One end of capacitor C1 is grounded, and the other end is connected to resistor R1. One end of resistor R1 is connected to capacitor C1, and the other end is connected to capacitor C2 and resistor R3 at a single point. One end of capacitor C2 is grounded, and the other end is connected to resistors R1 and R3 at a single point. One end of resistor R3 is connected to resistor R1 and capacitor C2 at a single point, and the other end is connected to capacitor C3 and resistor R4 at a single point. One end of capacitor C3 is grounded, and the other end is connected to resistors R3 and R4 at a single point. One end of resistor R4 is connected to resistor R3 and capacitor C3 at a single point, and the other end is connected to capacitor C4. One end of capacitor C4 is grounded, and the other end is connected to resistor R4. The overall loop filter LPF is of fourth order and has four poles; therefore, the overall PLL is a fifth-order type-two PLL loop.

3. The direct modulation VCO spread spectrum clock generator based on two-point injection technology according to claim 1, characterized in that: The loop filter LPF is connected to the charge pump CP1, the programmable charge pump CP2, and the programmable charge pump CP3; the output of charge pump CP1 is connected at a single point to resistor R1 and capacitor C2 in the loop filter LPF; charge pump CP1 generates the PLL main loop current I. CP The current is injected between resistor R1 and capacitor C2 in the loop filter LPF; the output of the programmable charge pump CP2 is connected at a single point to resistor R1 and capacitor C1 in the loop filter LPF; the programmable charge pump CP2 generates a modulation current I. mod The current is injected between resistor R1 and capacitor C1 in the loop filter LPF; the output of the programmable charge pump CP3 is connected at a point to resistor R3, resistor R4, and capacitor C3 in the loop filter LPF; the programmable charge pump CP3 generates a compensation current I. com The current is injected between resistor R3 and capacitor C3 in the loop filter LPF; wherein the current of programmable charge pump CP2 and programmable charge pump CP3 is adjustable.

4. The direct modulation VCO spread spectrum clock generator based on two-point injection technology according to claim 1, characterized in that: The output of the loop filter LPF is connected to the input of the voltage-controlled oscillator (VCO). Resistor R4 and capacitor C4 in the loop filter LPF are connected to the VCO input at a single point. The output V of the loop filter LPF is... ctrl The signal controls the voltage-controlled oscillator (VCO) to generate a corresponding frequency change.

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