Ethernet message analysis method, system, medium and switch chip

CN116866456BActive Publication Date: 2026-06-09NANJING JINZHEN MICROELECTRONICS TECH CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
NANJING JINZHEN MICROELECTRONICS TECH CO LTD
Filing Date
2023-08-16
Publication Date
2026-06-09

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Abstract

The application provides an Ethernet message analysis method, system, medium and switch chip. The Ethernet message analysis method comprises the following steps: obtaining an Ethernet message; checking the correctness of the Ethernet message, and obtaining a correct target Ethernet message; and analyzing the target Ethernet message. The application provides a flexible Ethernet message analysis method, which can realize flexible analysis and processing of the Ethernet message, and reduces the problem of high complexity of the switch chip design caused by the inflexible Ethernet message analysis.
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Description

Technical Field

[0001] This application belongs to the field of communication technology and relates to Ethernet messages, and in particular to an Ethernet message parsing method, system, medium and switch chip. Background Technology

[0002] With the development of Ethernet networks, the demand for fast and flexible parsing of Ethernet packets is increasing. However, there is a lack of Ethernet packet parsing and processing methods in the existing technology. Summary of the Invention

[0003] The purpose of this application is to provide an Ethernet packet parsing method, system, medium, and switch chip to solve the problems mentioned in the background art.

[0004] On the one hand, this application provides an Ethernet packet parsing method applied to a switch chip. The Ethernet packet parsing method includes: acquiring an Ethernet packet; checking the correctness of the Ethernet packet to acquire a correct target Ethernet packet; and parsing the target Ethernet packet.

[0005] This application provides an Ethernet packet parsing method that enables the parsing and processing of Ethernet packets.

[0006] In one implementation of the first aspect, checking the correctness of the Ethernet packet and obtaining the correct target Ethernet packet includes: determining whether the length of the Ethernet packet is between 64B and the maximum transmission unit; performing cyclic redundancy check on the Ethernet packet; and defining the Ethernet packet with a length between 64B and the maximum transmission unit and a correct cyclic redundancy check as the target Ethernet packet.

[0007] In one implementation of the first aspect, after the step of parsing the target Ethernet packet, the Ethernet packet parsing method further includes: obtaining target information.

[0008] In one implementation of the first aspect, the target Ethernet packet includes: an external Layer 2 MAC architecture, a Layer 3 IP architecture, and a Layer 4 UDP / TCP architecture; parsing the target Ethernet packet includes: parsing the Layer 2 MAC architecture to extract first information; parsing the Layer 3 IP architecture to extract second information; determining the protocol type of the target Ethernet packet based on the second information; if the protocol type is other than IPv4 and IPv6, parsing stops, and the target information is obtained; the target information includes: the first information and the second information; if the protocol type is IPv4 or IPv6, after extracting IP-related information, the Layer 4 UDP / TCP architecture is parsed to extract third information, and the target information is obtained; the target information includes: the first information, the second information, the IP-related information, and the third information.

[0009] In one implementation of the first aspect, the Layer 2 MAC architecture includes at least: the header of the target Ethernet packet, a tag flag bit, and a switch_tag; parsing the Layer 2 MAC architecture to extract first information includes: parsing the header of the target Ethernet packet to extract the MAC address; parsing the switch_tag according to the tag flag bit to extract the ID information of the switch_tag; determining whether the Layer 2 MAC architecture has a VLAN stack; when the Layer 2 MAC architecture has a VLAN stack, extracting the corresponding first tag information; determining whether the Layer 2 MAC architecture has an SGT; when the Layer 2 MAC architecture has an SGT, extracting the corresponding second tag information; the first information includes the following cases: when the Layer 2 MAC architecture has a VLAN stack and an SGT, the first information includes: the MAC address, the ID information, the first tag information, and the second tag information; when the Layer 2 MAC architecture has a VLAN stack but no SGT, the first information includes: the MAC address, the ID information, and the first tag information; when the Layer 2 MAC architecture has no VLAN stack but has an SGT, the first information includes: the MAC address, the ID information, and the second tag information; when the Layer 2 MAC architecture has no VLAN stack... When stacking and SGT, the first information includes: the MAC address and the ID information.

[0010] In one implementation of the first aspect, the step of extracting the third information and obtaining the target information includes: determining whether the target Ethernet packet is UDP or TCP based on the parsing result of the four-layer UDP / TCP architecture, and extracting UDP information or TCP information based on the judgment result; the third information includes: the UDP information or the TCP information; determining whether the target Ethernet packet is a tunnel type based on the parsing result of the four-layer UDP / TCP architecture; if the target Ethernet packet is not a tunnel type, then stopping the parsing and obtaining the target information; the target information includes: the first information, the second information, and the IP-related information, and the UDP information or the TCP information; if the target Ethernet packet is a tunnel type, the Ethernet packet parsing method further includes: performing corresponding parsing according to different types of tunnel types.

[0011] In one implementation of the first aspect, the corresponding parsing based on the different types of the tunnel includes the following cases: If the tunnel type is VxLAN, then after parsing VxLAN, the layer 2, layer 3, and layer 4 architectures of the internal tunnel packets are parsed layer by layer; if the tunnel type is VxLAN_GPE, then after parsing VxLAN_GPE, the layer 2, layer 3, and layer 4 architectures of the internal tunnel packets are parsed layer by layer; if the tunnel type is Geneve, then after parsing Geneve, the layer 2, layer 3, and layer 4 architectures of the internal tunnel packets are parsed layer by layer; if the tunnel type is NVGRE, then after parsing NVGRE, the layer 2, layer 3, and layer 4 architectures of the internal tunnel packets are parsed layer by layer; if the tunnel type is TERED, then after parsing IPv6 information, the layer 4 architecture is parsed; if the tunnel type is GRE, then after parsing IPv4 and IPv6 information, the layer 4 architecture is parsed; if the tunnel type is IPv4 over For IPv4, after parsing the IPv4 information, the four-layer architecture is then parsed; if the tunnel type is IPv6 over IPv4, after parsing the IPv6 information, the four-layer architecture is then parsed.

[0012] Secondly, this application provides an Ethernet packet parsing system applied to a switch chip. The Ethernet packet parsing system includes: an acquisition module for acquiring Ethernet packets; an inspection module for checking the correctness of the Ethernet packets and acquiring correct target Ethernet packets; and a parsing module for parsing the target Ethernet packets.

[0013] Thirdly, this application provides a switch chip, the switch chip comprising: a processor and a memory; the memory for storing a computer program; the processor for executing the computer program stored in the memory, so that the switch chip performs the above-described Ethernet packet parsing method.

[0014] Fourthly, this application provides a computer-readable storage medium storing a computer program thereon, which, when executed by a switch chip, implements the aforementioned Ethernet packet parsing method.

[0015] As described above, the Ethernet packet parsing method, system, medium, and switch chip described in this application have the following beneficial effects:

[0016] Compared with existing technologies, this application provides a flexible Ethernet packet parsing method, which can realize flexible parsing and processing of Ethernet packets, and reduce the problem of high design complexity of switch chips caused by insufficient flexibility in Ethernet packet parsing. Attached Figure Description

[0017] Figure 1 The flowchart shown is a representation of the Ethernet packet parsing method described in this application embodiment.

[0018] Figure 2 This is a flowchart illustrating the process of checking the correctness of Ethernet packets and obtaining the correct target Ethernet packet as described in an embodiment of this application.

[0019] Figure 3 The flowchart shown is a process for parsing target Ethernet packets as described in an embodiment of this application.

[0020] Figure 4 The flowchart shown is a process for parsing the two-layer MAC architecture and extracting the first information as described in the embodiments of this application.

[0021] Figure 5 The flowchart shown is a process for extracting third information and obtaining target information as described in the embodiments of this application.

[0022] Figure 6 The diagram shown illustrates the principle of the Ethernet packet parsing method described in this application embodiment.

[0023] Figure 7 The diagram shown illustrates the principle of parsing according to different types of tunnels as described in this application embodiment.

[0024] Figure 8 The diagram shown is a structural schematic of the Ethernet packet parsing system described in an embodiment of this application.

[0025] Label Explanation

[0026] 81 Acquisition Module

[0027] 82 Inspection Module

[0028] 83 Parsing Module

[0029] Steps S1 to S3

[0030] Steps S21 to S22

[0031] Steps S31 to S35

[0032] Steps S311~S316

[0033] Steps S351~S353 Detailed Implementation

[0034] The following specific examples illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. This application can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this application. It should be noted that, unless otherwise specified, the following embodiments and features in the embodiments can be combined with each other.

[0035] It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of this application. Therefore, the drawings only show the components related to this application and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0036] See Figures 1 to 8 The following embodiments of this application provide an Ethernet packet parsing method, system, medium, and switch chip. Compared with the prior art, this application provides a flexible Ethernet packet parsing method, which can realize flexible parsing and processing of Ethernet packets, reducing the problem of high design complexity of switch chips caused by insufficient flexibility in Ethernet packet parsing.

[0037] The Ethernet packet parsing method provided in this application supports flexible processing of switch tags (i.e., switch_tag), layer 2 tags (i.e., layer2_tag), IP, UDP / TCP, and tunnels, and extracts the following tuples:

[0038] 1. The switch labels the interface ID and instance ID;

[0039] 2. IPv4 or IPv6 indication;

[0040] 3. Tunnel signs;

[0041] 4. External source / destination MAC address, source / destination IP address, source / destination port, and IP protocol;

[0042] 5. Internal source / destination MAC addresses, source / destination IP addresses, source / destination ports, and IP protocols;

[0043] 6. Packet classification: External / internal TCP packets to be bypassed: Packets with TCP control options of SYN, RST, or FIN.

[0044] The technical solutions in the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0045] like Figure 1 As shown, in one embodiment, this application provides an Ethernet packet parsing method applied to a switch chip, the Ethernet packet parsing method comprising:

[0046] Step S1: Obtain Ethernet packets.

[0047] Step S2: Check the correctness of the Ethernet packet and obtain the correct target Ethernet packet.

[0048] like Figure 2 As shown, in one embodiment, checking the correctness of the Ethernet packet and obtaining the correct target Ethernet packet includes:

[0049] Step S21: Determine whether the length of the Ethernet packet is between 64B and the maximum transmission unit.

[0050] Step S22: Perform cyclic redundancy check on the Ethernet packets.

[0051] It should be noted that the execution order of steps S21 and S22 is not a limiting condition for this application; that is, step S21 can be executed first, followed by step S22 (e.g., ...). Figure 2 (As shown), you can also execute step S22 first, then step S21. Of course, you can also execute step S21 and step S22 at the same time.

[0052] In this embodiment, the target Ethernet packet is defined as an Ethernet packet with a length between 64 bytes and the maximum transmission unit and a correct Cyclic Redundancy Check (CRC).

[0053] It should be noted that the Maximum Transmission Unit (MTU) is used to inform the other party of the maximum size of the data service unit that can be accepted, indicating the size of the payload that the sender can accept; it is supported by different Ethernet switch manufacturers, and is generally 9KB to 16KB.

[0054] Specifically, after obtaining the Ethernet packet in step S1, the correctness of the Ethernet packet is checked in step S2. Incorrect Ethernet packets (such as CRC error packets) are lost, and the correct Ethernet packets (i.e., the target Ethernet packet) are parsed and processed.

[0055] Step S3: Parse the target Ethernet packet.

[0056] In one embodiment, after the step of parsing the target Ethernet packet, the Ethernet packet parsing method further includes: obtaining target information.

[0057] In one embodiment, the target Ethernet packet includes an external Layer 2 MAC architecture, a Layer 3 IP architecture, and a Layer 4 UDP / TCP architecture, with each layer corresponding to a tag, namely layer2_tag, layer3_tag, and layer4_tag.

[0058] like Figure 3 As shown, in one embodiment, parsing the target Ethernet packet includes:

[0059] Step S31: Analyze the two-layer MAC architecture and extract the first information.

[0060] In one embodiment, the Layer 2 MAC architecture includes at least: the header of the target Ethernet packet, a tag flag bit, and a switch_tag.

[0061] like Figure 4 As shown, in one embodiment, parsing the Layer 2 MAC architecture and extracting the first information includes:

[0062] Step S311: Parse the header of the target Ethernet packet and extract the MAC address.

[0063] It should be noted that the header of the target Ethernet packet occupies 12 bytes, including 6 bytes of DA (destination MAC address) and 6 bytes of SA (source MAC address); where DA = Byte 0-Byte 5; SA = Byte 6-Byte 11.

[0064] Step S312: Parse the switch_tag according to the flag bit of the tag and extract the ID information of the switch_tag.

[0065] Step S313: Determine whether the Layer 2 MAC architecture has a VLAN stack.

[0066] It should be noted that VLAN stack is a Layer 2 technology that can encapsulate outer VLAN tags for different user VLANs. In the operation of a business access environment, it is often necessary to distinguish user needs based on the user's application, access location, or device. VLAN stack can add corresponding outer tags to user packets based on the user's packet tag or IP / MAC, so as to distinguish different users.

[0067] When the Layer 2 MAC architecture has a VLAN stack, proceed to step S314.

[0068] Step S314: Extract the corresponding first tag information.

[0069] Step S315: Determine whether the two-layer MAC architecture has an SGT.

[0070] It should be noted that SGT stands for Security Group Tag, an extended group.

[0071] When the two-layer MAC architecture has an SGT, proceed to step S316.

[0072] Step S316: Extract the corresponding second tag information.

[0073] It should be noted that, in this embodiment, the first information includes the following:

[0074] (11) When the Layer 2 MAC architecture has VLAN stack and SGT, the first information includes: the MAC address, the ID information, the first tag information and the second tag information.

[0075] (12) When the Layer 2 MAC architecture has a VLAN stack but no SGT, the first information includes: the MAC address, the ID information and the first tag information.

[0076] (13) When the Layer 2 MAC architecture has no VLAN stack but has an SGT, the first information includes: the MAC address, the ID information and the second tag information.

[0077] (14) When the Layer 2 MAC architecture has no VLAN stack and SGT, the first information includes: the MAC address and the ID information.

[0078] Step S32: Parse the three-layer IP architecture and extract the second information.

[0079] It should be noted that this second piece of information includes three layers of tag information.

[0080] Step S33: Determine the protocol type of the target Ethernet packet based on the second information.

[0081] If the protocol type is other than IPv4 and IPv6, then proceed to step S34.

[0082] Step S34: Stop parsing and obtain the target information.

[0083] It should be noted that the target information at this time includes: the first information and the second information.

[0084] If the protocol type is IPv4 or IPv6, then proceed to step S35.

[0085] Step S35: After extracting IP-related information, parse the four-layer UDP / TCP architecture to extract the third information and obtain the target information.

[0086] It should be noted that the target information at this time includes: the first information, the second information, the IP-related information, and the third information.

[0087] It should be noted that IP-related information includes at least the destination IP address, source IP address, and IP protocol type.

[0088] like Figure 5 As shown, in one embodiment, extracting the third information and obtaining the target information includes:

[0089] Step S351: Determine whether the target Ethernet packet is UDP or TCP based on the parsing result of the four-layer UDP / TCP architecture, and extract UDP information or TCP information based on the determination result.

[0090] Specifically, if the target Ethernet packet is UDP, then UDP information is extracted; if the target Ethernet packet is TCP, then TCP information is extracted; where both UDP and TCP information include the source port number and the destination port number.

[0091] It should be noted that, in this embodiment, the third information includes: the UDP information or the TCP information.

[0092] Step S352: Determine whether the target Ethernet packet is of tunnel type based on the parsing result of the four-layer UDP / TCP architecture.

[0093] If the target Ethernet packet is not of tunnel type, then proceed to step S353.

[0094] Step S353: Stop parsing and obtain the target information.

[0095] It should be noted that, in this embodiment, the target information includes: the first information, the second information, the IP-related information, and the UDP information or the TCP information.

[0096] If the target Ethernet packet is of type tunnel, the Ethernet packet parsing method further includes: performing corresponding parsing according to different types of tunnel.

[0097] In one embodiment, the corresponding parsing based on different types of tunnel includes the following:

[0098] (21) If the tunnel type is VxLan, then after parsing VxLan, perform layer-by-layer parsing of the tunnel internal message's two-layer, three-layer, and four-layer architectures.

[0099] (22) If the tunnel type is VxLAN_GPE, after parsing VxLAN_GPE, perform layer-by-layer parsing of the tunnel internal message's two-layer, three-layer, and four-layer architectures.

[0100] (23) If the tunnel type is Geneve, after parsing Geneve, perform layer-by-layer parsing of the two-layer, three-layer, and four-layer architecture of the internal tunnel messages.

[0101] (24) If the tunnel type is NVGRE, after parsing NVGRE, perform layer-by-layer parsing of the tunnel internal message's two-layer architecture, three-layer architecture, and four-layer architecture.

[0102] (25) If the tunnel type is TERED and the subsequent type is IPv6, then perform the four-layer architecture parsing.

[0103] (26) If the tunnel type is GRE, after parsing the IPv4 information and IPv6 information, the four-layer architecture is then parsed.

[0104] (27) If the tunnel type is IPv4 over IPv4, after parsing the IPv4 information, the four-layer architecture is parsed.

[0105] (28) If the tunnel type is IPv6 over IPv4, after parsing the IPv6 information, the four-layer architecture is parsed.

[0106] The Ethernet packet parsing method of this application will be further explained through specific embodiments below.

[0107] like Figure 6 and Figure 7 As shown in one embodiment, the working principle of the Ethernet packet parsing method provided in this application is as follows:

[0108] Upon receiving an Ethernet packet, the system first checks its integrity, discarding incorrect packets and parsing and processing the correct ones.

[0109] The specific analysis process is as follows:

[0110] like Figure 6 As shown, the first 12 bytes of the Ethernet packet are parsed to extract the MAC address MAC_Addr. MAC_Addr includes DA and SA; where DA = Byte0-Byte5; SA = Byte6-Byte11.

[0111] Then, based on the tag's flag, the switch_tag is parsed to obtain the switch_tag's ID information.

[0112] Next, continue parsing layer2_tag and extract the corresponding tag content based on whether there is a VLAN stack or an SGT in the layer 2 architecture.

[0113] Then, the layer3_tag is parsed to obtain the L3 tag information, and the Ethernet packet is determined to be IPv4, IPv6 or other types based on the L3 tag information.

[0114] If it is another type, the parsing ends, and the information obtained in the previous steps is extracted.

[0115] If it is an IPv4 or IPv6 type, after extracting the IP-related information, the layer4_tag will be parsed.

[0116] Determine whether an Ethernet packet is UDP or TCP, and extract UDP or TCP information based on the determination result;

[0117] Finally, determine whether the Ethernet packet is a tunnel type packet.

[0118] If it is not a tunnel type, the parsing ends, and the information obtained in the previous steps is extracted.

[0119] If it is a tunnel type, it is divided into 8 cases from A to H for parsing.

[0120] like Figure 7 The diagram shows the specific analysis methods for the eight cases A through H.

[0121] Scenario A: The tunnel is of type VxLan. After parsing the VxLan, the layer2_tag, layer3_tag, and layer4_tag of the internal tunnel message are parsed.

[0122] Case B: The tunnel is of type VxLAN_GPE. After parsing VxLAN_GPE, the layer2_tag, layer3_tag, and layer4_tag of the internal tunnel message are parsed.

[0123] Case C: The tunnel is of type Geneve. After parsing Geneve, the layer2_tag, layer3_tag, and layer4_tag of the internal message of the tunnel are parsed.

[0124] Case F: The tunnel is of type NVGRE. After parsing NVGRE, the layer2_tag, layer3_tag, and layer4_tag of the internal tunnel message are parsed.

[0125] Case D: The tunnel is of type TEREDO. After parsing the IPv6 information, layer4_tag parsing is performed.

[0126] Case E: The tunnel is of type GRE. After parsing IPv4 and IPv6 information, layer4_tag parsing is performed.

[0127] H case: tunnel is of type IPv4 over IPv4 (corresponding to...) Figure 7 After parsing the IPv4 information (IPv4_IPv4), the layer4_tag is then parsed.

[0128] Case G: The tunnel uses IPv6 over IPv4 (corresponding to...) Figure 7 In the Ipv6_IPv4, after parsing the IPv6 information, the layer4_tag is then parsed.

[0129] The scope of protection of the Ethernet packet parsing method described in this application is not limited to the execution order of the steps listed in this embodiment. Any scheme implemented by adding, deleting, or replacing steps in the prior art based on the principles of this application is included within the scope of protection of this application.

[0130] This application also provides an Ethernet packet parsing system, which can implement the Ethernet packet parsing method described in this application. However, the implementation apparatus of the Ethernet packet parsing method described in this application includes, but is not limited to, the structure of the Ethernet packet parsing system listed in this embodiment. All structural modifications and substitutions of the prior art made based on the principles of this application are included within the protection scope of this application.

[0131] like Figure 8 As shown, this embodiment provides an Ethernet packet parsing system applied to a switch chip. The Ethernet packet parsing system includes:

[0132] Acquisition module 81 is used to acquire Ethernet packets.

[0133] The inspection module 82 is used to check the correctness of the Ethernet packet and obtain the correct target Ethernet packet.

[0134] Parsing module 83 is used to parse the target Ethernet packet.

[0135] It should be noted that the structure and principle of the acquisition module 81, the inspection module 82 and the parsing module 83 correspond one-to-one with the steps (steps S1 to S3) in the above Ethernet packet parsing method, so they will not be described again here.

[0136] In one embodiment, this application also provides a switch chip, the switch chip comprising: a processor and a memory; the memory for storing a computer program; the processor for executing the computer program stored in the memory, so that the switch chip performs the above-described Ethernet packet parsing method.

[0137] In one embodiment, this application also provides a computer-readable storage medium storing a computer program that, when executed by a switch chip, implements the above-described Ethernet packet parsing method.

[0138] Those skilled in the art will understand that all or part of the steps in the methods of the above embodiments can be implemented by a program instructing a processor. The program can be stored in a computer-readable storage medium, which is a non-transitory medium, such as random access memory, read-only memory, flash memory, hard disk, solid-state drive, magnetic tape, floppy disk, optical disk, and any combination thereof. The storage medium can be any available medium accessible to a computer or a data storage device such as a server or data center that integrates one or more available media. This available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., digital video disc (DVD)), or a semiconductor medium (e.g., solid-state drive (SSD)).

[0139] In the embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, or methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For instance, the division of modules / units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple modules or units may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection of apparatuses or modules or units may be electrical, mechanical, or other forms.

[0140] The modules / units described as separate components may or may not be physically separate. The components shown as modules / units may or may not be physical modules; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules / units can be selected to achieve the objectives of the embodiments of this application, depending on actual needs. For example, the functional modules / units in the various embodiments of this application may be integrated into one processing module, or each module / unit may exist physically separately, or two or more modules / units may be integrated into one module / unit.

[0141] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0142] The descriptions of the processes or structures corresponding to the above figures each have their own emphasis. For parts of a process or structure that are not described in detail, please refer to the relevant descriptions of other processes or structures.

[0143] The above embodiments are merely illustrative of the principles and effects of this application and are not intended to limit this application. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this application. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this application should still be covered by the claims of this application.

Claims

1. An Ethernet packet parsing method, applied to a switch chip, characterized in that, The Ethernet packet parsing method includes: Acquire Ethernet packets; Check the correctness of the Ethernet packet and obtain the correct target Ethernet packet; Parse the target Ethernet packet; Following the step of parsing the target Ethernet packet, the Ethernet packet parsing method further includes: obtaining target information; the target Ethernet packet includes: The external layer 2 MAC architecture, layer 3 IP architecture, and layer 4 UDP / TCP architecture are used. Parsing the target Ethernet packet includes: parsing the layer 2 MAC architecture to extract first information; parsing the layer 3 IP architecture to extract second information; determining the protocol type of the target Ethernet packet based on the second information; if the protocol type is other than IPv4 and IPv6, parsing stops, and the target information is obtained; the target information includes the first information and the second information; if the protocol type is IPv4 or IPv6, after extracting IP-related information, the layer 4 UDP / TCP architecture is parsed to extract third information, and the target information is obtained; the target information includes the first information, the second information, the IP-related information, and the third information. The Layer 2 MAC architecture includes at least: the header of the target Ethernet packet, a tag flag, and a switch_tag; parsing the Layer 2 MAC architecture and extracting the first information includes: Parse the header of the target Ethernet packet to extract the MAC address; parse the switch_tag according to the tag's flag bits to extract the switch_tag's ID information; determine if the Layer 2 MAC architecture has a VLAN stack; if the Layer 2 MAC architecture has a VLAN stack, extract the corresponding first tag information; determine if the Layer 2 MAC architecture has an SGT; if the Layer 2 MAC architecture has an SGT, extract the corresponding second tag information; the first information includes the following cases: when the Layer 2 MAC architecture has a VLAN stack and an SGT, the first information includes: the MAC address, the ID information, the first tag information, and the second tag information; when the Layer 2 MAC architecture has a VLAN stack but no SGT, the first information includes: the MAC address, the ID information, and the first tag information; when the Layer 2 MAC architecture has no VLAN stack but has an SGT, the first information includes: the MAC address, the ID information, and the second tag information; when the Layer 2 MAC architecture has no VLAN stack and SGT, the first information includes: the MAC address and the ID information.

2. The Ethernet packet parsing method according to claim 1, characterized in that, The process of checking the correctness of the Ethernet packet and obtaining the correct target Ethernet packet includes: Determine whether the length of the Ethernet packet is between 64 bytes and the maximum transmission unit; Perform cyclic redundancy check on the Ethernet packets; define the target Ethernet packet as an Ethernet packet whose length is between 64 bytes and the maximum transmission unit and whose cyclic redundancy check is correct.

3. The Ethernet packet parsing method according to claim 1, characterized in that, The step of extracting the third information and obtaining the target information includes: Based on the parsing results of the four-layer UDP / TCP architecture, it is determined whether the target Ethernet packet is UDP or TCP, and UDP information or TCP information is extracted based on the determination result; the third information includes: the UDP information or the TCP information; Based on the parsing results of the four-layer UDP / TCP architecture, determine whether the target Ethernet packet is of tunnel type; If the target Ethernet packet is not of type tunnel, parsing is stopped, and the target information is obtained; the target information includes: the first information, the second information, the IP-related information, and the UDP information or the TCP information; If the target Ethernet packet is of type tunnel, the Ethernet packet parsing method further includes: performing corresponding parsing according to different types of tunnel.

4. The Ethernet packet parsing method according to claim 3, characterized in that, The corresponding parsing based on the different types of tunnel includes the following cases: If the tunnel type is VxLan, then after parsing the VxLan, the second-layer, third-layer, and fourth-layer architectures of the internal tunnel messages are parsed layer by layer. If the tunnel type is VxLAN_GPE, after parsing VxLAN_GPE, perform layer-by-layer parsing of the tunnel's internal message structure, including the second-layer, third-layer, and fourth-layer architectures. If the tunnel type is Geneve, after parsing Geneve, perform layer-by-layer parsing of the tunnel's internal message structure, including the second-layer, third-layer, and fourth-layer architectures. If the tunnel type is NVGRE, after parsing NVGRE, perform layer-by-layer parsing of the tunnel's internal message structure, including the second-layer, third-layer, and fourth-layer architectures. If the tunnel type is TERED, after parsing the IPv6 information, the four-layer architecture will be parsed. If the tunnel type is GRE, after parsing the IPv4 and IPv6 information, the four-layer architecture is then parsed. If the tunnel type is IPv4 over IPv4, the four-layer architecture is parsed after parsing the IPv4 information; If the tunnel type is IPv6 over IPv4, the IPv6 information is parsed before the four-layer architecture is parsed.

5. An Ethernet packet parsing system, applied to a switch chip, characterized in that, The Ethernet packet parsing system includes: The acquisition module is used to acquire Ethernet packets; The inspection module is used to check the correctness of the Ethernet packet and obtain the correct target Ethernet packet; The parsing module is used to parse the target Ethernet packet; After the step of parsing the target Ethernet packet, the Ethernet packet parsing system is further configured to: obtain target information; the target Ethernet packet includes: The external layer 2 MAC architecture, layer 3 IP architecture, and layer 4 UDP / TCP architecture are used. The parsing module is used to: parse the layer 2 MAC architecture to extract first information; parse the layer 3 IP architecture to extract second information; determine the protocol type of the target Ethernet packet based on the second information; if the protocol type is other than IPv4 and IPv6, then stop parsing and obtain the target information; the target information includes: the first information and the second information; if the protocol type is IPv4 or IPv6, after extracting IP-related information, parse the layer 4 UDP / TCP architecture to extract third information and obtain the target information; the target information includes: the first information, the second information, the IP-related information, and the third information. The Layer 2 MAC architecture includes at least: the header of the target Ethernet packet, a tag flag, and a switch_tag; the parsing module is used for: Parse the header of the target Ethernet packet to extract the MAC address; parse the switch_tag according to the tag's flag bits to extract the switch_tag's ID information; determine if the Layer 2 MAC architecture has a VLAN stack; if the Layer 2 MAC architecture has a VLAN stack, extract the corresponding first tag information; determine if the Layer 2 MAC architecture has an SGT; if the Layer 2 MAC architecture has an SGT, extract the corresponding second tag information; the first information includes the following cases: when the Layer 2 MAC architecture has a VLAN stack and an SGT, the first information includes: the MAC address, the ID information, the first tag information, and the second tag information; when the Layer 2 MAC architecture has a VLAN stack but no SGT, the first information includes: the MAC address, the ID information, and the first tag information; when the Layer 2 MAC architecture has no VLAN stack but has an SGT, the first information includes: the MAC address, the ID information, and the second tag information; when the Layer 2 MAC architecture has no VLAN stack and SGT, the first information includes: the MAC address and the ID information.

6. A switch chip, characterized in that, The switch chip includes: a processor and a memory; The memory is used to store computer programs; The processor is used to execute the computer program stored in the memory, so that the switch chip performs its functions. The Ethernet packet parsing method described in any one of requirements 1 to 4 is required.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that, When executed by the switch chip, the program implements the Ethernet packet parsing method as described in any one of claims 1 to 4.