A negative differential resistance based memristor, a preparation method and application thereof
Patent Information
- Application Number
- CN202310831354.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-07-07
- Publication Date
- 2026-10-27
- Estimated Expiration
- 2043-07-07
AI Technical Summary
[0004]另一方面，基于数字晶体管的芯片试图对表示富含神经元的非线性动力学的复杂方程进行建模，从而使其复杂化，而这些模型目前受到计算瓶颈的阻碍
[0018]本发明提供了一种基于负微分电阻(NDR)的忆阻器、其制备方法及应用。由两个NDR忆阻器和一个电感可形成神经元电路，从而来模拟FN神经元。基于NDR的忆阻器实现了神经元膜的集成特性，避免了使用外部电容器，本发明成功地将其应用于超简化神经元电路。忆阻器中的负微分效应模拟了神经元的动作电位行为，只需要两个NDR忆阻器和一个电感器就可以实现丰富的神经元动力学和著名的Fitz Hugh Nagumo(FN)生物神经元动力学。结果表明，本发明为使用NDR忆阻器模拟FN神经元开辟了道路，并为构建高度集成的神经形态学硬件系统提供了更具竞争力的方法。
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Abstract
Description
Technical Field
[0001] This invention relates to the field of memristors, specifically to a memristor based on negative differential resistance, its fabrication method, and its applications. Background Technology
[0002] With the exponential growth of data volume and computational demands, coupled with the performance saturation of transistor-based computing systems, researchers are forced to seek alternative computing technologies. Current research suggests that neuron-like or biomimetic computing may offer significant performance improvements over digital computing. However, the efficient hardware implementation of brain-inspired and neural network algorithms remains a major challenge. Communicating and processing data through neuromorphic dynamics is a key objective of brain-inspired computers. Digital transistor-based chips attempt to simulate the complex equations representing the rich nonlinear dynamics of neurons, making them complex, bulky, and energy inefficient.
[0003] In the rapidly growing fields of massive datasets, information recognition, and classification, neuron-based or biomimetic computing can yield greater performance improvements than numerical computing. The IF (Integrate and Fire) and HH (Hodgkin-Huxley) models are currently the most commonly used neuron models. The IF neuron model is the simplest, making it the most frequently used implementation of the spike neuron model; however, its reproducibility to biological neurons is low, and it cannot simulate many biological neuron characteristics useful in computational neuroscience. The CMOS-based HH neuron model can accurately simulate biological neurons, but it requires complex circuit models. Neurons in the brain exhibit oscillatory behavior, and multiple neurons can oscillate synchronously. The Fitz-Hugh Nagumo (FN) neuron model is a simplification of the HH neuron model, and it simulates the operation of biological neurons more accurately than the IF neuron. The FN neuron model is the best model for realizing synchronous oscillation of neurons in neural networks. Neural networks with FN neurons can be used to solve many complex computational problems and can also be used to study the workings of the human brain. Therefore, the FN neuron model is considered one of the most successful models in computational neuroscience.
[0004] On the other hand, digital transistor-based chips attempt to model complex equations representing the nonlinear dynamics rich in neurons, thus complicating the process, and these models are currently hampered by computational bottlenecks. In recent years, various new devices have been used to simulate biological neurons, thanks to their biological similarity and scalability. Summary of the Invention
[0005] The purpose of this invention is to provide a memristor based on negative differential resistance, its preparation method and application, which provides a new approach for fabricating neuronal circuits based on negative differential resistance memristors to simulate FN neurons.
[0006] This invention is implemented as follows:
[0007] The memristor based on negative differential resistance provided by this invention has the following structure from bottom to top: InP substrate, GaAsN+ epitaxial layer, first AlAs layer, In... 0.8 Ga 0.2 As layer, second AlAs layer, Pd electrode layer.
[0008] In the above scheme, the Pd electrode layer includes several circular electrodes with a diameter of 0.5 mm to 1 mm.
[0009] This invention also provides a method for fabricating a memristor based on negative differential resistance, specifically including the following steps:
[0010] a. An epitaxial layer of GaAsN+ is grown on a substrate using the MOVPE process; the substrate is an InP substrate.
[0011] b. Fix the substrate onto the sample stage of the magnetron sputtering equipment cavity, evacuate the cavity, then introduce Ar into the cavity, turn on the AC source, adjust the AC source power to make the AlAs target glow, pre-sputter for 7-13 minutes, and then perform formal sputtering for 5-20 minutes to form the first AlAs layer on the GaAsN+ epitaxial layer.
[0012] c. Cover the AlAs target area with a baffle and open In 0.8 Ga 0.2 As target site, pre-sputter for 7–13 min, followed by formal sputtering for 5–15 min, forming In on the first AlAs layer. 0.8 Ga 0.2 As layer;
[0013] d. Cover In with a baffle 0.8 Ga 0.2 As target site, open AlAs target site, perform formal sputtering for 5-20 minutes, then in In 0.8 Ga 0.2 A second AlAs layer is formed on the As layer;
[0014] e. Place a mask on the substrate on which the second AlAs layer is formed. The mask has circular holes with a diameter of 0.5 mm to 1 mm evenly distributed. Fix the substrate on the sample stage of the magnetron sputtering equipment cavity and evacuate the cavity. Introduce Ar into the cavity, turn on the DC source, and adjust the DC source power to 13 to 17 W and the pressure to 0.5 to 1 Pa to make the Pd target glow. Pre-sputter for 7 to 13 min, and then perform formal sputtering for 15 to 20 min to form a Pd electrode layer on the second AlAs layer.
[0015] In the above preparation method, in steps b and e, the cavity is evacuated to 1×10⁻⁶. -4Pa~4×10 -4 Pa, the flow rate of Ar introduced into the cavity is 20-30 sccm.
[0016] The memristor based on negative differential resistance provided by this invention can be used to fabricate neuron circuits. Specifically, the neuron circuit consists of two memristors based on negative differential resistance and an inductor, simulating neuron behavior. In the neuron circuit, the two memristors based on negative differential resistance are connected in parallel, and the two memristors in this parallel structure are connected in series with the inductor.
[0017] This invention employs AlAs / In 0.8 Ga 0.2 Memristors with negative differential resistances of As / AlAs can form neuronal circuits, thereby simulating the behavior of FN neurons.
[0018] This invention provides a memristor based on negative differential resistance (NDR), its fabrication method, and its applications. A neuronal circuit can be formed using two NDR memristors and one inductor to simulate FN neurons. The NDR-based memristor achieves the integrated characteristics of the neuronal membrane, avoiding the use of external capacitors. This invention successfully applies it to ultra-simplified neuronal circuits. The negative differential effect in the memristor simulates the action potential behavior of neurons. Rich neuronal dynamics and the famous Fitz Hugh Nagumo (FN) biological neuron dynamics can be achieved using only two NDR memristors and one inductor. The results show that this invention paves the way for simulating FN neurons using NDR memristors and provides a more competitive method for constructing highly integrated neuromorphic hardware systems. Attached Figure Description
[0019] Figure 1 This is a schematic diagram of the structure of the memristor based on negative differential resistance provided by the present invention.
[0020] Figure 2 This is the IV characteristic curve of the memristor based on negative differential resistance in this invention.
[0021] Figure 3 This is a schematic diagram of the neuron circuit based on the negative differential resistance memristor of this invention.
[0022] Figure 4 This is a schematic diagram of the neuron circuit simulating an FN neuron based on a negative differential resistance memristor, as described in this invention.
[0023] Figure 5 This is a diagram illustrating the effect of the present invention's neuronal circuit based on a negative differential resistance memristor simulating the oscillating behavior of an FN neuron. Detailed Implementation
[0024] Example 1: A memristor based on negative differential resistance.
[0025] like Figure 1 As shown, the memristor based on negative differential resistance provided by this invention has the following structure from bottom to top: InP substrate, GaAsN+ epitaxial layer, first AlAs layer, In... 0.8 Ga 0.2 The structure consists of an As layer, a second AlAs layer, and a Pd electrode layer. The Pd electrode layer comprises several circular electrodes with a diameter of 0.5 mm to 1 mm.
[0026] Example 2: A method for fabricating a memristor based on negative differential resistance.
[0027] The method for fabricating a memristor based on negative differential resistance provided by this invention includes the following steps:
[0028] a. The device uses InP as a substrate and obtains a high-quality GaAsN+ epitaxial layer on the InP substrate through MOVPE process.
[0029] b. Fix the substrate with the grown GaAsN+ epitaxial layer onto the sample stage of the magnetron sputtering equipment cavity, and evacuate the cavity to 1×10⁻⁶. -4 Pa~4×10 -4 Pa. Introduce 20-30 sccm of Ar into the cavity, adjust the gas filling valve to maintain the pressure in the cavity at 1 Pa-6 Pa, heat the sample stage to maintain the sample stage temperature at 500-700℃, turn on the AC source, adjust the AC source power to 13-17W, and the pressure to 0.5-1 Pa to make the AlAs target glow. Pre-sputter for 7-13 min, then perform formal sputtering for 5-20 min to form the first AlAs layer on the GaAsN+ epitaxial layer.
[0030] c. Cover the AlAs target area with a baffle and open In 0.8 Ga 0.2 As the target site, after pre-sputtering for 7–13 minutes, and then after formal sputtering for 5–15 minutes, In is formed on the first AlAs layer. 0.8 Ga 0.2 As layer.
[0031] d. Cover In with a baffle 0.8 Ga 0.2 As target site, open AlAs target site, perform formal sputtering for 5-20 minutes, then in In 0.8 Ga 0.2 A second AlAs layer is formed on the As layer.
[0032] e. Place a mask with evenly distributed circular holes of 0.5 mm to 1 mm in diameter on the substrate on which the second AlAs layer is formed. Fix the substrate onto the sample stage of the magnetron sputtering equipment cavity and evacuate the cavity to 1 × 10⁻⁶. -4 Pa~4×10 -4 Pa. Introduce 20-30 sccm of Ar into the cavity, adjust the gas filling valve to maintain the pressure in the cavity at 1 Pa to 6 Pa, maintain the sample stage temperature at 500-700℃, turn on the DC power and adjust the DC power to 13-17W, pressure 0.5-1 Pa, so that the Pd target material glows, pre-sputter for 7-13 min, and then perform formal sputtering for 15-20 min to form a Pd electrode layer on the second AlAs layer.
[0033] The memristor based on negative differential resistance prepared in this embodiment was subjected to IV testing, and the results are as follows: Figure 2 As shown in the figure, Force-I represents current-driven mode, and Force-V represents voltage-driven mode. Figure 2 It can be seen that the memristor based on negative differential resistance provided by the present invention has a typical negative differential effect.
[0034] Example 3: Application of memristors based on negative differential resistance.
[0035] like Figure 3 As shown, this invention applies memristors based on negative differential resistance to neuron circuits. Specifically, the neuron circuit is formed by two memristors (devices) based on negative differential resistance and an inductor L1 (10nH). The two memristors (devices) based on negative differential resistance are first connected in parallel, and then connected in series with the inductor L1 to form the neuron circuit.
[0036] Example 4: A neuronal circuit based on a negative differential resistance memristor to simulate the oscillating behavior of an FN neuron.
[0037] Will Figure 3 The neuron circuit based on a negative differential resistor memristor shown is used to simulate an FN neuron, such as... Figure 4 As shown, two memristors based on negative differential resistance simulate two ion channels in a biological neural membrane. By varying the turn-on times of the two negative differential resistance memristors, oscillatory behavior is induced in the simulated FN neuron circuit, with results as follows. Figure 5 As shown. By Figure 5 It can be seen that in the region of negative differential effect of the device, the neuron circuit generates simulated neuron oscillation behavior.
Claims
1. A memristor based on negative differential resistance, characterized in that, The structure from bottom to top is: InP substrate, GaAsN + Epitaxial layer, first AlAs layer, In 0.8 Ga 0.2 As layer, second AlAs layer, Pd electrode layer; The method for fabricating a memristor based on negative differential resistance includes the following steps: a. Epitaxial growth of GaAsN on a substrate using MOVPE process + Epitaxial layer; substrate is InP substrate; b. Fix the substrate onto the sample stage of the magnetron sputtering equipment cavity, evacuate the cavity, then introduce Ar into the cavity, turn on the AC source, adjust the AC source power to ignite the AlAs target, pre-sputter for 7-13 minutes, then perform formal sputtering for 5-20 minutes on the GaAsN target. + The first AlAs layer is formed on the epitaxial layer; c. Cover the AlAs target area with a baffle and open In 0.8 Ga 0.2 As target site, pre-sputter for 7-13 minutes, followed by formal sputtering for 5-15 minutes, forming In on the first AlAs layer. 0.8 Ga 0.2 As layer; d. Cover In with a baffle 0.8 Ga 0.2 As target site, open AlAs target site, perform formal sputtering for 5-20 minutes, then in In 0.8 Ga 0.2 A second AlAs layer is formed on the As layer; e. Place a mask on the substrate on which the second AlAs layer is formed. The mask has circular holes with a diameter of 0.5 mm to 1 mm evenly distributed. Fix the substrate on the sample stage of the magnetron sputtering equipment cavity and evacuate the cavity. Introduce Ar into the cavity, turn on the DC source, and adjust the DC source power to 13 to 17 W and the pressure to 0.5 to 1 Pa to make the Pd target glow. Pre-sputter for 7 to 13 min, and then perform formal sputtering for 15 to 20 min to form a Pd electrode layer on the second AlAs layer.
2. The memristor based on negative differential resistance according to claim 1, characterized in that, In steps b and e, the cavity is evacuated to 1×10⁻⁶. -4 Pa ~4×10 -4 Pa, the flow rate of Ar introduced into the cavity is 20~30 sccm.
3. The application of the memristor based on negative differential resistance as described in claim 1 or 2 in the fabrication of neuronal circuits.
4. The application according to claim 3, characterized in that, The neuron circuit includes two memristors based on negative differential resistance and an inductor.
5. The application according to claim 4, characterized in that, The two memristors based on negative differential resistance are connected in parallel, and the two memristors in this parallel structure are connected in series with the inductor.
6. The application according to claim 3, characterized in that, The neuronal circuit is used to simulate the behavior of FN neurons.