A method and device for checking the integrity of a grid SVG topology table

Abstract

The application provides a method and device for checking the integrity of a grid SVG topology table, the method comprising: receiving an SVG topology table generation operation of a table area with a change; performing a preliminary data check on the table area with a change one by one according to the SVG topology table generation operation; performing a hierarchical quantity check on the table area with a change that passes the preliminary data check; performing a leaf node check on the table area with a change that passes the hierarchical quantity check; performing a table area uniqueness check on the table area with a change that passes the leaf node check; and performing a topology number check on the table area with a change that passes the table area uniqueness check. The device is used to implement the method. Compared with a conventional scheme of manually generating an SVG topology table on a Web terminal, the application can improve the reliability of data and graphics, prevent graphics disorder, reduce the repetition rate of data, and monitor whether the table area data after a change is standardized and organized.

Description

Technical Field

[0001] This invention belongs to the field of power technology, specifically relating to a method and apparatus for verifying the integrity of ledgers based on a power grid SVG topology map. Background Technology

[0002] In daily power distribution operation and maintenance management, ledgers are the foundation, the core, and the key. Inaccurate or disorganized ledgers will bring many troubles to the overall operation and maintenance management work. Currently, ledger maintenance is usually done manually, which is time-consuming, labor-intensive, costly, and inefficient. When the ledger data for a transformer area changes, the poor real-time performance of the data will affect the work that relies on it. Summary of the Invention

[0003] In view of this, the present invention aims to provide a method and apparatus for verifying the integrity of ledgers based on the SVG topology map of the power grid, so as to solve the problem of low efficiency of manual ledger maintenance.

[0004] To solve the above-mentioned technical problems, the present invention provides the following technical solution:

[0005] This invention provides a method for verifying the integrity of ledgers based on power grid SVG topology maps, including:

[0006] SVG topology map generation operation for receiving altered data areas;

[0007] Based on the SVG topology map generation operation, preliminary data verification is performed on each of the ledger anomaly areas;

[0008] Perform a level-based quantity verification on the ledger areas that have passed the initial data verification;

[0009] Perform leaf node verification on the ledger change areas that have passed the level quantity verification;

[0010] Perform a uniqueness check on the ledger area for each area that has an anomaly verified by the leaf node.

[0011] Perform topology number verification on the ledger changes of the transformer area that have passed the unique verification of the transformer area.

[0012] In one embodiment, the step of performing preliminary data verification on each of the ledger change areas described above includes:

[0013] Perform data format verification on each of the aforementioned ledger change areas;

[0014] When the topology number field or data format of the switch or node data is incorrect, a data format failure report is generated, and it is determined that the corresponding ledger change area has failed the ledger integrity verification.

[0015] In one embodiment, the step of performing hierarchical quantity verification on the ledger change area that has passed the preliminary data verification includes:

[0016] Verify the parent-child hierarchy relationship between switches by checking the topology number in the node data;

[0017] When it is determined that the topology number of any switch does not have a parent switch, a report of layer quantity verification failure is generated, and it is determined that the corresponding ledger change area has failed the ledger integrity verification.

[0018] In one embodiment, the step of performing leaf node verification on the ledger change area that has passed the hierarchical quantity verification includes:

[0019] Obtain the topology number of each leaf node in the ledger;

[0020] When it is determined that the topology number of each leaf node has the topology number of its child node, a leaf node verification failure report is generated, and it is determined that the corresponding ledger change area has failed the ledger integrity verification.

[0021] In one embodiment, the step of performing a uniqueness check on the ledger area for changes verified by the leaf node, as described above, includes:

[0022] Search for the transformer area number of the transformer area with the change in all transformer area ledgers;

[0023] When a transformer area number is found to be duplicated, a report indicating that the transformer area uniqueness verification failed is generated, and it is determined that the corresponding transformer area with altered records failed the record integrity verification.

[0024] In one embodiment, the step of performing topology number verification on the ledger change area that has passed the unique verification of the area includes:

[0025] Query the topology number of switches and nodes in the same distribution area;

[0026] When the topology number of the switch or node data is found to be duplicated, a topology number verification failure report is generated, and it is determined that the corresponding altered switch area in the ledger has failed the ledger integrity verification.

[0027] In one embodiment, after the step of performing topology number verification on the ledger anomaly area that has passed the unique verification of the area, the method further includes:

[0028] When a data entry area fails the data entry integrity verification, the data entry area that fails the verification is marked as abnormal and displayed in the alarm window.

[0029] The present invention also provides a ledger integrity verification device based on a power grid SVG topology map, comprising:

[0030] The receiving module is used to receive the SVG topology map generation operation of the ledger change area;

[0031] The first verification module is used to perform preliminary data verification on each of the ledger change areas according to the SVG topology map generation operation.

[0032] The second verification module is used to perform hierarchical quantity verification on the ledger change areas that have passed the preliminary data verification.

[0033] The third verification module is used to perform leaf node verification on the ledger change area that has passed the hierarchical quantity verification.

[0034] The fourth verification module is used to perform uniqueness verification on the ledger change areas that have passed the leaf node verification.

[0035] The fifth verification module is used to perform topology number verification on the ledger change areas that have passed the unique verification of the area.

[0036] The present invention also provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the above-described ledger integrity verification method based on the power grid SVG topology map.

[0037] The present invention also provides a computer storage medium storing a computer program that, when executed by a processor, implements the above-described method for verifying the integrity of ledgers based on a power grid SVG topology map.

[0038] In summary, this invention provides a method and apparatus for verifying the integrity of a power grid SVG topology map. It receives an SVG topology map generation operation for abnormal transformer substations in the ledger; performs preliminary data verification on each abnormal substation based on the SVG topology map generation operation; performs hierarchical quantity verification on the abnormal substations that pass the preliminary data verification; performs leaf node verification on the abnormal substations that pass the hierarchical quantity verification; performs substation uniqueness verification on the abnormal substations that pass the leaf node verification; and performs topology number verification on the abnormal substations that pass the substation uniqueness verification. This improves the reliability of data and graphics, prevents graphic errors, reduces data duplication, and monitors whether the abnormal substation ledger data is standardized and organized. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 A flowchart of a ledger integrity verification method based on a power grid SVG topology map provided in an embodiment of the present invention;

[0041] Figure 2 This is a detailed flowchart of step S101 provided in an embodiment of the present invention;

[0042] Figure 3 This is a detailed flowchart of step S102 provided in an embodiment of the present invention;

[0043] Figure 4 This is a detailed flowchart of step S103 provided in an embodiment of the present invention;

[0044] Figure 5 This is a detailed flowchart of step S104 provided in an embodiment of the present invention;

[0045] Figure 6 This is a detailed flowchart of step S105 provided in an embodiment of the present invention;

[0046] Figure 7 This is a detailed flowchart of step S106 provided in an embodiment of the present invention;

[0047] Figure 8 This is a detailed flowchart of step S108 provided in an embodiment of the present invention;

[0048] Figure 9 This is a detailed flowchart of step S112 provided in an embodiment of the present invention;

[0049] Figure 10 This is a detailed flowchart of step S114 provided in an embodiment of the present invention;

[0050] Figure 11 This is a structural block diagram of a ledger integrity verification device based on a power grid SVG topology diagram provided in another embodiment of the present invention;

[0051] Figure 12 This is a schematic diagram of the internal structure of a computer device provided in another embodiment of the present invention. Detailed Implementation

[0052] To make the objectives, features, and advantages of this invention more apparent and understandable, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the embodiments described below are only some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0053] First embodiment:

[0054] Please refer to Figures 1 to 10 As shown, this embodiment of the invention discloses a method for verifying the integrity of ledgers based on a power grid SVG topology map, including:

[0055] S101, receive the SVG topology map generation operation for the ledger change area.

[0056] SVG (Scalable Vector Graphics) is an image file format. Its key feature is that users can directly depict images using code, open SVG images with any text processing tool, add interactive functionality by modifying parts of the code, and easily insert them into HTML for viewing in a browser. This is presented as a specific implementation method in this embodiment and not as a limitation; please refer to [the relevant documentation]. Figure 2 As shown, this step S101 also includes S1011-S1012, wherein:

[0057] S1011, at the start time of the time period, trigger the SVG topology map generation operation of the ledger change area.

[0058] The aforementioned preset rules can be automatically triggered when an abnormal event is detected, or automatically triggered at a fixed time. In this embodiment, the preset rule can be a preset time interval, triggering the SVG topology map generation operation of the ledger abnormal area at the start time of the time period.

[0059] S1012, Establish and refresh the SVG topology graph generation queue in real time.

[0060] Typically, when multiple transformer areas experience abnormal events simultaneously, multiple SVG topology maps need to be generated. In this case, an SVG topology map generation queue needs to be established and refreshed in real time. Due to the limitations of the web server, the SVG topology maps usually need to be generated in the SVG topology map generation queue according to the queue order.

[0061] S102, based on the SVG topology map generation operation, perform preliminary data verification on each of the ledger change areas.

[0062] Before generating the SVG topology map, it is necessary to perform an integrity check on the transformer area ledger data. Integrity check typically begins with preliminary data verification; please refer to [link / reference needed]. Figure 3 As shown, this step S102 also includes S1021-S1022, wherein:

[0063] S1021, Perform data format verification on each of the ledger change areas.

[0064] S1022, When the field or data format of the topology number of the switch or node data is incorrect, a data format failure report is generated, and it is determined that the corresponding ledger change area has failed the ledger integrity verification.

[0065] For example, the topology number in the ledger node data is generally composed of 19 digits, in the form of one letter + 18 numbers. The switch number also has a similar format. Through the data format verification in steps S1021-S1022, data format errors in the ledger's abnormal switch areas can be eliminated, and the preliminary data verification is completed.

[0066] S103, perform hierarchical quantity verification on the ledger change areas that have passed the preliminary data verification.

[0067] Please refer to Figure 4 As shown, this step S103 also includes S1031-S1032, wherein:

[0068] S1031 verifies the parent-child hierarchy relationship between switches by using the topology number of the node data.

[0069] S1032, when it is determined that the topology number of any switch does not have a parent switch, a report of layer quantity verification failure is generated, and it is determined that the corresponding ledger abnormal area has failed the ledger integrity verification.

[0070] For example, if the topology number of the node data is K010101...00, and there is no topology number K01010000...00 in the ledger data, it is determined that the node data K010101...00 does not have a parent switch, a layer quantity verification failure report is generated, and it is determined that the corresponding ledger abnormal area has failed the ledger integrity verification.

[0071] S104, perform leaf node verification on the ledger change area that has passed the level quantity verification.

[0072] Please refer to Figure 5 As shown, this step S104 also includes S1041-S1042, wherein:

[0073] S1041, retrieve the topology number of each leaf node in the ledger.

[0074] S1042, when it is determined that the topology number of each leaf node has the topology number of the child node, a leaf node verification failure report is generated, and it is determined that the corresponding ledger change area has failed the ledger integrity verification.

[0075] For example, if the topology number of the node data is K0100...00, and there is no node data with the topology number K010X...00 (X represents the number 1 to 9) under this area, then this data can be determined to be an end node. Otherwise, it is determined that the node is not an end node, a leaf node verification failure report is generated, and it is determined that the corresponding ledger change area has failed the ledger integrity verification.

[0076] S105, perform a uniqueness check on the ledger area for changes that have passed the leaf node verification.

[0077] Please refer to Figure 6 As shown, this step S105 also includes S1051-S1052, wherein:

[0078] S1051, search for the station number of the station with abnormal activity in all station area ledgers.

[0079] S1052, when it is determined that the transformer area number is duplicated, a report of failure to pass the transformer area uniqueness verification is generated, and it is determined that the transformer area with the corresponding ledger change has failed the ledger integrity verification.

[0080] The numbers of multiple transformer substations in the ledger are also different. When it is determined that the transformer substation number is duplicated, a report of failure to pass the uniqueness check of the transformer substation is generated, and it is determined that the transformer substation with the corresponding change in the ledger has failed the ledger integrity check.

[0081] S106, perform topology number verification on the ledger of the altered transformer area that has passed the unique verification of transformer area.

[0082] Please refer to Figure 7 As shown, this step S106 also includes S1061-S1062, wherein:

[0083] S1061, query the topology number of the switch and node data in the same transformer area.

[0084] S1062, when it is determined that the topology number of the switch or node data is duplicated, a topology number verification failure report is generated, and it is determined that the corresponding ledger change area has failed the ledger integrity verification.

[0085] Under the same distribution area, the topology data of both switches and nodes is unique. Steps S1061-S1062 detect whether there are duplicate switch numbers and topology numbers under the same distribution area. When it is determined that the topology number of the switch or node data is duplicated, a topology number verification failure report is generated, and it is determined that the corresponding ledger change distribution area has failed the ledger integrity verification.

[0086] S107: When a data entry area fails the data entry integrity verification, the data entry area that fails the verification is marked as abnormal and displayed in the alarm window.

[0087] Step S107 marks the abnormal ledger areas that fail the ledger integrity verification as abnormal and sets up an alarm window to display them, so that maintenance personnel can promptly identify and maintain the abnormal ledger areas. The alarm window displays reports of data format failure, level quantity verification failure, leaf node verification failure, area uniqueness verification failure, and topology number verification failure.

[0088] As a further improvement to this embodiment, since the generation of SVG diagrams based on the low-voltage distribution network topology model currently requires manual intervention and cannot be automatically synchronized according to the real-time changes in the transformer area ledger, the SVG diagrams lag behind the changes in the topology model, which restricts the real-time requirements of low-voltage power grid real-time monitoring. At the same time, the current process of generating SVG diagrams based on the low-voltage distribution network topology model is carried out on the web. Due to limited network speed and browser memory issues, the download speed is too slow. The generation of SVG diagrams can usually only be done one by one, which further restricts the real-time monitoring of the low-voltage power grid. There is also a probability that the browser will freeze due to the large number of SVG diagrams being downloaded.

[0089] To overcome the above deficiencies, this embodiment also provides a method for rapidly generating a power grid topology SVG diagram based on a PC, including steps S108-S109, executed before step S101, and steps S110-S114, executed after step S107, wherein:

[0090] S108, Real-time monitoring of abnormal events in the transformer area ledger data, including newly established transformer areas.

[0091] This embodiment monitors abnormal events using background data monitoring. It serves as an example of monitoring methods other than newly established transformer substations, and is not a limitation. Please refer to [the relevant documentation / reference]. Figure 8 As shown, this step S108 specifically includes S1081-S1084, wherein:

[0092] S1081, Set state locks for each area ledger, with state lock parameters including true and false;

[0093] S1082, when the area ledger changes, the state lock parameter will be automatically switched to false, and the state lock will be placed in the cache container;

[0094] S1083, after the district ledger is updated, the backend finds the corresponding state lock in the cache container using the updated ledger ID, extracts it, and automatically switches the corresponding state lock parameter to true.

[0095] S1084 determines whether there is an abnormal event by listening to whether the state lock parameter becomes false.

[0096] In the above steps, the cache container can be a HashMap. By placing the state lock in the cache container and extracting the state lock after the update is complete using the updated ledger ID, the corresponding state lock parameter is automatically switched to true. This prevents the corresponding area ledger from being downloaded and replaced when changes occur, ensuring the real-time generation of the SVG topology map. At the same time, by listening to whether the state lock parameter becomes false, it is possible to determine whether there is an anomaly event, which is beneficial for subsequent anomaly identification of the ledger anomaly area.

[0097] S109, when an abnormal event occurs, mark the abnormal area in the ledger.

[0098] Normally, multiple data zones can experience record changes simultaneously. When an event such as creating a new data zone, updating data, or editing data is detected, the web server identifies the data zone with the record change.

[0099] S110, generate and replace the SVG file of the verified station area.

[0100] This step is executed on a web server. Limited by the web server, the generation and replacement of the verified SVG files for each transformer area are typically performed sequentially in the SVG topology map generation queue. This step can automatically update the SVG map of changing records in real time on the web, meeting the real-time consistency requirement between the transformer area records and the map library, avoiding omissions that may occur with manual updates, reducing maintenance costs for workers, and improving the efficiency and reliability of SVG topology map updates compared to existing technologies.

[0101] However, due to limited network speed and browser memory constraints on web downloads, the download speed is too slow, and there is a risk of the web page freezing due to downloading a large number of SVG images, which indirectly restricts the real-time performance of monitoring the low-voltage power grid. This embodiment of the invention also proposes steps S111-S114. Wherein:

[0102] S111, obtain the number of SVG topology map generation queues, SVG topology map download speed, and current browser cache.

[0103] The number of queues for generating the SVG topology map can be the maximum number of queues within a preset time period (e.g., 10 minutes), and the download rate of the SVG topology map can be the average rate within a preset time period (e.g., 5 minutes). The browser's current cache is determined by real-time updates to determine the cache occupancy ratio.

[0104] S112, determine the health status of the SVG topology map generation queue based on the number of SVG topology map generation queues, the SVG topology map download rate, and the current browser cache.

[0105] The health status of the SVG topology map generation queue is used to evaluate the web client's ability to generate SVG topology maps. When the health status is good, steps S112-S113 do not need to be executed. When the health status is poor, it indicates that there may be inconsistencies between the area ledger and the SVG topology map, or that the browser may be frozen. In this case, steps S112-S113 are executed. This is a specific implementation of this embodiment and not a limitation; please refer to... Figure 9 As shown, this step S112 specifically includes S1121-S1123, wherein:

[0106] S1121, Based on the number of SVG topology map generation queues and the SVG topology map download rate, determine the download completion time of the SVG topology map generation queues.

[0107] S1122, Based on the number of SVG topology map generation queues, the SVG topology map download rate, and the browser's current cache, determine the browser's estimated cache usage ratio.

[0108] S1123, determine the health status of the SVG topology graph generation queue based at least on the download completion time and the estimated cache usage ratio.

[0109] The above steps S1121-S1123 assess the health status of the SVG topology graph generation queue by determining multiple dimensions that are more in line with actual application scenarios, such as the download completion time of the SVG topology graph generation queue and the browser's estimated cache usage ratio. The methods for determining the health status of the SVG topology graph generation queue include, but are not limited to, calculating weighted values.

[0110] S113, When the health status is poor, grant the PC system's underlying download permission.

[0111] When the system is not in good working order, this embodiment of the invention can improve the efficiency of topology map generation and reduce the load on the web client by generating SVG topology maps simultaneously on both the web client and the PC client. In step S113, the web client sends an encrypted request to at least one paired PC client through the background and activates the underlying download permissions of the PC client system.

[0112] S114 establishes multiple download threads at the PC-side system level to perform concurrent data download and SVG topology map generation and replacement operations on the ledger change areas of the SVG topology map generation queue.

[0113] Steps S108-S114 above enable the automatic lightweight generation of SVG topology maps on the web platform. Furthermore, when the web platform is under heavy load, activating the underlying download permissions of the PC system allows for simultaneous execution of SVG topology map generation operations on both the web and PC platforms, making it suitable for various complex scenarios. Simultaneously, the PC platform uses concurrent downloading of the topology map, allowing for the simultaneous generation and replacement of multiple SVG topology maps.

[0114] Please refer to this as a preferred option rather than a limitation. Figure 10 As shown, this step S114 specifically includes S1141-S1145, wherein:

[0115] S1141, multiple download threads are established at the bottom layer of the PC system to obtain the pending ledger change areas in the SVG topology map generation queue;

[0116] S1142, obtain the state parameters of the state lock of the pending ledger change area;

[0117] S1143, when the status parameter is false, move the corresponding pending ledger change area to the end of the SVG topology map generation queue;

[0118] S1144, Perform ledger integrity verification on each of the ledger-changed areas and obtain the areas that pass the verification.

[0119] S1145, Generate and replace the SVG file of the verified station area.

[0120] The above steps S1141-S1145 actively determine the state parameter of the abnormal zone's state lock when concurrently downloading the abnormal zone's ledger. When the state parameter is false, it is determined that the state of the corresponding abnormal zone's ledger is still updating or being edited by the user. At this time, the corresponding abnormal zone's ledger is moved to the end of the SVG topology graph generation queue, and ledgers with a state parameter of true that have been updated and edited are generated first. This can improve the efficiency of SVG topology graph updates and ensure the timeliness of the updated SVG topology graph.

[0121] Steps S101-S114 above monitor anomaly events in the ledger data of the transformer area in real time. When an anomaly event occurs, the transformer area with the anomaly is marked, allowing for rapid identification of the transformer area's ledger data that has anomaly, facilitating subsequent SVG topology map generation and replacement operations. Simultaneously, this invention triggers the SVG topology map generation operation of the transformer area with anomaly data through preset rules, granting download permissions at the PC system level. This allows the generation of SVG maps on the web side to be performed at the PC system level. Multiple download threads are established at the PC system level to perform concurrent data download and SVG topology map generation and replacement operations on the transformer areas with anomaly data in the SVG topology map generation queue. This avoids the efficiency problems such as the real-time defects of traditional sequential generation. Compared to the traditional method of manually generating SVG topology maps on the web side, this invention can automatically and quickly generate SVG topology maps on the PC side, allowing multiple SVG maps to be downloaded simultaneously. It can also maintain the consistency of SVG maps by monitoring anomalies in the ledger data, without causing low generation rates due to large amounts of data changes, and also reduces manual maintenance costs.

[0122] This invention embodiment receives an SVG topology map generation operation for the altered ledger areas; based on the SVG topology map generation operation, performs preliminary data verification on each of the altered ledger areas; performs hierarchical quantity verification on the altered ledger areas that pass the preliminary data verification; performs leaf node verification on the altered ledger areas that pass the hierarchical quantity verification; performs area uniqueness verification on the altered ledger areas that pass the leaf node verification; and performs topology number verification on the altered ledger areas that pass the area uniqueness verification. This can improve the reliability of data and graphics, prevent graphic errors, reduce data duplication, and monitor whether the ledger data of the altered ledger areas is standardized and organized.

[0123] Second embodiment:

[0124] Please refer to Figure 11 As shown, the present invention also provides a ledger integrity verification device 100 based on a power grid SVG topology map, including a receiving module 110, a first verification module 120, a second verification module 130, a third verification module 140, a fourth verification module, and a fifth verification module 160, wherein:

[0125] The receiving module 110 is connected to the first verification module 120 and is used to receive the SVG topology map generation operation of the ledger change area;

[0126] The first verification module 120 is connected to the second verification module 130 and is used to perform preliminary data verification on each of the ledger change areas according to the SVG topology map generation operation.

[0127] The second verification module 130 is connected to the third verification module 140 and is used to perform hierarchical quantity verification on the ledger change area that has passed the preliminary data verification.

[0128] The third verification module 140 is connected to the fourth verification module 150 and is used to perform leaf node verification on the ledger change area that has passed the hierarchical quantity verification.

[0129] The fourth verification module 150, connected to the fifth verification module 160, is used to perform uniqueness verification on the ledger change area that has passed the leaf node verification.

[0130] The fifth verification module 160 is used to perform topology number verification on the ledger change areas that have passed the unique verification of the area.

[0131] The modules in this embodiment are the same as the corresponding steps in the above method embodiments, and will not be repeated here.

[0132] This invention embodiment receives an SVG topology map generation operation for the altered ledger areas; based on the SVG topology map generation operation, performs preliminary data verification on each of the altered ledger areas; performs hierarchical quantity verification on the altered ledger areas that pass the preliminary data verification; performs leaf node verification on the altered ledger areas that pass the hierarchical quantity verification; performs area uniqueness verification on the altered ledger areas that pass the leaf node verification; and performs topology number verification on the altered ledger areas that pass the area uniqueness verification. This can improve the reliability of data and graphics, prevent graphic errors, reduce data duplication, and monitor whether the ledger data of the altered ledger areas is standardized and organized.

[0133] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional modules is used as an example. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. The specific working process of the system, device, and unit described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0134] This invention also provides a computer storage medium storing a computer program that, when executed by a processor, implements the ledger integrity verification method based on the power grid SVG topology as described in the above embodiments.

[0135] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the ledger integrity verification methods based on the power grid SVG topology diagram described above. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0136] Alternatively, if the integrated units of this invention are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of this invention, or the parts that contribute to related technologies, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, terminal, or network device, etc.) to execute all or part of the methods of the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, RAM, ROM, magnetic disks, or optical disks.

[0137] Corresponding to the computer storage medium described above, one embodiment also provides a computer device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the ledger integrity verification method based on the power grid SVG topology map as described in the above embodiments.

[0138] This computer device can be a terminal, and its internal structure diagram can be as follows: Figure 12As shown, the computer device includes a processor, memory, network interface, display screen, and input devices connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The network interface is used to communicate with external terminals via a network connection. When executed by the processor, the computer program implements a ledger integrity verification method based on a power grid SVG topology map. The display screen can be an LCD screen or an e-ink screen. The input devices can be a touch layer covering the display screen, buttons, a trackball, or a touchpad mounted on the computer device casing, or an external keyboard, touchpad, or mouse.

[0139] This invention embodiment receives an SVG topology map generation operation for the altered ledger areas; based on the SVG topology map generation operation, performs preliminary data verification on each of the altered ledger areas; performs hierarchical quantity verification on the altered ledger areas that pass the preliminary data verification; performs leaf node verification on the altered ledger areas that pass the hierarchical quantity verification; performs area uniqueness verification on the altered ledger areas that pass the leaf node verification; and performs topology number verification on the altered ledger areas that pass the area uniqueness verification. This can improve the reliability of data and graphics, prevent graphic errors, reduce data duplication, and monitor whether the ledger data of the altered ledger areas is standardized and organized.

[0140] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for verifying the integrity of ledgers based on power grid SVG topology maps, characterized in that, include: SVG topology map generation operation for receiving altered data areas; Based on the SVG topology map generation operation, preliminary data verification is performed on each of the ledger anomaly areas; Perform a level-based quantity verification on the ledger areas that have passed the initial data verification; Perform leaf node verification on the ledger change areas that have passed the level quantity verification; Perform a uniqueness check on the ledger area for each area that has an anomaly verified by the leaf node. Perform topology number verification on the ledger of the altered transformer area that has passed the unique verification of transformer area; The step of performing preliminary data verification on each of the ledger-related change areas includes: Perform data format verification on each of the aforementioned ledger change areas; When the topology number field or data format of the switch or node data is incorrect, a data format failure report is generated, and it is determined that the corresponding ledger change area has failed the ledger integrity verification. The step of performing hierarchical quantity verification on the ledger anomaly areas that have passed the preliminary data verification includes: Verify the parent-child hierarchy relationship between switches by checking the topology number in the node data; When it is determined that the topology number of any switch does not have a parent switch, a report of layer quantity verification failure is generated, and it is determined that the corresponding ledger abnormal area has failed the ledger integrity verification. The step of performing leaf node verification on ledger change areas that have passed the hierarchical quantity verification includes: Obtain the topology number of each leaf node in the ledger; When it is determined that the topology number of each leaf node has the topology number of a child node, a leaf node verification failure report is generated, and it is determined that the corresponding ledger change area has failed the ledger integrity verification. The step of performing a uniqueness check on the ledger area for changes verified by the leaf nodes includes: Search for the transformer area number of the transformer area with the change in all transformer area ledgers; When a transformer area number is found to be duplicated, a report indicating that the transformer area uniqueness verification failed is generated, and it is determined that the corresponding transformer area with the altered ledger failed the ledger integrity verification. The step of performing topology number verification on the ledger anomaly areas that have passed the unique verification of the area includes: Query the topology number of switches and nodes in the same area; When it is determined that the topology number of the switch or node data is duplicated, a topology number verification failure report is generated, and it is determined that the corresponding ledger change area has failed the ledger integrity verification. The step of performing topology number verification on the ledger anomaly areas that have passed the unique verification of the area also includes: When a data entry area fails the data entry integrity verification, the data entry area that fails the verification is marked as abnormal and displayed in the alarm window.

2. A ledger integrity verification device based on a power grid SVG topology map, characterized in that, include: The receiving module is used to receive the SVG topology map generation operation of the ledger change area; The first verification module is used to perform preliminary data verification on each of the ledger change areas according to the SVG topology map generation operation. The second verification module is used to perform hierarchical quantity verification on the ledger change areas that have passed the preliminary data verification. The third verification module is used to perform leaf node verification on the ledger change area that has passed the hierarchical quantity verification. The fourth verification module is used to perform uniqueness verification on the ledger change areas that have passed the leaf node verification. The fifth verification module is used to perform topology number verification on the ledger change areas that have passed the unique verification of the area. The step of performing preliminary data verification on each of the ledger-related change areas includes: Perform data format verification on each of the aforementioned ledger change areas; When the topology number field or data format of the switch or node data is incorrect, a data format failure report is generated, and it is determined that the corresponding ledger change area has failed the ledger integrity verification. The step of performing hierarchical quantity verification on the ledger anomaly areas that have passed the preliminary data verification includes: Verify the parent-child hierarchy relationship between switches by checking the topology number in the node data; When it is determined that the topology number of any switch does not have a parent switch, a report of layer quantity verification failure is generated, and it is determined that the corresponding ledger abnormal area has failed the ledger integrity verification. The step of performing leaf node verification on ledger change areas that have passed the hierarchical quantity verification includes: Obtain the topology number of each leaf node in the ledger; When it is determined that the topology number of each leaf node has the topology number of a child node, a leaf node verification failure report is generated, and it is determined that the corresponding ledger change area has failed the ledger integrity verification. The step of performing a uniqueness check on the ledger area for changes verified by the leaf nodes includes: Search for the transformer area number of the transformer area with the change in all transformer area ledgers; When a transformer area number is found to be duplicated, a report indicating that the transformer area uniqueness verification failed is generated, and it is determined that the corresponding transformer area with the altered ledger failed the ledger integrity verification. The step of performing topology number verification on the ledger anomaly areas that have passed the unique verification of the area includes: Query the topology number of switches and nodes in the same area; When it is determined that the topology number of the switch or node data is duplicated, a topology number verification failure report is generated, and it is determined that the corresponding ledger change area has failed the ledger integrity verification. The step of performing topology number verification on the ledger anomaly areas that have passed the unique verification of the area also includes: When a data entry area fails the data entry integrity verification, the data entry area that fails the verification is marked as abnormal and displayed in the alarm window.

3. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the ledger integrity verification method based on the power grid SVG topology map as described in claim 1.

4. A computer storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the ledger integrity verification method based on the power grid SVG topology map as described in claim 1.

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