Typical example and dynamic data combined key parameter monitoring display system

CN116883227BActive Publication Date: 2026-09-15CHINESE AERONAUTICAL RADIO ELECTRONICS RES INST
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Patent Information

Application Number
CN202310474403.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-04-27
Publication Date
2026-09-15
Estimated Expiration
2043-04-27

AI Technical Summary

Technical Problem

[0004]HUD绘制的图像是单色的,且在多个参数也可能重叠,对利用FPGA进行图形监控来说,引入了干扰,这些是通过FPGA实现高可靠性的图形监控识别的主要难题

Benefits of technology

[0017] 1. Based on the actual effective display screen, the same font and several specific rotation angles will be used as monitoring numbers and letters samples. At the same time, lines, triangles, circles, airplane symbols and several specific rotation angles will be added as graphic samples. The GPU's graphics drawing capability will be judged by the recognition of these samples by the Monitor FPGA.

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Abstract

The application discloses a kind of typical sample and dynamic data combined key parameter monitoring display system, containing interface module, graphics generation module, video processing module, display, interface module extracts key parameter from each road sensor data and sends to graphics generation module;Graphics generation module draws HUD display picture and corresponding feature pattern according to key parameter, and places HUD display picture in the display area of map, places key parameter and feature pattern in the hidden area of map, and transfers map to view video processing module;Video processing module compares feature pattern in map with standard template, and if it is not consistent, record this frame graphics error, if continuous frame error, then judge off screen.The application can monitor the mapping ability of GPU.
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Description

Technical Field

[0001] This invention belongs to the field of graphics monitoring, and relates to the graphics monitoring of GPUs in digital displays of aircraft, and particularly to a key parameter monitoring and display system that combines typical examples and dynamic data. Background Technology

[0002] Digital displays in aircraft are an important component for human-machine interaction. Digital displays receive parameter information collected by various sensors through the onboard bus and render it on the display screen through the GPU. Pilots can obtain various parameter information of the aircraft through different screens of digital displays. Among them, the HUD head-up display is responsible for displaying the most important flight parameters, such as airspeed, barometric altitude, pitch angle, roll angle, and metric Mach number.

[0003] To improve the reliability of digital displays and increase the mean time between failures (MTBF), it is necessary to monitor the display output from the GPU. Furthermore, real-time monitoring of the video data stream directly output from the GPU can improve the confidence level of the monitoring. Considering the limited processing resources of CPUs and GPUs, the real-time monitoring requirements, and the flexibility of programming, using FPGAs is a very promising approach.

[0004] The images drawn by the HUD are monochrome and may overlap in multiple parameters, which introduces interference for graphic monitoring using FPGA. These are the main challenges in achieving high-reliability graphic monitoring and recognition through FPGA. Summary of the Invention

[0005] The purpose of this invention is to provide a key parameter monitoring and display system that combines typical examples and dynamic data. It uses FPGA to compare various feature patterns and real-time key data to achieve monitoring, which can effectively monitor the data integrity of the CPU+GPU path, improve the fault shielding interval time, and ensure flight safety.

[0006] The objective of this invention is achieved through the following technical solution:

[0007] A key parameter monitoring and display system combining typical examples and dynamic data includes an interface module, a graphics generation module, a video processing module, and a display.

[0008] The interface module mainly includes IOM_CPU, which extracts key parameters from the data of various sensors, generates frame sequence numbers, and sends them to the image generation module.

[0009] The graphics generation module includes GPM_CPU. GPM_CPU draws the HUD display screen and corresponding feature patterns according to key parameters, places the HUD display screen in the display area of ​​the image frame, places the status and parameter values ​​of key parameters, frame sequence number, and feature patterns in the hidden area of ​​the image frame, and passes the image frame to the video processing module.

[0010] The video processing module includes a video processing FPGA and a monitor FPGA. The video processing FPGA sends the image to the display for display and transmits it to the monitor FPGA for monitoring.

[0011] The Monitor FPGA compares the feature patterns in the frame with the standard template. If they are inconsistent, it records the frame as having a pattern error. If consecutive frames have errors, it determines that the screen should be turned off.

[0012] Preferably, the Monitor FPGA performs binarization, coordinate generation, and template matching on the feature patterns in the hidden regions of the image to detect whether the feature patterns are consistent with the standard template.

[0013] Preferably, the binarization involves comparing the red, green, and blue components of the input RGB data with pre-defined color component values. If they are all equal, the output is 1; otherwise, the output is 0.

[0014] Preferably, the coordinate generation is performed by calculating the position coordinates of each incoming binarized pixel data in the entire image based on the video line and field synchronization signals and the data valid signal. Generally, the upper left corner of the image is used as the origin. The X-direction coordinate coor_x is started by counting coor_x at the rising edge of DE, and while DE is high, coor_x is incremented by 1 at each rising edge of CLK and cleared at the falling edge of DE, and this cycle repeats. The Y-direction coordinate coor_y is started and cleared at the beginning of each video frame, i.e., at the rising edge of the VS signal (VS high active), and then incremented by 1 at each falling edge of DE until it is cleared at the rising edge of the VS of the next video frame, and this cycle repeats.

[0015] Preferably, the IOM_CPU also transmits the frame sequence number and key parameters to the Monitor FPGA; the Monitor FPGA also receives the frame sequence number and the parameter values ​​of the key parameters from the SPI channel, and then, if the frame sequence numbers are the same, it compares the parameter values ​​of the key parameters received from the IOM_CPU with the parameter values ​​of the key parameters hidden in the image. If the number of key parameter errors exceeds the limit, then this frame is recorded as having a parameter error. If there are several consecutive frames with errors, then the screen is turned off.

[0016] The beneficial effects of this invention are as follows:

[0017] 1. Based on the actual effective display screen, the same font and several specific rotation angles will be used as monitoring numbers and letters samples. At the same time, lines, triangles, circles, airplane symbols and several specific rotation angles will be added as graphic samples. The GPU's graphics drawing capability will be judged by the recognition of these samples by the Monitor FPGA.

[0018] 2. Then, by comparing the values ​​of the video channel and the SPI channel in the same frame to determine the correctness of the data from the CPU to the GPU.

[0019] 3. The two methods together represent the integrity of CPU+GPU, thereby serving a monitoring function. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of the key parameter monitoring and display system that combines typical examples and dynamic data.

[0021] Figure 2 HUD display diagram.

[0022] Figure 3 This is a schematic diagram of the coordinate system. Detailed Implementation

[0023] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments.

[0024] like Figure 1 As shown in the figure, the key parameter monitoring and display system combining typical examples and dynamic data in this embodiment includes an interface module, a graphics generation module, a video processing module, a power supply module, and a display.

[0025] Data from various sensors on the aircraft is transmitted to the interface module of the display system via the AFDX bus. This interface module primarily includes the IOM_CPU, which extracts critical and non-critical parameters from the sensor data and generates frame sequence numbers. Critical parameters include airspeed, altitude, pitch, roll, metric altitude, Mach number, flight guidance, radio altitude, and barometric reference value. These critical parameters are closely related to aircraft safety and are displayed on the HUD. Critical parameters exist in multiple sensor data sets; for example, airspeed can be transmitted from the flight controller or the inertial navigation system. The IOM_CPU selects the airspeed value transmitted from the flight controller as the critical parameter. Non-critical parameters include door status information, external power information, air conditioning and fuel pump status, etc., which are not closely related to safety. The IOM_CPU sends the critical parameters, non-critical parameters, and frame sequence numbers to the graphics generation module via PCIe. Additionally, the IOM_CPU directly transmits the frame sequence number and critical parameters to the Monitor FPGA via SPI.

[0026] The graphics generation module includes GPM_CPU. The plotting of non-critical parameters is irrelevant to this invention and will not be discussed here. GPM_CPU draws the HUD display screen and corresponding feature patterns based on the critical parameters, places the HUD display screen in the display area of ​​the image frame, places the status and parameter values ​​of the critical parameters, frame sequence number, and feature patterns in the hidden area of ​​the image frame, and then passes the image frame to the video processing module.

[0027] In actual operating environments, based on the characteristics of the HUD display, key parameters such as airspeed, altitude, metric altitude, Mach number, radio altitude, and barometric reference value are represented by numbers or letters, while pitch, roll, and flight guidance are represented by symbols. According to the GPM_CPU's plotting method, numbers and letters are represented using texture maps, and their error patterns can be categorized. Numerical samples of some rotation functions are then provided to represent their rotation capabilities. For symbolic parameters, test points, lines, circles, and typical symbols are used as samples. Based on the display characteristics of the HUD's key parameters, the HUD samples consist of a set of symbols, as shown in Table 1. This set of symbols includes typical symbols, numbers, and letters for all key parameters, effectively covering all HUD display graphics. Therefore, monitoring static characters ensures effective monitoring of the HUD display.

[0028] Table 1

[0029]

[0030]

[0031] like Figure 2As shown, the area inside the convex frame is the display area of ​​the HUD screen, and the area outside the convex frame is the monitored feature map. These are all generated by the GPU using the same function, and their feature maps are the same every frame. They are located outside the effective display area of ​​the HUD, meaning the pilot cannot see the image outside the convex frame. The top left corner is the monitoring row for key parameters, which stores the frame sequence number and the real-time status value (display mode) and parameter value of the key parameters for the current frame. The current parameter is represented by pixel values ​​that are either entirely white or entirely black. For example, frame_FSN is stored in pixels 4 to 11 of the monitoring row.

[0032] a. When pixelX (4<=X<=11) has a value of 24'hFFFFFF, the corresponding frame_FSN[X-4] = 1;

[0033] b. When pixelX is 0, the corresponding frame_FSN[X-4] = 0;

[0034] c. When there is a value in pixelX that is neither 24'hFFFFFF nor 0, frame_FSN = 8'hFF, which is recorded as a fault state.

[0035] Similarly, the status and values ​​of the key parameters can be obtained.

[0036] The video processing module includes a video processing FPGA and a monitor FPGA. The video processing FPGA sends the image to the display for display and transmits it to the monitor FPGA for monitoring.

[0037] In the Monitor FPGA, these key parameters are compared simultaneously, as well as the feature patterns. If the feature pattern in the pattern is consistent with the standard template and the pattern is consistent with the key parameters in the SPI channel, it is considered to pass. If they are inconsistent, the display is turned off, thus effectively ensuring the integrity of the CPU+GPU function.

[0038] The Monitor FPGA performs binarization, coordinate generation, and template matching on feature patterns in the hidden areas of the image. It checks whether the feature patterns match the standard template (stored in the FPGA). If they match, the image is recorded as correct; otherwise, it is recorded as incorrect. This function proves that the GPU's drawing capabilities are not the problem.

[0039] A) Binarization

[0040] Binarization converts the 24-bit RGB data stream of hidden regions in the input map into a single-bit data stream, thereby saving resources and simplifying subsequent processing such as coordinate generation and template matching.

[0041] Image binarization is essentially a filtering algorithm that removes useless background data and extracts the desired feature patterns. There are various binarization algorithms; this design is based on the principle of color extraction binarization. Figure 3 As shown, the red, green, and blue components of the input 24-bit RGB data are compared with pre-defined color component values. If they are all equal, the output is 1; otherwise, the output is 0.

[0042] B) Coordinate Generation

[0043] Based on the video line and field synchronization signals and valid data signals, the position coordinates of each incoming binarized pixel data within the entire image are calculated. Generally, the upper left corner of the image is chosen as the origin. Taking a 1280×1024 image as an example, the correspondence between its coordinates and pixel points is as follows: Figure 3 As shown.

[0044] The X-direction coordinate coor_x is generated based on the valid signal DE of the input video data and the pixel clock CLK, such as... Figure 3 As shown. The coor_x counter is started on the rising edge of DE, and while DE is high, coor_x is incremented by 1 on each rising edge of CLK and cleared to zero on the falling edge of DE, and this cycle repeats. For 1280×1024 video data, with 1280 pixels per line, the range of coor_x is [0, 1279].

[0045] The generation sequence of the Y-axis coordinate coor_y is as follows: Figure 3 As shown. At the beginning of each video frame, i.e., at the rising edge of the VS signal, coor_y is started and cleared to zero. Then, at the falling edge of each DE, coor_y is incremented by 1 until it is cleared to zero at the rising edge of the VS signal of the next video frame, and so on. For 1280×1024 video data, there are a total of 1024 rows of valid data, so the range of coor_y is [0, 1023].

[0046] C) Template Matching

[0047] like Figure 2 As shown, each row of samples is binarized into a template, resulting in a total of 12 templates. During monitoring, after binarizing the image, a row of feature images is cropped from the same position on the image and compared with the corresponding templates to see if they match. If they match, the image passes; otherwise, an image error is recorded. Any of the following situations will result in a symbol error being recorded:

[0048] 1. The first 5 lines are numbers and letters, so they should be grouped together. If there are more than 3 lines, an error will occur.

[0049] 2. The last 7 lines are symbols; if there are more than three such lines, an error will occur.

[0050] 3. An error occurs in any one of the first 5 rows, and an error occurs in any one of the last 7 rows.

[0051] The Monitor FPGA also receives frame sequence numbers and key parameter values ​​from the SPI channel. If the frame sequence numbers are the same, it compares them with the hidden key parameter values ​​in the image. If three or more parameters are incorrect simultaneously, the parameter is recorded as incorrect; otherwise, it is recorded as correct. This function verifies the correctness of the data calculation.

[0052] If a parameter error or graphic error occurs in the same frame, the frame is considered faulty. If several consecutive frames are faulty, the screen is turned off.

[0053] It is understood that those skilled in the art can make equivalent substitutions or modifications to the technical solution and inventive concept of the present invention, and all such substitutions or modifications should fall within the protection scope of the appended claims.

Claims

1. A key parameter monitoring and display system combining typical examples and dynamic data, comprising an interface module, a graphics generation module, a video processing module, and a display, characterized in that: The interface module includes IOM_CPU. IOM_CPU extracts key parameters from the data of various sensors, generates frame sequence numbers, and sends them to the image generation module. The graphics generation module includes GPM_CPU. GPM_CPU draws the HUD display screen and corresponding feature patterns based on key parameters, places the HUD display screen in the display area of ​​the image frame, and places the status and value of the key parameters, frame sequence number, and feature patterns in the hidden area of ​​the image frame. The image frame is then passed to the video processing module. The feature patterns are based on the actual effective display screen, using the same font and several specific rotation angles for monitoring numbers and letters, while adding line, triangle, circle, and airplane symbols and several specific rotation angle graphic samples. The status of the key parameters represents the display mode. The video processing module includes a video processing FPGA and a monitor FPGA. The video processing FPGA sends the image to the display for display and transmits it to the monitor FPGA for monitoring. The Monitor FPGA compares the feature patterns in the frame with the standard template. If they are inconsistent, it records the frame as having a pattern error. If consecutive frames have errors, it determines that the screen should be turned off.

2. The key parameter monitoring and display system combining typical examples and dynamic data according to claim 1, characterized in that... The Monitor FPGA performs binarization, coordinate generation, and template matching on the feature patterns in the hidden areas of the image to detect whether the feature patterns are consistent with the standard template.

3. The key parameter monitoring and display system combining typical examples and dynamic data according to claim 2, characterized in that... The binarization process involves comparing the red, green, and blue components of the input RGB data with pre-defined color component values. If they are all equal, the output is 1; otherwise, the output is 0.

4. The key parameter monitoring and display system combining typical examples and dynamic data according to claim 2, characterized in that... The coordinates are generated by calculating the position coordinates of each incoming binarized pixel data in the entire image based on the video line and field synchronization signals and the data validity signal. The upper left corner of the image is taken as the origin. The X-direction coordinate coor_x is started by counting coor_x at the rising edge of DE. During the period when DE is high, coor_x is incremented by 1 at each rising edge of CLK and cleared at the falling edge of DE, and this cycle is repeated. The Y-direction coordinate coor_y is started and cleared at the beginning of each video frame, i.e., at the rising edge of VS signal. Then, coor_y is incremented by 1 at each falling edge of DE until it is cleared at the rising edge of VS of the next video frame, and this cycle is repeated.

5. The key parameter monitoring and display system combining typical examples and dynamic data according to claim 1, characterized in that: The IOM_CPU also transmits the frame sequence number and key parameters to the Monitor FPGA via the SPI channel. Then, if the frame sequence numbers are the same, the Monitor FPGA compares the parameter values ​​of the key parameters received from the IOM_CPU with the parameter values ​​of the hidden key parameters in the image. If the number of key parameter errors exceeds the limit, the frame parameter is recorded as faulty. If several consecutive frames are faulty, the screen is turned off.

Citation Information

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