Three-phase high-frequency isolation active-clamp inverter and pulse width modulation method thereof

Abstract

The application discloses a three-phase high-frequency isolation active clamp inverter and a pulse width modulation method thereof, comprising a direct-current voltage source, a full-bridge inverter, a high-frequency transformer, a clamp circuit, a matrix converter and a filter circuit; the direct-current voltage source is connected with the full-bridge inverter; the full-bridge inverter is connected with a primary coil of the high-frequency transformer; a secondary coil of the high-frequency transformer is connected with the clamp circuit and the matrix converter in parallel; and the matrix converter is connected with the filter circuit and a load. The method has the advantages that the voltage peak and oscillation problems of the secondary side of the transformer are eliminated, zero voltage switching of the matrix converter of the secondary side of the transformer is realized, the efficiency of the inverter system is improved, and the safety and reliability of system operation are ensured.

Description

Technical Field

[0001] This invention belongs to the field of inverter technology, specifically relating to a three-phase high-frequency isolated active clamp inverter and its pulse width modulation method. Background Technology

[0002] Currently, three-phase high-frequency isolation inverters have two structures: "rectifier type" and "matrix converter type". Conventional rectifier type inverters have a three-stage DC / HFAC / DC / AC conversion structure. Because diode rectification is added in the intermediate stage, energy flow is unidirectional, and a capacitor is needed on the DC bus to stabilize the bus voltage. Matrix converter inverters use a two-stage DC / HFAC / AC conversion structure, eliminating the need for a DC bus capacitor. Furthermore, the upstream and downstream control stages are coupled, requiring only one controller to complete closed-loop voltage control. Their function is equivalent to a conventional three-phase inverter, and they can be widely used in new energy power generation, motor control, and uninterruptible power supplies (UPS).

[0003] In high-frequency isolated inverters of the matrix converter type, voltage spikes and oscillations caused by resonance between the leakage inductance of the high-frequency transformer and the parasitic capacitance of the secondary-side matrix converter switching transistors can easily cause the switching transistors (MOS / IGBT) to exceed their rated voltage range, resulting in transistor damage and affecting the safe and reliable operation of the inverter. Furthermore, the matrix converter on the transformer secondary side consists of 12 switching transistors; excessive switching devices and higher switching frequencies lead to greater switching losses, reducing system efficiency. Therefore, eliminating voltage spikes on the transformer secondary side and implementing soft switching in the matrix converter have become urgent issues. Summary of the Invention

[0004] To address the aforementioned problems, this application provides a modulation method for a three-phase high-frequency isolated active clamp inverter. This modulation method eliminates voltage spikes and oscillations on the transformer secondary side, achieves zero-voltage switching of the matrix converter on the transformer secondary side, improves the efficiency of the inverter system, and further ensures the safety and reliability of system operation. The technical solution is as follows:

[0005] A three-phase high-frequency isolated active clamping inverter includes a DC voltage source, a full-bridge inverter, a high-frequency transformer, a clamping circuit, a matrix converter, and a filter circuit.

[0006] The DC voltage source is connected to the full-bridge inverter, the full-bridge inverter is connected to the primary coil of the high-frequency transformer, and a clamping circuit and a matrix converter are connected in parallel across the secondary coil of the high-frequency transformer. The matrix converter is connected to a filter circuit and a load.

[0007] Preferably, the full-bridge inverter includes controllable switching transistors S1, S2, S3, and S4. The emitter of controllable switching transistor S1 and the collector of controllable switching transistor S2 are connected at node A, which is connected to one end of the primary coil of the high-frequency transformer. The emitter of controllable switching transistor S3 and the collector of controllable switching transistor S4 are connected at node B, which is connected to the other end of the primary coil of the high-frequency transformer. The collectors of controllable switching transistors S1 and S3 are both connected to a DC voltage source, and the emitters of controllable switching transistors S2 and S4 are both connected to a DC voltage source.

[0008] Preferably, the clamping circuit is an H-bridge, including a controllable switching transistor S. cp1 Controllable switching transistor S cp2 Controllable switching transistor S cp3 and controllable switching transistor S cp4 The controllable switch S cp1 Emitter and Controllable Switch S cp2 The collector is connected at node C, and the controllable switch S cp3 Emitter and Controllable Switch S cp4 The collector is connected at node D, and the controllable switch S cp1 Collector and Controllable Switch S cp3 After the collector is connected, a capacitor C is connected. cL The controllable switch S cp2 Emitter and Controllable Switch S cp4 After the emitter is connected, a capacitor C is connected. cL .

[0009] Preferably, the matrix converter is connected in parallel with the clamping circuit, and includes a controllable switching transistor S. a1 Controllable switching transistor S a2 Controllable switching transistor S a3 Controllable switching transistor S a4 Controllable switching transistor S b1 Controllable switching transistor S b2 Controllable switching transistor S b3 Controllable switching transistor S b4 Controllable switching transistor S c1 Controllable switching transistor S c2 Controllable switching transistor S c3 Controllable switching transistor S c4 The controllable switch S a1 The collector of the controllable switch S b1 The collector of the controllable switch S c1 The collectors are all connected to node C;

[0010] The controllable switch S a1The emitter, the controllable switch S b1 The emitter, the controllable switch S c1 The emitters of both are connected to the controllable switch S respectively. a2 emitter, controllable switch S b2 emitter, controllable switch S c3 emitter connection;

[0011] Controllable switching transistor S a4 collector, controllable switch S b4 collector, controllable switch S c4 The collectors of all transistors are connected to node D, and the controllable switch S a4 emitter, controllable switch S b4 emitter, controllable switch S c4 The emitters are respectively connected to the controllable switch S a3 emitter, controllable switch S b3 emitter, controllable switch S c3 emitter connection;

[0012] Controllable switching transistor S a2 collector, controllable switch S b2 collector, controllable switch S c3 The collectors of the controllable switch S are respectively connected to the controllable switch S. a3 collector, controllable switch S b3 collector, controllable switch S c3 The collector connection.

[0013] A pulse width modulation method for a three-phase high-frequency chain matrix inverter, applied to the three-phase high-frequency isolation active clamp inverter as described in claims 1-4, wherein the adjustment method is as follows:

[0014] Based on the polarity of the full-bridge inverter output voltage, the matrix converter can be converted into two sets of inverters: a positive inverter N1 and a negative inverter N2. The operation of the three-phase high-frequency matrix converter can be divided into three states: when the full-bridge inverter output voltage is +U... dc At this time, the positive inverter N1 of the matrix converter is modulated according to SVPWM, and the negative inverter N2 is fully turned on to provide a freewheeling path. The clamping circuit clamps the secondary coil voltage of the high-frequency transformer to +nU. dc When the full-bridge inverter outputs -U dc At this time, the negative inverter N2 of the matrix converter is modulated according to SVPWM, and the positive inverter N1 is fully turned on to provide a freewheeling path. The clamping circuit clamps the voltage of the transformer secondary coil to -nU. dcWhen the output voltage of the full-bridge inverter is 0, all the switching devices of the matrix converter are turned on to provide a freewheeling path for the leakage inductance current and the load current, and the clamping circuit clamps the voltage of the transformer secondary coil to 0.

[0015] Preferably, an intermediate signal S is added to the SVWPM. r1 S r2 , making S a ,S b ,S c ,S r1 ,S r2 Each phase is compared with the carrier wave to generate a PWM waveform. Finally, the PWM waveform of each phase is logically combined with the PWM waveform generated by comparing the intermediate signal with the carrier wave to control the 12 controllable switches of the matrix converter, so that the matrix converter switches from "000" or "111" to the next state.

[0016] Preferably, the SVWPM is divided into six sectors in a counter-clockwise direction, with a load R a R b R c The output voltages are respectively voltage V a V b V c The vector allocation times for the six sectors are as follows:

[0017]

[0018]

[0019]

[0020] In the formula, X, Y, and Z are intermediate variables, and V alpha V beta As transition variables, T1 represents the time allocated to the first vector in the sector, T2 represents the time allocated to the second vector in the sector, and T0 represents the time allocated jointly to vectors "111" and "000". s The time of one switching cycle.

[0021] Preferably, the modulation waveform of the SVWPM within one power frequency cycle is calculated using the following formula for the first sector.

[0022] Where S a ,S b ,S c These are the modulation signals for the three phases. Other sectors can be calculated by substituting them into the formula using the same logic.

[0023] Preferably, when the output voltage of the full-bridge inverter is 0, the switching transistor S of the clamping circuit... cp2 and Scp4 Or S cp1 and S cp3 The high-frequency transformer secondary coil voltage is clamped to 0 during conduction; in this mode, all controllable switches of the matrix converter achieve zero-voltage turn-on and turn-off; when the full-bridge inverter output voltage is +U dc At that time, the switching transistor S of the clamping circuit cp1 and S cp4 Turning on the circuit clamps the voltage of the secondary coil of the high-frequency transformer to +nU. dc When the output voltage of the full-bridge inverter is -U dc At that time, the switching transistor S of the clamping circuit cp2 and S cp3 Turning on the circuit clamps the voltage of the secondary coil of the high-frequency transformer to -nU. dc In both output modes, voltage spikes caused by the leakage inductance of the high-frequency transformer and the parasitic capacitance resonance of the matrix converter are absorbed and released by the clamping capacitor.

[0024] Beneficial effects

[0025] 1. An improved SVPWM modulation strategy is proposed, which realizes zero-voltage switching of the high-frequency transformer secondary matrix converter while achieving safe commutation of transformer leakage inductance current and load current, thereby improving the efficiency of the inverter system.

[0026] 2. It eliminates the voltage spike problem caused by leakage inductance and parasitic capacitance resonance of high-frequency transformers, ensuring the safe and reliable operation of the system. Attached Figure Description

[0027] Figure 1 Three-phase high-frequency active clamp inverter topology.

[0028] Figure 2 A three-phase high-frequency active clamp inverter after decoupling.

[0029] Figure 3 SVPWM space voltage vector distribution diagram.

[0030] Figure 4 Improved modulation waveform of SVPWM at power frequency.

[0031] Figure 5 The switching waveforms of all switching transistors in a three-phase high-frequency active clamping inverter during one switching cycle.

[0032] Figure 6 shows the operating modes of the three-phase high-frequency active clamp inverter; (a) mode 1, (b) mode 2, (c) mode 3, (d) mode 4, (e) mode 5, (f) mode 6, (g) mode 7, (h) mode 8.

[0033] Figure 7The equivalent circuit of transformer leakage inductance and matrix converter switching transistor parasitic capacitance resonance.

[0034] Figure 8 Transformer output voltage waveform; (a) without active clamping circuit, (b) with active clamping circuit.

[0035] Figure 9 Voltage waveforms on the switching transistors of the matrix converter; (a) without active clamping circuit, (b) with active clamping circuit.

[0036] Figure 10 Transformer secondary side output voltage and positive inverter switching transistor S a1 (a) Voltage waveform over multiple switching cycles; (b) S a1 Voltage waveform during turn-off; (c)S a1 Voltage waveform when turned on.

[0037] Figure 11 Transformer secondary side output voltage and negative inverter switching transistor S a4 Voltage waveform on; (a) Waveform under multiple switching cycles; (b) S a4 Voltage waveform during turn-off (c); S a4 Voltage waveform when turned on.

[0038] Figure 12 Output voltage and current under power frequency cycle; (a) A-phase output voltage and current; (b) Three-phase output voltage. Detailed Implementation

[0039] The following detailed descriptions are illustrative and intended to provide further explanation of this application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains. It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application.

[0040] A modulation method for a three-phase high-frequency active clamp inverter, wherein the main circuit is as follows: Figure 1 As shown. It mainly includes: a full-bridge inverter (S1-S4), a high-frequency transformer, and an active clamping circuit (S...). cp1 -S cp4 ), Matrix Transformer (S a1 -S a4 ,S b1 -S b4 ,S c1 -S c4 ) and filtering circuit.

[0041] The DC voltage source is connected to the full-bridge inverter, the full-bridge inverter is connected to the primary coil of the high-frequency transformer, and a clamping circuit and a matrix converter are connected in parallel across the secondary coil of the high-frequency transformer. The matrix converter is connected to a filter circuit and a load.

[0042] The full-bridge inverter includes controllable switching transistors S1, S2, S3, and S4. The emitter of controllable switching transistor S1 and the collector of controllable switching transistor S2 are connected at node A, which is connected to one end of the primary coil of the high-frequency transformer. The emitter of controllable switching transistor S3 and the collector of controllable switching transistor S4 are connected at node B, which is connected to the other end of the primary coil of the high-frequency transformer. The collectors of controllable switching transistors S1 and S3 are both connected to a DC voltage source, and the emitters of controllable switching transistors S2 and S4 are both connected to a DC voltage source.

[0043] The clamping circuit is an H-bridge, including a controllable switching transistor S. cp1 Controllable switching transistor S cp2 Controllable switching transistor S cp3 and controllable switching transistor S cp4 The controllable switch S cp1 Emitter and Controllable Switch S cp2 The collector is connected at node C, and the controllable switch S cp3 Emitter and Controllable Switch S cp4 The collector is connected at node D, and the controllable switch S cp1 Collector and Controllable Switch S cp3 After the collector is connected, a capacitor C is connected. cL The controllable switch S cp2 Emitter and Controllable Switch S cp4 After the emitter is connected, a capacitor C is connected. cL .

[0044] The matrix converter is connected in parallel with the clamping circuit, including a controllable switching transistor S. a1 Controllable switching transistor S a2 Controllable switching transistor S a3 Controllable switching transistor S a4 Controllable switching transistor S b1 Controllable switching transistor S b2 Controllable switching transistor S b3 Controllable switching transistor S b4 Controllable switching transistor S c1 Controllable switching transistor S c2 Controllable switching transistor S c3 Controllable switching transistor S c4 The controllable switch S a1 The collector of the controllable switch S b1The collector of the controllable switch S c1 The collectors are all connected to node C;

[0045] The controllable switch S a1 The emitter, the controllable switch S b1 The emitter, the controllable switch S c1 The emitters of both are connected to the controllable switch S respectively. a2 emitter, controllable switch S b2 emitter, controllable switch S c3 emitter connection;

[0046] Controllable switching transistor S a4 collector, controllable switch S b4 collector, controllable switch S c4 The collectors of all transistors are connected to node D, and the controllable switch S a4 emitter, controllable switch S b4 emitter, controllable switch S c4 The emitters are respectively connected to the controllable switch S a3 emitter, controllable switch S b3 emitter, controllable switch S c3 emitter connection;

[0047] Controllable switching transistor S a2 collector, controllable switch S b2 collector, controllable switch S c3 The collectors of the controllable switch S are respectively connected to the controllable switch S. a3 collector, controllable switch S b3 collector, controllable switch S c3 The collector connection.

[0048] A pulse width modulation method for a three-phase high-frequency chain matrix inverter, which involves adding an intermediate signal S to the SVWPM. r1 S r2 , making S a ,S b ,S c ,S r1 ,S r2 Each phase's PWM waveform is generated by comparing it with the carrier wave. Finally, the PWM waveform of each phase is logically combined with the PWM waveform generated by comparing the intermediate signal with the carrier wave to control the 12 controllable switches of the matrix converter, causing the matrix converter to switch from "000" or "111" to the next state. Based on the polarity of the full-bridge inverter's output voltage, the matrix converter can be converted into two sets of inverters: a positive inverter N1 and a negative inverter N2. The operation of the three-phase high-frequency matrix converter can be divided into three states: when the full-bridge inverter output voltage is +U...dc At this time, the positive inverter N1 of the matrix converter is modulated according to SVPWM, and the negative inverter N2 is fully turned on to provide a freewheeling path. The clamping circuit clamps the secondary coil voltage of the high-frequency transformer to +nU. dc When the full-bridge inverter outputs -U dc At this time, the negative inverter N2 of the matrix converter is modulated according to SVPWM, and the positive inverter N1 is fully turned on to provide a freewheeling path. The clamping circuit clamps the voltage of the transformer secondary coil to -nU. dc When the output voltage of the full-bridge inverter is 0, all the switching devices of the matrix converter are turned on to provide a freewheeling path for the leakage inductance current and the load current, and the clamping circuit clamps the voltage of the transformer secondary coil to 0.

[0049] SVWPM voltage partitioning, such as Figure 3 As shown. SVWPM is divided into six sectors in a counter-clockwise direction.

[0050] To achieve soft switching in the matrix converter, the zero-voltage vector in the conventional SVPWM calculation method needs to be reallocated.

[0051]

[0052]

[0053]

[0054] In the formula, the load R a R b R c The output voltages are respectively voltage V a V b V c X, Y, and Z are intermediate variables; V alpha V beta As transitional variables, T1 represents the time allocated to the first vector in the sector, T2 represents the time allocated to the second vector in the sector, and T0 represents the time allocated jointly by vectors "111" and "000" (the center positions of the six sectors). s The time of one switching cycle.

[0055] The modulation waveform of SVWPM within one power frequency cycle is calculated using the following formula for the first sector.

[0056]

[0057] Where S a ,S b ,S c These are the modulation signals for the three phases respectively.

[0058] Taking sector I as an example, T1 is the time allocated to vector "110" (V6), T2 is the time allocated to vector "100" (V4), T0 is the time jointly allocated to vectors "111" and "000", and Ts is the time of one switching cycle.

[0059] Figure 4 The modified SVPWM proposed in this invention is shown as the modulation waveform within one power frequency cycle. Where S... a ,S b ,S c The modulation signals for phases A, B, and C are respectively, and S r1 With S r2 As an intermediate signal, S a ,S b ,S c ,S r1 ,S r2 Each phase's PWM waveform is generated by comparing it with the carrier wave. Finally, the PWM waveform of each phase is logically combined with the PWM waveform generated by comparing the intermediate signal with the carrier wave to control the 12 switches of the subsequent matrix converter. Compared to the conventional SVPWM modulation method, the improved SVPWM modulation method allows the high-frequency transformer secondary side matrix converter to switch from "000" or "111" to the next state. This creates conditions for achieving zero-voltage switching of all switches in the matrix converter. Each sector has multiple switching cycles, and one switching cycle has 8 modes.

[0060] Figure 5 This is the switching waveform of a three-phase high-frequency active clamp inverter in the first sector during one switching cycle. The switching frequency of the front-end full-bridge inverter is 10kHz, and the switching frequency of the rear-end matrix converter is 20kHz. The PWM waveforms generated by comparing the modulation signal of the rear-end matrix converter in two carrier cycles are logically combined to generate the switching waveform of the front-end full-bridge inverter for one switching cycle. Figure 5 In the diagram, PWM11-PWM14 are the switching signals for the front-end full-bridge inverter (S1-S4); PWMC1-PWMC4 are the switching signals for the active clamp inverter (S1-S4). cp1 -S cp4 The switching signals of ); PWM21-PWM24, PWM31-PWM34, and PWM41-PWM44 are the switching signals of the subsequent matrix converter (S a1 -S a4 ,S b1 -S b4 ,S c1 -S c4 The switching signal of U; CD U represents the ideal output voltage waveform on the secondary side of a high-frequency transformer. m U n Up This is an intermediate signal.

[0061] The following is based on Figure 5 This paper introduces the main operating modes of a three-phase high-frequency isolated active clamp inverter.

[0062] Mode 1 [t0-t1]: As shown in Figure 6(a), the controllable switches S1 and S3 of the front-end full-bridge inverter are turned on. On the secondary side of the high-frequency transformer, the controllable switch S of the clamping circuit is turned on. cp1 ,S cp3 When the circuit is turned on, the voltage on the secondary side (secondary coil) of the high-frequency transformer is clamped to 0, and all switches of the matrix converter on the secondary side of the high-frequency transformer are in the open state. The load current and leakage inductance current commutate naturally.

[0063] Mode 2 [t1-t2]: As shown in Figure 6(b), at time t1, the controllable switch S of the secondary matrix converter connected to the high-frequency transformer... a3 ,S b3 ,S c1 Zero-voltage turn-off, current flows through switch S a3 ,S b3 ,S c1 The current naturally switches to its body diode.

[0064] Mode 3 [t2-t3]: As shown in Figure 6(c), S3 of the front-end full-bridge inverter is turned off at time t2, and the body diode on S4 is naturally turned on. On the secondary side of the high-frequency transformer, the clamping circuit S... cp3 When turned off, the matrix transformer operates in the same state as mode 2.

[0065] Mode 4 [t3-t4]: As shown in Figure 6(d), S4 of the front-end full-bridge inverter is turned on, and the high-frequency transformer input voltage U AB =U dc The secondary output voltage U of the high-frequency transformer CD and output current i n The voltage rises rapidly when the output voltage U on the secondary side of the transformer... CD Equal to the voltage U across the clamping capacitor ccl At this time, this state ends.

[0066] Mode 5 [t4-t5]: As shown in Figure 6(e), on the secondary side of the high-frequency transformer, the S-mode of the clamping circuit... cp1 Open, the clamping circuit will open the secondary voltage U of the high-frequency transformer CD Clamp to nU dc At time t4, the leakage inductance L of the high-frequency transformer k2 With controllable switch S a3 ,S b3 ,S c1 The parasitic capacitance on the circuit creates resonance. Its equivalent circuit is as follows: Figure 7 As shown. Where L k For transformer leakage inductance, C iss i is the parasitic capacitance of the controllable switch of the matrix converter. n U is the secondary current of the high-frequency transformer. ciss i is the voltage across the parasitic capacitor of the controllable switch. a Let E be the current at the output side. Based on the equivalent circuit, the voltage and current equations caused by resonance can be established as follows:

[0067]

[0068]

[0069] t represents time. Due to the presence of the clamping circuit, the voltage spikes generated by the resonance between the transformer leakage inductance and the parasitic capacitance of the switching transistor will be clamped by the clamping capacitor C of the clamping circuit. cl absorb.

[0070] Mode 6 [t5-t6]: As shown in Figure 6(f), the controllable switch S1 of the front-end full-bridge inverter is closed, and the body diode on S2 naturally conducts to provide a freewheeling path; on the secondary side of the high-frequency transformer, the controllable switch S of the clamping circuit... cp1 When shut down, the secondary output current i of the high-frequency transformer is... n The freewheeling path is complete, and its value gradually decreases. The primary current i of the high-frequency transformer... p and i n The time required to reduce to 0 can be calculated using the following formula:

[0071] i p =ni n =n(i a +i b )

[0072]

[0073]

[0074] When the current decreases to 0, the matrix converter switch S a3 ,S b3 ,S c1 The capacitor on the capacitor begins to discharge, and its discharge time can be calculated by the following formula:

[0075]

[0076]

[0077]

[0078] Mode 7 [t6-t7]: As shown in Figure 6(g), the controllable switch S4 of the front-end full-bridge inverter is turned on, and the controllable switch S of the clamping circuit is turned on. cp2 and S cp4 When the transformer is turned on, the output voltage on the secondary side is clamped to 0, and the freewheeling path of the load current is complete.

[0079] Mode 8 [t7-t8]: As shown in Figure 6(h), at time t7, the controllable switch S of the subsequent matrix converter... a3 ,S b3 ,S c1 Zero-voltage conduction, the freewheeling path of the load current is the same as in mode 7.

[0080] Modal [t8-t] 31 The operating state of the clamping circuit is basically the same as that of mode [t0-t8]. From the above analysis, it can be seen that the operating state of the clamping circuit can be simplified into three modes. When the output voltage of the current stage full-bridge inverter is 0, the controllable switch S of the clamping circuit... cp2 and S cp4 Or S cp1 and S cp3 The secondary-side voltage is clamped to 0 upon activation; in this mode, all controllable switches of the transformer secondary-side matrix converter achieve zero-voltage turn-on and turn-off, reducing switching losses. The current stage full-bridge inverter output voltage is +U. dc At that time, the controllable switch S of the clamping circuit cp1 and S cp4 Turning on the high-frequency transformer clamps the secondary voltage to +nU. dc The current full-bridge inverter output voltage is -U dc At that time, the controllable switch S of the clamping circuit cp2 and S cp3 Turning on the high-frequency transformer clamps the secondary voltage to -nU. dc In both output modes, voltage spikes caused by the leakage inductance of the high-frequency transformer and the parasitic capacitance resonance of the matrix converter are absorbed by the clamping capacitor.

[0081] Figure 8 (a) shows the output voltage and current on the secondary side of the transformer without a clamping circuit. As can be seen, due to the resonance between the transformer leakage inductance and the parasitic capacitance of the matrix converter, a large voltage spike appears on the secondary side of the high-frequency transformer. This seriously affects the safety and reliability of the system operation. Figure 8 (b) shows the output voltage and current on the secondary side of the high-frequency transformer when the clamping circuit is added. It can be seen that the voltage spikes and oscillations have disappeared significantly.

[0082] Figure 9 (a) Controllable switch S of the matrix converter without clamping circuit a1From the voltage waveforms and trigger signal waveforms at both ends, we can see that the collector-emitter voltage u ce There are obvious voltage spikes and oscillations. Figure 9 (b) Controllable switch S of the matrix converter when a clamping circuit is added a1 As can be seen from the voltage waveforms at both ends and the trigger signal waveform, the voltage spikes and oscillations have disappeared. Therefore, after adding the clamping circuit, the modulation strategy proposed in this invention can eliminate voltage spikes.

[0083] Figure 10 For matrix transformer S a1 The switching signal, collector-emitter voltage, and output voltage waveform of the secondary side of the high-frequency transformer. Figure 10 (a) shows the waveform for multiple cycles. Figure 10 (b) is the waveform when the controllable switch is turned off. Figure 10 (c) shows the waveform when the controllable switch is open. As can be seen, the controllable switches of the positive inverter achieve zero-voltage turn-on and turn-off. Figure 11 For matrix transformer S a4 The switching signal, collector-emitter voltage, and output voltage waveform of the secondary side of the high-frequency transformer. Figure 11 (a) shows the waveform for multiple cycles. Figure 11 (b) is the waveform when the controllable switch is turned off. Figure 11 (c) shows the waveform when the controllable switch is turned on. As can be seen, the controllable switches of the positive inverter all achieve zero-voltage turn-on and turn-off. Figure 12 (a) shows the output voltage and current of phase A (point E) under the power frequency cycle. Figure 12 (b) shows the output voltage of the three phases (points E, F, and G) under the power frequency cycle. It can be seen that the modulation strategy proposed in this invention can achieve soft switching of the matrix converter while also obtaining a high-quality voltage waveform.

[0084] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A pulse width modulation method for a three-phase high-frequency chain matrix inverter, characterized in that, It includes a DC voltage source, a full-bridge inverter, a high-frequency transformer, a clamping circuit, a matrix converter, and a filter circuit. The DC voltage source is connected to the full-bridge inverter, the full-bridge inverter is connected to the primary coil of the high-frequency transformer, and a clamping circuit and a matrix converter are connected in parallel across the secondary coil of the high-frequency transformer. The matrix converter is connected to the filter circuit and the load. The clamping circuit is an H-bridge, including a controllable switching transistor. Controllable switching transistor Controllable switching transistor and controllable switching transistor The controllable switching transistor Emitter and Controllable Switch The collector is connected at node C, and the controllable switch is... Emitter and Controllable Switch The collector is connected at node D, and the controllable switch is... Collector and Controllable Switch After the collector is connected, a capacitor is connected. The controllable switch tube Emitter and Controllable Switch A capacitor is connected after the emitter is connected. ; The matrix converter is connected in parallel with the clamping circuit, and includes a controllable switching transistor. Controllable switching transistor Controllable switching transistor Controllable switching transistor Controllable switching transistor Controllable switching transistor Controllable switching transistor Controllable switching transistor Controllable switching transistor Controllable switching transistor Controllable switching transistor Controllable switching transistor The controllable switching transistor The collector of the controllable switch transistor The collector of the controllable switch transistor The collectors are all connected to node C; The controllable switching transistor The emitter, the controllable switch transistor The emitter, the controllable switch transistor The emitters are respectively connected to the controllable switch transistor. emitter, controllable switch emitter, controllable switch emitter connection; Controllable switching transistor collector and controllable switch collector and controllable switching transistor The collectors of all transistors are connected to node D, and the controllable switching transistors are... emitter, controllable switch emitter, controllable switch The emitters are respectively connected to the controllable switch transistor. emitter, controllable switch emitter, controllable switch emitter connection; Controllable switching transistor collector and controllable switching transistor collector and controllable switching transistor The collectors of the controllable switching transistors are respectively connected to the controllable switching transistors. collector and controllable switching transistor collector and controllable switching transistor collector connection; The adjustment method is as follows: Based on the polarity of the full-bridge inverter's output voltage, the matrix converter can be converted into two sets of inverters: the positive set inverter. and negative group inverter The operation of the matrix converter is divided into three states: when the output voltage of the full-bridge inverter is... At that time, the positive group inverter of the matrix converter Modulation is performed using SVPWM method, negative group inverter All circuits are turned on to provide a freewheeling path, and the clamping circuit clamps the secondary coil voltage of the high-frequency transformer to... When the output voltage of the full-bridge inverter is At that time, the negative group inverter of the matrix converter N 2. Modulation is performed according to SVPWM method, positive group inverter. Full conduction provides a freewheeling path, and the clamping circuit clamps the transformer secondary coil voltage to... When the output voltage of the full-bridge inverter is 0, all switching devices of the matrix converter are turned on to provide a freewheeling path for leakage inductance current and load current, and the clamping circuit clamps the voltage of the transformer secondary coil to 0. Add an intermediate signal to SVPWM , ,make Each phase is compared with the carrier wave to generate a PWM waveform. Finally, the PWM waveform of each phase is logically combined with the PWM waveform generated by comparing the intermediate signal with the carrier wave to control the 12 controllable switches of the matrix converter, so that the matrix converter switches from "000" or "111" to the next state. These are the modulation signals for the three phases respectively; SVPWM is divided into six sectors in counter-clockwise order, and the load... The output voltages are respectively voltages The vector allocation times for the six sectors are as follows: ； ； In the formula, X, Y, Z As an intermediate variable, As a transitional variable, The time allocated to the first vector in the sector. The time allocated to the second vector in the sector. The time allocated to both vectors "111" and "000" The time of one switching cycle.

2. The pulse width modulation method for a three-phase high-frequency chain matrix inverter according to claim 1, characterized in that, The modulation waveform of the first sector within one power frequency cycle of SVPWM is calculated using the following formula. ; in These are the modulation signals for the three phases respectively.

3. The pulse width modulation method for a three-phase high-frequency chain matrix inverter according to claim 2, characterized in that, When the output voltage of the full-bridge inverter is 0, the switching transistor of the clamping circuit and or and The high-frequency transformer's secondary coil voltage is clamped to 0 during conduction; in this mode, all controllable switches of the matrix converter achieve zero-voltage turn-on and turn-off; when the full-bridge inverter output voltage is At that time, the switching transistor of the clamping circuit and Turning on the circuit clamps the voltage of the secondary coil of the high-frequency transformer to... When the output voltage of the full-bridge inverter is At that time, the switching transistor of the clamping circuit and Turning on the circuit clamps the voltage of the secondary coil of the high-frequency transformer to... ; In both output modes, voltage spikes caused by the leakage inductance of the high-frequency transformer and the parasitic capacitance resonance of the matrix converter are absorbed and released by the clamping capacitor.

4. The pulse width modulation method for a three-phase high-frequency chain matrix inverter according to claim 1, characterized in that, The full-bridge inverter includes controllable switching transistors. Controllable switching transistor Controllable switching transistor and controllable switching transistors The controllable switch tube emitter and controllable switch The collector of the controllable switch is connected at node A, and node A is connected to one end of the primary coil of the high-frequency transformer. emitter and controllable switch The collector of the transistor is connected at node B, and node B is connected to the other end of the primary coil of the high-frequency transformer; the controllable switching transistor... Controllable switching transistor The collectors of all transistors are connected to a DC voltage source, making them controllable switching transistors. Controllable switching transistor The emitters of all are connected to a DC voltage source.

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