Stacked edge coupler in back end of line stack of photonic chip

Abstract

The present disclosure relates to a stack edge coupler in a back-end-of-line stack of a photonic chip. A stack edge coupler for a photonic chip is provided. The stack edge coupler includes an insulating layer, a waveguide core, a first auxiliary waveguide, and a back-end-of-line stack. The first auxiliary waveguide is located on the insulating layer. The waveguide core is located above the first auxiliary waveguide and includes a taper. The back-end-of-line stack is located above the waveguide core. The back-end-of-line stack includes a side edge, a dielectric layer, and a second auxiliary waveguide. The second auxiliary waveguide is located on the dielectric layer and arranged adjacent to the side edge. The second auxiliary waveguide has an arrangement that overlaps the taper of the waveguide core.

Description

Technical Field

[0001] This disclosure generally relates to photonic chips, and more specifically to stacked edge couplers and methods of forming the same. Background Technology

[0002] Photonic chips integrate optical and electronic components into a single platform. Optical components may include, for example, waveguides, optical switches, couplers, and modulators. Electronic components may include, for example, field-effect transistors. The electronic components are operatively coupled to the optical components to realize the functionality of the photonic chip.

[0003] Edge couplers are commonly used to couple light of a given mode from a light source (such as a laser or optical fiber) to other optical and / or electronic components on a photonic chip. Because the light source is typically larger than the edge coupler, the edge coupler may not be able to fully define the received incident mode, resulting in significant power loss.

[0004] Therefore, solutions are provided to overcome or at least mitigate the aforementioned drawbacks. Summary of the Invention

[0005] To achieve the above and other aspects of this disclosure, a stacked edge coupler and a method of forming the same are provided.

[0006] According to one aspect of this disclosure, a stacked edge coupler for a photonic chip is provided. The stacked edge coupler includes an insulating layer, a waveguide core, a first auxiliary waveguide, and a back-end process stack. The first auxiliary waveguide is located on the insulating layer. The waveguide core is located above the first auxiliary waveguide and includes a tapered section. The back-end process stack is located above the waveguide core. The back-end process stack includes side edges, a dielectric layer, and a second auxiliary waveguide. The second auxiliary waveguide is located on the dielectric layer and disposed adjacent to the side edge. The second auxiliary waveguide has an arrangement that overlaps with the tapered section of the waveguide core.

[0007] According to another aspect of this disclosure, a stacked edge coupler for a photonic chip is provided. The stacked edge coupler includes an insulating layer, a first auxiliary waveguide, a waveguide core, and a back-end process stack. The insulating layer has side edges. The first auxiliary waveguide is located on the insulating layer and includes a tapered portion with an end face, the end face being substantially coplanar with the side edge of the insulating layer. The waveguide core is located above the first auxiliary waveguide and includes a tapered portion with side edges, the side edges of the tapered portion being located above the end face of the first auxiliary waveguide. The back-end process stack includes side edges, a dielectric layer, a second auxiliary waveguide, a third auxiliary waveguide, and a fourth auxiliary waveguide. The fourth auxiliary waveguide is laterally disposed between the second and third auxiliary waveguides. The second, third, and fourth auxiliary waveguides are disposed on the interlayer dielectric layer and adjacent to the side edges. The fourth auxiliary waveguide has an arrangement overlapping the tapered portion of the waveguide core.

[0008] According to another aspect of the present invention, a method for forming a stacked edge coupler for a photonic chip is provided. The stacked edge coupler includes forming a first auxiliary waveguide on an insulating layer and forming a waveguide core including a tapered portion above the first auxiliary waveguide. A back-end process stack is formed above the waveguide core, and the back-end process stack includes a side edge, a dielectric layer, and a second auxiliary waveguide. The second auxiliary waveguide is formed on the dielectric layer and adjacent to the side edge, and has an arrangement overlapping the tapered portion of the waveguide core. Attached Figure Description

[0009] The embodiments of this disclosure will be better understood by reading the following detailed description taken in conjunction with the accompanying drawings:

[0010] Figures 1A to 1C This is an exemplary top view of a stacked edge coupler of a photonic chip during the initial manufacturing stage of a processing method according to an embodiment of the present disclosure.

[0011] Figure 2A It is based on the general outline of embodiments of this disclosure. Figure 1A The cross-sectional view of the stacked edge coupler taken by line 2A-2A in the figure. Figure 2B and 2C It is roughly along Figure 1A The cross-sectional view of the stacked edge coupler 100 is taken from line 2B-2B in the figure.

[0012] Figure 3A and 3B It is based on the embodiments of this disclosure. Figure 1A An exemplary top view of the stacked edge couplers during the subsequent manufacturing phase.

[0013] Figure 4A and 4B It is based on the general outline of embodiments of this disclosure. Figure 3A The cross-sectional view of the stacked edge coupler is taken from the corresponding lines 4A-4A and 4B-4B.

[0014] Figure 5A and 5B It is based on the embodiments of this disclosure. Figure 3A An exemplary top view of the stacked edge couplers during the subsequent manufacturing phase.

[0015] Figure 6A and 6B It is based on the general outline of embodiments of this disclosure. Figure 5A The cross-sectional views of the stacked edge coupler are taken from the corresponding lines 6A-6A and 6B-6B.

[0016] Figures 7A to 7D It is based on the embodiments of this disclosure. Figure 5A An exemplary top view of the stacked edge couplers during the subsequent manufacturing phase.

[0017] Figure 8A and 8B It is based on the general outline of embodiments of this disclosure. Figure 7A The cross-sectional views of the stacked edge coupler are taken from the corresponding lines 8A-8A and 8B-8B.

[0018] For the sake of simplification and clarity, the accompanying drawings illustrate a general construction method, and certain descriptions and details of well-known features and techniques may be omitted to avoid unnecessarily obscuring the discussion of the embodiments described in this disclosure.

[0019] Furthermore, features in the accompanying drawings are not necessarily drawn to scale. For example, the dimensions of some features in the drawings may be exaggerated relative to other features to aid in understanding an embodiment of the device. The same reference numerals in different drawings denote the same features, while similar reference numerals may, but do not necessarily, denote similar features. Detailed Implementation

[0020] This disclosure generally relates to photonic chips, and more specifically to stacked edge couplers and methods of forming thereof. Various embodiments of this disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that similar and corresponding features are indicated by the use of the same reference numerals. The embodiments disclosed herein are exemplary and are not intended to be exhaustive or limited to this disclosure.

[0021] Figures 1A to 1C This is an exemplary top view of a stacked edge coupler 100 in the initial manufacturing stage of a processing method according to an embodiment of the present disclosure. The stacked edge coupler 100 can be used in a photonic chip and may include a waveguide 102.

[0022] Waveguide 102 may include an end face 104 and an end face 106 arranged laterally opposite to the end face 104. Waveguide 102 has a defined length between end faces 104 and 106. In embodiments of this disclosure, end faces 104 and 106 may be substantially planar and may be substantially parallel to each other. In another embodiment of this disclosure, end face 104 of waveguide 102 may be used as an input from a light source (e.g., a laser or optical fiber) to other components in the stacked edge coupler 100.

[0023] Waveguide 102 has a longitudinal axis 108L, and at least a portion of waveguide 102 has a width dimension that varies with its position along the longitudinal axis 108L. For example, as Figure 1A and 1B As shown, waveguide 102 may include portion 110 and portion 112 arranged laterally adjacent to portion 110. For illustrative purposes, the transition from portion 110 to portion 112 is schematically shown by dashed lines. Portions 110 and 112 may be aligned along their respective lengths with the longitudinal axis 108L of waveguide 102.

[0024] Section 110 may have a width dimension that varies with its position along the longitudinal axis 108L. Section 110 may include a minimum width W1 occurring at end face 104 and a maximum width W2 occurring at the transition from section 110 to section 112, and section 110 may taper (i.e., narrow) in the direction toward end face 104. In another example, the width dimension of section 110 may increase with increasing distance from end face 104. In embodiments of this disclosure, the width dimension of section 110 may vary along the longitudinal axis 108L based on a linear function to provide a trapezoidal shape. In another embodiment of this disclosure, the width dimension of section 110 may vary along the longitudinal axis 108L based on a nonlinear function (e.g., a quadratic function, parabolic function, or exponential function).

[0025] Or, such as Figure 1C As shown, waveguide 102 can gradually taper along its entire length L1 in the direction toward end face 104, so that the width dimension of waveguide 102 can vary with the position along the longitudinal axis 108L.

[0026] The portion 112 of waveguide 102 can adopt various geometric configurations. For example, such as Figure 1AAs shown, portion 112 may have a width dimension that varies with its position along the longitudinal axis 108L. Portion 112 may have a width W3 appearing at end face 106, and portion 112 may gradually taper in the direction toward end face 106; that is, the width dimension of portion 112 may increase with increasing distance from end face 106. In embodiments of this disclosure, width W3 may be wider than width W1.

[0027] Or, such as Figure 1B As shown, portion 112 may have a substantially constant width W4 along the longitudinal axis 108L. In embodiments of this disclosure, width W4 may be wider than width W1. In another embodiment of this disclosure, the width W4 of portion 112 may be the maximum width dimension of waveguide 102.

[0028] In other alternative embodiments of this disclosure, waveguide 102 may further include one or more portions disposed between portion 110 and portion 112. The width dimension of the one or more portions may be substantially constant, or may vary along the longitudinal axis 108L based on a linear or nonlinear function.

[0029] Figure 2A It is based on the general outline of embodiments of this disclosure. Figure 1A The cross-sectional view of the stacked edge coupler 100 taken from line 2A-2A in the figure. Figure 2B and 2C It is roughly along Figure 1A The cross-sectional view of the stacked edge coupler 100 is taken from line 2B-2B in the figure.

[0030] Waveguide 102 may include semiconductor materials such as silicon, silicon germanium, silicon carbide, or other semiconductor compounds, such as group II-VI or III-V semiconductor compounds. In embodiments of this disclosure, the semiconductor material of waveguide 102 may include a single-crystal semiconductor material. In another embodiment of this disclosure, waveguide 102 may originate from a device layer (not shown) of a semiconductor-on-insulator (SOI) substrate 114. The device layer may be the location of optical components (including the stacked edge coupler 100), and the electronic components of the photonic chip may be disposed near, inside, and / or above the device layer.

[0031] The SOI substrate 114 may further include a buried insulating layer 116 disposed between the device layer and the base substrate 118. During front-end fabrication processes, the waveguide 102 can be patterned using patterning techniques including photolithography and etching processes. Therefore, the waveguide 102 can be directly disposed on the buried insulating layer 116. In embodiments of this disclosure, the buried insulating layer 116 may include a dielectric material, such as silicon dioxide.

[0032] The buried insulating layer 116 and the base substrate 118 may include side edges 120, and the end face 104 of the waveguide 102 may be disposed above the side edge 120 of the buried insulating layer 118. The side edge 120 of the buried insulating layer 116 may be disposed above the side edge of the base substrate, but not necessarily coplanar with it. In embodiments of this disclosure, the end face 104 of the waveguide 102 may be substantially coplanar with the side edge 120 of the buried insulating layer 116.

[0033] like Figure 2A and 2B As shown, waveguide 102 can have a substantially uniform thickness. For example, waveguide 102 can have a transverse axis 108T perpendicular to the longitudinal axis 108L, and can have a substantially constant thickness dimension T1 along the transverse axis 108T. Or, as Figure 2C As shown, waveguide 102 can have a thickness dimension that varies with position along the transverse axis 108T. For example, waveguide 102 may include a central portion 124 and a pair of side portions 126 arranged laterally adjacent to the central portion 124. For illustrative purposes, the transition from the central portion 124 to each side portion 126 is schematically shown by a pair of dashed lines. The central portion 124 may have a thickness T2, and each side portion 126 may have a substantially equal thickness T3. The thickness T2 of the central portion 124 may be thicker than the thickness T3 of each side portion 126, and waveguide 102 may have an inverted "T" shaped profile. Waveguide 102 can be formed by partially etching semiconductor material during patterning techniques to form the central portion 124 and the pair of side portions 126.

[0034] Figure 3A and 3B It is based on the embodiments of this disclosure. Figure 1A An exemplary top view of the stacked edge coupler 100 during the subsequent manufacturing phase. Figure 4A and 4B It is based on the general outline of embodiments of this disclosure. Figure 3A The corresponding lines 4A-4A and 4B-4B in the diagram show cross-sectional views of the stacked edge coupler 100. The dielectric layer 128 can be arranged above the waveguide 102 and the buried insulating layer 116.

[0035] The dielectric layer 128 may include a side edge 130, and the side edge 130 of the dielectric layer 128 may be disposed above the side edge 120 of the buried insulating layer 116. In embodiments of this disclosure, the side edge 130 of the dielectric layer 128 may be substantially coplanar with the side edge 120 of the buried insulating layer 116.

[0036] The dielectric layer 128 may include a dielectric material, such as doped or undoped silicon dioxide. During front-end processing, the dielectric layer 128 may be deposited over the waveguide 102 and the buried insulating layer 116 using deposition techniques including plasma-enhanced chemical vapor deposition.

[0037] Waveguide core 132 can be disposed above dielectric layer 128 and waveguide 102; for illustrative purposes, Figure 3A and 3B The outline of waveguide 102 is schematically shown with dashed lines. Waveguide core 132 may have a length longer than the length L1 of waveguide 102. Waveguide core 132 can connect stacked edge coupler 100 to other optical components (e.g., Mach-Zehnder modulators) and / or electronic components (e.g., field-effect transistors) to realize the function of photonic chip.

[0038] Waveguide core 132 may include portion 134 and portion 136 arranged laterally adjacent to portion 134. For illustrative purposes, the transition from portion 134 to portion 136 is schematically shown by dashed lines. Waveguide core 132 may have a longitudinal axis 138L, and portions 134 and 136 may be aligned with the longitudinal axis 138L along their respective lengths. The longitudinal axis 138L may be arranged above and substantially parallel to the longitudinal axis 108L of waveguide 102, such as... Figure 4A As shown.

[0039] Waveguide core 132 may include an end face 140 of a portion 134 terminating waveguide core 132. In embodiments of this disclosure, end face 140 may be substantially planar. In another embodiment of this disclosure, end face 140 may be substantially coplanar with end face 104 of waveguide 102. In yet another embodiment of this disclosure, end face 140 may be substantially coplanar with side edge 130 of dielectric layer 128 and side edge 120 of buried insulating layer 116.

[0040] Waveguide core 132 can be directly disposed above waveguide 102 and completely overlap waveguide 102. For example, as Figure 3A As shown, a portion 134 of waveguide core 132 can completely overlap with the entire waveguide 102, allowing a portion 136 of waveguide core 132 to be arranged offset relative to waveguide 102. In another example, as... Figure 3B As shown, a portion 134 of waveguide core 132 may overlap with a portion 110 of waveguide 102. Correspondingly, a portion 136 of waveguide core 132 may overlap with the remainder of waveguide 102.

[0041] However, this disclosure is not limited to the arrangement of waveguide core 132 relative to waveguide 102 described above, and other configurations may be adopted without departing from the spirit and scope of this disclosure. For example, a portion 134 of waveguide core 132 may overlap with a portion of portion 112 and portion 110 of waveguide 102, while a portion 136 of waveguide core 132 may overlap with the remaining portion of waveguide 102. In another example, a portion 134 of waveguide core 132 may overlap with portion 110 of waveguide 102, while a portion 136 of waveguide core 132 may overlap with portion 112 of waveguide 102.

[0042] A portion 134 of waveguide core 132 may have a width dimension that varies with its position along the longitudinal axis 138L. For example, waveguide core 132 may have a minimum width W6 appearing at end face 140, such that portion 134 may taper gradually in the direction toward end face 140. In another example, the width dimension of portion 134 may increase with increasing distance from end face 140. In embodiments of this disclosure, the width dimension of portion 134 may vary along the longitudinal axis 138L based on a linear function to provide a trapezoidal shape. In another embodiment of this disclosure, the width dimension of portion 134 may vary along the longitudinal axis 138L based on a nonlinear function (e.g., a quadratic function, a parabolic function, or an exponential function). In yet another embodiment of this disclosure, the width W6 of waveguide core 132 may be at least as wide as the width W1 of waveguide 102.

[0043] A portion 136 of the waveguide core 132 may include at least a portion having a width dimension that is substantially constant with position along the longitudinal axis 138L. For example, as Figure 3A As shown, a portion of portion 136, having a substantially constant width dimension, may be laterally arranged adjacent to and abutting portion 134. In another example, portion 136 may include a tapered portion laterally adjacent to and abutting portion 134, and a portion having a substantially constant width dimension adjacent to and abutting the end of the tapered portion laterally opposite to portion 134, such as... Figure 3B As shown. The tapered portion of portion 136 may gradually taper in the direction toward portion 134.

[0044] Waveguide core 132 may include a material with a different composition than waveguide 102. For example, waveguide core 132 may include a material with a lower refractive index than waveguide 102. In embodiments of this disclosure, waveguide core 132 may include a dielectric material, such as silicon nitride. Waveguide core 132 may be patterned during mid-process manufacturing using patterning techniques including photolithography and etching processes.

[0045] like Figure 4A and 4BAs shown, waveguide core 132 can have a substantially uniform and equal thickness along its position along the longitudinal axis 138L. Alternatively, waveguide core 132 can include portions with different thicknesses. For example, waveguide core 132 can have an inverted "T" profile across its transverse axis, which can be formed by partially etching the dielectric material to achieve a similar thickness to... Figure 2C The outline is similar to that of waveguide 102 shown.

[0046] Figure 5A and 5B It is based on the embodiments of this disclosure. Figure 3A An exemplary top view of the stacked edge coupler 100 during the subsequent manufacturing phase. Figure 6A and 6B It is based on the general outline of embodiments of this disclosure. Figure 5A The corresponding lines 6A-6A and 6B-6B in the diagram show cross-sectional views of the stacked edge coupler 100. A dielectric stack 142 can be arranged above the dielectric layer 128 and the waveguide core 132.

[0047] The dielectric stack 142 may include side edges 144. The side edges 144 of the dielectric stack 142 may also be disposed above the end face 140 of the waveguide core 132, the side edge 130 of the dielectric layer 128, the end face 104 of the waveguide 102, and the side edge 120 of the buried insulator layer 116. In embodiments of this disclosure, the side edges 144 of the dielectric stack 142 may be substantially planar. In another embodiment of this disclosure, the side edges 144 of the dielectric stack 142 may be substantially coplanar with the end face 140 of the waveguide core 132, the side edge 130 of the dielectric layer 128, the end face 104 of the waveguide 102, and the side edge 120 of the buried insulator layer 116.

[0048] The dielectric stack 142 may include one or more layers of a dielectric material such as silicon dioxide and / or a dielectric material with a dielectric constant lower than that of silicon dioxide. Examples of dielectric materials with a dielectric constant lower than that of silicon dioxide include carbon-doped silicon dioxide, tetraethyl orthosilicate (TEOS), borosilicate glass (BPSG), or undoped silicate glass (USG). The dielectric stack may also include fluorinated dielectric materials, such as fluorinated silicon dioxide or fluorinated TEOS. The dielectric stack 142 may also include semiconductor materials, such as amorphous silicon. The dielectric stack 142 may be deposited during intermediate process handling using deposition techniques including chemical vapor deposition.

[0049] Another dielectric stack 146 may be disposed above dielectric stack 142. Similar to dielectric stack 142, dielectric stack 146 may include one or more layers of dielectric material and / or fluorinated dielectric material, but not necessarily the same materials. In embodiments of this disclosure, each layer in dielectric stack 146 may be referred to as an interlayer dielectric layer. During back-end process handling, dielectric stack 146 may be deposited using deposition techniques including chemical vapor deposition processes.

[0050] The dielectric stack 146 may include side edges 148. The side edges 148 of the dielectric stack 146 may also be disposed above the side edges 144 of the dielectric stack 142, the end face 140 of the waveguide core 132, the side edges 130 of the dielectric layer 128, the end face 104 of the waveguide 102, and the side edges 120 of the buried insulator layer 116. In embodiments of this disclosure, the side edges 148 of the dielectric stack 146 may be substantially planar. In another embodiment of this disclosure, the side edges 148 of the dielectric stack 146 may be substantially coplanar with the side edges 144 of the dielectric stack 142, the end face 140 of the waveguide core 132, the side edges 130 of the dielectric layer 128, the end face 104 of the waveguide 102, and the side edges 120 of the buried insulator layer 116.

[0051] In embodiments of this disclosure, one or more dielectric material layers of dielectric stacks 142, 146 may have their respective refractive indices, and the refractive indices of one or more dielectric material layers in dielectric stacks 142, 146 may be lower than the refractive index of waveguide 102.

[0052] Waveguides 150, 152, and 154 may be disposed above a dielectric stack 146 on the same level as the stacked edge coupler 100. Each of waveguides 150, 152, and 154 has a defined length and may be terminated by an end face 156 and an end face 158 disposed laterally opposite to the end face 156. In embodiments of this disclosure, the end face 156 of waveguides 150, 152, and 154 may be substantially planar. In another embodiment of this disclosure, the end face 156 of waveguides 150, 152, and 154 may be substantially coplanar with the end face 140 of waveguide core 132 and the end face 104 of waveguide 102. In yet another embodiment of this disclosure, the end face 156 of waveguides 150, 152, and 154 may be substantially coplanar with the side edge 130 of dielectric layer 128 and the side edge 120 of buried insulating layer 116.

[0053] Waveguide 152 can be arranged laterally between waveguide 150 and waveguide 154. Waveguide 152 can be arranged above waveguide core 132 and can have an arrangement overlapping waveguide core 132; for illustrative purposes, Figure 5A and 5BThe outline of waveguide core 132 is schematically shown with dashed lines. Waveguide 152 may have a longitudinal axis 160L, and the longitudinal axis 160L may be arranged above and substantially parallel to the longitudinal axis 138L of waveguide core 132, such as... Figure 6A As shown. In embodiments of this disclosure, the length of waveguide 152 may be shorter than the corresponding lengths of waveguide core 132 and waveguide 102. In another embodiment of this disclosure, the end face 158 of waveguide 152 may terminate above a portion 134 of waveguide core 132. Waveguides 150 and 154 may be arranged at positions offset relative to waveguide core 132 such that waveguides 150 and 152 do not overlap with waveguide core 132.

[0054] like Figure 5A As shown, waveguides 150, 152, and 154 may have substantially equal lengths and may be arranged substantially parallel to each other. In an embodiment of this disclosure, the end faces 158 of waveguides 150, 152, and 154 may be substantially planar. In another embodiment of this disclosure, the end faces 158 of waveguides 150, 152, and 154 may be substantially coplanar to each other.

[0055] Or, such as Figure 5B As shown, waveguides 150 and 154 can be shaped as bends that curve away from the longitudinal axis 160L of waveguide 152 along a horizontal plane. For example, the spacing between waveguides 150 and 152 can increase with increasing distance from their respective end faces 156, and waveguide 154 can bend away from waveguide 150 in the opposite direction. In another example, waveguides 150 and 154 can extend along a curved path or a curved path between their respective end faces 156 and 158, and can have a given curvature over their respective bend arc lengths. The curvature of waveguide 150 can be opposite or reversed relative to the curvature of waveguide 154. Thus, waveguides 150 and 154 can trace smooth curves with continuous turning tangents at their inner and outer radii over their respective lengths. In embodiments of this disclosure, waveguides 150 and 154 can be arranged symmetrically relative to waveguide 152. In another embodiment of this disclosure, waveguides 150, 152, and 154 may have substantially equal lengths.

[0056] Waveguides 150, 152, and 154 may also have a substantially constant width dimension along their respective longitudinal axes (e.g., longitudinal axis 160L of waveguide 152). In embodiments of this disclosure, each of waveguides 150, 152, and 154 may have substantially equal width dimensions.

[0057] Waveguides 150, 152, and 154 may comprise materials having a composition similar to that of waveguide core 132. For example, waveguides 150, 152, and 154 may comprise dielectric materials having a refractive index substantially similar to that of waveguide core 132. In embodiments of this disclosure, waveguides 150, 152, and 154 may comprise silicon nitride. In another embodiment of this disclosure, waveguides 150, 152, and 154 may comprise nitrogen-doped silicon carbide. In yet another embodiment of this disclosure, waveguides 150, 152, and 154 may comprise hydrogenated nitrogen-doped silicon carbide. In yet another embodiment of this disclosure, waveguides 150, 152, and 154 may comprise dielectric materials with a refractive index greater than or equal to 1.65 and lower than that of waveguide 102.

[0058] Waveguides 150, 152, and 154 can be deposited using deposition techniques including plasma-enhanced chemical vapor deposition, and then patterned during back-end fabrication processes using patterning techniques including photolithography and etching. In embodiments of this disclosure, each of waveguides 150, 152, and 154 can have a substantially uniform and equal thickness. Alternatively, waveguides 150, 152, and 154 can include portions with different thicknesses. For example, one or more of waveguides 150, 152, and 154 can obtain an inverted "T" profile across their respective lateral axes to achieve a similar profile to... Figure 2C The outline is similar to that of waveguide 102 shown.

[0059] Figures 7A to 7D It is based on the embodiments of this disclosure. Figure 5A An exemplary top view of the stacked edge coupler 100 during the subsequent manufacturing phase. Figure 8A and 8B It is based on the general outline of embodiments of this disclosure. Figure 7A The corresponding lines 8A-8A and 8B-8B in the diagram show cross-sectional views of the stacked edge coupler 100. The dielectric layer 162 can be arranged above the dielectric stack 146 and waveguides 150, 152, and 154.

[0060] The dielectric layer 162 may include a side edge 164, which may be disposed above the side edge 120 of the buried insulating layer 116. In embodiments of this disclosure, the side edge 164 of the dielectric layer 162 may be substantially coplanar with the side edge 130 of the dielectric layer 128 and the side edge 120 of the buried insulating layer 116.

[0061] The dielectric layer 162 may include a dielectric material, such as silicon dioxide or a dielectric material with a dielectric constant lower than that of silicon dioxide. The dielectric layer 162 may be deposited during back-end processing using deposition techniques including plasma-enhanced chemical vapor deposition.

[0062] At least one waveguide 166 may be disposed above the dielectric layer 162. For example, as Figure 7A and 7B As shown, a waveguide 166 may be disposed above the dielectric layer 162. The waveguide 166 has a defined length and may terminate with an end face 168 and an end face 170 disposed laterally opposite to the end face 168. In embodiments of this disclosure, the end faces 168 and 170 of the waveguide 166 may be substantially planar and substantially parallel to each other. In another embodiment of this disclosure, the end face 168 of the waveguide 166 may be substantially coplanar with the end face 104 of the waveguide 102 and the end face 140 of the waveguide core 132. In another embodiment of this disclosure, the end face 168 of the waveguide 166 may be substantially coplanar with the side edge 130 of the dielectric layer 128 and the side edge 120 of the buried insulating layer 116.

[0063] Waveguide 166 can also be arranged above waveguide core 132, and can have an arrangement that overlaps with waveguide core 132; for illustrative purposes, in Figures 7A to 7D The outlines of waveguide core 132 and waveguide 102 are schematically shown using dotted and dashed lines, respectively. For example, waveguide 166 may have a longitudinal axis 172L, and the longitudinal axis 172L may be arranged above and substantially parallel to the longitudinal axis 160L of waveguide 152, such as... Figure 8A As shown. Waveguide 166 can have a length not longer than the length L1 of waveguide 102. For example, the length of waveguide 166 can be substantially equal to the length of portion 110 of waveguide 102, such as... Figure 7A and 8A As shown. Alternatively, waveguide 166 may have a shorter length than the length of portion 110 of waveguide 102, such as Figure 7B As shown.

[0064] In another example, more than one waveguide 166 can be arranged above the dielectric layer 162, for example... Figure 7C and 7D A pair of waveguides 166 are shown. At least one of the waveguides 166 may have an arrangement overlapping with the waveguide core 132. Each waveguide 166 has a defined length and may be terminated by an end face 168 and an end face 170 arranged laterally opposite to the end face 168. In embodiments of this disclosure, the end faces 168, 170 of each waveguide 166 may be substantially planar and may be substantially parallel to each other. In another embodiment of this disclosure, the end face 168 of each waveguide 166 may be substantially coplanar with the end face 140 of the waveguide core 132 and the end face 120 of the waveguide 102. In another embodiment of this disclosure, the end face 168 of each waveguide 166 may be substantially coplanar with the side edge 130 of the dielectric layer 128 and the side edge 120 of the buried insulating layer 116.

[0065] The pair of waveguides 166 can be offset above waveguides 150, 152, and 154, such that one waveguide 166 can be positioned above and between waveguides 150 and 152, while the other waveguide 166 can be positioned above and between waveguides 150 and 154. The pair of waveguides 166 can have substantially similar lengths. In embodiments of this disclosure, the pair of waveguides 166 can be arranged substantially parallel to each other. Alternatively, the waveguides 166 can be shaped into bends, similar to... Figure 5B Waveguides 150 and 154 are used in the design.

[0066] The length of each waveguide 166 may not be longer than the length L1 of waveguide 102. For example, the length of each waveguide 166 may be at most the same as the length of a portion 110 of waveguide 102. Alternatively, the length of each waveguide 166 may be shorter than the length of a portion 110 of waveguide 102, such as... Figure 7D As shown.

[0067] Waveguide 166 may include a material having a composition similar to that of waveguide core 132 and waveguides 150, 152, and 154. For example, waveguide 166 may include a dielectric material having a refractive index substantially similar to that of waveguide core 132 and waveguides 150, 152, and 154. In embodiments of this disclosure, waveguide 166 may include silicon nitride. In another embodiment of this disclosure, waveguide 166 may include nitrogen-doped silicon carbide. In yet another embodiment of this disclosure, waveguide 166 may include hydrogenated nitrogen-doped silicon carbide. In yet another embodiment of this disclosure, waveguide 166 may include a dielectric material with a refractive index greater than or equal to 1.65 and lower than that of waveguide 102. Waveguide 166 may be deposited using a deposition technique including plasma-enhanced chemical vapor deposition and subsequently patterned using a patterning technique including photolithography and etching processes during back-end fabrication processes.

[0068] The process continues, and an additional dielectric layer 174 is formed over dielectric layer 162 and waveguide 166. Dielectric layer 174 may include side edges 176, which may be substantially coplanar with side edges 120 of buried insulating layer 116, end face 104 of waveguide 102, and end face 140 of waveguide core 132.

[0069] As described in the above disclosure, a stacked edge coupler and a method for forming the same are provided. The stacked edge coupler may include a waveguide array disposed in the front-end, middle-end, and back-end fabrication regions of a photonic chip.

[0070] For example, waveguide 102 can be arranged in the front-end process region, and waveguide core 132 can be arranged in the middle-end process region. Waveguides 150, 152, 154, and 166 can be arranged in the back-end process region and form part of the back-end process stack 178. The corresponding end faces 104, 156, and 168 of waveguides 102, 150, 152, 154, and 166 and the end face 140 of waveguide core 132 can be substantially coplanar with each other to form the side edge 180 of the back-end process stack 178. The side edges 148, 164, and 176 of dielectric stack 146, dielectric layer 162, and dielectric layer 174 can also form part of the side edge 180 and can be substantially coplanar with the end faces 104, 156, and 168 of waveguides 102, 150, 152, 154, and 166 and the end face 140 of waveguide core 132.

[0071] One or more dielectric material layers, such as a moisture barrier, may be optionally arranged adjacent to the side edge 180 of the back-end process stack 178. These one or more dielectric layers may also extend to be arranged adjacent to the waveguide 102 and the waveguide core 132.

[0072] During the assembly phase, a light source (e.g., an optical fiber) may be laterally arranged adjacent to the side edge 180 of the back-end process stack 178 of the stacked edge coupler 100. Due to the arrangement of waveguides 150, 152, 154, 166 in the back-end process stack 178, the optical fiber may be arranged adjacent to the side edge 180, and the optical fiber may be placed above the base substrate 118 or in a slot or opening formed in the base substrate 118.

[0073] An array of waveguides 102, 150, 152, 154, and 166 surrounding waveguide core 132 can facilitate optical signal coupling to waveguide core 132 and effectively minimize optical signal loss due to leakage through SOI substrate 114. For example, waveguides 102, 150, 152, 154, and 166 can be used as auxiliary waveguides to facilitate effective coupling of optical signals from optical fiber to waveguide core 132. Furthermore, waveguide 102 can minimize optical signal loss through base substrate 118 by shielding optical signals from the base substrate 118.

[0074] The array of waveguides 150, 152, 154, and 166, together with dielectric stack 146, dielectric layer 162, and dielectric layer 174 (in different levels of back-end stack 178 arranged substantially coplanar with their respective end faces 156, 168, and their respective side edges 148, 164, and 176), can minimize diffraction or reflection of light at the operating wavelength and thus serve as an effective optical material and form a metamaterial.

[0075] The terms “top,” “bottom,” “above,” “below,” etc., used in the specification and claims (where applicable) are for descriptive purposes and are not necessarily used to describe permanent relative positions. It should be understood that such terms are interchangeable where appropriate, so that embodiments of the apparatus described herein can, for example, operate in orientations different from those shown or otherwise described herein.

[0076] Furthermore, in the following description, forming a first feature above or on a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which an additional feature may be formed between the first and third features such that the first and second features are not in direct contact.

[0077] Similarly, if a method is described herein as involving a series of steps, the order of these steps given herein is not necessarily the only order in which they can be performed, and some steps may be omitted, and / or other steps not described herein may be added to the method. Furthermore, the terms “comprising,” “including,” “having,” and any variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that includes a list of features is not necessarily limited to those features, but may include other features not expressly listed or inherent to the process, method, or apparatus. The phrase “in an embodiment” appearing herein does not necessarily refer to the same embodiment.

[0078] Furthermore, unless otherwise stated, all figures used in the specification and claims to indicate quantities, ratios and numerical properties, reaction conditions, etc., should be understood to be modified by the term "about" in all cases.

[0079] Furthermore, the approximate language used throughout the specification and claims can be used to modify any quantitative expression that allows for variation without altering its underlying functionality. Therefore, values ​​modified by one or more terms such as “approximate,” “about,” or “basically” are not limited to specified exact values. In some cases, approximate language may correspond to the precision of the instrument used to measure the value. In other cases, approximate language may correspond to the normal tolerance range of the semiconductor industry. For example, “basically coplanar” means substantially in the same plane within the normal tolerance range of the semiconductor industry, and “basically perpendicular” means an angle of 90 degrees plus or minus the normal tolerance range of the semiconductor industry.

[0080] While several exemplary embodiments have been set forth in the foregoing detailed description of the apparatus, it should be understood that many variations are possible. It should also be understood that the embodiments are merely examples and are not intended to limit the scope, applicability, size, or configuration of the apparatus in any way. Rather, the foregoing detailed description will provide a convenient guide for those skilled in the art to implement exemplary embodiments of the apparatus, and it should be understood that various changes may be made to the functionality and arrangement of the features and manufacturing methods described in the exemplary embodiments without departing from the scope of this disclosure set forth in the appended claims.

Claims

1. A stacked edge coupler, comprising: Insulating layer; A first auxiliary waveguide is located on the insulating layer; A waveguide core, located above the first auxiliary waveguide, the waveguide core including a tapered portion; as well as The back-end process stack, located above the waveguide core, includes: Side edges; Dielectric layer; and A second auxiliary waveguide is located on the dielectric layer and adjacent to the side edge, and the second auxiliary waveguide has an arrangement that overlaps with the tapered portion of the waveguide core. The first auxiliary waveguide and the second auxiliary waveguide facilitate the coupling of optical signals to the waveguide core.

2. The stacked edge coupler according to claim 1, wherein, The waveguide core has a lower refractive index than the first auxiliary waveguide.

3. The stacked edge coupler according to claim 1, wherein, The first auxiliary waveguide includes an end face, the tapered portion of the waveguide core includes an end face, and the end face of the tapered portion of the waveguide core is substantially coplanar with the end face of the first auxiliary waveguide.

4. The stacked edge coupler according to claim 1, wherein, The first auxiliary waveguide includes an end face, the insulating layer includes a side edge, and the side edge of the insulating layer is substantially coplanar with the end face of the first auxiliary waveguide.

5. The stacked edge coupler according to claim 1, wherein, The first auxiliary waveguide includes an end face, and the end face of the first auxiliary waveguide is substantially coplanar with the side edge of the back-end process stack.

6. The stacked edge coupler according to claim 3, wherein, The first auxiliary waveguide includes a first portion, and the first portion of the first auxiliary waveguide gradually tapers toward the end face of the first auxiliary waveguide and terminates at the end face of the first auxiliary waveguide.

7. The stacked edge coupler according to claim 6, wherein, The first auxiliary waveguide includes a longitudinal axis and also includes a second portion, which is arranged laterally adjacent to the first portion and extends along the longitudinal axis of the first auxiliary waveguide.

8. The stacked edge coupler according to claim 1, wherein, The first auxiliary waveguide includes a transverse axis and has a thickness dimension that varies with position along the transverse axis.

9. The stacked edge coupler according to claim 1, wherein, The first auxiliary waveguide comprises a single-crystal semiconductor material.

10. A stacked edge coupler, comprising: An insulating layer having side edges; A first auxiliary waveguide is located on the insulating layer, the first auxiliary waveguide including a tapered portion having an end face, and the end face being substantially coplanar with the side edge of the insulating layer; A waveguide core located above the first auxiliary waveguide, the waveguide core including a tapered portion having side edges, and the side edges of the tapered portion being located above the end face of the first auxiliary waveguide; as well as The back-end process stack, located above the waveguide core, includes: Side edges; Dielectric layer; Second auxiliary waveguide; Third auxiliary waveguide; and A fourth auxiliary waveguide is laterally arranged between the second and third auxiliary waveguides. The second, third, and fourth auxiliary waveguides are arranged on the dielectric layer and adjacent to the side edge, and the fourth auxiliary waveguide has an arrangement that overlaps with the tapered portion of the waveguide core. The first auxiliary waveguide, the second auxiliary waveguide, the third auxiliary waveguide, and the fourth auxiliary waveguide facilitate the coupling of optical signals to the waveguide core.

11. The stacked edge coupler of claim 10, wherein, The second auxiliary waveguide has an end face adjacent to the side edge of the back-end process stack, the third auxiliary waveguide has an end face adjacent to the side edge of the back-end process stack, and the fourth auxiliary waveguide has an end face adjacent to the back-end process stack, and the end faces of the second, third, and fourth auxiliary waveguides are substantially coplanar with the side edge of the insulating layer.

12. The stacked edge coupler of claim 10, wherein, The first auxiliary waveguide has a length, and the waveguide core has a length longer than the length of the first auxiliary waveguide.

13. The stacked edge coupler of claim 10, wherein, The first auxiliary waveguide has a length, and the fourth auxiliary waveguide has a length not longer than the length of the first auxiliary waveguide.

14. The stacked edge coupler of claim 10, wherein, The second auxiliary waveguide and the third auxiliary waveguide are offset above the first auxiliary waveguide.

15. The stacked edge coupler of claim 10, wherein, The waveguide core, the first auxiliary waveguide, the second auxiliary waveguide, the third auxiliary waveguide, and the fourth auxiliary waveguide have refractive indices, and the refractive index of the first auxiliary waveguide is higher than the corresponding refractive indices of the second, third, and fourth auxiliary waveguides.

16. The stacked edge coupler of claim 10, further comprising a base substrate, wherein the insulating layer and the base substrate are part of a semiconductor-on-insulator substrate.

17. The stacked edge coupler of claim 16, wherein, The first auxiliary waveguide is part of the device layer of the semiconductor-on-insulator substrate.

18. A method of forming a stacked edge coupler, comprising: A first auxiliary waveguide is formed on the insulating layer; A waveguide core is formed above the first auxiliary waveguide, the waveguide core including a tapered portion; as well as A back-end process stack is formed above the waveguide core, the back-end process stack comprising: Side edges; Dielectric layer; and A second auxiliary waveguide is formed on the dielectric layer and adjacent to the side edge, and the second auxiliary waveguide has an arrangement that overlaps with the tapered portion of the waveguide core. The first auxiliary waveguide and the second auxiliary waveguide facilitate the coupling of optical signals to the waveguide core.

19. The method of claim 18, further comprising patterning a device layer of a semiconductor-on-insulator substrate to form the first auxiliary waveguide.

20. The method according to claim 18, wherein, Forming the waveguide core includes: Deposited dielectric materials; and The dielectric material is patterned through a mid-stage process.

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