Display device

Abstract

Disclosed is a display device including: a first substrate having an upper surface that is a display surface and a lower surface that faces the upper surface; an active layer provided on the lower surface of the first substrate and including a channel portion, a first connection portion connected to one side of the channel portion, and a second connection portion connected to the other side of the channel portion; a gate electrode provided below the active layer and overlapping the channel portion; a second substrate provided below the gate electrode; a liquid crystal layer provided between the first substrate and the second substrate; and a backlight provided below the second substrate.

Description

[0001] Cross-reference of related applications

[0002] This application claims the benefit of Korean Patent Application No. 10-2022-0038954, filed on March 29, 2022, and Korean Patent Application No. 10-2022-0132652, filed on October 14, 2022, which are incorporated herein by reference as if fully set forth herein. Technical Field

[0003] This disclosure relates to a display device. Background Technology

[0004] Display devices, such as liquid crystal displays or organic light-emitting devices, include substrates equipped with thin-film transistors as switching or driving elements.

[0005] Individual driving elements are connected to the outside of the substrate to drive thin-film transistors, thereby increasing the size of the bezel of the display device.

[0006] Conventionally, in order to reduce or eliminate the bezel size of a display device, the substrate is placed upside down, such that the opposite surface of the substrate on which thin-film transistors are not disposed is configured as the display surface.

[0007] However, for example, when the substrate is inverted in a liquid crystal display device, light emitted from a backlight located below the substrate enters the channel portion of the active layer constituting the thin-film transistor and degrades the channel portion. Furthermore, to solve this problem, a light-shielding layer can be added to cover the channel portion of the active layer, but in this case, the aperture ratio of the display device decreases. Summary of the Invention

[0008] This disclosure is made in view of the above-mentioned problems, and one object of this disclosure is to provide a display device that can prevent light from directly irradiating the channel portion of the active layer even when the substrate equipped with thin-film transistors is set up to be inverted.

[0009] According to one aspect of this disclosure, the above and other objectives can be achieved by providing a display device comprising: a first substrate having an upper surface and a lower surface facing the upper surface, the upper surface including a display surface; an active layer disposed on the lower surface of the first substrate, the active layer including a channel portion, a first connection portion connected to a first side of the channel portion, and a second connection portion connected to a second side of the channel portion; a gate electrode disposed below the active layer and overlapping the channel portion; a second substrate disposed below the gate electrode; a liquid crystal layer disposed between the first substrate and the second substrate; and a backlight source disposed below the second substrate, wherein the gate electrode is disposed between the channel portion and the backlight source.

[0010] According to another aspect of this disclosure, the above and other objectives can be achieved by providing a display device comprising: a first substrate having an upper surface and a lower surface facing the upper surface, the upper surface including a display surface; an active layer disposed on the lower surface of the first substrate, the active layer including a channel portion, a first connection portion connected to a first side of the channel portion, and a second connection portion connected to a second side of the channel portion; a gate electrode spaced apart from the active layer and overlapping the channel portion; a source electrode connected to the first connection portion of the active layer; a drain electrode connected to the second connection portion of the active layer; and a pixel electrode connected to the drain electrode, wherein the active layer is disposed between the lower surface of the first substrate and the gate electrode. Attached Figure Description

[0011] The above and other objects, features and advantages of this disclosure will become clearer from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0012] Figure 1 This is a plan view illustrating a display device according to an embodiment of the present disclosure;

[0013] Figure 2 This is a schematic cross-sectional view of a display device according to an embodiment of the present disclosure, which corresponds to the view along... Figure 1 A sectional view of line A-A';

[0014] Figure 3 This is a schematic cross-sectional view of a display device according to another embodiment of the present disclosure, which corresponds to the view along... Figure 1 A sectional view of line A-A';

[0015] Figure 4 This is a schematic cross-sectional view of a display device according to another embodiment of the present disclosure, which corresponds to the view along... Figure 1 A sectional view of line A-A';

[0016] Figure 5 This is a schematic cross-sectional view of a display device according to another embodiment of the present disclosure, which corresponds to the view along... Figure 1 A sectional view of line A-A';

[0017] Figure 6 This is a plan view illustrating a display device according to another embodiment of the present disclosure;

[0018] Figure 7 This is a plan view illustrating a display device according to another embodiment of the present disclosure;

[0019] Figure 8 This is a plan view illustrating a display device according to another embodiment of the present disclosure;

[0020] Figure 9This is a plan view illustrating a display device according to another embodiment of the present disclosure;

[0021] Figure 10 This is a plan view illustrating a display device according to another embodiment of the present disclosure;

[0022] Figure 11 This is a plan view illustrating a display device according to another embodiment of the present disclosure;

[0023] Figure 12 This is a plan view illustrating a display device according to another embodiment of the present disclosure;

[0024] Figure 13 This is a schematic cross-sectional view of a display device according to another embodiment of the present disclosure, which corresponds to the view along... Figure 12 A sectional view of line A-A';

[0025] Figure 14 This is a schematic cross-sectional view of a display device according to another embodiment of the present disclosure, which corresponds to the view along... Figure 12 A sectional view of line A-A';

[0026] Figure 15 This is a plan view illustrating a display device according to another embodiment of the present disclosure. Detailed Implementation

[0027] Reference will now be made in detail to embodiments of this disclosure, examples of which may be illustrated in the accompanying drawings. In the following description, detailed descriptions of well-known functions or configurations relevant to this document will be omitted where such description would be deemed unnecessary to obscure the essential points of the inventive concept. The described progression of processing steps and / or operations is exemplary; however, the order of steps and / or operations is not limited to the order set forth herein, and may be varied as is known in the art, except for steps and / or operations that must occur in a specific order. Throughout the specification, the same reference numerals denote the same elements. The names of the various elements used in the following description are chosen solely for convenience of writing the specification and may therefore differ from the names used in actual products.

[0028] The advantages and features of this disclosure and its implementation methods will be illustrated by the following embodiments described with reference to the accompanying drawings. However, this disclosure may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of this disclosure to those skilled in the art.

[0029] The shapes, dimensions, ratios, angles, and numbers disclosed in the accompanying drawings used to describe embodiments of this disclosure are merely examples, and therefore, embodiments of this disclosure are not limited to the details illustrated. Throughout the drawings, the same reference numerals denote the same elements. In the following description, detailed descriptions of relevant known functions or configurations will be omitted where such descriptions are determined to unnecessarily obscure the essence of this disclosure. Where the terms “comprising,” “including,” and “having” are used in this specification, another component may be added unless “only” is used. Unless the opposite meaning is indicated, singular terms may include plural forms.

[0030] When interpreting a component, even without an explicit description, the component is interpreted as including a range of error.

[0031] When describing positional relationships, for example, when the positional relationship between two components is described as “above,” “over,” “below,” and “adjacent,” one or more other components may be positioned between the two components, unless more restrictive terms such as “exactly” or “directly” are used.

[0032] When describing temporal relationships, such as when time sequence is described as "after", "following", "next" and "before", discontinuous situations may be included unless more restrictive terms such as "exactly", "immediately" or "directly" are used.

[0033] It will be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, without departing from the scope of this disclosure, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element.

[0034] In describing the elements of this disclosure, terms such as first, second, A, B, (a), (b), etc., may be used. Such terms are used only to distinguish the corresponding element from other elements, and the nature, order, or priority of the corresponding elements are not limited by the terms. It will be understood that when an element or layer is referred to as being "on" or "bonded" to another element or layer, it may be directly on or directly bonded to the other element or layer, or there may be intermediate elements or layers. Furthermore, it should be understood that when an element is disposed above or below another element, it may indicate that the elements are arranged in direct contact with each other, but it may also indicate that the elements are arranged not in direct contact with each other.

[0035] The term "at least one" should be understood to include any and all combinations of one or more of the associated listed elements. For example, "at least one of the first element, the second element, and the third element" means a combination of all elements proposed from two or more of the first element, the second element, and the third element, as well as the first element, the second element, or the third element.

[0036] As used herein, the term "encircle" includes at least partially encircling and completely encircling one or more associated elements. Similarly, the term "cover" as used herein includes at least partially covering and completely covering one or more associated elements. For example, if an encapsulation layer encircles a dam, it can be interpreted as the encapsulation layer at least partially encircling the dam. However, in some embodiments, the encapsulation layer may completely encircle the dam. The meaning of the term "encircle" as used herein may be further specified based on the associated drawings and embodiments. In this disclosure, the terms "encircle," "at least partially encircling," "completely encircling," etc., are used. As defined above, when the term "encircle" is used only in embodiments, it may refer to at least partially encircling or completely encircling one or more associated elements. The same applies to the term "cover."

[0037] Features of the various embodiments of this disclosure may be combined or integrated with each other in part or in whole, and may interact and drive each other differently as will be fully understood by those skilled in the art. Embodiments of this disclosure may be implemented independently of each other, or may be implemented together in a mutually dependent relationship.

[0038] In the following, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. When adding reference numerals to the elements in each drawing, the same reference numerals may refer to the same element even if the same element is illustrated in other drawings. In addition, for ease of description, the scale of each element illustrated in the drawings differs from the actual scale, and therefore, the scope is not limited to the scale illustrated in the drawings.

[0039] Figure 1 This is a schematic plan view illustrating a display device according to an embodiment of the present disclosure, which illustrates only one sub-pixel of the display device.

[0040] like Figure 1 As shown, a display device according to an embodiment of the present disclosure includes a gate line 150, a data line 110, a thin film transistor T, a first light-shielding layer 115, a connection electrode 153, a pixel electrode 190, and a second light-shielding layer 210.

[0041] Gate line 150 and data line 110 are arranged to intersect each other to define a pixel region. Gate line 150 may be arranged in a first direction (e.g., horizontal direction), and data line 110 may be arranged in a second direction (e.g., vertical direction).

[0042] The thin-film transistor T is disposed near the intersection region between the gate line 150 and the data line 110. The thin-film transistor T includes a gate 151, an active layer 130, a source 111, and a drain 152.

[0043] The gate 151 can protrude from the gate line 150. Specifically, the gate 151 protrudes from the gate line 150 in a second direction (e.g., the vertical direction). The gate 151 and the gate line 150 can be formed integrally on the same layer using the same material through the same process.

[0044] The active layer 130 is configured to overlap with the gate 151, the source 111, and the drain 152. Specifically, one end of the active layer 130 overlaps with the source 111, the other end of the active layer 130 overlaps with the drain 152, and the portion between one end and the other end of the active layer 130 overlaps with the gate 151.

[0045] The source electrode 111 is formed as part of the data line 110. However, the invention is not limited thereto; the source electrode 111 may protrude from the data line 110. The source electrode 111 and the data line 110 may be formed integrally. The width of the source electrode 111 in a first direction (e.g., the horizontal direction) may be greater than the width of other portions of the data line 110 except for the source electrode 111, to facilitate electrical connection between the source electrode 111 and the active layer 130. The source electrode 111 may be connected to the active layer 130 through a first contact hole ch1. Furthermore, the source electrode 111 may be connected to the connection electrode 153 through a second contact hole ch2.

[0046] The drain 152 may be located near the gate 151. The drain 152 is connected to the pixel electrode 190 through the third contact hole ch3.

[0047] The first light-shielding layer 115 overlaps with at least a portion of the gate 151, particularly with a portion of the active layer 130, and more specifically, with the channel portion 131 of the active layer 150. The first light-shielding layer 115 may overlap with the channel portion 131 of the active layer 130 to prevent light from incident on the channel portion 131. The first light-shielding layer 115 may be formed not to overlap with the gate line 150 and the data line 110. Furthermore, the first light-shielding layer 115 may be formed not to overlap with the source 111 and the drain 152. The first light-shielding layer 115 may be formed of a conductive material.

[0048] The connecting electrode 153 is formed to overlap with the source electrode 111 and the active layer 130. The connecting electrode 153 can connect the source electrode 111 and the active layer 130 to each other; for this purpose, the connecting electrode 153 can be connected to each of the source electrode 111 and the active layer 130. In particular, the connecting electrode 153 can be connected to the source electrode 111 through the second contact hole ch2.

[0049] Pixel electrode 190 is disposed in the pixel region defined by gate line 150 and data line 110. Pixel electrode 190 is connected to drain 152 through third contact hole ch3. Pixel electrode 190 may have a structure including multiple slits, thus forming a fringe field between pixel electrode 190 and common electrode (not shown).

[0050] The second light-shielding layer 210 can overlap with the data line 110 while extending in a second direction that is the same as the arrangement direction of the data line 110. The width of the second light-shielding layer 210 in the horizontal direction can be greater than the width of the data line 110 in the horizontal direction, so that the entire portion of the data line 110 can overlap with the second light-shielding layer 210. The light-shielding layer 210 is configured to overlap with the data line 110, and it is a boundary region between sub-pixels emitting different colors, thereby preventing light from mixing between sub-pixels emitting different colors.

[0051] According to embodiments of this disclosure, since the channel portion 131 of the active layer 130 is covered by the first light-shielding layer 115 and the gate 151, the second light-shielding layer 210 does not need to additionally cover the channel portion 131 of the active layer 130. Therefore, the second light-shielding layer 210 can be formed so as not to overlap with the channel portion 131 of the active layer 130, the first light-shielding layer 115, and the gate 151. Furthermore, the second light-shielding layer 210 can be formed so as not to overlap with the gate line 150.

[0052] Figure 2 This is a schematic cross-sectional view of a display device according to an embodiment of the present disclosure, which corresponds to the view along... Figure 1 A sectional view of line A-A'.

[0053] like Figure 2 As shown, a display device according to an embodiment of the present disclosure includes a first substrate 100, a second substrate 200, and a backlight 300.

[0054] The first substrate 100 may be formed from a thin-film transistor substrate, and the second substrate 200 may be formed from a color filter substrate.

[0055] The first substrate 100 can be disposed above the second substrate 200 and the backlight 300, the second substrate 200 can be disposed between the first substrate 100 and the backlight 300, and the backlight 300 can be disposed below the first substrate 100 and the second substrate 200. Therefore, light emitted from the backlight 300 passes sequentially through the second substrate 200 and the first substrate 100 and is then emitted to the outside through the upper surface of the first substrate 100. The upper surface of the first substrate 100 becomes the surface on which the image is displayed.

[0056] At least one of the first substrate 100 and the second substrate 200 may be made of glass or plastic. At least one of the first substrate 100 and the second substrate 200 may be made of a transparent plastic with flexible properties, such as polyimide. When polyimide is used as at least one of the first substrate 100 and the second substrate 200, heat-resistant polyimide capable of withstanding high temperatures may be used, taking into account the high-temperature deposition process performed on the first substrate 100 and the second substrate 200.

[0057] A first light-shielding layer 115, a data line 110, and a source electrode 111 are disposed on the lower surface of the first substrate 100. The first light-shielding layer 115, the data line 110, and the source electrode 111 can be patterned on the same layer using the same process and the same material. Therefore, the first light-shielding layer 115 is made of a conductive material. The data line 110 and the source electrode 111 are formed integrally and are insulated from the first light-shielding layer 115. The upper surface of the first substrate 100 corresponds to the display surface, and the lower surface of the first substrate 100 corresponds to the surface opposite to the display surface.

[0058] A buffer layer 120 is formed on the bottom surface of the first light-shielding layer 115, the data line 110, and the source electrode 111. The buffer layer 120 protects the active layer 130 by blocking air and moisture. The buffer layer 120 can be formed of an inorganic insulating material such as silicon oxide, silicon nitride, or metal oxide, but is not limited thereto, and can also be formed of an organic insulating material. The buffer layer 120 can be formed of a single layer or multiple layers.

[0059] The buffer layer 120 is provided with a first contact hole ch1 and a second contact hole ch2. The first contact hole ch1 and the second contact hole ch2 can be spaced apart from each other, and a predetermined area of ​​the source electrode 111 can be exposed by the first contact hole ch1 and the second contact hole ch2.

[0060] An active layer 130 is formed on the lower surface of the buffer layer 120. The active layer 130 may include a channel portion 131, a first connecting portion 132, and a second connecting portion 133. The first connecting portion 132 may be connected to one side of the channel portion 131, and the second connecting portion 133 may be connected to the other side of the channel portion 131.

[0061] The channel portion 131 is made of semiconductor material and overlaps with the first light-shielding layer 115 and the gate 151. Specifically, the first light-shielding layer 115 is disposed above the channel portion 131, and the gate 151 is disposed below the channel portion 131. Therefore, external light incident downward toward the channel portion 131 is blocked by the first light-shielding layer 115, and light emitted from the backlight 300 that is incident upward toward the channel portion 131 after passing through the second substrate 200 is blocked by the gate 151.

[0062] The first connection portion 132 and the second connection portion 133 can be made conductive by selectively conductiveizing the semiconductor material. The first connection portion 132 and the second connection portion 133 may not overlap with the gate 151. The first connection portion 132 and the second connection portion 133 have stronger conductivity than the channel portion 131, and each of them can be used as wiring or a source / drain. The first connection portion 132 can be connected to the upper source 111 through a first contact hole ch1 provided in the buffer layer 120, and the second connection portion 133 can be directly connected to the lower drain 152.

[0063] The active layer 130 may contain a semiconductor material, such as an oxide semiconductor material. For example, the oxide semiconductor material is an oxide of IZO (InZnO), IGO (InGaO), ITO (InSnO), IGZO (InGaZnO), IGZTO (InGaZnSnO), GZTO (GaZnSnO), GZO (GaZnO), ITZO (InSnZnO), and FIZO (FeInZnO).

[0064] A gate insulating layer 140 is formed on the lower surface of the active layer 130 (particularly on the lower surface of the channel portion 131 of the active layer 130). The gate insulating layer 140 insulates the active layer 130 from the gate 151. The gate insulating layer 140 may be formed with the same pattern as the gate 151, but is not limited thereto. The gate insulating layer 140 may overlap with the channel portion 131 and may not overlap with the first connection portion 132 and the second connection portion 133. Alternatively, the gate insulating layer 140 may overlap with the channel portion 131, a portion of the first connection portion 132, and a portion of the second connection portion 133.

[0065] A gate 151 is formed on the lower surface of the gate insulating layer 140, and a connection electrode 153 and a drain electrode 152 are formed on the lower surfaces of the first connection portion 132 and the second connection portion 133 of the active layer 130.

[0066] The gate 151, the connection electrode 153, and the drain 152 can be formed from the same material using the same process. The gate 151, the connection electrode 153, and the drain 152 can be formed from a single metal layer or from multiple metal layers.

[0067] The gate 151 is spaced apart from the active layer 130, and the gate insulating layer 140 is inserted between the gate 151 and the active layer 130. The gate 151 is formed to overlap with the channel portion 131 of the active layer 130 and the first light-shielding layer 115.

[0068] The connecting electrode 153 can connect the source electrode 111 to the first connection portion 132 of the active layer 130. Although the source electrode 111 and the first connection portion 132 of the active layer 130 are directly connected through the first contact hole ch1, the electrical connection characteristics between the source electrode 111 and the first connection portion 132 of the active layer 130 can be improved by additionally forming the connecting electrode 153. However, the connecting electrode 153 can also be omitted. One side of the connecting electrode 153 contacts the source electrode 111 through the second contact hole ch2 provided in the buffer layer 120, and the other side of the connecting electrode 153 is directly provided on the first connection portion 132 of the active layer 130 to contact the lower surface of the first connection portion 132. Although not shown, the gate insulating layer 140 can be additionally provided on the upper surface of the connecting electrode 153, and in this case, the gate insulating layer 140 additionally provided on the upper surface of the connecting electrode 153 does not cover at least a portion of the second contact hole ch2, so that the connecting electrode 153 contacts the source electrode 111 through the second contact hole ch2. Furthermore, the gate insulating layer 140 disposed on the upper surface of the connection electrode 153 is configured not to cover at least a portion of the first connection portion 132 of the active layer 130, so that the connection electrode 153 can contact the first connection portion 132 of the active layer 130.

[0069] The drain 152 is directly disposed on the bottom surface of the second connection portion 133 of the active layer 130 to contact the bottom surface of the second connection portion 133. Therefore, the drain 152 is located below the active layer 130. On the other hand, the source 111 is located above the active layer 130 and contacts the upper surface of the first connection portion 132 of the active layer 130. Therefore, the source 111 can be located between the first substrate 100 and the active layer 130, and the drain 152 can be located between the active layer 130 and the pixel electrode 190. As described above, the drain 152 and the source 111 are disposed in different locations and can be made of different materials. Although not shown, a gate insulating layer 140 can be additionally disposed on the upper surface of the drain 152, and in this case, the gate insulating layer 140 additionally disposed on the upper surface of the drain 152 may not cover at least a portion of the second connection portion 133 of the active layer 130, so that the drain 152 can contact the second connection portion 132 in the active layer 130.

[0070] A passivation layer 161 is formed on the bottom surface of the gate 151, the connecting electrode 153 and the drain 152, and a planarization layer 162 is formed on the bottom surface of the passivation layer 161.

[0071] The passivation layer 161 may include a single layer or multiple layers comprising inorganic insulating material and / or organic insulating material, and the planarization layer 162 may be formed of an organic insulating material that is thicker than the passivation layer 161.

[0072] A third contact hole ch3 is provided in the passivation layer 161 and the planarization layer 162 so that the lower surface of the drain electrode 152 can be exposed by the third contact hole ch3.

[0073] A common electrode 170 is formed on the lower surface of the planarization layer 162. The common electrode 170 is made of a transparent conductive material and is not formed in the third contact hole ch3 region to prevent short circuit with the pixel electrode 190 in the third contact hole ch3. Therefore, the common electrode 170 can be formed on the entire lower surface of the planarization layer 162 except for the third contact hole ch3 region.

[0074] A common wiring 175 is formed on the lower surface of the common electrode 170. Since the common wiring 175 can be made of a metallic material, the low resistance problem of the common electrode 170 can be improved. The common wiring 175 is formed to overlap with the data line 110, so that the aperture ratio is not reduced due to the addition of the common wiring 175.

[0075] An interlayer insulating layer 180 is formed on the lower surface of the common wiring 175. The interlayer insulating layer 180 is formed between the common electrode 170 and the pixel electrode 190 to insulate the common electrode 170 from the pixel electrode 190. The interlayer insulating layer 180 may extend along the side surface of the third contact hole ch3, but may be configured such that at least a portion of the drain 152 is exposed.

[0076] A pixel electrode 190 is formed on the lower surface of the interlayer insulating layer 180. The pixel electrode 190 extends along the third contact hole ch3 and is connected to the drain electrode 152.

[0077] A second light-shielding layer 210 is formed on the upper surface of the second substrate 200 (the surface facing the first substrate 100). The second light-shielding layer 210 may be formed of a black material, but is not limited thereto. The second light-shielding layer 210 may be formed to overlap with the data line 110 to prevent light mixing between sub-pixels in the region of the data line 110.

[0078] Color filters 221 and 222 are formed on the upper surface of the second light-shielding layer 210. Color filters 221 and 222 include a first color filter 221 that transmits light of a first color and a second color filter 222 that transmits light of a second color. The first color filter 221 is disposed in a first sub-pixel, and the second color filter 222 is disposed in a second sub-pixel. The first color filter 221 and the second color filter 222 can overlap each other in the data line 110 region, which serves as the boundary region between the first and second sub-pixels. Therefore, mixed light may occur in the data line 110 region, but since the light emitted from the backlight 300 is blocked by the second light-shielding layer 210, mixed light can be prevented in the data line 110 region.

[0079] As described above, since the light emitted from the backlight 300 can be blocked by the gate 151 to protect the channel portion 131 of the active layer 130, the second light-shielding layer 210 can be formed so as not to overlap with the gate 151 and the channel portion 131 of the active layer 130.

[0080] The backlight 300 emits light toward the second substrate 200, and various backlights known in the art, such as edge-type or direct-type, can be applied.

[0081] Light emitted from the backlight 300 passes through the second substrate 200 and reaches the gate 151 on the first substrate 100, but further travel is blocked by the gate 151, thus protecting the channel portion 131 of the active layer 130 on the gate 151.

[0082] Meanwhile, although not shown, a liquid crystal layer is additionally disposed between the first substrate 100 and the second substrate 200, and the liquid crystal layer can be sealed by a sealant disposed at the edges of the first substrate 100 and the second substrate 200. Furthermore, a spacer, such as a columnar spacer, can be disposed between the first substrate 100 and the second substrate 200 to maintain the cell gap.

[0083] Figure 3 This is a schematic cross-sectional view of a display device according to another embodiment of the present disclosure, which corresponds to the view along... Figure 1 A sectional view of line A-A'.

[0084] Figure 3 According to Figure 2 The display device is the same, except that the structure of the gate insulating layer 140 is changed. Therefore, the same reference numerals are assigned to the same configuration, and only the different configurations will be described below.

[0085] like Figure 3 As shown, according to another embodiment of the present disclosure, the gate insulating layer 140 is formed not only in the region between the gate 151 and the channel portion 131 of the active layer 130, but also on the lower surface of the first connection portion 132 of the active layer 130, the lower surface of the second connection portion 133 of the active layer 130, and the lower surface of the buffer layer 120.

[0086] Although not shown, but with Figure 2Similarly, the gate insulating layer 140 may be additionally disposed on the upper surface of the connection electrode 153. In this case, the gate insulating layer 140 additionally disposed on the upper surface of the connection electrode 153 is configured not to cover at least a portion of the second contact hole ch2, such that the connection electrode 153 contacts the source electrode 111 through the second contact hole ch2. Furthermore, the gate insulating layer 140 additionally disposed on the upper surface of the connection electrode 153 is configured not to cover at least a portion of the first connection portion 132 of the active layer 130, such that the connection electrode 153 can contact the first connection portion 132 of the active layer 130.

[0087] Furthermore, a gate insulating layer 140 may be additionally disposed on the upper surface of the drain 152. The gate insulating layer 140 additionally disposed on the upper surface of the drain 152 is configured not to cover at least a portion of the second connection portion 133 of the active layer 130, such that the drain 152 can contact the second connection portion 133 of the active layer 130.

[0088] Figure 4 This is a schematic cross-sectional view of a display device according to another embodiment of the present disclosure, which corresponds to the view along... Figure 1 A sectional view of line A-A'.

[0089] Figure 4 According to Figure 2 The display device is the same, except that a conductive layer 135 is additionally provided. Therefore, the same reference numerals are assigned to the same configuration, and only the different configurations will be described below.

[0090] like Figure 4 As shown, according to another embodiment of the present disclosure, a conductive layer 135 is formed on the lower surface of the first connection portion 132 of the active layer 130 and the lower surface of the second connection portion 133 of the active layer 130.

[0091] A conductive layer 135 disposed on the lower surface of the first connection portion 132 of the active layer 130 is disposed in the end region of the first connection portion 132 to contact the connection electrode 153 located below the conductive layer 135. Therefore, the conductive layer 135 is disposed between the lower surface of the first connection portion 132 of the active layer 130 and the upper surface of the connection electrode 153.

[0092] A conductive layer 135 is disposed on the lower surface of the second connection portion 133 of the active layer 130, and is disposed in the end region of the second connection portion 133 to contact the drain electrode 152 located below the conductive layer 135. Therefore, the conductive layer 135 is disposed between the lower surface of the second connection portion 133 of the active layer 130 and the upper surface of the drain electrode 152.

[0093] The conductive layer 135 is formed so as not to overlap with the channel portion 131 and the gate 151.

[0094] The conductive layer 135 can be made of a metallic material with excellent conductivity. According to another embodiment of this disclosure, the conductive layer 135 with excellent conductivity can be additionally provided to improve the response speed of the thin-film transistor.

[0095] Figure 5 This is a schematic cross-sectional view of a display device according to another embodiment of the present disclosure, which corresponds to the view along... Figure 1 A sectional view of line A-A'.

[0096] Figure 5 According to Figure 4 The display device is the same, except that the structure of the gate insulating layer 140 is changed. Therefore, the same reference numerals are assigned to the same configuration, and only the different configurations will be described below.

[0097] like Figure 5 As shown, the gate insulating layer 140 is formed not only in the region between the gate 151 and the channel portion 131 of the active layer 130, but also on the lower surface of the first connection portion 132 of the active layer 130, the lower surface of the second connection portion 133 of the active layer 130, and the lower surface of the buffer layer 120.

[0098] As described above, although not shown, the gate insulating layer 140 may be additionally disposed on a portion of the upper surface of the connection electrode 153, and may be additionally disposed on a portion of the upper surface of the drain electrode 152.

[0099] Figure 6 This is a plan view illustrating a display device according to another embodiment of the present disclosure.

[0100] Figure 6 According to Figure 1 The display device is the same as that of the other device, except that the first light-shielding layer 115 is electrically connected to the gate 151. Therefore, the same reference numerals are assigned to the same configuration, and only the different configurations will be described below.

[0101] according to Figure 6 The first light-shielding layer 115 extends to overlap with the gate line 150, and the first light-shielding layer 115 is connected to at least one of the gate line 150 and the gate 151 through the fourth contact hole ch4.

[0102] The fourth contact hole ch4 is disposed in the buffer layer 120 and the gate insulating layer 140, such that at least one of the gate line 150 and the gate 151 can extend through the fourth contact hole ch4 to contact the first light-shielding layer 115.

[0103] As described above, according to another embodiment of the present disclosure, since the first light-shielding layer 115 is electrically connected to the gate 151, the first light-shielding layer 115 can be used as a second gate, thereby obtaining a dual-gate structure.

[0104] Figure 7 This is a plan view illustrating a display device according to another embodiment of the present disclosure.

[0105] Figure 7 According to Figure 1 The display device is the same, except that the first light-shielding layer 115 is omitted. Therefore, the same reference numerals are assigned to the same configuration, and only the different configurations will be described below.

[0106] Reference Figure 2 The first light-shielding layer 115 prevents external light incident through the upper surface of the first substrate 100 (i.e., the surface displaying the image) from entering the channel portion 131 of the active layer 130. Simultaneously, the channel portion 131 of the active layer 130 can be primarily affected by light emitted from the backlight 300 rather than external light. Light emitted from the backlight 300 is blocked by the gate 151 to prevent light from incident on the channel portion 131 of the active layer 130. Therefore, as... Figure 7 As shown, the first light-shielding layer 115 can be omitted.

[0107] Figure 8 This is a plan view illustrating a display device according to another embodiment of the present disclosure. Hereinafter, a description will be given of the above-described... Figure 1 Different configurations are available.

[0108] like Figure 8As shown, a thin-film transistor T driving the first sub-pixel P1 is disposed in the first sub-pixel P1 and the adjacent second sub-pixel P2. Specifically, the gate 151 is configured as part of the gate line 150. That is, the portion of the gate line 150 that overlaps with the active layer 130 becomes the gate 151. The source 111 is disposed in the region of the second sub-pixel P2 and is configured as part of the data line 110 in the region of the second sub-pixel P2. The source 111 can be connected to the active layer 130 through a first contact hole ch1 disposed in the region of the second sub-pixel P2, and can be connected to the connection electrode 153 through a second contact hole ch2 disposed in the region of the second sub-pixel P2. Therefore, the connection electrode 153 is also disposed in the second sub-pixel P2. One end of the active layer 130 overlaps with the drain 152 disposed in the first sub-pixel P1, and the other end of the active layer 130 overlaps with the source 111 disposed in the second sub-pixel P2. The portion between one end and the other end of the active layer 130 extends from the first sub-pixel P1 to the second sub-pixel P2 and overlaps with the gate 151. Therefore, the end of the first connection portion of the active layer 130 connected to the source 111 is disposed in the second sub-pixel P2, the end of the second connection portion of the active layer 130 connected to the drain 152 is disposed in the first sub-pixel P1, and the channel portion of the active layer 130 overlapping with the gate 151 is disposed in the region overlapping with the gate line 150.

[0109] At the same time, despite Figure 8 The diagram shows a structure in which the pixel electrode 190 of the second sub-pixel P2 does not overlap with the gate line 150, although the pixel electrode 190 of the second sub-pixel P2 may overlap with the gate line 150.

[0110] exist Figure 8 In this embodiment, since the thin-film transistor T is disposed in the first sub-pixel P1 and the second sub-pixel P2, the aperture ratio of the display device can be improved.

[0111] Figure 8 The cross-sectional structure of the embodiment can be as described above. Figures 2 to 5 Various changes are shown.

[0112] Figure 9 This is a plan view illustrating a display device according to another embodiment of the present disclosure.

[0113] Figure 9 According to Figure 8 The display device is the same as that of the other device, except that the first light-shielding layer 115 is electrically connected to the gate 151. Therefore, the same reference numerals are assigned to the same configuration, and only the different configurations will be described below.

[0114] Reference Figure 9The first light-shielding layer 115 is connected to the gate line 150 through the fourth contact hole ch4. According to another embodiment of the present disclosure, since the first light-shielding layer 115 is electrically connected to the gate 151, the first light-shielding layer 115 can be used as a second gate, thereby obtaining a dual-gate structure.

[0115] Figure 10 This is a plan view illustrating a display device according to another embodiment of the present disclosure. Figure 10 According to the above Figure 8 The display device is the same, except that the first light-shielding layer 115 is omitted.

[0116] Figure 11 This is a plan view illustrating a display device according to another embodiment of the present disclosure.

[0117] Figure 11 With the above Figure 1 The difference is that the second light-shielding layer 210 overlaps with both the data line 110 and the gate line 150. (Refer to...) Figure 11 The second light-shielding layer 210 is configured not to overlap with the gate 151 and the drain 152, thereby reducing the problem of reduced aperture ratio of the display device due to the formation of the second light-shielding layer 210.

[0118] Figure 11 The cross-sectional structure of the embodiment can be as described above. Figures 2 to 5 Various changes are shown.

[0119] At the same time, although not shown, in Figures 8 to 10 In one embodiment, the second light-shielding layer 210 may overlap with the data line 110 and the gate line 150. In this case, the second light-shielding layer 210 may not overlap with the drain 152, thereby reducing the problem of reduced aperture ratio of the display device due to the formation of the second light-shielding layer 210.

[0120] Figure 12 This is a plan view illustrating a display device according to another embodiment of the present disclosure.

[0121] Figure 12 With the above Figure 1 The difference is that the second light-shielding layer 210 is omitted. For example... Figure 12 As shown, even without the second light-shielding layer 210, the problem of light mixing between adjacent sub-pixels can be prevented, which will be described later with reference to the cross-sectional view. Meanwhile, in the above... Figures 6 to 10 In some embodiments, the second light-shielding layer 210 may be omitted.

[0122] Figure 13 This is a schematic cross-sectional view of a display device according to another embodiment of the present disclosure, which corresponds to the view along... Figure 12 A sectional view of line A-A'.

[0123] like Figure 13 As shown, a display device according to another embodiment of the present disclosure includes a first substrate 100, a second substrate 200, and a backlight 300.

[0124] First substrate 100 and Figure 2 The first substrate 100 is the same, except that it additionally includes color filters 221 and 222. Therefore, the same reference numerals are assigned to the same configuration, and only the different configurations will be described below.

[0125] Color filters 221 and 222 are disposed between passivation layer 161 and planarization layer 162. First color filter 221 is disposed in first sub-pixel, and second color filter 222 is disposed in second sub-pixel. First color filter 221 and second color filter 222 may overlap each other in the data line 110 region, which serves as the boundary region between the first and second sub-pixels.

[0126] When light emitted from the backlight 300 passes through color filters 221 and 222, mixed light may occur in the boundary region between the first sub-pixel and the second sub-pixel. Since color filters 221 and 222 are formed on the first substrate 100 and are close to the data line 110, the propagation of mixed light can be blocked by the data line 110, thus reducing the problem of mixed light. Therefore, the second light-shielding layer 210 for preventing mixing can be omitted from the second substrate 200.

[0127] Figure 14 This is a schematic cross-sectional view of a display device according to another embodiment of the present disclosure, which corresponds to the view along... Figure 12 A cross-sectional view along line AA.

[0128] Figure 14 With the above Figure 13 The difference lies in the change in the configuration of the second substrate 200. For example... Figure 14 As shown, a spacer 230, more specifically a columnar spacer 230, is provided on the upper surface of the second substrate 200. The columnar spacer 230 can be configured to maintain the cell gap between the first substrate 100 and the second substrate 200 and to perform a light-blocking function. Therefore, the columnar spacer 230 contains a light-shielding material.

[0129] The columnar spacer 230 is formed to overlap with the data line 110 of the first substrate 100, and in particular, it can extend in the extending direction of the data line 110. That is, the columnar spacer 230 can have the same... Figure 1The second light-shielding layer 210 has the same pattern. In some cases, the columnar spacer 230 may extend in the extension direction of the gate line 150 while overlapping with the gate line 150 of the first substrate 100.

[0130] Although not shown in detail, but Figure 13 and Figure 14 In the embodiments, the configuration of the first substrate 100, excluding color filters 221 and 222, can be as follows: Figures 3 to 5 Various changes are shown.

[0131] Figure 15 This is a plan view illustrating a display device according to another embodiment of the present disclosure.

[0132] like Figure 15 As shown, a display device according to another embodiment of the present disclosure includes a first substrate 100, a second substrate 200, and a driving unit 400.

[0133] The first substrate 100 constitutes the upper substrate, and the second substrate 200 constitutes the lower substrate. The length of the first substrate 100 may be longer than the length of the second substrate 200, so a portion of the lower surface of the first substrate 100 may be exposed and not covered by the second substrate 200. Electrode pads are provided on the exposed portion of the lower surface of the first substrate 100. The configuration of the first substrate 100 and the second substrate 200 is the same as that in the various embodiments described above, and therefore, a repeated description thereof will be omitted.

[0134] The driving unit 400 is mounted on the lower surface of the first substrate 100, on the portion not covered by the second substrate 200, and is electrically connected to the electrode pads. The driving unit 400 may include a flexible printed circuit (FPC) film and a printed circuit board (PCB). A chip can be formed on the flexible printed circuit (FPC) film to form a chip-on-film (COF) structure. Alternatively, a chip can be formed on the first substrate 100 to form a chip-on-glass (COG) structure.

[0135] The above embodiments relate to liquid crystal display devices, and this disclosure may include other display devices having a structure in which the thin-film transistor substrate is inverted.

[0136] Therefore, this disclosure may have the following advantages.

[0137] According to embodiments of this disclosure, since the channel portion of the active layer disposed on the first substrate is covered by the gate, it is not necessary to form a separate light-shielding layer on the second substrate to cover the channel portion of the active layer, thereby improving the aperture ratio of the display device.

[0138] According to embodiments of the present disclosure, since the second light-shielding layer disposed on the second substrate does not need to be configured to overlap with the thin-film transistor region disposed on the first substrate, the second light-shielding layer can be formed to overlap only with the data line or with both the data line and the gate line, thereby improving the aperture ratio of the display device.

[0139] According to an embodiment of the present disclosure, a first light-shielding layer is further provided between the first substrate and the channel portion of the active layer, thereby protecting the channel portion from the influence of external light.

[0140] According to embodiments of this disclosure, a conductive layer is additionally formed on one surface of the first and second connection portions of the active layer, thereby improving the response rate of the thin-film transistor.

[0141] According to embodiments of the present disclosure, the thin-film transistor is divided into a first sub-pixel and a second sub-pixel, such that the end of the first connection portion of the active layer is disposed in the second sub-pixel, and the end of the second connection portion of the active layer is disposed in the first sub-pixel, thereby improving the aperture ratio of the display device.

[0142] It will be apparent to those skilled in the art that various substitutions, modifications, and variations can be made within the scope of this disclosure without departing from its spirit and scope. Therefore, the scope of this disclosure is defined by the appended claims, and all variations or modifications derived from the meaning, scope, and equivalents of the claims should be interpreted as being included within the scope of this disclosure.

Claims

1. A display device, comprising: A first substrate has an upper surface and a lower surface facing the upper surface, the upper surface including a display surface; An active layer is disposed on the lower surface of the first substrate, and the active layer includes a channel portion, a first connection portion connected to a first side of the channel portion, and a second connection portion connected to a second side of the channel portion. A gate, the gate being disposed below the active layer and overlapping the channel portion; A second substrate is disposed below the gate; A liquid crystal layer is disposed between the first substrate and the second substrate; A backlight source is disposed below the second substrate; The source electrode is connected to the first connection portion of the active layer; The drain is connected to the second connection portion of the active layer; and The pixel electrode is connected to the drain electrode. The gate is disposed between the channel portion and the backlight. Wherein, the source electrode is disposed between the first substrate and the active layer, and The drain electrode is disposed between the active layer and the second substrate.

2. The display device according to claim 1, wherein, Light emitted from the backlight is blocked by the gate after passing through the second substrate and the liquid crystal layer, preventing it from entering the channel portion.

3. The display device according to claim 1, further comprising a first light-shielding layer, wherein the first light-shielding layer is disposed between the first substrate and the active layer, wherein, The first light-shielding layer overlaps with the channel portion of the active layer.

4. The display device according to claim 3, wherein, The first light-shielding layer is made of a conductive material and is electrically connected to the gate through a contact hole.

5. The display device according to claim 1, further comprising: Gate lines and data lines are configured to intersect each other on the lower surface of the first substrate; as well as A second light-shielding layer is disposed on the upper surface of the second substrate and overlaps with at least one of the gate line and the data line.

6. The display device according to claim 5, in, The source is connected to the data line. The second light-shielding layer does not overlap with the drain electrode.

7. The display device according to claim 1, further comprising: Gate lines and data lines are configured to intersect each other on the lower surface of the first substrate; as well as A columnar spacer is disposed on the upper surface of the second substrate and overlaps with at least one of the gate line and the data line, the columnar spacer comprising a light-shielding material.

8. The display device according to claim 1, further comprising a color filter disposed on the lower surface of the first substrate. in, No separate light-shielding layer is provided on the second substrate.

9. The display device according to claim 1, wherein, The length of the first substrate is longer than the length of the second substrate, and A drive unit is attached to the exposed portion of the lower surface of the first substrate that is not covered by the second substrate.

10. The display device according to claim 1, further comprising a connecting electrode, the connecting electrode connecting the first connecting portion of the active layer and the source electrode.

11. The display device according to claim 1, further comprising: The first sub-pixel and the second sub-pixel are disposed on the first substrate. Wherein, the end of the first connection portion of the active layer is located in the second sub-pixel, and the end of the second connection portion of the active layer is located in the first sub-pixel.

12. A display device, comprising: A first substrate has an upper surface and a lower surface facing the upper surface, the upper surface including a display surface; An active layer is disposed on the lower surface of the first substrate, and the active layer includes a channel portion, a first connection portion connected to a first side of the channel portion, and a second connection portion connected to a second side of the channel portion. A gate, which is spaced apart from the active layer and overlaps with the channel portion; A source electrode, wherein the source electrode is connected to the first connection portion of the active layer; Drain electrode, the drain electrode being connected to the second connection portion of the active layer; as well as A pixel electrode, which is connected to the drain electrode. The active layer is disposed between the lower surface of the first substrate and the gate. The source electrode is disposed between the first substrate and the active layer. The source electrode is in contact with the upper surface of the active layer. The drain electrode is in contact with the lower surface of the active layer, and The drain electrode is disposed between the active layer and the pixel electrode.

13. The display device according to claim 12, further comprising a buffer layer disposed between the source electrode and the active layer. in, The source electrode is connected to the first connection portion of the active layer through a contact hole located in the buffer layer.

14. The display device according to claim 12, further comprising a connecting electrode, the connecting electrode connecting the first connecting portion of the active layer to the source electrode.

15. The display device according to claim 14, further comprising a buffer layer disposed between the source electrode and the active layer. in, The first side of the connecting electrode is connected to the source electrode through a contact hole located in the buffer layer, and the second side of the connecting electrode is disposed on the first connecting portion of the active layer.

16. The display device according to claim 12, further comprising a first light-shielding layer disposed between the first substrate and the active layer, the first light-shielding layer overlapping the channel portion of the active layer.

17. The display device according to claim 16, wherein, The first light-shielding layer is made of a conductive material and is electrically connected to the gate through a contact hole, and The first light-shielding layer and the gate form a dual-gate structure.

18. The display device according to claim 12, further comprising a gate insulating layer disposed between the active layer and the gate, in, The gate insulating layer overlaps with the channel portion, a portion of the first connection portion, and a portion of the second connection portion.

19. The display device according to claim 12, further comprising a conductive layer disposed between the first connection portion of the active layer and the drain electrode. in, The conductive layer does not overlap with the gate.

20. The display device according to claim 12, further comprising: A gate line is disposed on the lower surface of the first substrate and connected to the gate; The data cable is connected to the source electrode; The second substrate faces the lower surface of the first substrate; as well as The second light-shielding layer is disposed on one surface of the second substrate facing the lower surface of the first substrate, and overlaps with the data line.

21. The display device according to claim 20, wherein, The second light-shielding layer overlaps with the gate line but not with the drain.

22. The display device according to claim 12, further comprising: A color filter is disposed between the drain electrode and the pixel electrode; as well as The second substrate faces the lower surface of the first substrate. In this case, no separate light-shielding layer is provided on the second substrate.

23. The display device according to claim 12, wherein, A first sub-pixel and a second sub-pixel are disposed on the first substrate, the end of the first connecting portion of the active layer is disposed in the second sub-pixel, and the end of the second connecting portion of the active layer is disposed in the first sub-pixel.

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