Magnetic memory structure and method of making the same

CN116916660BActive Publication Date: 2026-09-08TRUTH MEMORY CORP
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202311028437.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-08-15
Publication Date
2026-09-08
Estimated Expiration
2043-08-15

AI Technical Summary

Technical Problem

SOT-MRAM器件一般采用顶部钉扎的结构,即参考层在自由层上方,SOT层在最下方,由于SOT层很薄通常为5nm左右,刻蚀终点较难控制,过度刻蚀会造成SOT断开,导致器件断路,刻蚀不足会导致SOT层的电流分流或短路,因此刻蚀难度较大另外,垂直磁各向异性(PMA)器件需要施加面内辅助场才能实现器件的写入,为了实现数据的无磁场写入,目前的方案主要是采用顶部磁性层产生面内辅助场或制作楔形底电极结构,但是会增大器件制作工艺的复杂度

Benefits of technology

[0037] In the aforementioned magnetic memory structure and its fabrication method, the spin Hall layer is coated on the sidewall of the free layer. During the etching process to form the magnetic tunnel junction, the spin Hall layer is not damaged, and there is no current shunting or short circuit in the spin Hall layer, which reduces the etching difficulty. At the same time, the spin Hall layer coated on the sidewall of the free layer generates spin polarization in the vertical direction, which enables magnetic field-free writing of PMA devices. Furthermore, the fabrication of the spin Hall layer coated on the sidewall of the free layer does not increase the complexity of the device fabrication process.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN116916660B_ABST
    Figure CN116916660B_ABST
Patent Text Reader

Abstract

The application relates to a magnetic memory structure and a manufacturing method thereof, and the magnetic memory structure comprises a magnetic tunnel junction, a spin Hall layer and an oxide layer; the magnetic tunnel junction comprises a free layer, a barrier layer, a reference layer and a pinned layer; the spin Hall layer is wrapped on the outside of the free layer along the circumference of the free layer; and the oxide layer is arranged between the free layer and the spin Hall layer. The spin Hall layer is wrapped on the sidewall of the free layer, in the process of etching to form the magnetic tunnel junction, the spin Hall layer is not damaged, current shunting or short circuit of the spin Hall layer does not occur, etching difficulty is reduced, meanwhile, the spin Hall layer is wrapped on the sidewall of the free layer, vertical direction spin polarization is generated, field-free writing of a PMA device can be realized, and preparation of the spin Hall layer wrapped on the sidewall of the free layer does not increase the complexity of device manufacturing process.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a magnetic memory structure and its fabrication method. Background Technology

[0002] The structure of a spin-orbit-pitch magnetic RAM (SOT-MRAM) device connects a thin ferromagnetic metal film forming the free layer of a magnetic tunnel junction (MTJ) to a non-magnetic SOT layer. When current is injected into the SOT layer, a spin current is generated under the action of spin-orbit coupling, causing the magnetization direction of adjacent free layers to change. SOT-MRAM devices generally adopt a top-pinned structure, that is, the reference layer is above the free layer and the SOT layer is at the bottom. Since the SOT layer is very thin, usually around 5nm, the etching endpoint is difficult to control. Over-etching will cause the SOT to break, resulting in an open circuit in the device, while under-etching will cause current shunting or short circuit in the SOT layer. Therefore, etching is quite difficult. In addition, perpendicular magnetic anisotropy (PMA) devices require the application of an in-plane auxiliary field to achieve data writing. In order to achieve magnetic field-free data writing, current solutions mainly use a top magnetic layer to generate an in-plane auxiliary field or fabricate a wedge-shaped bottom electrode structure, but this increases the complexity of the device fabrication process. Summary of the Invention

[0003] Therefore, it is necessary to provide a magnetic memory structure and its fabrication method that can reduce etching difficulty, enable data writing without magnetic field, and reduce the complexity of device fabrication, in order to address the above-mentioned technical problems.

[0004] The present invention provides a magnetic storage structure comprising:

[0005] A magnetic tunnel junction consists of a free layer, a barrier layer, a reference layer, and a pinned layer.

[0006] A spin Hall layer is circumferentially wrapped around the outside of the free layer;

[0007] An oxide layer is sandwiched between the free layer and the spin Hall layer.

[0008] In one embodiment, a first electrode and a second electrode are also included, the first electrode being disposed at one end of the magnetic tunnel junction facing away from the free layer, and the second electrode being connected to the spin Hall layer.

[0009] In one embodiment, the magnetic memory structure further includes an insulating dielectric layer and leads. The insulating dielectric layer wraps around the outside of the magnetic tunnel junction and is located between the spin Hall layer and the first electrode. The leads pass through the insulating dielectric layer and are connected to the first electrode.

[0010] This invention also provides a method for manufacturing a magnetic storage structure, used to manufacture the magnetic storage structure described above, the method comprising:

[0011] A magnetic tunnel junction is fabricated on the first electrode, wherein the free layer of the magnetic tunnel junction faces away from the first electrode;

[0012] After depositing the insulating dielectric layer and cleaning the sidewalls of the free layer, the sidewalls of the free layer are oxidized.

[0013] A spin Hall layer was deposited, and the layers above the magnetic tunnel junction were stripped to expose the free layer.

[0014] The second electrode is fabricated after exposing, developing, and etching the spin Hall layer.

[0015] In one embodiment, fabricating a magnetic tunnel junction on the first electrode includes:

[0016] A pinned layer, a reference layer, a barrier layer, and a free layer are deposited on the first electrode;

[0017] A photoresist layer is retained on the magnetic tunnel junction formed after exposure, development and etching.

[0018] In one embodiment, the deposition of the insulating dielectric layer, followed by oxidizing the free layer sidewalls after cleaning the insulating dielectric layer, includes:

[0019] An insulating dielectric layer is deposited to cover the first electrode, the magnetic tunnel junction, and the photoresist layer;

[0020] The insulating dielectric layer is etched using an ion beam until the free layer sidewalls are completely exposed.

[0021] An oxide layer is formed on the sidewalls of the free layer through oxidation.

[0022] In one embodiment, the deposition of the spin Hall layer and the stripping of the layers above the magnetic tunnel junction to expose the free layer include:

[0023] A spin Hall layer is deposited to cover the insulating dielectric layer, oxide layer, and photoresist layer;

[0024] Etch the spin Hall layer until the sidewalls of the photoresist layer are exposed;

[0025] The photoresist layer is peeled off to expose the free layer.

[0026] The present invention also provides another method for fabricating a magnetic storage structure, for fabricating the magnetic storage structure described above, the method comprising:

[0027] A magnetic tunnel junction is fabricated on the first electrode using photolithography and etching processes, while retaining the photoresist layer on top of the magnetic tunnel junction.

[0028] After depositing an insulating dielectric layer and cleaning the insulating dielectric layer from the free layer sidewalls, the free layer sidewalls are oxidized to form an oxide layer.

[0029] A spin Hall layer is deposited, and a second electrode is fabricated after exposure, development, and etching of the spin Hall layer.

[0030] In one embodiment, the deposition of the spin Hall layer, followed by exposure, development, and etching of the spin Hall layer to fabricate a second electrode, includes:

[0031] A spin Hall layer is deposited to cover the insulating dielectric layer, photoresist layer, and oxide layer;

[0032] The spin Hall layer on the side corresponding to the ion beam is removed by controlling the etching angle of the ion beam.

[0033] The second electrode is fabricated by photolithography and etching processes on the retained spin Hall layer.

[0034] In one embodiment, the deposition of the spin Hall layer, followed by exposure, development, and etching of the spin Hall layer to fabricate a second electrode, includes:

[0035] The deposition angle of the spin Hall layer is controlled to cover the insulating dielectric layer, photoresist layer and oxide layer on the side corresponding to the deposition angle;

[0036] The second electrode is fabricated after photolithography and etching processes are used to process the spin Hall layer.

[0037] In the aforementioned magnetic memory structure and its fabrication method, the spin Hall layer is coated on the sidewall of the free layer. During the etching process to form the magnetic tunnel junction, the spin Hall layer is not damaged, and there is no current shunting or short circuit in the spin Hall layer, which reduces the etching difficulty. At the same time, the spin Hall layer coated on the sidewall of the free layer generates spin polarization in the vertical direction, which enables magnetic field-free writing of PMA devices. Furthermore, the fabrication of the spin Hall layer coated on the sidewall of the free layer does not increase the complexity of the device fabrication process. Attached Figure Description

[0038] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0039] Figure 1 This is a schematic diagram of a magnetic storage structure according to an embodiment of the present invention;

[0040] Figure 2 for Figure 1 Top view of the medium magnetic storage structure;

[0041] Figure 3 This is a schematic diagram of a magnetic storage structure according to another embodiment of the present invention;

[0042] Figure 4 for Figure 3 Top view of the medium magnetic storage structure;

[0043] Figure 5 This is a schematic diagram of a magnetic storage structure according to another embodiment of the present invention;

[0044] Figure 6 This is a flowchart illustrating a method for fabricating a magnetic storage structure according to an embodiment of the present invention;

[0045] Figure 7 This is a fabrication process diagram of a magnetic storage structure according to an embodiment of the present invention;

[0046] Figure 8 This is a flowchart illustrating a method for fabricating a magnetic storage structure according to another embodiment of the present invention.

[0047] Figure 9 This is a fabrication process diagram of a magnetic storage structure according to another embodiment of the present invention;

[0048] Figure 10 This is a fabrication process diagram of a magnetic storage structure according to another embodiment of the present invention.

[0049] Figure label:

[0050] 110. Magnetic tunnel junction; 120. Spin Hall layer; 130. Oxide layer; 140. First electrode; 150. Second electrode; 160. Insulating dielectric layer; 170. Lead wire; 180. Insulating layer; 190. Photoresist layer. Detailed Implementation

[0051] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0052] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on the other component or there may be an intermediate component. When a component is considered to be "connected to" another component, it can be directly connected to the other component or there may be an intermediate component present. The terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used in this specification are for illustrative purposes only and do not represent the only possible implementation.

[0053] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0054] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature and the second feature are in indirect contact through an intermediate medium. Furthermore, "above," "over," and "on top" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0055] Unless otherwise defined, all technical and scientific terms used in this specification have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used in this specification includes any and all combinations of one or more of the associated listed items.

[0056] Magnetic Random Access Memory (MRAM) has advantages such as near-zero static power consumption, fast read and write speeds, and compatibility with metal-oxide-semiconductor (CMOS) processes. It has been commercially applied in fields such as aerospace and wearable devices and is considered one of the most promising next-generation memories.

[0057] Magnetic tunnel junctions (MTJs) are the basic storage units of magnetic random access memories (MRMs), composed of ultrathin multilayer films made of ferromagnetic metals and metal oxides. Their core structure is typically a sandwich structure of a ferromagnetic layer (free layer), a tunneling layer (barrier layer), and a ferromagnetic layer (reference layer). Due to the tunneling magnetoresistance effect, MTTs possess both high-resistivity and low-resistivity states, which can be used to store binary 0 and 1 information. To write information, the direction of the magnetic field needs to be changed, converting the two magnetic moments from a parallel state to an antiparallel state or vice versa, thus enabling information storage.

[0058] Based on different data writing mechanisms, MRAM development has undergone three generations of evolution. Among them, Spin-Orbit Magnetic RAM (SOT-MRAM) is a three-terminal device. Its separate read and write paths fundamentally solve problems such as read errors and tunnel junction aging caused by high write current, making it a research hotspot for next-generation magnetic memory. The SOT-MRAM device structure connects a ferromagnetic metal thin film constituting the free layer of the magnetic tunnel junction (MTJ) to a non-magnetic metal conductor (the non-magnetic metal SOT layer). The latter is generally made of a strongly spin-orbit coupled metal such as platinum, tantalum, or tungsten (SOT material). When current is injected into the non-magnetic metal conductor, spin accumulation occurs under the action of spin-orbit coupling, causing the magnetization direction of adjacent free layers to change.

[0059] Generally, SOT-MRAM devices employ a top-pinned structure, where the reference layer is above the free layer and the SOT layer (spin Hall layer) is at the bottom. Because the SOT layer is very thin, typically around 5nm, controlling the etching endpoint is difficult. Over-etching can lead to open circuits, while insufficient etching can cause current shunting or short circuits in the SOT layer. Furthermore, for perpendicular magnetic anisotropy (PMA) devices, an in-plane auxiliary field is required for writing. Current solutions involve using a top magnetic layer to generate the in-plane auxiliary field or fabricating a wedge-shaped bottom electrode structure to achieve magnetic field-free data writing. Both methods result in magnetic field crosstalk in the array device and complex manufacturing processes, making integration difficult. To address these issues, this invention designs a SOT-MRAM device structure with bottom pinning to reduce risks during the etching process. Additionally, the SOT layer is wrapped around the sidewalls of the free layer, enabling magnetic field-free writing in PMA devices. The fabrication process for this structure is also provided.

[0060] The following is combined with Figure 1-10 The magnetic storage structure and manufacturing method of the present invention are described.

[0061] like Figure 1 , Figure 2 , Figure 3 and Figure 4 As shown, in one embodiment, a magnetic memory structure includes a magnetic tunnel junction 110, a spin Hall layer 120, and an oxide layer 130.

[0062] The magnetic tunnel junction 110 includes a free layer, a barrier layer, a reference layer, and a pinned layer, with the free layer located at the top of the magnetic tunnel junction.

[0063] The free layer and reference layer are magnetic materials, such as Fe, Co, FeB, CoB, CoFe, CoFeB, WCoFeB, and CoFeBTa. The barrier layer is an insulating material, such as MgO, AlOx, MgAlOx, MgGaOx, and MgTiOx. The pinning layer is a magnetic material, which can be antiferromagnetic such as IrMn, PtMn, and FeMn, or highly anisotropic ferromagnetic such as [Co / Pd] multilayer films, [Co / Pt] multilayer films, and [Co / Ni] multilayer films.

[0064] Specifically, the free layer is located on top of the magnetic tunnel junction 110. The pinned layer, reference layer, barrier layer and free layer of the magnetic tunnel junction 110 are stacked in sequence.

[0065] Spin Hall layer 120 is wrapped around the outside of the free layer along the circumference of the free layer.

[0066] Among them, the spin Hall layer 120 is a layer with strong spin-orbit coupling effect, also known as a heavy metal layer. It is made of heavy metal materials, and its spin Hall angle can be positive, such as Pt, Pd, Hf, Au, AuPt, PtHf, PtCr, PtMn, FeMn, NiMn, etc.; its spin Hall angle can be negative, such as Ta, W, Hf, Ir, IrMn, W, WOx, WN, W(O,N), TaN, TaB, etc.; it can also be a topological insulator, such as Bi. x Se 1-x Bi x Sb 1-x Materials such as (Bi,Sb)₂Te₃ can be used; or multilayer film structures can be composed of combinations of two or more of the above materials. The above materials are not limited to the listed element ratios. For example, antiferromagnetic IrMn can be IrMn or IrMn₃, and CoFeB can be Co₂₀Fe₆₀B₂₀ or Co₄₀Fe₄₀B₂₀, etc.

[0067] Specifically, the spin Hall layer 120 can cover the free layer circumferentially, that is, completely enclose the sidewalls of the free layer, forming a ring-shaped spin Hall layer, see [link to documentation]. Figure 1 and Figure 2 It can also partially cover the sidewalls of the free layer; see [reference needed]. Figure 3 and Figure 4 For example, it can cover half of the sidewall of the free layer to form a semi-annular spin Hall layer. When the spin Hall layer 120 covers the free layer for one circumference, an insulating layer 180 is provided between the beginning and end of the spin Hall layer 120 to avoid short circuit between the beginning and end when current is applied.

[0068] An oxide layer 130 is sandwiched between the free layer and the spin Hall layer 120.

[0069] Specifically, the oxide layer 130 can completely cover the sidewalls of the free layer, or it can only cover the sidewalls of the free layer in the portion containing the spin Hall layer 120. However, in actual fabrication, to reduce the complexity of the oxide layer 130 process, it is generally formed to completely cover the sidewalls of the free layer. The oxide layer 130 is mainly used to prevent current shunting into the free layer when current is applied to the spin Hall layer 120, thus isolating the free layer from the spin Hall layer 120.

[0070] In this embodiment of the magnetic memory structure, the spin Hall layer 120 is coated on the sidewall of the free layer. During the etching process to form the magnetic tunnel junction 110, the spin Hall layer will not be damaged, and there will be no current shunting or short circuit in the spin Hall layer, which reduces the etching difficulty. At the same time, the spin Hall layer 120 coated on the sidewall of the free layer generates spin polarization in the vertical direction, which can realize magnetic field-free writing of PMA devices. Moreover, the fabrication of the spin Hall layer 120 coated on the sidewall of the free layer does not increase the complexity of the device fabrication process.

[0071] It should be noted that the free layer of the magnetic tunnel junction 110 can be located at the top or the bottom. This invention will be described in detail with the example of the free layer being located at the bottom of the magnetic tunnel junction 110.

[0072] like Figure 5 As shown, in one embodiment, the magnetic memory structure further includes a first electrode 140, a second electrode 150, an insulating dielectric layer 160, and a lead wire 170. The first electrode 140 is disposed at one end of the magnetic tunnel junction 110 facing away from the free layer, and the second electrode 150 is connected to the spin Hall layer 120. The insulating dielectric layer 160 surrounds the outside of the magnetic tunnel junction 110 and is located between the spin Hall layer 120 and the first electrode 140. The lead wire 170 passes through the insulating dielectric layer 160 and is connected to the first electrode 140.

[0073] Specifically, the second electrode 150 is disposed on the side of the spin Hall layer 120 facing away from the free layer, and the first and last ends of the spin Hall layer 120 are respectively connected to different second electrodes 150. The insulating dielectric layer 160 is used to support the spin Hall layer 120, the oxide layer 130 and the second electrode 150, and to protect the magnetic tunnel junction 110. One end of the lead wire 170 passes through the insulating dielectric layer 160 and is connected to the first electrode 140, and the other end is led out as a device port, which can be used to connect a transistor.

[0074] Furthermore, the present invention also provides a method for fabricating a magnetic storage structure, used for fabricating... Figures 1-5 The magnetic storage structure of the embodiment.

[0075] like Figure 6 and Figure 7 As shown, in one embodiment, a method for fabricating a magnetic storage structure includes the following steps:

[0076] Step S610: A magnetic tunnel junction is fabricated on the first electrode, with the free layer of the magnetic tunnel junction facing away from the first electrode.

[0077] First, a pinning layer, a reference layer, a barrier layer, and a free layer are deposited on the first electrode 140.

[0078] Secondly, a photoresist layer is retained on the magnetic tunnel junction formed after exposure, development and etching.

[0079] After completing the deposition process on the first electrode 140, a magnetic tunnel junction 110 is fabricated using photolithography and etching processes, while retaining the photoresist layer 190. The magnetic tunnel junction 110 includes a pinned layer, a reference layer, a barrier layer, and a free layer stacked sequentially, with the pinned layer and the free layer located at the bottom and top of the magnetic tunnel junction 110, respectively.

[0080] Step S620: Deposit an insulating dielectric layer, clean the insulating dielectric layer from the free layer sidewalls, and then oxidize the free layer sidewalls.

[0081] First, an insulating dielectric layer 160 is deposited to cover the first electrode 140, the magnetic tunnel junction 110, and the photoresist layer 190.

[0082] The insulating dielectric layer 160 is made of insulating material. The first electrode 140 is located at the end furthest from the spin Hall layer 120, which is the bottom end of the magnetic memory structure, equivalent to the top electrode of a traditional SOT-MRAM. To facilitate the connection of the first electrode 140, a lead 170 is provided. One end of the lead 170 passes through the insulating dielectric layer 160 and connects to the first electrode 140, while the other end extends out as a device port for connecting transistors. The photoresist layer 190 is retained to facilitate the subsequent stripping of the layers above it.

[0083] Secondly, the insulating dielectric layer is etched with an ion beam until the free layer sidewalls are completely exposed.

[0084] Specifically, ion beam (IBE) etching is used to clean the insulating medium on the sidewalls of the magnetic tunnel junction 110. The etched stop layer is the barrier layer, so as to completely expose the free layer sidewalls.

[0085] Finally, an oxide layer is formed on the sidewalls of the free layer through oxidation.

[0086] The oxide layer 130 on the free layer sidewall can be formed by oxidizing the exposed free layer sidewall in oxygen, or by first forming an easily oxidizable metal layer and then placing it in an oxygen environment to form the oxide layer 130. This oxide layer 130 can prevent current shunting of the spin Hall layer 120, thus isolating the spin Hall layer 120 from the free layer. The oxide layer 130 is an oxide metal layer located between the spin Hall layer 120 and the free layer, and can also act as a barrier layer.

[0087] In step S630, a spin Hall layer is deposited, and the layers above the magnetic tunnel junction are stripped to expose the free layer.

[0088] First, a spin Hall layer is deposited to cover the insulating dielectric layer, oxide layer, and photoresist layer.

[0089] Specifically, after the oxide layer 130 is formed, a spin Hall layer 120 needs to be fabricated on the outside of the oxide layer 130. First, a heavy metal layer, namely the spin Hall layer 120, is deposited by deposition.

[0090] Secondly, the spin Hall layer is etched until the sidewalls of the photoresist layer are exposed.

[0091] Specifically, sidewall cleaning is performed using etching. Etching is stopped once the sidewalls of the photoresist layer 190 are exposed to avoid damaging the oxide layer. Therefore, the function of the photoresist layer 190 is twofold: firstly, to facilitate the subsequent stripping of the layers above the photoresist layer 190; and secondly, to serve as a stop layer or buffer layer for the etching process during the formation of the spin Hall layer 120, thereby preventing etching damage to the oxide layer.

[0092] Finally, the photoresist layer is peeled off to expose the free layer.

[0093] Specifically, after the photoresist layer 190 is stripped, the insulating dielectric layer 160 and the heavy metal layer on top of the photoresist layer 190 are also stripped, exposing the top of the free layer. Alternatively, the photoresist layer 190 can be left unstripped, thus protecting the top of the free layer.

[0094] Step S640: After exposing, developing, and etching the spin Hall layer, a second electrode is fabricated.

[0095] Specifically, after the photoresist layer 190 is stripped, the remaining spin Hall layer 120 still covers the insulating dielectric layer 160, and its size is relatively large, therefore, further processing is required. Photolithography and etching processes are used to process the remaining spin Hall layer 120, retaining a smaller size. Subsequently, a second electrode 150 is fabricated on the outside of the spin Hall layer 120. This second electrode 150 is connected to the spin Hall layer 120 and is equivalent to the bottom electrode of a conventional SOT-MRAM device.

[0096] In the fabrication method of the magnetic memory structure in this embodiment, when fabricating the magnetic tunnel junction 110, the spin Hall layer 120 is coated on the sidewall of the free layer. This differs from the situation in traditional SOT-MRAM devices where the free layer is located at the bottom of the magnetic tunnel junction 110 and in contact with the SOT layer. Therefore, there is no risk of over-etching the free layer causing the spin Hall layer 120 to break, nor is there any risk of current shunting or short circuits due to insufficient etching. Furthermore, the fabrication of the spin Hall layer 120, which is coated on the outside of the free layer, does not require complex processes and can generate vertical spin polarization, enabling magnetic field-free writing of the PMA device.

[0097] like Figure 8 and Figure 9 As shown, in one embodiment, the method for fabricating a magnetic storage structure includes the following steps:

[0098] Step S810: A magnetic tunnel junction is fabricated on the first electrode using photolithography and etching processes, while retaining the photoresist layer on top of the magnetic tunnel junction.

[0099] Among them, the fabrication method of the magnetic tunnel junction 110 and the retention method of the photoresist layer 190 are similar to those of the magnetic tunnel junction 110 and the photoresist layer 190. Figure 6 and Figure 7 The embodiments are the same.

[0100] Step S820: Deposit an insulating dielectric layer, clean the insulating dielectric layer from the free layer sidewalls, and then oxidize the free layer sidewalls to form an oxide layer.

[0101] This step includes the deposition of the insulating dielectric layer 160, the cleaning of the free layer sidewalls, and the formation of the oxide layer 130. Figure 6 and Figure 7 The embodiments are the same.

[0102] Step S830: Deposit a spin Hall layer, and fabricate a second electrode after exposing, developing and etching the spin Hall layer.

[0103] First, a spin Hall layer is deposited to cover the insulating dielectric layer, photoresist layer, and oxide layer.

[0104] Secondly, the etching angle of the ion beam is controlled to remove the spin Hall layer on the side corresponding to the ion beam.

[0105] Specifically, by controlling the bombardment angle of the ion beam on the spin Hall layer 120 during etching, the etching process can be completed. Figure 3 Fabrication of the magnetic storage structure shown.

[0106] Finally, the retained spin Hall layer is processed by photolithography and etching to fabricate the second electrode.

[0107] Among them, the spin Hall layer is processed by photolithography and etching to create the second electrode and Figure 6 and Figure 7 The embodiments are the same.

[0108] For step S830, see Figure 10 In another embodiment, a spin Hall layer is deposited, and a second electrode is fabricated after exposing, developing, and etching the spin Hall layer, including the following steps:

[0109] First, the deposition angle of the spin Hall layer is controlled to cover the insulating dielectric layer, photoresist layer, and oxide layer on the side corresponding to the deposition angle.

[0110] Specifically, by controlling the deposition angle of the spin Hall layer 120, it is possible to achieve... Figure 3 Fabrication of the magnetic storage structure shown.

[0111] Secondly, the second electrode is fabricated after photolithography and etching processes are performed on the spin Hall layer.

[0112] Among them, the spin Hall layer is processed by photolithography and etching to create the second electrode and Figure 6 and Figure 7 The embodiments are the same.

[0113] In the aforementioned magnetic memory structure and its fabrication method, when fabricating the magnetic tunnel junction 110, the spin Hall layer 120 is covered by the free layer sidewall. Unlike the traditional SOT-MRAM device where the free layer is located at the bottom of the magnetic tunnel junction 110 and in contact with the SOT layer, there is no problem of insufficient or excessive etching of the free layer. If the free layer is located at the top of the magnetic tunnel junction 110, the etching stop layer is located at the pinning layer at the bottom of the magnetic tunnel junction 110. Even if the pinning layer is not etched enough, there will be no problem of current shunting or short circuit in the spin Hall layer 120, reducing the difficulty of controlling the etching endpoint. If the free layer is located at the bottom of the magnetic tunnel junction 110, since the spin Hall layer 110 is located on the free layer sidewall, there will be no situation where excessive etching causes the spin Hall layer 120 to break or insufficient etching causes the current to shun or short circuit in the spin Hall layer 120. At the same time, the fabrication of the spin Hall layer 120 covered by the free layer does not require complex processes and can generate vertical spin polarization, enabling magnetic field-free writing of PMA devices.

[0114] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0115] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.

Claims

1. A method for fabricating a magnetic storage structure, characterized in that, The method includes: A magnetic tunnel junction is fabricated on the first electrode, wherein the free layer of the magnetic tunnel junction faces away from the first electrode; The process of fabricating a magnetic tunnel junction on the first electrode includes: retaining a photoresist layer on the magnetic tunnel junction formed after exposure, development and etching; After depositing an insulating dielectric layer and cleaning the sidewalls of the free layer, the sidewalls of the free layer are oxidized to form an oxide layer. A spin Hall layer was deposited, and the layers above the magnetic tunnel junction were stripped to expose the free layer, including: A spin Hall layer is deposited to cover the insulating dielectric layer, oxide layer, and photoresist layer; Etch the spin Hall layer until the sidewalls of the photoresist layer are exposed; The photoresist layer is stripped to expose the free layer; The second electrode is fabricated after exposing, developing, and etching the spin Hall layer.

2. The method for manufacturing the magnetic storage structure according to claim 1, characterized in that, The fabrication of the magnetic tunnel junction on the first electrode also includes: A pinned layer, a reference layer, a barrier layer, and a free layer are deposited on the first electrode.

3. The method for manufacturing the magnetic storage structure according to claim 2, characterized in that, The deposition of the insulating dielectric layer, followed by oxidizing the free layer sidewalls after cleaning the insulating dielectric layer, includes: An insulating dielectric layer is deposited to cover the first electrode, the magnetic tunnel junction, and the photoresist layer; The insulating dielectric layer is etched using an ion beam until the free layer sidewalls are completely exposed. An oxide layer is formed on the sidewalls of the free layer through oxidation.

4. A magnetic storage memory structure, characterized in that, The magnetic storage structure is manufactured by the method for manufacturing a magnetic storage structure according to any one of claims 1-3, and the magnetic storage structure includes: A magnetic tunnel junction consists of a free layer, a barrier layer, a reference layer, and a pinned layer. A spin Hall layer is circumferentially wrapped around the outside of the free layer; An oxide layer is sandwiched between the free layer and the spin Hall layer.

5. The magnetic storage structure according to claim 4, characterized in that, It also includes a first electrode and a second electrode, the first electrode being disposed at one end of the magnetic tunnel junction facing away from the free layer, and the second electrode being connected to the spin Hall layer.

6. The magnetic storage structure according to claim 5, characterized in that, The magnetic memory structure further includes an insulating dielectric layer and a lead wire. The insulating dielectric layer wraps around the outside of the magnetic tunnel junction and is located between the spin Hall layer and the first electrode. The lead wire passes through the insulating dielectric layer and is connected to the first electrode.

Citation Information

Patent Citations

  • SOT-MRAM device and forming method thereof

    CN114497361A

  • Magnetic memory device

    US20160079518A1