Pedal controller and vehicle control device

Abstract

The embodiment of the present disclosure discloses a pedal controller and a vehicle control device. The pedal controller can include a controller and a stepped power supply circuit. The control end of the controller is connected with the signal input end of the stepped power supply circuit. The power output end of the stepped power supply circuit is connected with a motor for controlling a vehicle welcome pedal. The controller is configured to output a direct current level control time sequence list to the stepped power supply circuit after power-on detection. The control time sequence list includes N level signals in a set time period and the duration of each level signal, and N is greater than or equal to 2. The stepped power supply circuit is configured to sequentially output N stepped direct current voltages to the motor within a set time according to the control time sequence list. The pedal controller and the vehicle control device disclosed by the embodiment of the present disclosure can solve the EMC interference and interference of the motor controlled by the PWM signal, and can solve the problem of abnormal sound emitted by the pedal impacting the vehicle body.

Description

Technical Field

[0001] This disclosure relates to, but is not limited to, the automotive field, and particularly to a pedal controller and vehicle control device. Background Technology

[0002] Most SUVs are equipped with side steps due to their higher ground clearance. Side steps can be fixed or electrically retractable. Higher-end vehicles are often equipped with electrically retractable side steps, which unfold when needed for passengers to step on when getting in and out of the vehicle, and retract under the vehicle when not in use.

[0003] The electrically retractable welcome pedal is operated by a pedal controller that controls a DC motor. Conventional motor control schemes typically use pulse width modulation (PWM) signals. However, due to the distance between the pedal controller's installation location and the load motor, and the varying wiring harness lengths (ranging from 2m to 5m depending on the vehicle model), various electromagnetic compatibility (EMC) issues can easily arise during PWM signal transmission through the wiring harness. Summary of the Invention

[0004] This disclosure provides a pedal controller, including: a controller and a graded power supply circuit, wherein the control terminal of the controller is connected to the signal input terminal of the graded power supply circuit, and the power output terminal of the graded power supply circuit is connected to a motor for controlling a vehicle's welcome pedal;

[0005] The controller is configured to output a control timing list of DC levels to the graded power supply circuit after detecting power-on. The control timing list includes N level signals within a set time period and the duration of each level signal, where N≥2.

[0006] The graded power supply circuit is configured to sequentially output N graded DC voltages to the motor within a set time according to the control timing table.

[0007] This disclosure also provides a vehicle control device, including a motor, a welcome pedal, and a pedal controller as described in any embodiment.

[0008] The pedal controller and vehicle control device provided in at least one embodiment of this disclosure have the following advantages compared with the prior art:

[0009] Using DC high and low level control to control the welcome pedal motor can solve the problem of EMC interference and being interfered with when using PWM signal control to cause abnormal pedal controller operation. Furthermore, using graded voltage power supply can solve the problem of abnormal noise caused by the pedal hitting the vehicle body. This approach has certain applicability and can contribute to improving the stability of the entire vehicle system.

[0010] Other features and advantages of this disclosure will be set forth in the following description, and will be apparent in part from the description, or may be learned by practicing the disclosure. Other advantages of this disclosure may be realized and obtained by means of the methods described in the description and the accompanying drawings. Attached Figure Description

[0011] The accompanying drawings are used to provide an understanding of the technical solutions of this disclosure and form part of the specification. They are used together with the embodiments of this disclosure to explain the technical solutions of this disclosure and do not constitute a limitation on the technical solutions of this disclosure.

[0012] Figure 1 This is a block diagram of the welcome pedal control circuit in related technologies;

[0013] Figure 2 This is a structural block diagram of a pedal controller provided in an example embodiment of the present disclosure;

[0014] Figure 3 A circuit diagram of a graded power supply circuit provided in an embodiment of this disclosure;

[0015] Figure 4 This is a control timing diagram for pedal retraction provided in an example embodiment of the present disclosure;

[0016] Figure 5 This is a control timing diagram for pedal deployment provided in an example embodiment of the present disclosure;

[0017] Figure 6 The circuit diagram of a motor control module provided in an example embodiment of this disclosure is shown. Detailed Implementation

[0018] This disclosure describes several embodiments, but these descriptions are exemplary and not limiting, and it will be apparent to those skilled in the art that many more embodiments and implementations are possible within the scope of the embodiments described herein. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are also possible. Unless specifically limited, any feature or element of any embodiment may be used in combination with, or may replace, any feature or element of any other embodiment.

[0019] This disclosure includes and contemplates combinations of features and elements known to those skilled in the art. The embodiments, features, and elements disclosed in this disclosure may also be combined with any conventional features or elements to form a unique inventive scheme as defined by the claims. Any feature or element of any embodiment may also be combined with features or elements from other inventive schemes to form another unique inventive scheme as defined by the claims. Therefore, it should be understood that any feature shown and / or discussed in this disclosure may be implemented individually or in any suitable combination. Therefore, the embodiments are not limited except by the limitations imposed by the appended claims and their equivalents. Furthermore, various modifications and changes may be made within the scope of the appended claims.

[0020] Furthermore, in describing representative embodiments, the specification may have presented methods and / or processes as a specific sequence of steps. However, the method or process should not be limited to the specific order of steps described herein, to the extent that the method or process does not depend on the specific order of steps described herein. As will be understood by those skilled in the art, other sequences of steps are also possible. Therefore, the specific order of steps set forth in the specification should not be construed as a limitation of the claims. Moreover, the claims relating to the method and / or process should not be limited to the steps performed in the order written, and those skilled in the art will readily understand that these orders can be varied and still remain within the spirit and scope of the embodiments disclosed herein.

[0021] Figure 1 This is a block diagram of the welcome pedal control circuit in related technologies, such as... Figure 1 As shown, the welcome pedal is operated by a pedal controller that controls a DC motor M. The pedal controller may include a central processing unit (CPU), a voltage module, and a full-bridge circuit.

[0022] When the power supply terminal of the full bridge is at a constant voltage and the control terminal is PWM, the PWM signal is transmitted on the wiring harness controlling the motor. The length of the wiring harness varies from 2m to 5m depending on the vehicle model. During the transmission of the signal through the wiring harness, it is easy to couple and interfere with adjacent signal lines, causing related control failures. In addition, due to the excessive length of the wiring harness, it is easily affected by external electromagnetic interference during transmission, causing control abnormalities.

[0023] When the power supply terminal of the full-bridge is at a constant voltage and the control terminal is at a high or low level, a constant voltage signal is transmitted on the wiring harness controlling the motor. When the motor brakes, the voltage drops directly from 12V to 0V without any buffer, causing the pedal to impact the vehicle body. The impact sound varies in intensity depending on the material and structure of the pedal, resulting in a poor user experience.

[0024] The pedal controller provided in this embodiment can adopt a graded power supply and a high-low level control scheme for the full-bridge motor, which can solve the EMC interference problem and the problem of abnormal noise caused by the pedal hitting the vehicle body.

[0025] Figure 2 This is a structural block diagram of a pedal controller provided in an example embodiment of the present disclosure, such as... Figure 2 As shown, the pedal controller may include: a controller 21 and a graded power supply circuit 22. The control terminal of the controller is connected to the signal input terminal of the graded power supply circuit, and the power output terminal of the graded power supply circuit is connected to the motor used to control the vehicle's welcome pedal.

[0026] The controller is configured to output a control timing list of DC levels to the graded power supply circuit after detecting power-on. The control timing list includes N level signals within a set time period and the duration of each level signal, where N≥2.

[0027] The graded power supply circuit is configured to output N graded DC voltages to the motor sequentially within a set time according to a control timing sequence table.

[0028] The controller can be Figure 1 The central processing unit (CPU) shown may be an application-specific integrated circuit (ASIC) or one or more integrated circuits that implement the embodiments of this disclosure.

[0029] The controller performs control according to the set control timing table (or control timing diagram), and outputs high and low levels sequentially to control the graded power supply circuit. The graded power supply circuit turns on or closes the corresponding circuit according to the high and low levels in the control timing table, and outputs graded DC voltages to the motor sequentially.

[0030] A graded power supply circuit can be used as Figure 1 The power supply module of the full-bridge circuit shown outputs graded DC voltages to the motor in sequence.

[0031] The pedal controller provided in this disclosure uses DC high and low levels to control the motor of the welcome pedal, which can solve the problem of EMC interference and being interfered with when using PWM signal to control the motor, causing abnormal operation of the pedal controller. Furthermore, the use of graded voltage power supply can solve the problem of abnormal noise caused by the pedal hitting the vehicle body. This design has certain applicability and a certain coverage capability in improving the stability of the entire vehicle system.

[0032] In one example embodiment of this disclosure, the graded power supply circuit may include: a power output control circuit, a graded voltage control circuit, and a power output switching circuit.

[0033] The power output control circuit is configured to turn on when it receives a power signal and when the level signal output from the first control terminal of the controller is valid.

[0034] The graded voltage control circuit is configured to, upon receiving a control timing list output from the second control terminal of the controller, sequentially output N graded DC voltages to the power output switching circuit within a set time according to the valid level signals in the control timing list.

[0035] The power output switching circuit is configured to turn on when the power switching circuit is turned on, and to output N graded DC voltages sequentially to the motor.

[0036] The power output control circuit can act as a switching circuit (or switching transistor) for the graded power supply circuit. Only after the power output control circuit is turned on can the graded voltage control circuit and the power output switching circuit output graded DC voltages to the motor. When the power output control circuit is not turned on, the graded voltage control circuit and the power output switching circuit cannot output graded DC voltages to the motor.

[0037] The power output control circuit turns on when it detects a power signal (power-on signal), and the graded power supply circuit acts as... Figure 1 When using the power supply module of the full-bridge circuit shown, the power output control circuit can be connected with... Figure 1 The voltage module connection shown can output the input power to the power output control signal after power-on. The power output control signal will turn on after receiving the power signal.

[0038] Figure 3 A circuit diagram of the graded power supply circuit provided in the embodiments of this disclosure is shown below. Figure 3 As shown, the power output control circuit may include: a second transistor Q8 and a third transistor Q9. The base of the second transistor Q8 is connected to the first control terminal of the controller. One of the collector and emitter of the second transistor Q8 is connected to the base of the third transistor Q9, and the other is grounded.

[0039] After the POWER (voltage is generally 13.5V) is powered on, the first control signal MCU_CTL5 output by the first control terminal of the controller is at a high level (that is, the level signal output by the first control terminal of the controller is valid). The second transistor Q8 is turned on (opened), which pulls the base of the third transistor Q9 low, so that the third transistor Q9 is turned on (opened).

[0040] After the power output control circuit is turned on, the power output switch circuit is turned on, and the N graded DC voltages output by the graded voltage control circuit are output to the motor.

[0041] like Figure 3As shown, the power output switching circuit may include: a fourth transistor Q1, one of the collector and emitter of a third transistor Q9 connected to the power supply, and the other connected to the base of the fourth transistor Q1; one of the collector and emitter of the fourth transistor Q1 is connected to the power supply POWER, and the other is connected to the motor.

[0042] After the second transistor Q8 and the third transistor Q9 are turned on, the fourth transistor Q1 can be turned on, and power flows from Q1 to the motor.

[0043] In one example embodiment of this disclosure, the power of the second transistor Q8 and the third transistor Q9 is less than the power of the fourth transistor Q1. By using the low-power second transistor Q8 and the third transistor Q9 to turn on the high-power fourth transistor Q1, a large current can be controlled by a small signal, which is flexible in application and low in cost.

[0044] When each graded voltage control circuit receives a valid level signal from the second control terminal of the controller, it uses graded voltage control to control the motor and outputs a DC voltage to the power output switching circuit.

[0045] In one example embodiment of this disclosure, each graded voltage control circuit may include a voltage switching circuit and a voltage output circuit, wherein each voltage output circuit outputs a different DC voltage.

[0046] The voltage switching circuit is configured to turn on when the level signal output from the second control terminal of the controller is valid;

[0047] The voltage output circuit is configured to output a DC voltage to the output switching circuit when the voltage switching circuit is turned on.

[0048] Each graded voltage control circuit can be controlled by the second control signal output from the second control terminal of the controller to achieve voltage grading.

[0049] The controller can output corresponding high and low level signals according to a pre-set or matched control timing sequence list to control the voltage switching circuits in N graded voltage control circuits to conduct in a time-sharing manner. When each voltage switching circuit is activated, the voltage output circuit connected to the activated voltage switching circuit outputs a DC voltage. In the N graded voltage control circuits, each voltage output circuit outputs a different DC voltage. By using the different DC voltages output by the N voltage output circuits in a time-sharing manner, graded voltage control of the motor can be achieved, avoiding the impact noise generated by the pedals on the vehicle body.

[0050] In one example embodiment of this disclosure, the number N of the graded voltage control circuits can be determined based on empirical values ​​or actual application conditions, and this embodiment does not limit or elaborate on this. Increasing or decreasing the number of graded voltages based on empirical values ​​or actual application conditions allows for flexible design and cost control.

[0051] In one example embodiment of this disclosure, the voltage output circuit may include: a Zener diode; different voltage output circuits in N parallel graded voltage control circuits use different types of Zener diodes to output different DC voltages.

[0052] The voltage output circuit can be a Zener diode. The voltage output circuits in N graded voltage control circuits use different types of Zener diodes, and different voltages can be output through different types of Zener diodes.

[0053] In one example embodiment of this disclosure, the voltage switching circuit may include: a first transistor, the base of which is connected to the second control terminal of the controller, one of the collector and emitter of the first transistor being connected to the positive terminal of a Zener diode, and the other being grounded; the negative terminal of the Zener diode being connected to the output switching circuit.

[0054] In the N graded voltage control circuits, each voltage switching circuit can use a transistor. The transistor receives different control signals from the controller and conducts them in a time-division manner. Different DC voltages are output through the Zener diodes connected to the conducting transistors, thereby realizing graded voltage control of the motor and avoiding the impact noise generated by the pedals on the vehicle body.

[0055] This embodiment of the invention uses transistors and Zener diodes to achieve level gradation, simulating PWM-like control. It offers flexible procurement options, avoids chip shortages, and has a certain degree of applicability, providing coverage for improving the stability of the entire vehicle system.

[0056] In one example embodiment of this disclosure, when the controller outputs a control timing list of DC levels to the graded power supply circuit, it can output the N level signals in the control timing list to each graded voltage control circuit in a preset order.

[0057] like Figure 3 As shown, taking N=4 as an example, in the four graded voltage control circuits, each graded voltage control circuit may include a first transistor (such as...). Figure 3 (Q2, Q10, Q11, and Q7) and a Zener diode (such as...) Figure 3 (D2, D3, D4, and D6 in the model).

[0058] When the controller performs control according to the control timing table, the second control terminal of the controller can sequentially output high and low levels to turn on or off the first transistors Q2, Q10, Q11, and Q7 for control. For example, the second control signal MCU_CTL6 outputting the second control terminal of the controller outputs a high level to turn on Q2 for a duration of t1, and POWER is regulated by D2 to the fourth transistor Q1. When the fourth transistor Q1 is turned on, the output terminal POWER_MOTOR of the fourth transistor Q1 outputs a level U1, providing a DC voltage of level U1 to the motor.

[0059] Similarly, the second control signals MCU_CTL7, MCU_CTL8 and MCU_CTL9 output sequentially from the second control terminal of the controller can cause Q10, Q11 and Q7 to turn on and off sequentially according to the times t2, t3 and t4 in the control timing table. At this time, the output terminal POWER_MOTOR of the fourth transistor Q1 outputs according to the levels U2, U3 and U2 in sequence, providing different DC voltages to the motor in a time-sharing manner.

[0060] The first and second control terminals of the controller can be two different control terminals, or they can be the same control terminal. POWER is the input power supply, POWER_MOTOR is the power supply output to the motor, and MCU_CTL5, MCU_CTL6, MCU_CTL7, MCU_CTL8, and MCU_CTL9 are the high and low level control signals output by the controller (MCU), respectively.

[0061] In an example embodiment of this disclosure, such as Figure 3 As shown, Q1 can be a high-power NMOS transistor, Q2, Q7, Q8, Q10, and Q11 can be NPN transistors, and Q9 can be a PNP transistor. D2, D3, D4, and D6 are different types of Zener diodes, outputting different voltages. D5 is a general-purpose diode to prevent reverse voltage flow; D1 is a transient voltage suppressor, used to absorb surge voltage; C1, C3, C8, C9, C10, C11, and C12 are ceramic capacitors, used to absorb high-frequency interference; C4 is an electrolytic capacitor, used for energy storage; and R9 is a resistor providing current limiting protection.

[0062] In one example embodiment of this disclosure, the N graded DC voltages can be DC voltages that change from increasing to decreasing. Depending on the actual application, the output graded voltages can be gradually changed according to a set rule; for example, the output can be controlled to change from increasing to decreasing graded DC voltages, allowing for flexible design and cost control.

[0063] In one example embodiment of this disclosure, the N graded DC voltages change from decreasing to increasing. Depending on the actual application, the output voltages can be gradually varied according to a set rule; for example, the output can be controlled to change from decreasing to increasing graded DC voltages, allowing for flexible design and cost control.

[0064] Figure 4 This is a control timing diagram for pedal retraction provided in an example embodiment of this disclosure. Figure 5 Here is a control timing diagram for pedal deployment provided in an example embodiment of this disclosure, as follows: Figure 4 and Figure 5 As shown, at the starting position, the controller controls the power circuit output voltage U1, and the device starts moving at speed V1, reaching position S1 after a running time t1. The controller then switches to controlling the power circuit output voltage U2, and the device starts moving at speed V2, reaching position S2 after a running time t2. Next, the controller switches to controlling the power circuit output voltage U3, and the device starts moving at speed V3, reaching position S3 after a running time t3. Finally, the controller switches to controlling the power circuit output voltage U2, and the device decelerates, reaching position S4 after a running time t4. The controller then switches to controlling the power circuit output voltage U1, and the device decelerates, reaching position S5 after a running time t5. The pedal then reaches the target position. The timing control of pedal retraction and pedal extension is consistent, while the motor movements are opposite.

[0065] In one example embodiment of this disclosure, the pedal controller may further include: a motor control module, which can serve as... Figure 1 The motor drive module of the full-bridge circuit shown is configured to drive the motor in either the forward or reverse direction according to the controller's control.

[0066] Figure 6 Here is a circuit schematic diagram of a motor control module provided in an example embodiment of this disclosure, such as... Figure 6 As shown, the motor control module may include four metal-oxide-semiconductor field-effect transistors (MOS transistors): Q3, Q4, Q5, and Q6.

[0067] The upper transistors Q3 and Q5 can be PMOS, and the lower transistors Q4 and Q6 can be NMOS. These four MOSFETs form a full-bridge to control the motor's forward and reverse rotation. R1, R2, R7, and R8 are resistors used for current limiting; R3, R4, R5, and R6 are pull-down resistors to ensure the stable operation of the four MOSFETs. CTL1, CTL2, CTL3, and CTL4 are the high and low level control signals output from the controller's control terminals.

[0068] The opening process of the welcome pedal is as follows: After the POWER (voltage can be 13.5V) is powered on, the controller (such as the MCU) outputs MCU_CTL5 to a high level, Q8 turns on, pulling the base of Q9 low, thus turning Q9 on. The software in the MCU controls the circuit according to the control timing diagram. The MCU outputs high and low levels sequentially to turn Q2, Q10, Q11, and Q7 on and off. When MCU_CTL6 outputs a high level, Q2 is maintained for a duration of t1. The POWER voltage is regulated to Q1 by D2. When Q1 is on, POWER_MOTOR outputs level U1. At the same time, the controller outputs control signals CTL1 and CTL4, causing MOSFETs Q3 and Q6 to turn on, driving the motor to rotate.

[0069] Similarly, controlling the signals MCU_CTL7, MCU_CTL8, and MCU_CTL9 causes Q10, Q11, and Q7 to open and close sequentially according to the control timing diagram t2, t3, and t4. At this time, POWER_MOTOR drives the motor according to the output levels of U2, U3, and U4, realizing the normal opening of the welcome pedal. The control principle for the retraction and opening of the welcome pedal is the same, but the motor movement direction is opposite.

[0070] This disclosure also provides a vehicle control device, including a motor, a welcome pedal, and a pedal controller as shown in any embodiment. The pedal controller can supply power to the motor using graded direct voltage, and controls the extension or retraction of the electrically retractable welcome pedal by driving the motor to rotate.

[0071] Those skilled in the art will understand that all or some of the steps, systems, and apparatuses disclosed above, and their functional modules / units, can be implemented as software, firmware, hardware, or suitable combinations thereof. In hardware implementations, the division between functional modules / units mentioned above does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed collaboratively by several physical components. Some or all components may be implemented as software executed by a processor, such as a digital signal processor or a microprocessor, or as hardware, or as integrated circuits, such as application-specific integrated circuits (ASICs).

Claims

1. A pedal controller, characterized in that, include: A controller and a graded power supply circuit, wherein the control terminal of the controller is connected to the signal input terminal of the graded power supply circuit, and the power output terminal of the graded power supply circuit is connected to a motor for controlling the vehicle's welcome pedal. The controller is configured to output a control timing list of DC levels to the graded power supply circuit after detecting power-on. The control timing list includes N level signals within a set time period and the duration of each level signal, where N≥2. The graded power supply circuit is configured to sequentially output N graded DC voltages to the motor within a set time according to the control timing table. The graded power supply circuit includes: a power output control circuit, a graded voltage control circuit, and a power output switching circuit. The power output control circuit is configured to turn on when it receives a power signal and when the level signal output from the first control terminal of the controller is valid. The graded voltage control circuit is configured to, upon receiving a control timing list output from the second control terminal of the controller, sequentially output N graded DC voltages to the power output switching circuit within a set time according to the valid level signal in the control timing list. The power output switching circuit is configured to turn on when the power output control circuit is turned on, and to output N graded DC voltages sequentially to the motor; The power output control circuit includes a second transistor Q8 and a third transistor Q9, and the power output switching circuit includes a fourth transistor Q1. The base of the second transistor is connected to the first control terminal of the controller, and one of the collector and emitter of the second transistor is connected to the base of the third transistor, while the other is grounded; One of the collector and emitter of the third transistor is connected to a power supply, and the other is connected to the base of the fourth transistor; one of the collector and emitter of the fourth transistor is connected to a power supply, and the other is connected to the motor. The power of the second and third transistors is less than that of the fourth transistor.

2. The pedal controller according to claim 1, characterized in that, The graded voltage control circuit includes: N parallel graded voltage control circuits, and the DC voltages output by the N parallel graded voltage control circuits are different. Each graded voltage control circuit is configured to output a DC voltage to the power output switching circuit when it receives a valid level signal from the second control terminal of the controller.

3. The pedal controller according to claim 2, characterized in that, Each graded voltage control circuit includes a voltage switching circuit and a voltage output circuit, and each voltage output circuit outputs a different DC voltage. The voltage switching circuit is configured to turn on when it receives a valid level signal output from the second control terminal of the controller; The voltage output circuit is configured to output a DC voltage to the output switching circuit when the voltage switching circuit is turned on.

4. The pedal controller according to claim 3, characterized in that, The voltage switching circuit includes a first transistor, and the voltage output circuit includes a Zener diode. The different voltage output circuits in N parallel graded voltage control circuits use different types of Zener diodes to output different DC voltages; The base of the first transistor is connected to the second control terminal of the controller, one of the collector and emitter of the first transistor is connected to the positive terminal of the Zener diode, and the other is grounded; the negative terminal of the Zener diode is connected to the output switching circuit.

5. The pedal controller according to claim 2, characterized in that, When the controller outputs a DC level control timing list to the graded power supply circuit, it outputs the N level signals in the control timing list to each graded voltage control circuit in a preset order.

6. The pedal controller according to claim 1, characterized in that, The N graded DC voltages are either increasing or decreasing, or decreasing.

7. A vehicle control device, characterized in that, Includes a motor, a welcome pedal, and a pedal controller as described in any one of claims 1 to 6.

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